(b)
(a)
CMOS domino logic (a) basic gate, (b) static version (low frequency), and (c) latching version
CVSL logic (c) dynamic version, and (d) four input XOR CVSL gate
(a)
(b)
Pass logic function unit (a) nMOS, (b) full CMOS transmission gates
(c)
(d)
Pass logic function unit (c) modified CMOS for better layout, and (d) p-pullup version