R/S R/W D7 D6 D5 D4

4 0 0 0 0 0 0 0 0 0 1 5 0 0 0 0 0 0 0 0 1 0 14 0 0 0 0 0 0 0 1 BF D 13 0 0 0 0 0 0 1 A * D 12 0 0 0 0 0 1 A A * D 11 0 0 0 0 1 DL A A * D

D3 D2 D1 D0 Instruction/Description
10 0 0 0 1 SC N A A * D 9 0 0 1 D RL F A A * D 8 0 1 D C * * A A * D 7 1 * S B * * A A * D Pins Clear Display Return Cursor and LCD to Home Position Set cursor Move Direction Enable display/Cursor Move Cursor/Shift display Set Interface Length Move Cursor Into CGRAM Move Cursor to display Poll the Busy Flag Write a character to the Display at the current cursor position Read the character on the Display at the current cursor position

Pins
1 2 3 4 5 6 7-14

Description
Ground Vcc Contrast Voltage R/S-Instruction/Register Select R/S-Read/Write LCD Registers E Clock Data I/O Pins

Address
0XE002C000 0XE002C004 0XE002C014

Name
PINSEL0 PINSEL1 PINSEL2

Description
Pin function Select register 0 Pin function Select register 1 Pin function Select register 2

Access
Read/write Read/write Read/write

Symbol
P0.0 TO P0.31

Pin
19,21,22,26,27,2 9-31,33-35,3739,4,45-47,5355,13,5,9,11,13-15 19 21

Type
I/O

Description
Por0:port0 is a 32 bi-directional I/O port with individual direction controls for each bit. The operation of port0 pins depend upon the pin function selected via the connect backspin 26 and 31 of port 0 are not available. TXD0- Transmitter output for UART 0 PWM1- pulse width modulator output 1 RXD0-receiver input for UART 0 PWM3-pulse width modulator output 3 EINT0-external interrupt 0 input SCL- I2C clock input/output CAP0.0-capture input for timer 0, channel 0. SDA-I2C clock input/output MAT0.0-Match output for timer 0,channel 0 EINT1- external interrupt 1 input Sck0-serial clk for SPIO. CAP1.0-capture input for timer 1, channel 0. MOSIO-Master out slave in for SPIO MAT0.1-Match output for timer 0,channel 1 MOSIO-Master out slave in for SPIO CAP0.2-capture input for timer 0,channel 2 SSEL0-Slave selector for SPIO PWM2- pulse width modulator output 2 EINT2- external interrupt 2 input TXD1- Transmitter output for UART 1 PWM4- pulse width modulator output 4 RXD1-receiver input for UART 1 PWM6-pulse width modulator output 6 EINT3-external interrupt 3 input RTS1-Requst to send output for UART1. CAP1.0-capture input for timer 1, channel 0.

P0.0 P0.1

P0.2 P0.3

22 26

P0.4 P0.5 P0.6 P0.7

27 29 30 31

P0.8 P0.9

33 34

P0.10

35

O O I O I I/O I I/O O I I/O I I/O O I/O I I O I O O I O I O I

Symbol
PO.9/RXD1/ PWM6/ EINT3

Pin
34

Type
I/O I O I I/O O I I I/O I I I/O I/O I O I I/O O O I I/O I I I/O I/O I I I I/O I O I I/O I I/O O

Description
PO.9-General purpose digital pin(GPIO) RXD1-receiver input for UART 1 PWM6-pulse width modulator output 6 EINT3-external interrupt 3 input PO.10-General purpose digital pin(GPIO) RTS1-Requst to send output for UART1. CAP1.0-capture input for timer 1,channel 0. AD1.2-ADC 1,input 2.avaliable in LPC2148 PO.11-General purpose digital pin(GPIO) CTS1-clear send input for UART1. CAP1.1-capture input for timer 1,channel 0. SCL1- I2C clock input/output PO.12-General purpose digital pin(GPIO) DSR1-data Set ready output for UART1 MAT1.0-Match output for timer 1,channel 0 AD1.3-ADC 1,input 3.avaliable in LPC2148 PO.13-General purpose digital pin(GPIO) DTR1-data terminal ready output for UART1 MAT1.1-Match output for timer 1,channel 1 AD1.4-ADC 1,input 4.avaliable in LPC2148 PO.14-General purpose digital pin(GPIO) DCD1-Data carrier detect input for UART1 EINT1-external interrupt 1 input SDA1-I2C clock input/output PO.15-General purpose digital pin(GPIO) RI1-Ring indicator input for UART1 EINT2-external interrupt 3 input AD1.5-ADC 1,input 5.avaliable in LPC2148 PO.16-General purpose digital pin(GPIO) EINT0-external interrupt 0 input MAT0.2-Match output for timer 0,channel 2 CAP0.2-capture input for timer 0,channel 2. PO.17-General purpose digital pin(GPIO) CAP1.2-capture input for timer 1,channel 2. Sck1-serial clk for SPIO. MAT1.2-Match output for timer 1,channel 2

PO.10/ RTS1/ CAP1.0/ AD1.2

35

PO.11/ CTS1/ CAP1.1/ SCL1

37

PO.12/ DSR1/ MAT1.0/ AD1.3

38

PO.13/ DTR1/ MAT1.1/ AD1.4

39

PO.14/ DCD1/ EINT1/ SDA1

41

PO.15/ RI1/ EINT2/ AD1.5

45

PO.16/ EINT0/ MAT0.2/ CAP0.2

46

PO.17/ CAP1.2/ Sck1/ MAT1.2

47

Symbol
PO.18/ CAP1.3/ MISO1/ MAT1.3 PO.19/ MAT1.2/ MOSI1/ CAP1.2 PO.20/ MAT1.3/ SSEL1/ EINT3 PO.21/ PWM5/ AD1.6/ CAP1.2

Pin
53

Type
I/O I I/O O I/O O I/O I I/O O I I I/O O I I I/O I I O I/O I

Description
PO.18-General purpose digital pin(GPIO) CAP1.3-capture input for timer 1,channel 3. MISO1-Master in slave out for SSP MAT1.3-Match output for timer 1,channel 3 PO.19-General purpose digital pin(GPIO) MAT1.2-Match output for timer 1,channel 2 MOSI1-Master out slave in for SPIO CAP1.2-capture input for timer 1,channel 0 PO.20-General purpose digital pin(GPIO) MAT1.3-Match output for timer 1,channel 3 SSEL1:Slave selector for spp. EINT3-external interrupt 3 input PO.21-General purpose digital pin(GPIO) PWM5-pulse width modulator output 5 AD1.6-ADC 1,input 6.avaliable in LPC2148 CAP1.2-capture input for timer 1,channel 2. PO.22-General purpose digital pin(GPIO) AD1.7-ADC 1,input 7.avaliable in LPC2148 CAP0.0-capture input for timer 0,channel 0. MAT0.0-Match output for timer 0,channel 0 PO.23-General purpose digital pin(GPIO) VBUS- Indicates the presence of usb bus power PO.25-General purpose digital pin(GPIO) AD0.4-ADC 0,input 4. A out-DAC output PO.28-General purpose digital pin(GPIO) AD0.1-ADC 0,input 1. CAP0.2-capture input for timer0,,channel 2. MAT0.2-Match output for timer 0,channel 2 PO.29-General purpose digital pin(GPIO) AD0.2-ADC 0,input 2. CAP0.3-capture input for timer 0,channel 3. MAT0.3-Match output for timer 0,channel 3 PO.30-General purpose digital pin(GPIO) AD0.3-ADC 0,input 3. EINT3-external interrupt 3 input CAP0.0-capture input for timer 0,channel 0.

54

55

PO.22/ AD1.7/ CAP0.0/ MAT0.0 PO.23/ VBUS

58

PO.25/ AD0.4/ A out PO.28/ AD0.1/ CAP0.2/ MAT0.2 PO.29/ AD0.2/ CAP0.3/ MAT0.3 PO.30/ AD0.3/ EINT3/ CAP0.0

13

14

I/O I O I/O I I O I/O I I O

I/O I I I

15

Symbol
P0.31/UP_LED/CONNECT P1.0 to P1.31 P1.16/TRACEPKTO P1.17/TRACEPKT1 P1.18/TRACEPKT2 P1.19/TRACEPKT3 P1.20/TRACESYNC P1.21/PIPESTATO P1.22/PIPESTAT1 P1.23/PIPESTAT2 P1.24/TRACECLK P1.25/EXTINO

Pin
17

Type
O O O I/O I/O O I/O O I/O O I/O O I/O O I/O O I/O O I/O O I/O O I/O I I/O I/O I/O O

Description
PO.31-General purpose digital pin(GPIO)

16 12 8 4 48 44 40 36 32 28

PO.16-General purpose digital pin(GPIO) TRACEPKTO-Trace packet, bit 0. PO.17-General purpose digital pin(GPIO) TRACEPKT1-Trace packet, bit 1. PO.18-General purpose digital pin(GPIO) TRACEPKT2-Trace packet, bit 2. PO.19-General purpose digital pin(GPIO) TRACEPKT3-Trace packet, bit 3. PO.20-General purpose digital pin(GPIO) TRACESYNC-trace synchronization PO.21-General purpose digital pin(GPIO) PIPESTATO-Pipeline status bit 0 PO.22-General purpose digital pin(GPIO) PIPESTAT1-Pipeline status bit 1 PO.23-General purpose digital pin(GPIO) PIPESTAT2-Pipeline status bit 2 PO.24-General purpose digital pin(GPIO) TRACECLKPO.25-General purpose digital pin(GPIO) EXTNO-external trigger input. PO.26-General purpose digital pin(GPIO) RTCK-Returned test clock output PO.27-General purpose digital pin(GPIO) TDO-Test data out for JTAG interface

P1.26/RTCK

24

P1.27/TD0

64

Symbol
P1.28/TDI P1.28/TCK P1.28/TMS P1.28/TRST D+ D_ RESET

Pin
60 56 52 20 10 11 57

Type
I/O I I/O I I/O I I/O I I/O I/O I

Description
P1.28-General purpose input/output pin(GPIO) TD1:Test data in for jtag interface P1.29-General purpose input/output pin(GPIO) Tck:Test clk in for jtag interface P1.30-General purpose input/output pin(GPIO) TMS:Test mode selector in for jtag interface P1.31-General purpose input/output pin(GPIO) TRST:Test reset USB bidirectional D+ line USB bidirectional D- line External reset input: A LOW on this pin resets the device, causing I/O ports and peripheral to take on their default state, and processer execution to begin at address 0.TTL with hysteresis,5V tolerant. Input to the oscillator circuit & internal clock circuits. Output from the oscillator circuit Input to the RTC oscillator circuit Output from the RTC oscillator circuit GROUND: 0V reference Analog ground:0v reference This should be nominally be the same voltage as Vss but should be isolated to minize noise and error 3.3V power supply: this is power supply voltage for the core and i/o ports. Ana log 3.3V power supply:This should be nominally less than or equal to the Vdd but should be isolated to minimize noise and error ADC REFFERNCE:This should be nominally less than or equal to the Vdd but should be isolated to minimize noise and error RTC POWER SUPPLY:3.3V ON THIS PIN SUPPILES THE POWER TO THE RTC

XTAL1 XTAL2 RTXC1 RTXC2 Vss Vssa VDD VDDA VREF VSAT

62 61 3 5 6,18,25,42,50 59 23,43,51 7 63 49

I O I O I I I I I I