Acer Schematics

5
SYSTEM DC/DC
Project code: 91.4CQ01.001

PCB P/N
: 48.4CQ01.0SA
REVISION
: 08274-SA
JM41 Discrete Block Diagram
36
TPS51125
INPUTS
OUTPUTS
5V_S5(6A)
3D3V_S5(5A)
DCBATOUT
5V_AUX_S5
D
Thermal Sensor
Intel CPU
CLK GEN.
SMSC
Penryn SFF
ICS9LPRS365B
4,5,6
DDR3
VRAM(DDR3)
4
64Mbx16x4 (512MB)
57
LVDS
AGTL+ CPU I/F
DDR3
PCIe x 16
INTEGRATED GRAHPICS
800/1066 17,18
MHz
7,8,9,10,11,12
23
INPUTS
OUTPUTS
L7
DCBATOUT
1D5V_S3(11A)
BOTTOM
L8
Codec
MAX8731A
Atheros AR8131
INPUTS
12 USB 2.0/1.1 ports

High Definition Audio
Mini USB
Blue Tooth
BD
Mini 1 Card
WLAN
USB 3 Port
Mini 2 Card
3G
MINI
PCIe x1 *3port
LPC I/F
Serial Peripheral I/F
Matrix Storage Technology(DO)
24
25
Active Managemnet Technology(DO)
INPUTS
DCBATOUT
SATA
HDD SATA
CARDREADER
BD
24
POWER
1 Port
BD
26
Winbond
WPCE773LA0DG
28
17
MINI BD
3 Port 25
SSD/HDD SATA
21
SPI BIOS
(2MB)
DEBUG
CONN.
DCBATOUT
INT.
KB 28
40
OUTPUTS
VCC_GFXCORE
(7A)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MS/MS Pro/xD
/MMC/SD
Title
BLOCK DIAGRAM
Size
Custom
0~1.3V
64A
29
Date:
5
VCC_CORE
Touch
Pad 30
CARDREADER BD
2 Port
24
SATA
INPUTS
LPC
KBC
Camera
20
VGA
USB
CRT BD
2 Port
SATA
35
OUTPUTS
ISL6263A
13,14,15,16
20
6.0A
ADP3207A
LPC BUS
BD
CHG_PWR
18V
CPU DC/DC
CRT
SATA
41
OUTPUTS
DCBATOUT
ETHERNET (10/100/1000MbE)
ODD SATA
DDR_VREF_S3
(1.2A)
CHARGER
RJ45
4 SATA
OUTPUTS
5V_S5
ACPI 2.0
AZALIA
Realtek
ALC269Q 22
MIC In
39
RT9026
PCI/PCI BRIDGE
1.5W
Line Out
38
RT8202
L6
TXFM
Giga LAN
6 PCIe ports
INT.SPKR
1D05V_S0(10A)
L5
HDMI
LAN
ICH9M SFF
OUTPUTS
DCBATOUT
INPUTS
20
C-Link0
INPUTS
L4
CRT
CRT
BD
HDMI
53,54,55,56
X4 DMI
400MHz
L3
GND/VCC
LCD
RGB CRT
ATI M92-S2
LVDS, CRT I/F
37
RT8202
VCC/GND
19
DDR Memory I/F
19
L2
667/800/1066MHz@1.05V
Cantiga-GS SFF
800/1066 17,18
MHz
Int MIC
L1
S
VCC/GND
HOST BUS
TOP
27
EMC2103
3D3V_AUX_S5
PCB STACKUP
Document Number
Rev
SB
JM41_Discrete
Monday, March 02, 2009
Sheet
1
of
48
ICH9M Functional Strap Definitions

ICH9 EDS 642879 Rev.1.5
page 92
ICH9M Integrated Pull-up

and Pull-down Resistors
Signal
Usage/When Sampled
HDA_SDOUT
XOR Chain Entrance/

PCIE Port Config1 bit1,
Rising Edge of PWROK
Allows entrance to XOR Chain testing when TP3

pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down
CL_CLK[1:0]
PULL-UP 20K
CL_DATA[1:0]
PULL-UP 20K
HDA_SYNC
PCIE config1 bit0,

Rising Edge of PWROK.
This signal has a weak internal pull-down.

Sets bit0 of RPC.PC(Config Registers:Offset 224h)
CL_RST0#
PULL-UP 20K
GNT2#/
GPIO53
PCIE config2 bit2,

DPRSLPVR/GPIO16
PULL-DOWN 20K
ENERGY_DETECT
PULL-UP 20K
GPIO20
Reserved
This signal has a weak internal pull-up.

Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.
HDA_BIT_CLK
PULL-DOWN 20K
GNT1#/
GPIO51
ESI Strap (Server Only)

HDA_DOCK_EN#/GPIO33
PULL-UP 20K
HDA_RST#
PULL-DOWN 20K
HDA_SDIN[3:0]
PULL-DOWN 20K
HDA_SDOUT
PULL-DOWN 20K
GNT3#/
GPIO55
GNT0#:
SPI_CS1#/
GPIO58
SPI_MOSI
3
GPIO49
SATALED#
SPKR
Top-Block
Swap Override.
Comment
ESI compatible mode is for server platforms only.

This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
ICH9 EDS 642879
SIGNAL
GLAN_DOCK#
GNT[3:0]#/GPIO[55,53,51]
PULL-UP 20K
GPIO[20]
PULL-DOWN 20K
Integrated TPM Enable,

Rising Edge of CLPWROK
Sample low: the Integrated TPM will be disabled.

Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.
GPIO[49]
PULL-UP 20K
LDA[3:0]#/FHW[3:0]#
PULL-UP 20K
LAN_RXD[2:0]
PULL-UP 20K
LDRQ[0]
PULL-UP 20K
LDRQ[1]/GPIO23
PULL-UP 20K
PME#
PULL-UP 20K
PWRBTN#
PULL-UP 20K
PCI Express Lane

Reversal. Rising Edge
of PWROK.
Signal has weak internal pull-up. Sets bit 27

of MPC.LR(Device 28:Function 0:Offset D8)
SATALED#
PULL-UP 15K
No Reboot.
If sampled high, the system is strapped to the

"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
SPI_CS1#/GPIO58/CLGPIO6
PULL-UP 20K
SPI_MOSI
PULL-DOWN 20K
SPI_MISO
PULL-UP 20K
SPKR
PULL-DOWN 20K
TACH_[3:0]
PULL-UP 20K
XOR Chain Entrance.

This signal should not be pull low unless using

XOR Chain testing.
GPIO33/
HDA_DOCK
_EN#
Flash Descriptor
Security Override Strap
Sampled low:the Flash Descriptor Security will be

overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.
Pin Name
CFG[2:0]
CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]
TP[3]
PULL-UP 20K
USB[11:0][P,N]
PULL-DOWN 15K
0.5
Configuration
Strap Description
FSB Frequency
Select
000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved
Reserved
CFG5
DMI x2 Select
CFG6
iTPM Host
Interface
0 = DMI x2
1 = DMI x4 (Default)
0= The iTPM Host Interface is enabled(Note2)
1=The iTPM Host Interface is disalbed(default)
0 = Transport Layer Security (TLS) cipher
suite with no confidentiality
1 = TLS cipher suite with
confidentiality (default)
CFG7
Intel Management
engine Crypto strap
CFG9
PCIE Graphics Lane
0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane
Numbered in order
CFG10
PCIE Loopback enable
0 = Enable (Note 3)
1= Disabled (default)
PULL-DOWN 20K
Controllable via Boot BIOS Destination bit

(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
TP3
page 218
The pull-up or pull-down active when configured for native

GLAN_DOCK# functionality and determined by LAN controller
Boot BIOS Destination

Selection 0:1.
DMI Termination Voltage, The signal is required to be low for desktop

applications and required to be high for
mobile applications.
Montevina Platform Design guide 22339
Rev.1.5
Resistor Type/Value
HDA_SYNC
Cantiga chipset and ICH9M I/O controller

Hub strapping configuration
CFG[13:12]
CFG16
CFG19
00
10
01
11
XOR/ALL
=
=
=
=
Reserve
XOR mode Enabled
ALLZ mode Enabled (Note 3)
Disabled (default)
FSB Dynamic ODT
0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled (Default)
DMI Lane Reversal
0 = Normal operation(Default):
Lane Numbered in Order
1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)
CFG20
Digital Display Port

(SDVO/DP/iHDMI)
Concurrent with PCIe
0 = Only Digital Display Port

or PCIE is operational (Default)
1 =Digital display Port and PCIe are
operting simulataneously via the PEG port
0 =No SDVO Card Present (Default)
SDVO_CTRLDATA
SDVO Present
1 = SDVO Card Present
0 = LFP Disabled (Default)
L_DDC_DATA
Local Flat Panel

(LFP) Present
1= LFP Card Present; PCIE disabled
NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Title
Reference
Size
A3
Document Number
Date:
Rev
SB
JM41_Discrete
Sheet
of
48
1D05V_S0
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C549
SCD1U16V2KX-3GP
C548
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3D3V_CLK_S0
C507
C526
SCD1U16V2KX-3GP
3D3V_48MPW R_S0
C517
SCD1U16V2KX-3GP
C524
SC4D7U10V5ZY-3GP
C532
SCD1U16V2KX-3GP
C515
SCD1U16V2KX-3GP
C512
SCD1U16V2KX-3GP
SC1U10V3KX-3GP
SC4D7U6D3V3KX-GP
C522
0R0603-PAD
R222
SCD1U16V2KX-3GP
3D3V_48MPW R_S0
C525 C541
C523
1D05V_CLK_S0
C516
C508
SCD1U16V2KX-3GP
2
0R3-0-U-GP
3D3V_S0
SCD1U16V2KX-3GP
1
SCD1U16V2KX-3GP
R215
R220
3D3V_S0
2
0R0603-PAD
C579
3D3V_CLK_S0
SC27P50V2JN-2-GP
10KR2J-3-GP
CL=20pF0.2pF
1KR2J-1-GP
C542
3D3V_S0
U35
X2
X-14D31818M-35GP
82.30005.891
82.30005.951
2
GEN_XTAL_OUT
GEN_XTAL_IN
4
3
2
1
SC27P50V2JN-2-GP
RN25
SRN10KJ-6-GP
1
2
3
4
CLK_MCH_OE#
SATACLKREQ#
LAN_CLKREQ#
W LAN_CLKREQ#
8
7
6
5
CR#_D
CR#_C
CR#_H
CR#_E
CLK48_ICH
4,8
CPU_SEL0
2
R227 2
RN31
4,8
8
7
6
5
PCLKCLK5
PCLKCLK4
PCLKCLK2
CPU_SEL2_R
SMBC_CKG
SMBD_CKG
USB_48MHZ/FSLA
45
44
PCI_STOP#
CPU_STOP#
7
6
SCLK
SDATA
63
CK_PWRGD/PD#
PCLKCLK4
PCLKCLK5
8
10
11
12
13
14
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN
CPU_SEL2_R
64
5
FSLB/TEST_MODE
REF0/FSLC/TEST_SEL
55
NC#55
PCLKCLK2
PCLK_ICH
PCLK_KBC
2
CLK48_ICH
1
DY EC48
1
DY EC45
1
EC46
DY
1
EC44
2
SC22P50V2JN-4GP
2
SC22P50V2JN-4GP
2
SC22P50V2JN-4GP
2
SC22P50V2JN-4GP
ICS9LPRS365BKLFT-GP-U
71.09365.A03
CPU
CPUT1_F
CPUC1_F
58
57
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
NB
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
54
53
CLK_PCIE_ICH 14
CLK_PCIE_ICH# 14
SB DMI
SRCT7/CR#_F
SRCC7/CR#_E
51
50
SRCT6
SRCC6
48
47
CLK_PCIE_MINI1 25
CLK_PCIE_MINI1# 25
Wireless
SRCT10
SRCC10
41
42
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
SRCT11/CR#_H
SRCC11/CR#_G
40
39
SRCT9
SRCC9
37
38
SRCT4
SRCC4
34
35
SRCT3/CR#_C
SRCC3/CR#_D
31
32
SRCT2/SATAT
SRCC2/SATAC
CR#_E
LAN
CR#_H
CR#_G
CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8
NB CLK
28
29
CLK_PCIE_SATA 13
CLK_PCIE_SATA# 13
SB SATA
27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2
24
25
DREFSSCLK 8
DREFSSCLK# 8
SRCT0/DOTT_96
SRCC0/DOTC_96
20
21
DREFCLK 8
DREFCLK# 8
GND
CLK_ICH14
DY
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CR#_C
CR#_D
NB CLK
NB CLK
(96 MHz)
65
SRN33J-7-GP
CPU_SEL1
GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND
4,8
22
30
36
49
59
26
CPU_SEL2_R
PCLKCLK2
PCLKCLK4
PCLKCLK5
GND48
GNDPCI
GNDREF
8
7
6
5
18
15
1
1
2
3
4
CLK_ICH14
PCLK_FW H
PCLK_KBC
PCLK_ICH
61
60
VGA
RN32
14
29
28
14
CPUT0
CPUC0
CLK_PCIE_VGA 42
CLK_PCIE_VGA# 42
14 CLK_PW RGD
SRN10KJ-6-GP
CPU_SEL2
17
33R2F-3-GP
1 2K2R2J-2-GP
G81
1GAP-CLOSE
2
1
2
GAP-CLOSE
G80
16,17,18 SMBC_ICH
16,17,18 SMBD_ICH
1
2
3
4
CLK_48
14 PM_STPPCI#
14 PM_STPCPU#
SRN470J-3-GP
3D3V_S0
X1
X2
R230
14
5
6
7
8
RN24
8
14
25
25
3
2
19
27
43
52
33
56
CR#_G
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
R209
43 VGA_CLK_REQ#
1D05V_CLK_S0
2
4
16
9
46
62
23
R210
VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3
3D3V_S0
2nd = 71.08513.003
EMI capacitor for Antenna team suggestion
ICS9LPRS365YGLFT setting table

PIN NAME
DESCRIPTION
PCI0/CR#_A
Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
PCI1/CR#_B
Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair
PCI2/TME
0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed
PCI3
PCI4/27M_SEL
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#

1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#
PCI_F5/ITP_EN
0 =SRC8/SRC8#
1 = ITP/ITP#
SRCT3/CR#_C
Byte 5, bit 3
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair
Byte 5, bit 2
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair
3RD = 71.00875.C03
SEL2 SEL1 SEL0

FSC FSB FSA
PIN NAME
DESCRIPTION
SRCC3/CR#_D
Byte 5, bit 1
1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
Byte 5, bit 0
0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair
SRCC7/CR#_E
Byte 6, bit 7
0 = SRC7# enabled (default)
1= CR#_F controls SRC6
SRCT7/CR#_F
Byte 6, bit 6
1= CR#_F controls SRC8
SRCC11/CR#_G
Byte 6, bit 5
0 = SRC11# enabled (default)
1= CR#_G controls SRC9
SRCT11/CR#_H
Byte 6, bit 4
1= CR#_H controls SRC10
1
0
0
0
0
1
1
1
0
0
FSB
100M
133M
166M
200M
266M
X
533M
667M
800M
1067M
1
Wistron Corporation
Title
Clock Generator
Size
Document Number
Rev
JM41_Discrete
Date:
0
0
1
1
0
CPU
Sheet
E
SB
of
48
H_A#[35..3]
H_DINV#[3..0]
1
HIT#
HITM#
H2
F2
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AY8
BA7
BA5
AY2
AV10
AV2
AV4
AW7
AU1
AW5
AV8
J7
H_RS#[2..0]
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
H_HIT#
H_HITM#
7
7
THERMTRIP#
H_THERMDC
RSVD#V2
RSVD#Y2
RSVD#AG5
RSVD#AL5
RSVD#J9
RSVD#F4
RSVD#H8
C417
SC2200P50V2KX-2GP
DY
Close to NB
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
1D05V_S0
7 H_DSTBN#0
7 H_DSTBP#0
7 H_DINV#0
R182
56R2F-1-GP
CPU_PROCHOT#_1
D38
BB34
BD34
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_THERMDA 27
H_THERMDC 27
B10
PM_THRMTRIP-A# 8,13,32
PM_THRMTRIP#
ICH9 and MCH
PH @ page48
H CLK
BCLK0
BCLK1
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_THERMDA
THERMAL
PROCHOT#
THRMDA
THRMDC
A35
C35
2 OF 6
CPU1B
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
should connect to
without T-ing
1D05V_S0
Layout Note:
"CPU_GTLREF0"
0.5" max length.
7
7
7
1KR2F-3-GP
R152
R153
2KR2F-3-GP
PENRYN-SFF-GP-U1-NF
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CPU_GTLREF0
C422
DY TPAD14-GP
TP63
TPAD14-GP
TPAD14-GP
TP2
TP50
3,8
3,8
3,8
F40
G43
E43
J43
H40
H44
G39
E41
L41
K44
N41
T40
M40
G41
M44
L43
K40
J41
P40
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#
P44
V40
V44
AB44
R41
W41
N43
U41
AA41
AB40
AD40
AC41
AA43
Y40
Y44
T44
U43
W43
R43
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#
AW43
TEST1
E37
TEST2
D40
RSVD_CPU_12
1
C43
TEST4
AE41
1RSVD_CPU_13AY10
1RSVD_CPU_14
AC43
A37
C37
B38
CPU_SEL0
CPU_SEL1
CPU_SEL2
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
BSEL0
BSEL1
BSEL2
DATA GROUP 2
G5
K2
H4
K4
L1
H_D#[63..0]
13
RESET#
RS0#
RS1#
RS2#
TRDY#
H_INIT#
H_LOCK# 7
H_CPURST# 7
N1
CONTROL
LOCK#
H_DSTBP#[3..0]
H_IERR#
RESERVED
V2
Y2
AG5
AL5
J9
F4
H8
STPCLK#
LINT0
LINT1
SMI#
B40
D8
DATA GROUP 3
13
13
13
13
BR0#
IERR#
INIT#
H_DSTBN#[3..0]
R178
56R2F-1-GP
H_STPCLK#
H_INTR
H_NMI
H_SMI#
F8
C9
C5
E5
A20M#
FERR#
IGNNE#
H_BREQ#0 7
M2
H_D#[63..0]
Place testpoint on
H_IERR# with a GND
0.1" away
SC1KP50V2KX-1GP
2
1
13
13
13
H_DEFER# 7
H_DRDY# 7
H_DBSY# 7
N5
F38
J1
H_DSTBP#[3..0]
1D05V_S0
7
7
7
DATA GROUP 1
H_A20M#
H_FERR#
H_IGNNE#
C7
D4
F10
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#
ICH
H_ADSTB#1
AN1
AK4
AG1
AT4
AK2
AT2
AH2
AF4
AJ5
AH4
AM4
AP4
AR5
AJ1
AL1
AM2
AU5
AP2
AR1
AN5
DEFER#
DRDY#
DBSY#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADDR GROUP 1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
TPAD14-GP
H_ADS#
H_BNR#
H_BPRI#
DATA GROUP 0
H_REQ#0 R1
H_REQ#1 R5
H_REQ#2 U1
H_REQ#3 P4
H_REQ#4 W5
TP4
M4
J5
L5
H_ADSTB#0
H_REQ#[4..0]
ADS#
BNR#
BPRI#
ADDR GROUP 0
7
7
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#
XDP/ITP SIGNALS
P2
V4
W1
T4
AA1
AB4
T2
AC5
AD2
AD4
AA5
AE5
AB2
AC1
Y4
1 1
CPU1A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_DINV#[3..0]
H_DSTBN#[3..0]
1 OF 6
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
AP44
AR43
AH40
AF40
AJ43
AG41
AF44
AH44
AM44
AN43
AM40
AK40
AG43
AP40
AN41
AL41
AK44
AL43
AJ41
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
AV38
AT44
AV40
AU41
AW41
AR41
BA37
BB38
AY36
AT40
BC35
BC39
BA41
BB40
BA35
AU43
AY40
AY38
BC37
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
MISC
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
AE43 COMP0
AD44 COMP1
AE1 COMP2
AF2 COMP3
G7
B8
C41
E7
D10
BD10
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
R1581
R1601
R1621
R1611
27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP
2
2
2
2
H_DPRSTP# 8,13,34
H_DPSLP# 13
H_DPW R# 7
H_PW RGD 13,32
PSI# 1
H_CPUSLP# 7
TP3
TPAD14-GP
PENRYN-SFF-GP-U1-NF
C117
H_A#[35..3]
SC100P50V2JN-3GP
2
DY
1D05V_S0
H_FERR#
H_STPCLK#
H_IGNNE#
H_INTR
H_DPSLP#
H_PW RGD
H_A20M#
H_SMI#
H_NMI
H_INIT#
C442
C97
C436
C439
C437
C429
C435
C430
C431
C428
1
1DY
1DY
1DY
1DY
1DY
1DY
1DY
1DY
1DY
DY
2
2
2
2
2
2
2
2
2
2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
XDP_TMS
R140 1
2 51R2F-2-GP
XDP_TDI
R141 1
2 51R2F-2-GP
XDP_BPM#5
R143 1
2 51R2F-2-GP
XDP_TDO
R142 1
1 DY
R185
TEST1
1KR2J-1-GP
1 DY
2 TEST2
R173
1KR2J-1-GP
C425
2DY
TEST4
1
SCD1U10V2KX-4GP
Net "TEST4" as short as possible,

make sure "TEST4" routing is
reference to GND and away other
noisy signals
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
2 51R2F-2-GP
DY
3D3V_S0
XDP_DBRESET# R37
H_DPRSTP#
H_DPSLP#
H_DPW R#
H_PW RGD
H_CPUSLP#
H_INIT#
H_CPURST#
2 1KR2J-1-GP
DY
XDP_TCK
R145 1
2 51R2F-2-GP
XDP_TRST#
R144 1
2 51R2F-2-GP
1
1
1
1
1
1
1
TP10
TP69
TP62
TP12
TP68
TP13
TP9
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
Place these TP on button-side,

easy to measure.
All place within 2" to CPU
Wistron Corporation
Title
CPU (1 of 3)
Size
Document Number
Date:
Rev
SB
JM41_Discrete
A
Sheet
E
of
48
VCC_CORE
VCC_CORE
B42
F44
D42
F42
H42
K42
M42
P42
T42
V42
Y42
AB42
AD42
AF42
AH42
AK42
AM42
AP42
AV44
AT42
AV42
AY42
BA43
BB42
C39
E39
G37
H38
J39
L39
M38
N39
R39
T38
U39
W39
Y38
AA39
AC39
AD38
AE39
AG39
AH38
AJ39
AL39
AM38
AN39
AR39
AR37
AT38
AU39
AU37
AW39
AW37
BA39
BC41
BD38
B36
H34
D36
K34
M34
M36
P34
T34
V34
T36
Y34
AB34
AD34
Y36
AD36
AF34
AH34
AH36
AK34
AM34
AM36
AP34
AR35
3 OF 6
BC13
1
2
1D5V_S0
1D5V_VCCA_S0
R186
34
C453
1
H_VID[6..0]
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
C455
SC10U6D3V5MX-3GP
VSSSENSE
DY
BD12
TC7
SE330U2D5VM-GP
P_77.C3371.10L
VCCSENSE
C47
SCD01U16V2KX-3GP
VID0
VID1
VID2
VID3
VID4
VID5
VID6
BD8
BC7
BB10
BB8
BC5
BB4
AY4
C36
B34
D34
layout note: "1D5V_VCCA_S0"

as short as possible
1
VCCA
VCCA
1D05V_S0
SCD1U10V2KX-4GP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
J11
E11
G11
J37
K38
L37
N37
P38
R37
U37
V38
W37
AA37
AB38
AC37
AE37
SCD1U10V2KX-4GP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB28
AD30
AD28
Y26
AB26
AD26
AF30
AF28
AH30
AH28
AF26
AH26
AK30
AK28
AM30
AM28
AP30
AP28
AK26
AM26
AP26
AT30
AT28
AV30
AV28
AY30
AY28
AT26
AV26
AY26
BB30
BB28
BD30
CPU1C
F32
G33
H32
J33
K32
L33
M32
N33
P32
R33
T32
U33
V32
W33
Y32
AA33
AB32
AC33
AD32
AE33
AF32
AG33
AH32
AJ33
AK32
AL33
AM32
AN33
AP32
AR33
AT34
AT32
AU33
AV32
AY32
BB32
BD32
B28
B30
B26
D28
D30
F30
F28
H30
H28
D26
F26
H26
K30
K28
M30
M28
K26
M26
P30
P28
T30
T28
V30
V28
P26
T26
V26
Y30
Y28
AB30
2
0R0603-PAD
VCORE_VCCSENSE
34
VCORE_VSSSENSE 34
Layout Note:
PENRYN-SFF-GP-U1-NF
RN13
2
1
3
4
VCCSENSE and VSSSENSE lines

should be of equal length.
VCC_CORE
SRN100J-3-GP
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
CPU1D
4 OF 6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AU35
AV34
AW35
AW33
AY34
AT36
AV36
BA33
BC33
BB36
BD36
C27
C29
C31
E29
E27
G29
G27
E31
G31
J29
J27
L29
L27
N29
N27
J31
L31
N31
R29
R27
U29
U27
R31
U31
W29
W27
W31
AA29
AA27
AC29
AC27
AA31
AC31
AE29
AE27
AG29
AG27
AJ29
AJ27
AE31
AG31
AJ31
AL29
AL27
AN29
AN27
AL31
AN31
AR29
AR27
AR31
AU29
AU27
AW29
AW27
AU31
AW31
BA29
BA27
BC29
BC27
BA31
BC31
C21
C23
C25
E25
E23
E21
PENRYN-SFF-GP-U1-NF
Wistron Corporation
Title
CPU (2 of 3)
Size
Document Number
Date:
Rev
SB
JM41_Discrete
A
Sheet
E
of
48
VCC_CORE
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C103
C2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C107
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C100
SCD1U10V2KX-4GP
C41
SCD1U10V2KX-4GP
C45
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C58
SCD1U10V2KX-4GP
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C99
SCD1U10V2KX-4GP
C114
SCD1U10V2KX-4GP
C33
SCD1U10V2KX-4GP
C52
SCD1U10V2KX-4GP
C56
SCD1U10V2KX-4GP
C115
SCD1U10V2KX-4GP
C69
SCD1U10V2KX-4GP
C76
SCD1U10V2KX-4GP
C85
SCD1U10V2KX-4GP
C71
SCD1U10V2KX-4GP
C79
SCD1U10V2KX-4GP
C74
SCD1U10V2KX-4GP
C60
SCD1U10V2KX-4GP
C67
SCD1U10V2KX-4GP
C72
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C80
VCC_CORE
VCC_CORE
C64
SCD1U10V2KX-4GP
C83
SCD1U10V2KX-4GP
C101
SCD1U10V2KX-4GP
C112
SCD1U10V2KX-4GP
C104
SCD1U10V2KX-4GP
C102
SCD1U10V2KX-4GP
C84
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C91
2
1
2
C40
SC10U6D3V3MX-GP
C51
VCC_CORE
C77
C29
SC10U6D3V3MX-GP
C411
SC10U6D3V3MX-GP
C413
SC10U6D3V3MX-GP
C54
C34
SC10U6D3V3MX-GP
C3
SC10U6D3V3MX-GP
C48
SC10U6D3V3MX-GP
C43
SC10U6D3V3MX-GP
C66
SC10U6D3V3MX-GP
C24
SC10U6D3V3MX-GP
C23
SC10U6D3V3MX-GP
C27
SC10U6D3V3MX-GP
C4
SC10U6D3V3MX-GP
C42
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C53
VCC_CORE
C37
VCC_CORE
C59
C46
SC10U6D3V3MX-GP
C38
SC10U6D3V3MX-GP
C32
SC10U6D3V3MX-GP
C412
SC10U6D3V3MX-GP
C10U6D3V3MX-GP
C10U6D3V3MX-GP
C10U6D3V3MX-GP
VCC_CORE
C19
SC10U6D3V3MX-GP
C6S
SC10U6D3V3MX-GP
C25
SC10U6D3V3MX-GP
C7S
SC10U6D3V3MX-GP
C409
SC10U6D3V3MX-GP
C8S
SC10U6D3V3MX-GP
C5S
C10U6D3V3MX-GP
C10U6D3V3MX-GP
SC10U6D3V3MX-GP
C1S
Place these inside socket

cavity on L8(North side Secondary)
1
2
1
2
1
2
1
2
1
2
C50
C57
SCD1U10V2KX-4GP
C81
SCD1U10V2KX-4GP
C113
SCD1U10V2KX-4GP
C63
SCD1U10V2KX-4GP
C82
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D05V_S0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTF_VSS#A5
NCTF_VSS#A41
NCTF_VSS#AY44
NCTF_VSS#BA1
NCTF_VSS#BD4
NCTF_VSS#BD40
NCTF_VSS#D44
NCTF_VSS#E1
AD10
AH12
AE15
AG15
AJ15
AH10
AM12
AL15
AN15
AR15
AM10
AT12
AV12
AW13
AW11
AY12
AU15
AW15
AT10
BA13
BA11
BB12
BC11
BA15
BC15
B6
D6
E9
F6
G9
H6
K8
K6
M8
M6
P8
P6
T8
T6
V8
V6
U5
Y8
Y6
AB8
AB6
AD8
AD6
AF8
AF6
AH8
AH6
AK8
AK6
AM8
AM6
AP8
AP6
AT8
AT6
AU9
AV6
AU7
AW9
AY6
BA9
BB6
BC9
BD6
B4
C3
E3
G3
J3
L3
N3
R3
U3
W3
AA3
AC3
AE3
AG3
AJ3
AL3
AN3
AR3
AU3
AW3
BA3
BC3
D2
G1
AW1
BB2
A39
A29
A27
A31
A25
A23
A21
A19
A17
A11
A15
A7
A9
NCTF_VSS#A5
A5
A41 NCTF_VSS#A41
AY44 NCTF_VSS#AY44
BA1 NCTF_VSS#BA1
BD4 NCTF_VSS#BD4
BD40 NCTF_VSS#BD40
D44 NCTF_VSS#D44
NCTF_VSS#E1
E1
1
1
1
1
1
1
1
1
TP71
TP61
TP49
TP47
TP46
TP48
TP55
TP51
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
1D05V_S0
PENRYN-SFF-GP-U1-NF
1D05V_S0
5 OF 6
NCTF TEST PIN:

A5,A41,AY44,BA1,BD4,BD40,D44,E1
VCC_CORE
G25
G23
G21
J25
J23
J21
L25
L23
L21
N25
N23
N21
R25
R23
R21
U25
U23
U21
W25
W23
W21
AA25
AA23
AA21
AC25
AC23
AC21
AE25
AE23
AE21
AG25
AG23
AG21
AJ25
AJ23
AJ21
AL25
AL23
AL21
AN25
AN23
AN21
AR25
AR23
AR21
AU25
AU23
AU21
AW25
AW23
AW21
BA25
BA23
BA21
BC25
BC23
BC21
C17
C19
E19
E17
G19
G17
J19
J17
L19
L17
N19
N17
R19
R17
U19
U17
W19
W17
AA19
AA17
AC19
AC17
AE19
AE17
AG19
AG17
AJ19
AJ17
AL19
AL17
AN19
AN17
AR19
AR17
AU19
AU17
AW19
AW17
BA19
BA17
BC19
BC17
C11
C15
E15
G15
H10
M12
J15
L15
N15
M10
T12
R15
U15
W15
T10
Y10
Y12
AA15
AC15
AD12
VCC_CORE
CPU1E
Place these inside socket

cavity on L8(North side Secondary)
C410
BD28
BB26
BD26
B22
B24
D22
D24
F24
F22
H24
H22
K24
K22
M24
M22
P24
P22
T24
T22
V24
V22
Y24
Y22
AB24
AB22
AD24
AD22
AF24
AF22
AH24
AH22
AK24
AK22
AM24
AM22
AP24
AP22
AT24
AT22
AV24
AV22
AY24
AY22
BB24
BB22
BD24
BD22
B16
B18
B20
D16
D18
F18
F16
H18
H16
D20
F20
H20
K18
K16
M18
M16
K20
M20
P18
P16
T18
T16
V18
V16
P20
T20
V20
Y18
Y16
AB18
AB16
AD18
AD16
Y20
AB20
AD20
AF18
AF16
AH18
AH16
AF20
AH20
AK18
AK16
AM18
AM16
AP18
AP16
AK20
AM20
AP20
AT18
AT16
AV18
AV16
AY18
AY16
AT20
AV20
AY20
BB18
BB16
BD18
BD16
BB20
BD20
AM14
AP14
AT14
AV14
AY14
BB14
BD14
AF38
AG37
AJ37
AK38
CPU1F
6 OF 6
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
AL37
AN37
AP38
B32
C33
D32
E35
E33
F34
G35
F36
H36
J35
L35
N35
K36
R35
U35
P36
V36
W35
AA35
AC35
AB36
AE35
AG35
AJ35
AF36
AL35
AN35
AK36
AP36
B12
B14
C13
D12
D14
E13
F14
F12
G13
H14
H12
J13
K14
K12
L13
L11
M14
N13
N11
K10
P14
P12
R13
R11
T14
U13
U11
V14
V12
W13
W11
P10
V10
Y14
AA13
AA11
AB14
AB12
AC13
AC11
AD14
AB10
AE13
AE11
AF14
AF12
AG13
AG11
AH14
AJ13
AJ11
AF10
AK14
AK12
AL13
AL11
AN13
AN11
AP12
AR13
AR11
AK10
AP10
AU13
AU11
L9
L7
N9
N7
R9
R7
U9
U7
W9
W7
AA9
AA7
AC9
AC7
AE9
AE7
AG9
AG7
AJ9
AJ7
AL9
AL7
AN9
AN7
AR9
AR7
A33
A13
PENRYN-SFF-GP-U1-NF
A
Wistron Corporation
Title
CPU (3 of 3)
Size
Document Number
Date:
Rev
JM41_Discrete
5
Sheet
1
SB
of
48
H_D#[63..0]
H_D#[63..0]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
1D05V_S0
H_SWING routing Trace width and

Spacing use 10 / 20 mil
R196
221R2F-2-GP
H_SWING Resistors and

Capacitors close MCH
500 mil ( MAX )
R194
100R2F-L1-GP-U
1
2
C499
SCD1U10V2KX-4GP
H_SW ING
H_RCOMP routing Trace width and

Spacing use 10 / 20 mil
1
R190
2 H_RCOMP
24D9R2F-L-GP
Place them near to the chip ( < 0.5")
H_SW ING
H_RCOMP
J7
H6
L11
J3
H4
G3
K10
K12
L1
M10
M6
N11
L7
K6
M4
K4
P6
W9
V6
V2
P10
W7
N9
P4
U9
V4
U1
W3
V10
U7
W11
U11
AC11
AC9
Y4
Y10
AB6
AA9
AB10
AA1
AC3
AC7
AD12
AB4
Y6
AD10
AA11
AB2
AD4
AE7
AD2
AD6
AE3
AG9
AG7
AE11
AK6
AF6
AJ9
AH6
AF12
AH4
AJ7
AE9
B6
D4
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
1D05V_S0
4
4
R48
1KR2F-3-GP
H_CPURST#
H_CPUSLP#
L17
K18
R49
2KR2F-3-GP
H_CPURST#
H_CPUSLP#
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
L15
B14
C15
D12
F14
G17
B12
J15
D16
C17
D14
K16
F16
B16
C21
D18
J19
J21
B18
D22
G19
J17
L21
L19
G21
D20
K22
F18
K20
F20
F22
B20
A19
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
F10
A15
C19
C9
B8
C11
E5
D6
AH10
AJ11
G11
H2
C7
F8
A11
D8
H_ADS#
4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR#
4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPW R# 4
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#[3..0]
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
L9
N7
AA7
AG3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN_0
H_DSTBN_1
H_DSTBN_2
H_DSTBN_3
K2
N3
AA3
AF4
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP_0
H_DSTBP_1
H_DSTBP_2
H_DSTBP_3
L3
M2
Y2
AF2
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
J13
L13
C13
G13
G15
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
F4
F2
G7
H_RS#0
H_RS#1
H_RS#2
H_RS#_0
H_RS#_1
H_RS#_2
H_A#[35..3]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_REQ#[4..0]
H_RS#[2..0]
H_AVREF
H_DVREF
CANTIGA-GS-GP-NF
C169
SC1KP50V2KX-1GP
H_AVREF
J11
G9
H_A#[35..3]
1 OF 10
NB1A
4
HOST
Wistron Corporation
Title
Cantiga (1 of 6)
Size
Document Number
Date:
JM41_Discrete
Sheet
1
Rev
SB
of
48
3 OF 10
NB1C
2 OF 10
NB1B
RSVD#AW42
SC2D2U6D3V3MX-1-GP
RSVD#BB20
RSVD#BE19
RSVD#BF20
RSVD#BF18
layout take note
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
R50
DY
2 4K02R2F-GP
2 2K21R2F-GP
CFG20
CFG9
TPAD14-GP
TP77
1 CFG16
CFG20
1D5V_S3
1
R206
80D6R2F-L-GP
PWROK
PLT_RST1#_Cantiga
PM_THRMTRIP-A#_R
M_RCOMPP
14,24,25,28,29,42
PLT_RST1#
1R47
2
100R2J-2-GP
R208
4,13,32 PM_THRMTRIP-A#
2
0R0402-PAD
NC#A7
NC#A49
NC#A52
NC#A54
NC#B54
NC#D55
NC#G55
NC#BE55
NC#BH55
NC#BK55
NC#BK54
NC#BL54
NC#BL52
NC#BL49
NC#BL7
NC#BL4
NC#BL2
NC#BK2
NC#BK1
NC#BH1
NC#BE1
NC#G1
CANTIGA-GS-GP-NF
NC
14,34 PM_DPRSLPVR
A7
A49
A52
A54
B54
D55
G55
BE55
BH55
BK55
BK54
BL54
BL52
BL49
BL7
BL4
BL2
BK2
BK1
BH1
BE1
G1
MISC
DY
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
M_RCOMPP
M_RCOMPN
BK32
BL31
SM_RCOMP_VOH
SM_RCOMP_VOL
BC51
AY37
BH20
BA37
DDR2 : connect to GND

SM_REXT
R2041
499R2F-2-GP
2
DDR3_DRAMRST# 17,18
SM_PWROK 32
G45
F46
G41
C45
41 GMCH_TXAOUT0+
41 GMCH_TXAOUT1+
41 GMCH_TXAOUT2+
F44
G47
F40
A45
DDR_VREF_S3_1
B42
D42
B50
D50
DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
R49
P50
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
3
3
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
B40
A41
F42
D48
0.75V
C238
RN8
DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#
4
3
2
1
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
D40
C41
G43
B48
5
6
7
8
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
SRN0J-7-GP
TV_DACA
TV_DACB
TV_DACC
DY
AG55
AL49
AH54
AL47
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
SB
AG53
AK50
AH52
AL45
14
14
14
14
J27
E27
G27
TVA_DAC
TVB_DAC
TVC_DAC
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
GFX_VR_EN
AG49
AJ49
AJ47
AG47
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AF50
AH50
AJ45
AG45
B34
D34
41
14
14
14
14
DMI_RXP0 14
DMI_RXP1 14
DMI_RXP2 14
DMI_RXP3 14
GMCH_BLUE
41 GMCH_GREEN
41
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AK52
AK54
AW40
AL53
AL55
TV_DCONSEL_0
TV_DCONSEL_1
GMCH_BLUE
J29
GMCH_GREEN
G29
GMCH_RED
GMCH_RED
GMCH_DDCCLK
GMCH_DDCDATA
20 GMCH_DDCCLK
20 GMCH_DDCDATA
GFXVR_EN
1
R211
MCH_CLVREF
CRT_IREF
2
976R2F-3-GP
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
CRT_BLUE
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
CRT_GREEN
F30
CRT_RED
E29
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
G33
G37
F38
F36
G35
G39
TVA_RTN
DMI_TXP0 14
DMI_TXP1 14
DMI_TXP2 14
DMI_TXP3 14
20 GMCH_HSYNC
20 GMCH_VSYNC
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
TSATN#
HDA
C164
SC100P50V2JN-3GP
R207
80D6R2F-L-GP
ME
M_RCOMPN
14,32
PM_EXTTS#0
PM_EXTTS#1
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
PM
14
PM_SYNC#
4,13,34 H_DPRSTP#
17,18 PM_EXTTS#0
J35
F6
J39
L39
AY39
BB18
K28
K36
BL25
BK26
41 GMCH_TXAOUT041 GMCH_TXAOUT141 GMCH_TXAOUT2-
VGA
DY
18
18
17
17
F26
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
CFG
CFG9
R51
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
M_ODT0
M_ODT1
M_ODT2
M_ODT3
CRT_IRTN
D36
C35
J33
D32
G31
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
1
49D9R2F-GP
D52
G49
K54
H50
M52
N49
P54
V46
Y50
V52
W49
AB54
AD46
AC55
AE49
AF54
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
E51
F48
J55
J49
M54
M50
P52
U47
AA49
V54
V50
AB52
AC47
AC53
AD50
AF52
PEG_RXP0 42
PEG_RXP1 42
PEG_RXP2 42
PEG_RXP3 42
PEG_RXP4 42
PEG_RXP5 42
PEG_RXP6 42
PEG_RXP7 42
PEG_RXP8 42
PEG_RXP9 42
PEG_RXP10 42
PEG_RXP11 42
PEG_RXP12 42
PEG_RXP13 42
PEG_RXP14 42
PEG_RXP15 42
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
D10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_TXN0 42
PEG_TXN1 42
PEG_TXN2 42
PEG_TXN3 42
PEG_TXN4 42
PEG_TXN5 42
PEG_TXN6 42
PEG_TXN7 42
PEG_TXN8 42
PEG_TXN9 42
PEG_TXN10 42
PEG_TXN11 42
PEG_TXN12 42
PEG_TXN13 42
PEG_TXN14 42
PEG_TXN15 42
J47 M_TXP0 C530

F54 M_TXP1 C536
N47 M_TXP2 C543
H52 M_TXP3 C584
L53 M_TXP4 C578
R47 M_TXP5 C576
R55 M_TXP6 C574
T50 M_TXP7 C572
T52 M_TXP8 C570
W47 M_TXP9 C568
AA47 M_TXP10C566
W55 M_TXP11C564
Y52 M_TXP12C562
AB50 M_TXP13C560
AE47 M_TXP14C558
AD52 M_TXP15C556
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_TXP0 42
PEG_TXP1 42
PEG_TXP2 42
PEG_TXP3 42
PEG_TXP4 42
PEG_TXP5 42
PEG_TXP6 42
PEG_TXP7 42
PEG_TXP8 42
PEG_TXP9 42
PEG_TXP10 42
PEG_TXP11 42
PEG_TXP12 42
PEG_TXP13 42
PEG_TXP14 42
PEG_TXP15 42
CANTIGA-GS-GP-NF
0201 CAPs
38
FOR Cantiga: 1.02k_1% ohm

Teenah: 1.3k ohm
GFXVR_EN 38
1D05V_S0
CRT_IREF routing Trace

width use 20 mil
R243
1KR2F-3-GP
CL_CLK0 14
CL_DATA0 14
PWROK
14,32
CL_RST#0
14
SRN100KJ-6-GP
C583
for HDMI port C
F34
F32
B38
A37
C31
K42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
42
L47 M_TXN0 C535

F52 M_TXN1 C539
P46 M_TXN2 C550
H54 M_TXN3 C589
L55 M_TXN4 C577
T46 M_TXN5 C575
R53 M_TXN6 C573
U49 M_TXN7 C571
T54 M_TXN8 C569
Y46 M_TXN9 C567
AB46 M_TXN10C565
W53 M_TXN11C563
Y54 M_TXN12C561
AC49 M_TXN13C559
AF46 M_TXN14C557
AD54 M_TXN15C555
UMA
GFX_VID[4..0]
3D3V_S0
K26
G23
G25
J25
L25
L27
F24
D24
D26
J23
B26
A23
C23
B24
B22
K24
C25
L23
L33
K32
K34
BJ17
BJ19
BC17
BE17
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
Close to GMCH as 500 mils.
PEG_CMP 2
R53
CPU_SEL0
CPU_SEL1
CPU_SEL2
GRAPHICS VID DMI
3,4
3,4
3,4
18
18
17
17
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
TV
PEG_CLK
PEG_CLK#
M_CS0#
M_CS1#
M_CS2#
M_CS3#
U45
T44
PEG_COMPI
PEG_COMPO
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
GMCH_LCDVDD_ON B36
19 GMCH_LCDVDD_ON
LIBG
F50
TPAD14-GP TP26
1 L_LVBG
H46
P44
K46
D46
41 GMCH_TXACLKB46
41 GMCH_TXACLK+
D44
B44
SCD1U10V2KX-4GP
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
BK18
BK16
BE23
BC19
L37
J37
L35
GRAPHICS
BB20
BE19
BF20
BF18
SCD01U16V2KX-3GP
2
R214
1KR2F-3-GP
C510
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
18
18
17
17
41 GMCH_CLK_DDC_EDID
41 GMCH_DAT_DDC_EDID
AW42
SM_RCOMP_VOL
C511
RSVD#J9
M_CKE0
M_CKE1
M_CKE2
M_CKE3
18
18
17
17
SC2D2U6D3V3MX-1-GP
BC35
BE33
BE37
BC37
LCTLA_CLK
LCTLB_DATA
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
C514
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
19 GMCH_L_BKLTCTL
19 GMCH_BL_ON
SCD01U16V2KX-3GP
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
BA31
BC25
BC33
BB24
18
18
17
17
CLK_MCH_OE# 3
MCH_ICH_SYNC# 14
MCH_TSATN#
GMCH_BL_ON
GMCH_LCDVDD_ON
R244
511R2F-2-GP
2
1
3
4
RN26
UMA
B
C513
J9
2
1
R216
3K01R2F-3-GP
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
D38
C37
K38
LVDS
SM_RCOMP_VOH
D
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
BB32
BA25
BA33
BA23
SCD1U10V2KX-4GP
2
1KR2F-3-GP
1
DDR CLK/ CONTROL/COMPENSATION
1D5V_S3
R218
2
1D05V_S0
RSVD#J43
RSVD#L43
RSVD#J41
RSVD#L41
RSVD#AN11
RSVD#AM10
RSVD#AK10
RSVD#AL11
RSVD#F12
RSVD#AN45
RSVD#AP44
RSVD#AT44
RSVD#AN47
RSVD#C27
RSVD#D30
RSVD
J43
L43
J41
L41
AN11
AM10
AK10
AL11
F12
AN45
AP44
AT44
AN47
C27
D30
PCI-EXPRESS
LIBG
FOR Cantiga:500 ohm

Teenah: 392 ohm
1
R221
SRN150F-1-GP
RN27
GMCH_BLUE
1
GMCH_GREEN
2
GMCH_RED
3
4
C29
B30
D28
A27
B28
UMA
2
2K4R2F-GP
8
7
6
5
UMA_DIS:66.R0036.A8L
FOR Discrete,change to 0 ohm

(66.R0036.A8L)
1D05V_S0
1
RN23
3D3V_S0
MCH_TSATN#
8
7
6
5
TV_DACC
TV_DACB
TV_DACA
PM_EXTTS#0
PM_EXTTS#1
1
2
3
4
R198
56R2F-1-GP
SRN10KJ-5-GP
3
2
4
1
SRN75J-1-GP
RN28
UMA_DIS:66.R0036.A8L
3D3V_S0
SRN10KJ-5-GP
A
LCTLA_CLK
LCTLB_DATA
3
4
2
1
RN6
FOR Discrete,change to 0 ohm

(66.R0036.A8L)
UMA
Wistron Corporation
Title
Cantiga (2 of 6)
Size
Document Number
Date:
Rev
JM41_Discrete
5
Sheet
1
SB
of
48
BC21
BJ21
BJ41
M_A_BS#0 18
M_A_BS#1 18
M_A_BS#2 18
SA_RAS#
SA_CAS#
SA_WE#
BH22
BK20
BL15
M_A_RAS# 18
M_A_CAS# 18
M_A_W E# 18
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AT50
BB50
BB46
BE39
BB12
BE7
AV10
AR9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
AR47
BA45
BE45
BC41
BC13
BB10
BA7
AN7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AR49
AW45
BC45
BA41
BA13
BA11
BA9
AN9
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BC23
BF22
BE31
BC31
BH26
BJ35
BB34
BH32
BB26
BF32
BA21
BG25
BH34
BH18
BE25
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_DM[7..0]
M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_DM[7..0] 18
M_A_DQS[7..0] 18
M_A_DQS#[7..0] 18
M_A_A[14..0] 18
CANTIGA-GS-GP-NF
M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
5 OF 10
NB1E
AP54
AM52
AR55
AV54
AM54
AN53
AT52
AU53
AW53
AY52
BB52
BC53
AV52
AW55
BD52
BC55
BF54
BE51
BH48
BK48
BE53
BH52
BK46
BJ47
BL45
BJ45
BL41
BH44
BH46
BK44
BK40
BJ39
BK10
BH10
BK6
BH6
BJ9
BL11
BG5
BJ5
BG3
BF4
BD4
BA3
BE5
BF2
BB4
AY4
BA1
AP2
AU1
AT2
AT4
AV4
AU3
AR3
AN1
AP4
AL3
AJ1
AK4
AM4
AH2
AK2
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
SB_BS_0
SB_BS_1
SB_BS_2
BJ13
BK12
BK38
SB_RAS#
SB_CAS#
SB_WE#
BE21
BH14
BK14
M_B_BS#0 17
M_B_BS#1 17
M_B_BS#2 17
M_B_RAS# 17
M_B_CAS# 17
M_B_W E# 17
D
M_B_DM[7..0]
17 M_B_DQ[63..0]
SA_BS_0
SA_BS_1
SA_BS_2
MEMORY
4 OF 10
MEMORY
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SYSTEM
NB1D
AP46
AU47
AT46
AU49
AR45
AN49
AV50
AP50
AW47
BD50
AW49
BA49
BC49
AV46
BA47
AY50
BF46
BC47
BF50
BF48
BC43
BE49
BA43
BE47
BF42
BC39
BF44
BF40
BB40
BE43
BF38
BE41
BA15
BE11
BE15
BF14
BB14
BC15
BE13
BF16
BF10
BC11
BF8
BG7
BC7
BC9
BD6
BF12
AV6
BB6
AW7
AY6
AT10
AW11
AU11
AW9
AR11
AT6
AP6
AL7
AR7
AT12
AM6
AU7
SYSTEM
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
DDR
18 M_A_DQ[63..0]
DDR
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AP52
AY54
BJ49
BJ43
BH12
BD2
AY2
AJ3
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
AR53
BA53
BH50
BK42
BH8
BB2
AV2
AM2
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AT54
BB54
BJ51
BH42
BK8
BC3
AW3
AN3
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
BJ15
BJ33
BH24
BA17
BF36
BH36
BF34
BK34
BJ37
BH40
BH16
BK36
BH38
BJ11
BL37
M_B_DM[7..0] 17
M_B_DQS[7..0]
M_B_DQS[7..0] 17
M_B_DQS#[7..0]
M_B_DQS#[7..0] 17
M_B_A[14..0]
M_B_A[14..0] 17
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
CANTIGA-GS-GP-NF
Wistron Corporation
Title
Cantiga (3 of 6)
Size
Document Number
Date:
Rev
SB
JM41_Discrete
5
Sheet
1
of
48
7 OF 10
NB1G
VCC_GFXCORE
1D5V_S3
6 OF 10
SC10U6D3V5MX-3GP
Coupling CAP
Coupling CAP
DY
DY
Place on the Edge
AJ16
AH16
AD16
AC16
AA16
U16
T16
R16
AM15
AL15
AJ15
AH15
AG15
AE15
AA15
Y15
W15
U15
T15
DY
DY
AC34
AA34
DY
Place CAP where

LVDS and DDR3 taps
FOR VCC SM
C187
TC10
DY
C166
C216
SCD1U10V2KX-4GP
2
C217
1D5V_S3
C191
R52
1
2
0R0402-PAD
Y34
W34
AM32
AL32
AJ32
AH32
AE32
AD32
AA32
AM31
AL31
AJ31
AH31
AM29
AL29
AM28
AL28
AJ28
AM27
AL27
AM25
AL25
AJ25
AM24
VCC_GMCH_35 N36
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC CORE
AJ40
AH40
AG40
AE40
AD40
AC40
AA40
Y40
AN35
AM35
AJ35
AH35
AD35
AC35
W35
AM34
AL34
AJ34
AH34
AG34
AE34
AD34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
1D05V_S0
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC NCTF
C205
SCD1U10V2KX-4GP
C218
AT41
AR41
AN41
AJ41
AH41
AD41
AC41
Y41
W41
AT40
AM40
AL40
POWER
1
2
1
2
1
2
1
2
1
2
1
2
1
C172
SCD1U10V2KX-4GP
C171
SCD1U10V2KX-4GP
2
1
2
BC1
SC1U10V3KX-3GP
2
SC10U10V5KX-2GP
C162
C159
SC10U10V5KX-2GP
C184
SC10U6D3V5MX-3GP
C170
SCD1U16V2KX-3GP
C178
SCD1U16V2KX-3GP
2
1
C165
SCD1U16V2KX-3GP
2
1
SCD1U16V2KX-3GP
2
1
C163
VCC GFX
SCD1U16V2KX-3GP
2
1
1
2
SCD1U16V2KX-3GP
2
1
VCC GFX NCTF
VCC SM
C198
SCD1U10V2KX-4GP
C212
SCD1U10V2KX-4GP
C206
SCD1U10V2KX-4GP
C204
SCD1U10V2KX-4GP
AT38
AR38
AN38
AM38
AL38
AG38
AE38
AA38
Y38
W38
U38
T38
R38
AT37
AR37
AN37
AM37
AL37
AJ37
AH37
AG37
AE37
AD37
AC37
AA37
Y37
W37
U37
T37
R37
AT35
AR35
U35
AT34
AR34
U34
T34
R34
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
SC1U10V3KX-3GP
SCD47U10V3KX-3GP
2
1
C237
CANTIGA-GS-GP-NF
SC1U10V3KX-3GP
2
1
C229
C175
SCD22U10V2KX-1GP
2
1
C211
C147
SCD22U10V2KX-1GP
2
1
C142
SCD1U10V2KX-4GP
2
1
AU45 SM_LF1_GMCH
BF52 SM_LF2_GMCH
BB38 SM_LF3_GMCH
BA19 SM_LF4_GMCH
BE9 SM_LF5_GMCH
AU9 SM_LF6_GMCH
AL9 SM_LF7_GMCH
1
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC SM LF
VCC GFX
Place on the Edge
C146
SCD1U10V2KX-4GP
2
1
VCC_AXG_SENSE
VSS_AXG_SENSE
C236
SC10U6D3V5MX-3GP
AG13
AE13
C192
SC10U6D3V5MX-3GP
VCC_AXG_SENSE
VSS_AXG_SENSE
C174
ST330U2D5VBM-GP
38 VCC_AXG_SENSE
38 VSS_AXG_SENSE
C221
VCC_GFXCORE
SCD1U10V2KX-4GP
C213
Coupling CAP 370 mils from the Edge
VCC_GFXCORE
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
FOR VCC CORE
SC10U6D3V5MX-3GP
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
1D05V_S0
SCD1U10V2KX-4GP
W32
AG31
AE31
AD31
AC31
AA31
Y31
W31
AH29
AG29
AE29
AD29
AC29
AA29
Y29
W29
AH28
AG28
AE28
AA28
AH27
AG27
AE27
AD27
AC27
AA27
Y27
W27
AH25
AD25
AC25
W25
AJ24
AH24
AG24
AE24
AD24
AC24
AA24
Y24
W24
AM22
AL22
AJ22
AH22
AG22
AE22
AD22
AC22
AA22
AM21
AL21
AJ21
AH21
AD21
AC21
AA21
Y21
W21
AM16
AL16
T32
U31
T31
R31
U29
T29
R29
U28
U27
T27
R27
U25
T25
R25
U24
U22
T22
R22
U21
T21
R21
AM19
AL19
AH19
AG19
AE19
AD19
AC19
W19
U19
AM18
AL18
AJ18
AH18
AG18
AE18
AD18
AC18
AA18
Y18
W18
U18
T18
R18
SCD1U16V2KX-3GP
VCC_GFXCORE
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
SCD1U16V2KX-3GP
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
POWER
NB1F
BB36
BE35
AW34
AW32
BK30
BH30
BF30
BD30
BB30
AW30
BL29
BJ29
BG29
BE29
BC29
BA29
AY29
BK28
BH28
BF28
BD28
BB28
BL27
BJ27
BG27
BE27
BC27
BA27
AY27
AW26
BF24
BL19
BB16
place near Cantiga

U60(ISL6263ACRZ-T-GP) place near Cantiga
CANTIGA-GS-GP-NF
Wistron Corporation
Title
Cantiga (4 of 6)
Size
Document Number
Date:
Rev
JM41_Discrete
5
Sheet
1
10
SB
of
48
BAT54-7-F-GP
R213
1D05V_S0_SD 2
3D3V_S0
3D3V_HV_S0
R212
2
1
DY
3
10R2F-L-GP 0R0603-PAD
DY
C505
SCD1U10V2KX-4GP
D11
ST220U2D5VDM-13GP
C193
SCD47U6D3V2KX-GP
C179
SC4D7U6D3V3KX-GP
lz
pz!D
D
qz
C208
1D05V_S0
DY
Wistron Corporation
Title
Cantiga (5 of 6)
Size
Document Number
Date:
Rev
SB
JM41_Discrete
2
BD
TC9
ST150U6D3VBM-GP
C188
C223
kz
C157
SCD47U6D3V2KX-GP
CANTIGA-GS-GP-NF
D
1D05V_S0
DY
VTTLF1
VTTLF2
VTTLF3
K14
Y12
P2
UMA
456mA
1
DMI
VTTLF
VTTLF
VTTLF
1D8V_NB_S0
AM44
AN43
AL43
DY
SC10U6D3V5MX-3GP
VCC_DMI
VCC_DMI
VCC_DMI
C180
1D5V_SM_CK_R 2
1
1782mA
C189
1D8V_NB_S0
C234
100mA
jz%
1D5V_S3
DY
AB44
Y44
AC43
AA43
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
iz
1 R205
1R2F-GP
C33
A33
1D05V_S0
UMA
C220
SC2D2U6D3V3MX-1-GP
2
1
106mA
hz
D
D
C185
VTTLF
LVDS
VCCD_LVDS
VCCD_LVDS
C232
C228
SCD47U6D3V2KX-GP
2
1
1
3D3V_HV_S0
T41
1
2
VCCD_PEG_PLL
gz
VCC_HV
VCC_HV
C219
1
2
1
2
1
2
1
2
AE43
1
2
fz
C152
SCD47U6D3V2KX-GP
BK24
BL23
BJ23
BK22
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_TX_LVDS
VCCA_SM_CK
? D
ez
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCD_HPLL
M25
N24
M23
NC#4
74.09091.G3F
SC10U6D3V5MX-3GP
1D8V_NB_S0
60.3mA
2
1
2
AXF
VCC_AXF
VCC_AXF
VCC_AXF
VOUT
74.09198.C7F
200mA
AH12
M46
L45
DY
VIN
GND
EN/EN#
RT9198-18PBR-GP
SC10U6D3V5MX-3GP
AU27
B AU28
dz
AU29
AU31
AT31
AR31
AT29
AR29
AT28
AR28
AT27
AR27
350mA
C203
1
2
3
C222
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
VCCA_SM_NCTF
U10
AT24
AR24
AT22
AR22
AT21
AR21
AT19
AR19
AT18
AR18
1D05V_S0
POWER
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
A SM
1
2
1
2
1
2
1
2
AW24
AU24
AW22
AU22
AU21
AW20
AU19
AW18
AU18
AW16
AU16
AT16
AR16
AU15
AT15
AR15
AW14
NB:180mA
I=300mA
3D3V_S0
VCCA_PEG_PLL
C478
SCD47U6D3V2KX-GP
AG43
SM CK
1
2
1
2
1D5VRUN_QDAC
D TV/CRT HDA
A PEG A LVDS
1
2
1
2
1
2
1
2
1
1D5VRUN_TVDAC
N32
SC1U10V2ZY-GP
N34
SC10U6D3V5MX-3GP
VCCD_QDAC
VCCD_TVDAC
VTT
TV
1
2
1
2
VCCA_PEG_BG
SB
SC1U10V2ZY-GP
SC10U6D3V5MX-3GP
2
A31
SCD1U10V2KX-4GP
VCC_HDA
SC10U6D3V5MX-3GP
VSSA_LVDS
DY
180ohm 100MHz
C197
SC1KP50V2KX-1GP
C224
50mA
SCD1U10V2KX-4GP
VCCA_LVDS
VCCA_LVDS
V44
TC8
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C503
1D05V_RUN_PEGPLL
C226
1D05V_S0
3D3V_S0_DAC
SC4D7U6D3V3KX-GP
157.2mA
SCD1U10V2KX-4GP
U43
U41
1
2
SC10U6D3V5MX-3GP
C231
cz
K30
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C196
bz
SCD1U10V2KX-4GP
UMA
C154
C195
SCD1U10V2KX-4GP
UMA
C194
SCD01U16V2KX-3GP
180ohm 100MHz
SC4D7U6D3V3KX-GP
1D5VRUN_QDAC
C214
SCD1U10V2KX-4GP
1
2
PBY160808T-181Y-GP
68.00206.041
2ND = 68.00214.101
D
58.7mA
SCD1U10V2KX-4GP
C215
SCD022U16V2KX-3GP
C155
VCCA_TV_DAC
1D05V_SUS_MCH_PLL2
1D5VRUN_TVDAC
UMA
DY
SC2D2U6D3V3MX-1-GP
C233
SCD1U10V2KX-4GP
C186
SC10U6D3V5MX-3GP
24mA
DY
L4
C160
1D05V_S0
2
FCM1608CF-221T02-GP
1D5V_S0
13.2mA
C477
SCD1U10V2KX-4GP
1D05V_RUN_PEGPLL
C235
VCCA_MPLL
139.2mA
L5
68.00217.521
2ND = 68.00119.111
AE1
C227
SCD1U10V2KX-4GP
1D05V_RUN_PEGPLL
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
SC10U6D3V5MX-3GP
C466
1D05V_S0
220ohm 100MHz
VCCA_HPLL
M_VCCA_MPLL
C153
SCD1U10V2KX-4GP
M_VCCA_MPLL
120ohm 100MHz
UMA
C148
M_VCCA_HPLL
C145
DY
AF10
DY
24mA
68.00217.161
2ND = 68.00248.061
VCCA_DPLLB
M_VCCA_HPLL
50mA
1D05V_S0
1D05V_SUS_MCH_PLL2
FCM1608KF-1-GP
1
2
L17
L49
AJ43
1D05V_S0
68.00217.161
2ND = 68.00248.061
VCCA_DPLLA
M_VCCA_DPLLB
1D5V_S0
480mA
FCM1608KF-1-GP
1
2
L3
J45
C529
C225
SC1KP50V2KX-1GP
1
2
DY
UMA
M_VCCA_DPLLA
1D8V_NB_S0
DY
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C527
VCCA_DAC_BG
VSSA_DAC_BG
HV
C518
C201
R13
T12
R11
T10
R9
T8
R7
T6
R5
T4
R3
T2
R1
VCCA_CRT_DAC
L31
M33
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
PEG
UMA
C202
M_VCCA_DPLLB
C528
J31
10mA
1
2
DY
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
65mA
C519
UMA
CRT
3D3V_S0_DAC
M_VCCA_DPLLA
C520
1
2
UMA
65mA
1
BC2
74.09198.G7F
74.09091.J3F
UMA
UMA
2
1
2
C509
SC10U6D3V5MX-3GP
C210
SCD1U10V2KX-4GP
RT9198-33PBR-GP
8 OF 10
NB1H
SCD1U10V2KX-4GP
1D05V_S0
NC#4
UMA
SCD01U16V2KX-3GP
UMA
SCD01U16V2KX-3GP
VOUT
SC1U10V3KX-3GP
SC1U10V3KX-3GP
BC3
VIN
GND
EN
852mA
80mA
PLL
3D3V_S0_DAC
C209
1
2
3
3D3V_S0_DAC
Imax = 300 mA
U30
5V_S0
Sheet
1
11
of
48
VSS
C43
A43
BD42
H42
BG41
AY41
AU41
AM41
AL41
AG41
AE41
AA41
R41
M41
E41
BD40
AU40
AR40
AN40
W40
U40
T40
R40
K40
H40
BL39
BG39
BA39
E39
C39
A39
BD38
AU38
H38
BG37
AU37
M37
E37
BD36
AW36
H36
BL35
BG35
AY35
AU35
AL35
AG35
AE35
AA35
Y35
M35
E35
A35
BD34
AU34
AN34
H34
BL33
BG33
AY33
E33
BD32
AU32
AN32
AG32
AC32
Y32
H32
B32
BJ31
BG31
AY31
AN31
M31
E31
N30
H30
AN29
AJ29
M29
A29
AW28
AN28
AD28
AC28
Y28
W28
H28
F28
AN27
AJ27
M27
BF26
BD26
N26
H26
BJ25
AY25
AU25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CANTIGA-GS-GP-NF
AN25
AG25
AE25
AA25
Y25
E25
A25
BD24
AN24
AL24
H24
BG23
AY23
E23
BD22
BB22
AN22
Y22
W22
H22
BL21
BG21
AY21
AN21
AG21
AE21
M21
E21
A21
BD20
H20
BG19
AY19
M19
E19
BD18
N18
H18
BL17
BG17
AY17
M17
E17
A17
BD16
AN16
AG16
AE16
Y16
W16
N16
H16
BG15
AY15
AN15
AD15
AC15
R15
M15
E15
BD14
H14
BL13
BG13
AY13
AU13
AR13
AJ13
AC13
AA13
W13
U13
M13
E13
A13
BD12
AV12
AP12
AM12
AK12
AB12
V12
P12
H12
BG11
AG11
E11
BD10
AY10
AP10
H10
BL9
BG9
E9
A9
BD8
BB8
AY8
AV8
AT8
AP8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
9 OF 10
VSS SCB
NCTF TEST PIN:
BL55,BL1,A55,D1,A4
NB1I
BA55
AU55
AN55
AJ55
AE55
AA55
U55
N55
BD54
BG53
AJ53
AE53
AA53
U53
N53
J53
G53
E53
K52
BG51
BA51
AW51
AU51
AR51
AN51
AL51
AJ51
AG51
AE51
AC51
AA51
W51
U51
R51
N51
L51
J51
G51
C51
BK50
AM50
K50
BG49
E49
C49
BD48
BB48
AY48
AV48
AT48
AP48
AM48
AK48
AH48
AF48
AD48
AB48
Y48
V48
T48
P48
M48
K48
H48
BL47
BG47
E47
C47
A47
BD46
AY46
AM46
AK46
AH46
BG45
AE45
AC45
AA45
W45
R45
N45
E45
BD44
BB44
AV44
AK44
AH44
AF44
AD44
K44
H44
BL43
BG43
AY43
AR43
W43
R43
M43
E43
10 OF 10
NB1J
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM8
AK8
AH8
AF8
AD8
AB8
Y8
V8
P8
M8
K8
H8
BJ7
E7
BF6
BC5
BA5
AW5
AU5
AR5
AN5
AL5
AJ5
AG5
AE5
AC5
AA5
W5
U5
N5
L5
J5
G5
C5
BH4
BE3
U3
E3
BC1
AW1
AR1
AL1
AG1
AC1
W1
N1
J1
AU43
BB42
AW38
BA35
L29
N28
N22
N20
N14
AL13
B10
AN13
VSS
VSS
VSS
VSS
N42
N40
N38
M39
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
AJ38
AH38
AD38
AC38
T35
R35
AT32
AR32
U32
R32
T28
R28
AT25
AR25
T24
R24
AN19
AJ19
AA19
Y19
T19
R19
AN18
RSVD#B55
VSS_SCB
B55
B2
VSS_SCB#B2
TP73 TPAD14-GP
BL55
BL1
A55
D1
A4
NCTF_VSS_SCB#BL55
NCTF_VSS_SCB#BL1
NCTF_VSS_SCB#A55
NCTF_VSS_SCB#D1
NCTF_VSS_SCB#A4
1
1
1
1
1
TP78
TP76
TP79
TP72
TP75
NCTF_VSS_SCB#BL55
NCTF_VSS_SCB#BL1
NCTF_VSS_SCB#A55
NCTF_VSS_SCB#D1
NCTF_VSS_SCB#A4
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
Wistron Corporation
CANTIGA-GS-GP-NF
Title
Cantiga (6 of 6)
Size
Document Number
Date:
Rev
SB
JM41_Discrete
5
Sheet
1
12
of
48
C133
C498
SB1A
3
4
R197 1
1
2
1
2
INTVRMEN
TPAD14-GP
TP19
1ICH9_LAN_RSTSYNC
GLAN_COMP place
within 500 mil of ICH9M
RTC_AUX_S5
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
R195
330KR2F-L-GP
High=Enable
1D5V_S0
LAN100_SLP
High=Enable
HDMI_EN
Low=Disable
1
R189
integrated VccLan1_05VccCL1_05
2
1MR2J-1-GP
C149
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C140
GAP-OPEN
RN4
G75
Low=Disable
2 GLAN_COMP
24D9R2F-L-GP
RTCX1
RTCX2
G24
C24
C23
RTCRST#
SRTCRST#
INTRUDER#
E25
D25
INTVRMEN
LAN100_SLP
G22
GLAN_CLK
D14
LAN_RSTSYNC
A14
D12
B14
LAN_RXD0
LAN_RXD1
LAN_RXD2
D13
C13
A13
LAN_TXD0
LAN_TXD1
LAN_TXD2
D15
GPIO56
H22
H21
GLAN_COMPI
GLAN_COMPO
ACZ_BIT_CLK
ACZ_SYNC_R
AE7
AB7
HDA_BIT_CLK
HDA_SYNC
ACZ_RST#_R
AA7
HDA_RST#
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDIN3
AB6
AE6
AC6
AA5
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
ACZ_SDATAOUT_R
AC7
HDA_SDOUT
AD8
AB8
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AC9
SATALED#
AE14
AD14
AC15
AD15
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
INTVRMEN
22 ACZ_SDATAIN0
TPAD14-GP
TPAD14-GP
TPAD14-GP
TP11
TP56
TP70
1
1
1
HDMI_EN
TPAD14-GP
TPAD14-GP
R200
10KR2J-3-GP
31
HDMI_DIS
SSD
B
HDD
R172
3D3V_S0
MEDIA_LED#
21
21
21
21
20
20
20
20
TP53
TP67
HDA_DOCK_EN#
HDA_DOCK_RST#
1
1
MEDIA_LED#
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
C87
C88
C90
C89
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
C108
C109
C111
C110
1
1
1
1
1
1
1
1
2
2
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
2
2
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C
AD13
AC13
AA14
AB14
10KR2J-3-GP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
H3
J3
K5
L3
FWH4/LFRAME#
J2
LDRQ0#
LDRQ1#/GPIO23
H1
J1
A20GATE
A20M#
N3
AB23
DPRSTP#
DPSLP#
AE23
AE24
FERR#
AD25
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
1
1
TP15 TPAD14-GP
TP14 TPAD14-GP
H_DPRSTP#
H_DPRSTP# 4,8,34
H_DPSLP# 4
H_PW RGD
AD23
H_IGNNE#
INIT#
INTR
RCIN#
AE21
AD24
L1
H_INIT# 4
H_INTR 4
KBRCIN# 28
NMI
SMI#
AD21
AC21
STPCLK#
AC25
AC22
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD12
AE12
AB12
AA12
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AC11
AD11
AB10
AA10
SATA_CLKN
SATA_CLKP
AC16
AB16
SATARBIAS#
SATARBIAS
R36
56R2F-1-GP
R171
56R2F-1-GP
DY
DY
H_DPRSTP#
H_PW RGD
H_FERR#_R
IGNNE#
AC23
1D05V_S0
1D05V_S0
KA20GATE 28
H_A20M# 4
AE22
TP11
1D05V_S0
LPC_LFRAME# 28,29
LDRQ0#
3D3V_LDRQ1_S0
CPUPWRGD
THRMTRIP#
28,29
28,29
28,29
28,29
2
1
F25
G25
24,28 RTC_BAT
RTC_RST#
SRTC_RST#
INTRUDER#
RTC_X2
SRN20KJ-GP-U
RTC_BAT 1
2
R199 1KR2J-1-GP
2 SC6P50V2CN-1GP
RTC
LPC
LAN / GLAN
CPU
C130
1 OF 6
IHDA
BAS16-1-GP
SATA
R45
10MR2J-L-GP
82.30001.841
82.30001.A41
SC1U16V3ZY-GP
3
D
X1
X-32D768KHZ-40GPU
RTC_AUX_S5
2 SC6P50V2CN-1GP RTC_X1
3RD = 83.00016.F11
2ND = 83.00016.K11
83.00016.B11
D10
3D3V_AUX_S5
RN14
1
2
4
3
H_FERR# 4
SRN56J-4-GP
H_PW RGD 4,32

4
H_NMI 4
H_SMI# 4
1D05V_S0
R179
H_STPCLK# 4
H_THERMTRIP_R
ICH_TP11
2
R183 54D9R2F-L1-GP
TP57 TPAD14-GP
SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4_C
SATA_TXP4_C
56R2F-1-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
2
2
2
2
1
1
1
1
C93
C92
C94
C95
SATA_RXN4 24
SATA_RXP4 24
SATA_TXN4 24
SATA_TXP4 24
ODD
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
AD10 SATARBIAS
AE10
2
24D9R2F-L-GP
1
R32
B
Place within 500 mils of

ICH9 ball
ICH9M-1-GP
RN2
1
2
3
4
ACZ_RST#
ACZ_SDATAOUT
ACZ_SYNC
ACZ_BITCLK
SCD1U10V2KX-4GP
ACZ_RST#_R
ACZ_SDATAOUT_R
ACZ_SYNC_R
ACZ_BIT_CLK
SRN0J-7-GP
C96
8
7
6
5
DY
2
22
22
22
22
Wistron Corporation
Title
Size
Date:
Document Number
ICH9-M (1 of 4)
Thursday, March 05, 2009
JM41_Discrete
Sheet
1
13
Rev
SB
of
48
3D3V_S0
25 PCIE_WAKE#
28 INT_SERIRQ
3D3V_S0
TPAD14-GP
PLT_RST1#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
3D3V_S0
TPAD14-GPTP20
TPAD14-GP
TP20
TPAD14-GP TP66
TPAD14-GPTP66
TPAD14-GP TP64
TPAD14-GPTP64
TPAD14-GP TP59
TPAD14-GPTP59
3D3V_S0
3D3V_S0
PERN2
PERP2
PETN2
PETP2
C128 SCD1U10V2KX-5GP 2
1
1
N23
N24
M21
M22
PERN3
PERP3
PETN3
PETP3
MINICARD1
3D3V_S5
5
6
7
8
RN3
4
3
2
1
USB_OC#0
USB_OC#3~11
USB_OC#1
SRN10KJ-6-GP
PERN4
PERP4
PETN4
PETP4
K24
K25
K21
K22
PERN5
PERP5
PETN5
PETP5
H24
H25
J24
J23
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
F22
G23
USB_OC#0
USB_OC#1
USB_OC#3~11
These R need close SB

within 600 mils
SMB
SATA
GPIO
D23
W AKE#
SERIRQ
THRM#
VRMPW RGD
TP12
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
PWROK
PM_DPRSLPVR_1
M1
P4
N4
N1
P5
P1
P2
M3
M2
P3
R1
R4
R2
USB_RBIAS_PN AE5
2
1
AD5
R177 22D6R2F-L1-GP
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V25
V24
U24
U23
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
8
8
8
8
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
W 23
W 24
V21
V22
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
8
8
8
8
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
Y24
Y25
Y21
Y22
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
8
8
8
8
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
C16
PM_BATLOW#_R
PWRBTN#_ICH
PW RBTN#
U4
D22
RSMRST#
D19
USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#
USB
3D3V_S5
SB
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
T21
T22
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
AE2
AD1
AD3
AD4
AC2
AC3
AC5
AB4
AB2
AB1
AA3
AA2
Y1
Y2
W2
W3
V1
V2
Y5
Y4
U3
U2
V4
V5
8
8
8
8
25
25
20
20
26
26
25
25
19
19
RSMRST#_SB
2
CLK_PWRGD 3
CLPW ROK
T4
PWROK
PM_SLP_M# 1
3D3V_S0
8,32
TP21
TPAD14-GP
SLP_M#
B23
CL_CLK0
CL_CLK1
C22
A18
CL_DATA0
CL_DATA1
E22
B18
CL_VREF0
CL_VREF1
F21
A17
CL_RST0#
CL_RST1#
C17
B17
CL_RST#0 8
A22 ICH_GPIO24 1
E16 SUSPWRACK
A15 AC_PRESENT
ICH_GPIO91
D21
TP22
TPAD14-GP
R193
3K24R2F-GP
CL_CLK0 8
CL_DATA0 8
CL_VREF0_ICH
TP23
TPAD14-GP
SB
3D3V_S0
R338
DIS_EN
R187
ATI_PWR_ON#
10KR2J-3-GP
3D3V_S5
ATI_PWR_ON# 40
PM_BATLOW#_R 1
R201
10KR2J-3-GP
DY
2
8K2R2J-3-GP
1D5V_S0
R202
100KR2J-1-GP
3D3V_S0
R35
24D9R2F-L-GP
MIC_SEL_1
1
R170
ACZ_SPKR
1
R44
THRM#
1
R169
USB
3D3V_S5
2
10KR2J-3-GP
RN21
1
2
3
4
1KR2J-1-GP
DY
2
10KR2J-3-GP
8
7
6
5
AC_PRESENT
NO_iTPM
PWROK
Device
SRN10KJ-6-GP
USB2
USB3
USB4
WiMAX
WEBCAM
USBPN7 24
USBPP7 24
NC
NC
USBPN9 20
USBPP9 20
USBPN10 25
USBPP10 25
USBPN11 24
USBPP11 24
BLUETOOTH
NC
USB1
10
MINIC2
11
Cardreader
D2
RSMRST#_SB
1
3
28 RSMRST#_KBC
2
BAS16-1-GP
83.00016.B11
2ND = 83.00016.K11
3RD = 83.00016.F11
R46
Wistron Corporation
Title
Size
Date:
PLT_RST1# 8,24,25,28,29,42
No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot
Document Number
ICH9-M (2 of 4)
ICH9M-1-GP
R192
453R2F-1-GP
3D3V_S5
3D3V_S5
DBRESET#
SMB_ALERT#
SMB_LINK_ALERT#
SUSPWRACK
1
1
Pair
PM_PWRBTN# 28
83.00016.B11
2ND = 83.00016.K11
3RD = 83.00016.F11
U1
R203
10
9
8
7
6
PM_DPRSLPVR 8,34
SRN10KJ-L3-GP
3D3V_S0
DMI_IRCOMP_R
USBPN0
USBPP0
USBPN1
USBPP1
USBPN2
USBPP2
USBPN3
USBPP3
USBPN4
USBPP4
PCIE_WAKE#
1
2
3
4
5
8,32
100R2J-2-GP
2
1
1
2DY
100KR2J-1-GP
D1
BAS16-1-GP
CK_PW RGD
MEM_LED/GPIO24
GPIO10/SUS_PW R_ACK
GPIO14/AC_PRESENT
W OL_EN/GPIO9
RP4
ECSWI#
PM_RI#
ATI_PWR_ON 39,40
SRN10KJ-5-GP
AB24
AB25
AA23
AA24
AB21
AB22
MXM_RST#
ATI_PWR_ON
4
3
R42
R39
BATLOW #
LAN_RST#
100KR2J-1-GP
USB_OC#0
USB_OC#1
PERN1
PERP1
PETN1
PETP1
M25
M24
L24
L23
E24
E23
F23
25
20
PW ROK
DPRSLPVR/GPIO16
PM_SLP_S3# 28,32,36,39,40
PM_SLP_S4# 28,32,35,37
TXN2
TXP2
P25
P24
P21
P22
LAN
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2
ICH9M-1-GP
1
2
4 OF 6
PCI-Express
1
1
TXN1
TXP1
T25
T24
R24
R23
Direct Media Interface
SRN8K2J-2-GP-U
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
SPI
25
25
25
25
S4_STATE#
RN18
SB1D
25
25
25
25
E14
TP74
TPAD14-GP
TP17
TPAD14-GP
INT_PIRQC#
INT_PIRQE#
INT_PIRQA#
INT_SERIRQ
1
1
1
1
K4
AB20
ICH_TP3
C19
ICH_TP8 AB17
ICH_TP9 AC17
ICH_TP10 AD17
S4_STATE#/GPIO26
10
9
8
7
6
3D3V_S0
1
2
3
4
5
B24
22
ACZ_SPKR
8 MCH_ICH_SYNC#
GPIO49 should be pulled down to

GND only when using Teenah. When
using Cantiga, this ball should
be left as No Connect.
RP1
ECSCI#_1
INT_PIRQH#
INT_PIRQF#
PM_CLKRUN#
CLKRUN#/GPIO32
TP58
100KR2J-1-GP
SRN8K2J-2-GP-U
M5
AE16
AE18
28
EC_TMR
AD18
28
ECSCI#_1
B25
28
ECSWI#
C14
D20
PSW_CLR#
AE17
ATI_PWR_ON#
K3
TPAD14-GP TP60
1ICH9_GPIO20
AC8
TPAD14-GP TP6
1CLK_SEL1
AC19
MXM_RST#
D17
42 MXM_RST#
TPAD14-GP TP89
1
E20
SATACLKREQ#
M4
3
SATACLKREQ#
1PCB_VER0_SB AB18
TPAD14-GP TP65
1PCB_VER1_SB AC18
MIC_SEL_1
TPAD14-GP TP5
AB19
AC20
NO_iTPM
A16
G74
PCI_TRDY#
PCI_IRDY#
PCI_SERR#
PCI_REQ#0
STP_PCI#/GPIO15
STP_CPU#/GPIO25
A19
R167
2DY
SC100P50V2JN-3GP
SMBALERT#/GPIO11
B15
A20
C21
L4
THRM# AD20
28,32,34 VR_PWRGD
1
C501
10
9
8
7
6
28 PM_CLKRUN#
low = A16 swap override enable

high = default
PCI_GNT#3
PM_STPPCI#
PM_STPCPU#
PM_SLP_S5#
A16 swap override strap

PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
1
2
3
4
5
SRN8K2J-2-GP-U
3
3
D18
B20
D16
SPI
PCI
LPC(Default)
R3
1
0
1
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PMSYNC#/GPIO0
A23
CLK_ICH14 3
CLK48_ICH 3
3D3V_S0
PCI_LOCK#
PCI_DEVSEL#
INT_PIRQD#
PCI_REQ#2
PCI_REQ#3
PCI_PERR#
INT_PIRQB#
INT_PIRQG#
L2
PM_SYNC#
RN1
SRN10KJ-5-GP
39,40,42
K1
AB5
0
1
1
PCI_IRDY#
GAP-OPEN
PCI_STOP#
PCI_FRAME#
PCI_REQ#1
3D3V_S0
SUS_STAT#/LPCPD#
SYS_RESET#
SMB_ALERT#
RP2
10
9
8
7
6
T5
C25
CLK14
CLK48
3
4
G3
G1
F3
H4
BOOT BIOS Location
ICH9M-1-GP
RP3
DBRESET#
A21
B5
T1
SPI_CS#1
PLTRST#
PCICLK
PME#
PCI_GNT#0
1
2
3
4
5
RI#
2
1
DIS_EN 20,41
G_VCORE_PGOOD
D10
A5
E6
C9
C3
B1
T3
A7
D4
C5
H5
A6
A2
B8
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
C20
SATA0GP
SATA1GP
AE19
AA18
AE20
AA20
TP_GPIO1
TPAD14-GP
PCI_REQ#3
PM_RI#
Clocks
SRN10KJ-5-GP
PCLK_ICH 3
PIRQA#
PIRQB#
PIRQC#
PIRQD#
4
3
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
SYS GPIO
Power MGT
PCI_REQ#2
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
MISC
GPIO
Controller Link
1
2
PCI_REQ#1
C18
C15
SMB_LINK_ALERT# B21
SMLINK0
E18
SMLINK1
A24
SMB_CLK
SMB_DATA
BOOT BIOS Strap
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
Interrupt I/F
F1
F5
F2
C7
16
16
RN19
PCI_REQ#0
10KR2J-3-GP
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
G4
E1
A9
E12
B11
C10
D6
C6
PCI_GNT#0 and SPI_CS1#

have weak internal Pull up
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
3D3V_S5
2 OF 6
SB1B
A11
B12
A10
C12
A8
A12
E10
C11
B9
D8
A4
E8
A3
D9
C8
C2
D7
B3
D11
B6
D5
D3
F4
E3
E4
B2
C4
C1
D1
E2
J4
H2
3 OF 6
SB1C
C488
SCD1U10V2KX-4GP
2
JM41_Discrete
Sheet
14
Rev
SB
of
48
1D05V_S0
DY
1
2
1
2
1
2
1
2
2
1
2
1
2
1
2
32mA
1
K16
1mA
J14
K14
3D3V_S0
2
C494
18mA
DY
VCCLAN3_3
VCCLAN3_3
VCCGLANPLL
VCCGLAN1_5
VCCGLAN1_5
C463
SCD1U10V2KX-4GP
VCCCL1D5V_INT_ICH
VCCCL3_3
VCCCL3_3
177mA
VCCCL1D05V_INT_ICH
H17
C472
G18
VCCCL1_05
C471
3D3V_S5
C495
2
DY
J7
J8
K7
K8
L7
L8
M7
M8
N7
N8
P7
P8
DY
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCCL1_5
3D3V_S5
C461
C475
C476
C464
W8
C452
SCD1U10V2KX-4GP
VCCPUSB
VCCSUS3_3
VCCLAN1_05
VCCLAN1_05
H19
J18
1
2
1
G14
G15
H14
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCC1_5_A
VCC1_5_A
2
1
1
2
VCCUSBPLL
T9
U9
1
2
1
2
1
2
VCC1_5_A
VCC1_5_A
VCC1_5_A
V7
1
2
1
2
1
2
1
2
DY
C487
SCD1U10V2KX-5GP
C459
SC1U10V2KX-1GP
32mA
SCD1U10V2KX-5GP
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
H16
VCCSUS1_5
VCCSUS1_5
VCC1_5_A
U8
VCCLAN_1D05V_INT_ICH G11
H11
SCD1U10V2KX-4GP
G12
H13
C86
3D3V_S0
C450
1D5V_S0
Vcc Sus 1_05

C479
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
C484
SCD1U10V2KX-4GP
C449
C444
SCD1U10V2KX-4GP
VCCSUSHDA_ICH
SCD1U10V2KX-4GP
C446
SC1U10V2KX-1GP
1
2
PCI
VCC1_5_A
VCC1_5_A
VCC1_5_A
T7
H15
GLAN POWER
80mA
C490
SCD1U16V2KX-3GP
C493
C489
SC39P50V2JN-1GP
V11
U11
J17
SC10U6D3V5MX-3GP
1D5V_S0
V10
SCD1U10V2KX-4GP
G9
H9
23mA
C485
AD7
C482
G8
H7
H8
SCD1U10V2KX-4GP
W18
1D5V_S0
SC1U10V3KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
VCCHDA
VCCSUS1_05
VCCSUS1_05
VCCPSUS
1
2
K
1
VCC1_5_A
VCC1_5_A
VCC1_5_A
USB CORE
C481
SCD1U10V2KX-4GP
19mA in S0;78mA in S3/S4/S5
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
DY
C441
3D3V_S0
2
2
VCCP_CORE
VCC3_3
VCC3_3
VCC3_3
VCCSUSHDA
ATX
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
U15
V15
USBPLL=10mA
C457
VCC3_3=278mA
A
K
1
2
A
AA9
V14
W14
C448
SC1U10V2KX-1GP
W10
C456
3D3V_S0
1D05V_S0
1mA
C458
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AE9
C445
C451
SCD1U10V2KX-4GP
VCCSATAPLL
ARX
SCD1U16V2KX-3GP
U13
V13
W13
1D5V_S0
C427
68.1R220.10D
50mA
3D3V_S0
1D5V_S0
C492
C120
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
W17
U12
V12
W12
C483
1D5V_S0
L2
1
2
IND-1D2UH-7-GP
68.1R220.10B
SCD1U10V2KX-4GP
SATA+USB=1.56A
C447
SC1U10V2KX-1GP
23mA
SCD1U10V2KX-4GP
V18
SCD1U10V2KX-4GP
1D5V_S0
VCC3_3
VCC3_3
VCC3_3
VCC3_3
R184
100R2J-2-GP
83.R2004.B8F
83.R0304.A8F
C454
C480
V16
U16
VCC3_3
5V_S5
D8
RB751V-40-2-GP
2mA
V5REF_S5
V_CPU_IO
V_CPU_IO
SCD1U10V2KX-4GP
3D3V_S5
T17
U17
SC4D7U6D3V3KX-GP
C460
P19
VCC_DMI
VCC_DMI
SCD1U10V2KX-4GP
Layout Note:
Place near ICH9
SCD1U16V2KX-3GP
C491
C65
68.1001D.10E
VCCA3GP
83.R2004.B8F
83.R0304.A8F
IND-10UH-66-GP
C68
SC1U10V3KX-3GP
V5REF_S0
R191
100R2J-2-GP
SC10U6D3V5MX-3GP
D9
RB751V-40-2-GP
2mA
1D5V_APLL_S0
L1
C465
1D5V_DMIPLL_ICH_S0
SCD1U10V2KX-4GP
VCCDMIPLL
1D5V_S0
DY
1D05V_S0
47mA
5V_S0
C473
C118
SCD01U16V2KX-3GP
*Within a given well, 5VREF needs to be up before the

corresponding 3.3V rail
3D3V_S0
C467
C462
C474
1.13A
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
Layout Note: Place near ICH9M
L11
L12
L13
L14
L15
M11
M15
N11
N15
P11
P15
R11
R12
R13
R14
R15
CORE
1
2
DY
C470
SC1U10V3KX-3GP
TC4
ST220U2D5VDM-13GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
V5REF_SUS
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
SCD1U10V2KX-4GP
C468
U7
J19
K18
K19
L18
L19
M18
M19
N18
N19
P18
R18
T18
T19
U18
U19
SCD1U10V2KX-4GP
C469
V5REF
V5REF_S5
VCCRTC
G7
SC39P50V2JN-1GP
1D5V_S0
G17
V5REF_S0
SCD1U10V2KX-4GP
657mA
6uA in G3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C496
6 OF 6
SB1F
RTC_AUX_S5
Wistron Corporation
VCCGLAN3_3
Title
ICH9-M (3 of 4)
ICH9M-1-GP
Size
Document Number
Rev
SB
JM41_Discrete
Date: Monday, March 02, 2009
5
Sheet
1
15
of
48
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U5
U10
W11
U14
W16
U21
U22
U25
V3
V8
V19
V23
W1
W4
W5
W7
W9
W15
W19
W21
W22
W25
Y3
Y23
AA1
AA4
AA6
AA8
AA11
AA13
AA15
AA16
AA17
AA19
AA21
AA22
AA25
AB3
AB9
AB11
AB13
AB15
AC24
AC1
AC4
AC10
AC12
AC14
AD2
AD6
AD9
AD16
AD19
AD22
AE3
AE4
AE11
AE13
AE15
V17
AE8
V9
J16
3D3V_S5
3D3V_S0
8
7
6
5
B4
B7
B10
B13
B16
B19
B22
D2
D24
E5
E7
E9
E11
E13
E15
E17
E19
E21
F24
G2
G5
G10
G13
G16
G19
G21
H10
H12
H18
H23
J5
J9
J10
J11
J12
J13
J15
J21
J22
J25
K2
K9
K10
K11
K12
K13
K15
K17
K23
L5
L9
L10
L16
L17
L21
L22
L25
M9
M10
M12
M13
M14
M16
M17
M23
N2
N5
N9
N10
N12
N13
N14
N16
N17
N21
N22
N25
P9
P10
P12
P13
P14
P16
P17
P23
R5
R7
R8
R9
R10
R16
R17
R19
R21
R22
R25
T2
T8
T10
T11
T12
T13
T14
T15
T16
T23
5 OF 6
RN22
SRN2K2J-2-GP
1
2
3
4
SB1E
3D3V_S0
Q10
14
14
SMB_CLK
SMBC_ICH 3,17,18
2
2N7002EDW -GP
SMB_DATA
SMBD_ICH 3,17,18
84.27002.G3F
SMBUS
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
A1
A25
AE1
AE25
ICH0_NCTF#A1
ICH0_NCTF#A25
ICH0_NCTF#AE1
ICH0_NCTF#AE25
1
1
1
1
TP18
TP16
TP8
TP7
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
1
NCTF PIN
Wistron Corporation
Title
ICH9-M (4 of 4)
ICH9M-1-GP
Size
Document Number
Date:
Rev
SB
JM41_Discrete
A
Sheet
E
16
of
48
DDR3 SOCKET_1
DM2
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
1M_B_A15
M_B_BS#2
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
9
9
M_B_BS#0
M_B_BS#1
109
108
TPAD14-GP
TP25
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
10
27
45
62
135
152
169
186
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
12
29
47
64
137
154
171
188
9 M_B_DQ[63..0]
1D5V_S3
1
2
1
2
1
2
1
2
1
1
1
2
2
1
C497
DY
SCD1U16V2ZY-2GP
DY
C151
SC10U6D3V5MX-3GP
C161
SC10U6D3V5MX-3GP
C143
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C207
C190
SC10U6D3V5MX-3GP
C173
SC10U6D3V5MX-3GP
SCD1U16V2ZY-2GP
C506
SC10U6D3V5MX-3GP
C183
SC10U6D3V5MX-3GP
C200
Layout Note
Near Pin 126
C131
SC1U10V3KX-3GP
DDR_VREF_S3_1
C132
SCD1U16V2ZY-2GP
9 M_B_DQS#[7..0]
Layout Note
Near Pin 1
9 M_B_DQS[7..0]
C298
SC1U10V3KX-3GP
DDR_VREF_S3_1
C309
SCD1U16V2ZY-2GP
8
8
M_ODT2
M_ODT3
116
120
DDR_VREF_S3_1
DDR_VREF_S3_1
126
1
8,18 DDR3_DRAMRST#
203
204
1
2
C105
SC10U6D3V5MX-3GP
SC1U10V3ZY-6GP
DDR_VREF_S3
C98
30
NP1
NP2
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
BA0
BA1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
SDA
SCL
EVENT#
VDDSPD
SA0
SA1
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
VREF_CA
VREF_DQ
RESET#
VTT1
VTT2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NP1
NP2
110
113
115
M_B_RAS# 9
M_B_WE# 9
M_B_CAS# 9
114
121
M_CS2# 8
M_CS3# 8
73
74
M_CKE2 8
M_CKE3 8
101
103
M_CLK_DDR2 8
M_CLK_DDR#2 8
102
104
11
28
46
63
136
153
170
187
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
200
202
M_CLK_DDR3 8
M_CLK_DDR#3 8
M_B_DM[7..0]
SMBD_ICH
SMBC_ICH
198
3,16,18
3,16,18
3D3V_S0
PM_EXTTS#0 8,18
199
197
201
77
122
125
DDRB_SA1
1
R26
10KR2J-3-GP
C73
1D5V_S3
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
DY
SCD1U16V2ZY-2GP
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
M_B_A[14..0]
9
4
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
DDR3-204P-7-GP-U1
62.10017.F81
62.10017.P61
62.10017.N41
1
Wistron Corporation
Title
Size
Document Number
Date:
DDR3 Socket1
JM41_Discrete
Sheet
E
17
Rev
SB
of
48
DDR3 SOCKET_2
4
DM1
1
2
8,17 DDR3_DRAMRST#
30
203
204
SC1U10V3ZY-6GP
C78
SC10U6D3V5MX-3GP
C70
1
2
DDR_VREF_S3
ODT0
ODT1
VREF_CA
VREF_DQ
RESET#
VTT1
VTT2
1
2
DY
C167
DY
C144
TC11
1
2
C177
C138
C150
C168
C141
C156
C176
C158
1D5V_S3
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
1D5V_S3
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
DY
ST330U6VDM-2-GP
SC1U10V3KX-3GP
126
1
77
122
125
C75
SC10U6D3V5MX-3GP
116
120
M_ODT0
M_ODT1
DDR_VREF_S3_1
DDR_VREF_S3_1
C299
SCD1U16V2ZY-2GP
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
3D3V_S0
197
201
SCD1U16V2ZY-2GP
8
8
12
29
47
64
137
154
171
188
199
SC10U6D3V5MX-3GP
C290
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
3,16,17
3,16,17
PM_EXTTS#0 8,17
SCD1U16V2ZY-2GP
DDR_VREF_S3_1
10
27
45
62
135
152
169
186
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SMBD_ICH
SMBC_ICH
SC10U6D3V5MX-3GP
9 M_A_DQS[7..0]
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
SMBD_ICH
SMBC_ICH
198
SCD1U16V2ZY-2GP
Layout Note
Near Pin 1
9 M_A_DQS#[7..0]
NC#1
NC#2
NC#/TEST
200
202
M_CLK_DDR1 8
M_CLK_DDR#1 8
M_A_DM[7..0] 9
SC10U6D3V5MX-3GP
SC1U10V3KX-3GP
C137
SCD1U16V2ZY-2GP
SA0
SA1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SCD1U16V2ZY-2GP
C136
VDDSPD
11
28
46
63
136
153
170
187
SC10U6D3V5MX-3GP
DDR_VREF_S3_1
SDA
SCL
EVENT#
M_CLK_DDR0 8
M_CLK_DDR#0 8
102
104
SCD1U16V2ZY-2GP
Layout Note
Near Pin 126
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_CKE0 8
M_CKE1 8
101
103
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
BA0
BA1
M_CS0# 8
M_CS1# 8
73
74
SC10U6D3V5MX-3GP
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
9 M_A_DQ[63..0]
CK1
CK1#
M_A_RAS# 9
M_A_WE# 9
M_A_CAS# 9
114
121
109
108
CK0
CK0#
110
113
115
M_A_BS#0
M_A_BS#1
TP24
CS0#
CS1#
CKE0
CKE1
NP1
NP2
9
9
TPAD14-GP
NP1
NP2
RAS#
WE#
CAS#
M_A_BS#2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
M_A_A0
98
M_A_A1
97
M_A_A2
96
M_A_A3
95
M_A_A4
92
M_A_A5
91
M_A_A6
90
M_A_A7
86
M_A_A8
89
M_A_A9
85
M_A_A10
107
M_A_A11
84
M_A_A12
83
M_A_A13
119
M_A_A14
80
1 M_A_A15 78
79
M_A_A[14..0]
DDR3-204P-46-GP
62.10017.P11
62.10017.N91
62.10017.K11
Wistron Corporation
Title
DDR3 Socket2
Size
Document Number
Date:
Rev
SB
JM41_Discrete
A
Sheet
E
18
of
48
LCD/CCD CONN
Internal MIC
F1
DCBATOUT
POLYSW -1D1A24V-GP
DCBATOUT_LCD1
LCD_TXAOUT0- 41
LCD_TXAOUT0+ 41
LCD_TXAOUT1LCD_TXAOUT1+
LCD_TXAOUT1- 41
LCD_TXAOUT1+ 41
LCD_TXAOUT2- 41
LCD_TXAOUT2+ 41
LCD_TXACLKLCD_TXACLK+
LCD_TXACLK- 41
LCD_TXACLK+ 41
69.50007.691
69.50007.771
3D3V_S0
1
2
SC22P50V2JN-4GP
2
DY
SRN2K2J-1-GP
RN16
4
3
DY
2
1
3D3V_S0
EC36
3D3V_S0
RN17
LCD_EDID_DAT_C
LCD_EDID_CLK_C
LCD_EDID_DAT_C
LCD_EDID_CLK_C
3
4
SRN0J-10-GP-U
2
1
DY
2
IPEX-CONN40-2R-GP
20.F1093.040
C134
DY
U33
28
0R2J-2-GP
2
R217
10KR2J-3-GP
G_BL_ON 43
CH715FPT-GP
83.R0304.B81
83.R2004.C81
LCDVDD
3D3V_S0
R34
U8
U9
2
LCDVDD_ON
VIN#4
R33
GMCH_L_BKLTCTL 8
33R2J-2-GP
C139
SC4D7U6D3V3KX-GP
SB
R165
1
2
DY
DY
1
2
1KR2F-3-GP
BLON_OUT 28
C432
SC100P50V2JN-3GP
R166
10KR2J-3-GP
SC100P50V2JN-3GP
C106
BLON_OUT_R
74.09724.09F
74.05285.07F
KBC_L_BKLTCTL 28
DY
RT9724GB-GP
1
0R2J-2-GP
BRIGHTNESS_CN
C135
SC4D7U6D3V3KX-GP
83.R0304.B81
83.R2004.C81
VIN#5
CH715FPT-GP
C129
SCD1U16V2ZY-2GP
DY
EN
GND
VOUT
1
2
3
3
42 G_LCDVDD_ON
GMCH_BL_ON 8
Layout 40 mil
DY
8 GMCH_LCDVDD_ON
2
3
KBC_BL_ON_IN
R43
41
41
R219
1
0R2J-2-GP
2
20.F1289.040
C486
SC10U35V0ZY-GP
49
LCD_EDID_DAT
LCD_EDID_CLK
LCDVDD
3D3V_S0
SCD1U16V2ZY-2GP
47
EC37
DMIC_CLK 22
DMIC_DAT 22
14
14
DY
2
FUSE-1D1A6V-4GP-U
46
USBPN4
USBPP4
45
CCD_PW R
28
SC22P50V2JN-4GP
2
44
DBC_EN
C438
SCD1U16V2ZY-2GP
43
BLON_OUT_R
BRIGHTNESS_CN
F2
1
C443
SC4D7U10V5ZY-3GP
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
51
C49
SC10U35V0ZY-GP
DY
50
1
42
SCD1U16V2ZY-2GP
41
C61
48
LCD1
69.50007.A31
69.50007.A41
Wistron Corporation
Title
LCD CONN
Size
Document Number
Date:
Rev
SB
JM41_Discrete
5
Sheet
1
19
of
48
3D3V_S0
5V_S0
4
3
Hsync & Vsync level shift
RN34
SRN10KJ-5-GP
1
2
14,41 DIS_EN
U45
L=>B0 -UMA
H=>B1 -MXM
28 HDD_PW R_EN#
For UMA CRT
1
2
3
4
8 GMCH_HSYNC
1OE#
1A
2Y
GND
VCC
2OE#
1Y
2A
CRT_DEC# 28
CN3
8
7
6
5
21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22
43 HDMI_DATA2+
43 HDMI_DATA2-
SSLVC2G125DP-1GP
73.2G125.A07
43 HDMI_DATA1+
43 HDMI_DATA1-
8 GMCH_VSYNC
CRT_VSYNC
CRT_HSYNC
2
1
3
4
43 HDMI_DATA0+
43 HDMI_DATA0-
RN38
SRN0J-6-GP
43 HDMI_CLK+
43 HDMI_CLK-
U44
For DIS CRT

43,45 G_HSYNC
1
2
3
4
CRT_VSYNC_OT
1OE
1A
2Y
GND
VCC
2OE
1Y
2A
8
7
6
5
CRT_HSYNC_OT
13
13
SATA_TXP1
SATA_TXN1
13
13
SATA_RXP1
SATA_RXN1
SSHCT2G126DP-GP
IPEX-CON20-1-GP
73.2G126.ABB
3
20.F1312.020
43,45 G_VSYNC
RN40
4
3
43,45 G_HSYNC
43,45 G_VSYNC
1
2
CRT_HSYNC_OT
CRT_VSYNC_OT
CN2
41
1
SRN0J-6-GP
DY
14
14
USBPN9
USBPP9
14
14
USBPN1
USBPP1
41 CRT_RED
41 CRT_GREEN
41 CRT_BLUE
DDC_CLK & DATA level shift
CRT_HSYNC
CRT_VSYNC
CRT_DDCCLK
CRT_DDCDATA
22 MIC1_JD#
22 HP_JD#
DDCDATA
NC7SB3157P6X-1GP
73.03157.C0H
8 GMCH_DDCCLK
43 G_DDCCLK
B0
GND
B1
A
VCC
S
CRT_DDCDATA
84.27002.G3F
4
5
6
EC22
DY
2N7002EDW -GP
U43
3
2
1
Q17
EC23
DY
2
4
5
6
2
1
A
VCC
S
SC33P50V2JN-3GP
B0
GND
B1
5V_S5
SC33P50V2JN-3GP
3
2
1
43 G_DDCDATA
5V_S0
2
1
U42
8 GMCH_DDCDATA
R296
10KR2J-3-GP
RN39
DY
1
2
DY
3D3V_S0
RN35
SRN2K2J-1-GP
3
4
RN36
SRN2K2J-1-GP
28
CRT_DEC#
43 G_HDMI_DATA
43 G_HDMI_CLK
43 HDMI_DETECT#
14 USB_OC#1
25,26,28 USB_PW R_EN#
28
MODEL_ID0
28
MODEL_ID1
28 HDD_PW R_EN#
3D3V_S0
SRN4K7J-8-GP
3D3V_S0
3D3V_S0
3
4
4
3
VDDR3
22 HP_OUT_L
22 HP_OUT_R
22
SPDIF
22 MIC1_IN_L
22 MIC1_IN_R
42
PTW O-CON40-2-GP
DDCCLK
CRT_DDCCLK
20.K0410.040
20.K0420.040
NC7SB3157P6X-1GP
SB
73.03157.C0H
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
L=>B0 -UMA
H=>B1 -MXM
AGND
1
Wistron Corporation
RN37
43 G_DDCDATA
43 G_DDCCLK
14,41 DIS_EN
4
3
1
2

DDCDATA
DDCCLK
Title
SRN0J-6-GP
CRT BD CONN
DY
Size
Document Number
Date:
Rev
SB
JM41_Discrete
A
Sheet
E
20
of
48
SSD SATA Connector

SSD1
16
S1
S2
SATA_TXN0
S3
13 SATA_RXN0
S5
SATA_TXP0 13
S4
S6
SATA_RXP0 13
S7
3D3V_S0
3D3V_S0
P1
1
5V_S0
P9
P11
17
SKT-SATA7P+15P-30-GP
TC21
SC10U10V5ZY-1GP
P15
SCD1U16V2ZY-2GP
P13
P14
C667
P12
SCD1U16V2ZY-2GP
P8
P10
C665
TC20
P7
SC10U10V5ZY-1GP
P5
P6
P3
P4
5V_S0
P2
13
62.10065.911
Wistron Corporation
Title
Size
HDD CONN
Document Number
Rev
SB
JM41_Discrete
Date:
Sheet
21
of
48
5V_S0
U24
5VA_S0
Put C735 Close To CODEC

C362
SC10U10V5KX-2GP
DVDD
DVDD_IO
21
Alnalog signal
13 ACZ_RST#
1
EC53
AGND
AUD_VREF
AUD_JDREF
2 R330DY 1
0R2J-2-GP
1
2
33R2F-3-GP
R328
2
SC100P50V2JN-3GP
ACZ_RST# 13
ACZ_SDATAIN0
R306
20KR2F-L-GP
13
ACZ_SDATAOUT 13
AGND
5VP_S0
5V_S0
DY
C631
AGND
1 0R2J-2-GP
2
SC22P50V2JN-4GP
23
23
23
23
AGND
R295
C635
SCD1U10V2KX-4GP
AGND
SPKR_LSPKR_L+
SPKR_RSPKR_R+
SC10U10V5KX-2GP
1
C666
41
40
44
45
13 ACZ_SYNC
2 R329
SPKLSPKL+
SPKRSPKR+
12
1
2
1
2
C660
13 ACZ_BITCLK
1
2
AUD_PD#
10KR2J-3-GP
R316
SC100P50V2JN-3GP
SRN10KJ-5-GP
B
ACZ_SDATAIN0_R
ACZ_SPKR
EC_BEEP
2 PCBEEP
SCD1U10V2KX-4GP
ACZ_BITCLK_R
14
28
10
6
11
5
8
ALC269X-GR-GP
1
C659
4
3
CBN
SC2D2U10V3ZY-1GP
AUDIO_BEEP
MIC1_VREFO_R
MIC1_VREFO_L
35
AVSS1
AVSS2
CBP
AUD_CBN
24
23
7
49
36
26
37
SPDIFO2/EAPD
AUD_CBP
LINEOUT1-R
LINEOUT1-L
Digital signal
VREF
47
Put C736 Close To CODEC

4
3
30
28
29
GPIO1/DMIC-CLK
GPIO0/DMIC_DATA
RN42
1
2
MIC1_VREFO_R
MIC1_VREFO_L
MIC2_VREFO
SRN2K2J-1-GP
27
3
2
RN43
SRN0J-6-GP
C633
SENSE_B
CPVREF
PD#
MONO-OUT
JDREF
SC22P50V2JN-4GP
SC22P50V2JN-4GP
DY DY
18
BEEP
EC61
EC56
DMIC_CLK_R
DMIC_DAT_R
3
4
SENSE_A
31
4
20
19
2
1
DMIC_CLK
DMIC_DAT
MIC1_JD#
13
19
19
1
39K2R3F-GP
2
1
R309
20KR2F-L-GP
20
R311 2
HP_JD#
20
15
14
RN41
SYNC
BIT-CLK
RESET#
SDATA_OUT
SDATA_IN
SENSE_A
16
LINE2-R
LINE2-L
SPDIFO
SB
C
17
MIC2_L
PVSS1
PVSS2
48
SPDIF
MIC2_R
HP-OUT_R
HP-OUT_L
42
43
33
32
HP_OUT_R
HP_OUT_L
20
MIC1_IN_R 20
MIC1_IN_L 20
2
2SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
0R0603-PAD
U47
20
20
1
C6381
C644
3D3V_AUDIO_S0
R132
22
3D3V_S0
MIC1_R
MIC1_L
5VP_S0
MIC1_L
SB
5VA_S0
DVDDIO
MIC1_R
R327
1
2
0R2J-2-GP
1D5V_S0
DVSS
GND
AGND
1 AUD_CPVEE
SC2D2U6D3V3MX-1-GP
2
C634
34
39
46
AGND
AGND
CPVEE
PVDD1
PVDD2
74.09198.A7F
74.09091.F3F
1
9
RT9198-4GPBG-GP
25
38
VOUT
AVDD1
AVDD2
NC#5
C397
SC1U10V3KX-3GP
EN
GND
VIN
1
2
3
2
0R3-0-U-GP
AGND
3D3V_S0
R82
1
2
C394
SCD1U10V2KX-4GP
C395
SC10U10V5KX-2GP
C369
SCD1U10V2KX-4GP
SC10U10V5KX-2GP
C388
2
0R0603-PAD
Wistron Corporation
Close Pim.39
and Pin.46
Close Pim.1
and Pin.9
Title
AUDIO CODEC REALTEK ALC269

Size
Document Number
Rev
SB
JM41_Discrete
Date:
5
W ednesday, March 04, 2009
Sheet
1
22
of
48
Internal Speaker
SPK1
5
22
SPKR_L-
22
22
22
SPKR_L+
SPKR_RSPKR_R+
2
3
4
1
2
EC34 SC100P50V2JN-3GP
DY
DY
DY
ACES-CON4-5-GP
20.F0866.004
20.F1261.004
DY
Wistron Corporation
Title
AUDIO JACK
Size
Document Number
Date:
Rev
SB
JM41_Discrete
5
Sheet
1
23
of
48
20.K0289.032
ACES-CON32-GP
28
13,28
28
28
TP_LOCK_LED
RTC_BAT
DC_BATFULL
CHARGE_LED
34
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
TP_LOCK_LED
DC_BATFULL
CHARGE_LED
3D3V_AUX_S5
14
14
8,14,25,28,29,42
USBPN7
USBPP7
PLT_RST1#
5V_ODD_S0
30
30
28
TP_BTN_L
TP_BTN_R
TP_LOCK_BTN#
28 BLUETOOTH_EN
EC52
DY
2
1
2
EC55
DY
SC33P50V2JN-3GP
EC54
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
3D3V_S0
28 LID_CLOSE#
13 SATA_RXP4
13 SATA_RXN4
13 SATA_TXN4
13 SATA_TXP4
14
14
USBPN11
USBPP11
1
33
CN1
B
Wistron Corporation
Title
CARDREADER BD CONN
Size
Document Number
Rev
SB
JM41_Discrete
Date:
5
W ednesday, March 04, 2009
Sheet
1
24
of
48
SC33P50V2JN-3GP
3D3V_S0
EC15
BTB1
14 PCIE_TXN2
14 PCIE_TXP2
14
14
PCIE_RXN2
PCIE_RXP2
14 PCIE_RXN1
14 PCIE_RXP1
14 PCIE_TXN1
14 PCIE_TXP1
31 MEDIA_LED#_R
3
LAN_CLKREQ#
2
EC6
DY
62.10080.031
3D3V_S5
1D5V_S0
DCBATOUT
EC8
DY
SC33P50V2JN-3GP
STC-CONN70D-GP-U
DY
CLK_PCIE_LAN 3
CLK_PCIE_LAN# 3
SC33P50V2JN-3GP
EC5
SC33P50V2JN-3GP
DCBATOUT
USBPN0
USBPP0
DY
EC12
SC33P50V2JN-3GP
14
14
3 CLK_PCIE_MINI1#
3 CLK_PCIE_MINI1
3D3V_AUX_S5
RUN_POW ER_ON
SMBC_THERM 27,28,43
SMBD_THERM 27,28,43
BAT_IN# 28
BAT_SDA 28
BAT_SCL 28
E51_RxD 28
E51_TxD 28
AD_IA
28
AC_IN# 28
AD_ON 28
USB_OC#0 14
USB_PW R_EN# 20,26,28
PLT_RST1# 8,14,24,28,29,42
W LAN_CLKREQ# 3
ALL_LED_OFF# 28,31
MEDIA_INT# 28
W LAN_TEST_LED 28
W IRELESS_EN 28
3G_EN 28
EJECT_BTN 28
3V/5V_EN 28,32
PCIE_W AKE# 14
USBPN3
USBPP3
USBPN10
USBPP10
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
NP2
14
14
14
14
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
DY
2
EC14
SC33P50V2JN-3GP
DY
NP1
1
5V_S5
Wistron Corporation
Title
MINI BD CONN
Size
A3
Document Number
Date:
Tuesday, March 03, 2009
Rev
JM41_Discrete
Sheet
E
SB
25
of
48
BTB2
11
1
EC3
DY
SC33P50V2JN-3GP
5V_S5
2
3
4
5
6
7
8
9
10
31 FRONT_PW RLED#_R
28 KBC_PW RBTN#_L
14
14
USBPN2
USBPP2
31 STDBY_LED#_R
20,25,28 USB_PW R_EN#
12
SB
ACES-CON10-7-GP
20.F0866.010
20.F1261.010
Wistron Corporation
Title
POWER BUTTON CONN
Size
A3
Document Number
Date:
Rev
JM41_Discrete
Sheet
1
SB
26
of
48
CPU TEMP:
5V_S0
H_THERMDC
SC100P50V2JN-3GP
EMC2102_DP2
C440 1
EMC2102_DN2
SC100P50V2JN-3GP
CLOSE TO EMC2103
C502
SC4D7U10V5ZY-3GP
C500
for CPU thermal diode
H_THERMDA
H_THERMDA
H_THERMDC
H_THERMDC
C587 for EMI and

solve acoustic noise
C434 1
SCD1U16V2ZY-2GP
H_THERMDA
H_THERMDA and H_THERMDC routing 10mil trace width

and spacing. Locate Capacity near thermal diode
FAN1
5
1
84.03904.H11
84.03904.L06
EMC2102_DP2
SC22P50V2JN-4GP
C199
DY
DY
DY
84.03904.L06
84.03904.H11
RSMRST# 28,32
MMBT3904-4-GP
Q3
84.27002.Y31
84.T3904.C11
G
2
PURE_HW _SHUTDOW N#
Q2
2N7002-11-GP
SC22P50V2JN-4GP
C62
1
R38
10KR2J-3-GP
Q1
MMBT3904-4-GP
FAN_PW M
FAN_TACH
84.T3904.C11
EMC2102_DN2
for T8 thermal diode
for system thermal diode
R164
C433
SCD1U16V2KX-3GP
ps. FAN1 POWER TRACE WIDTH MAY BE IN 25 MIL

U29
RN15
SRN10KJ-5-GP
3D3V_S0
H_THERMDA
H_THERMDC
EMC2102_DP2
EMC2102_DN2
R174
10KR2J-3-GP
PURE_HW _SHUTDOW N#
THERM_SCI#
25,28,43 SMBC_THERM
25,28,43 SMBD_THERM
R180 2
R176 2
2
1
16
15
7
6
1 0R0402-PAD
1 0R0402-PAD
SMBC_THERM_1
SMBD_THERM_1
9
8
VDD
DP1
DN1
DP2/DN3
ND2/DP3
SYS_SHDN#
ALERT#
SMCLK
SMDATA
GPIO1
GPIO2
4
5
TACH
PWM
10
11
TRIP_SET
SHDN_SEL
14
13
GND
GND
12
17
2103_GPIO1 1
2103_GPIO2 1
FAN_TACH
FAN_PW M
TRIP_SET
R1751
SHDN_SEL
1
R181
2 787R2F-GP
2
22KR2F-GP
SA
EMC2103-2-AP-GP
SHDN_SEL
74.02103.A73
Channel 1: CPU
Channel 2: Palmrest
Channel 3: T8
PULL UP
RESISTOR
TP52 TPAD14-GP
TP54 TPAD14-GP
3
4
3
C
20.F0411.004
5V_S0
2103_VDD
49D9R2F-GP
PTW O-CON4-8-GP
20.F1396.004
2
1
3D3V_S0
2
3
4
C182
SCD1U16V2ZY-2GP
3D3V_S0
3D3V_S0
TRIP_SET
Ttrip(degree)
RSET(1%)
MODE OF OPERATION
EXTERNAL DIODE 1 SIMPLE MODE-BETA
COMPENSATION DISABLED,REC DISABLED
<=4.7K OHM
EXTERNAL DIODE 1 DIODE MODE-BETA

COMPENSATION DISABLED,REC ENABLED
6.8K OHM
EXTERNAL DIODE 1 TRANSISTOR MODE-BETA

COMPENSATION ENABLED,REC ENABLED
10K OHM
INTERNAL DIODE
15K OHM

22K OHM

>=33K OHM
85
562
86
604
87
649
88
698
89
750
90
787
91
845
92
909
93
953
94
1020
95
1100
Wistron Corporation
Title
Thermal/Fan Controllor
Size
Document Number
Date:
JM41_Discrete
Sheet
1
27
Rev
SB
of
48
PCLK_KBC
SC4D7P50V2CN-1GP
DY 0R2J-2-GP
1
C361
1
2PCLK_KBC_RC
DY
ECSCI#_KBC
19 KBC_BL_ON_IN
ECSWI#_KBC
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
1
2
19
46
76
88
115
101
105
106
107
AD_IA
25
TP_LOCK_BTN# 24
VR_PWRGD 14,32,34
MEDIA_INT# 25
S0_PWR_GOOD 32
102
VCC
VCC
VCC
VCC
VCC
GPI94
GPI95
GPI96
GPI97
D/A
1
2
1
2
80
LPC
97
98
99
100
108
96
2 R269
BATTERY----->
81
3D3V_S0
R279
DBC_EN
KA20GATE
10KR2J-3-GP
3D3V_AUX_S5
SP
GPIO66/G_PWM
GPIO77
GPIO76/SHBM
GPIO75
GPIO81
SPI
GPIO
25
25
2
10KR2J-3-GP
BAT_IN#
1 R273
2
100KR2J-1-GP
UMA_DISCRETE#
1 R268
10KR2J-3-GP
E51_TxD 111
E51_RxD 113
112
E51_TxD
E51_RxD
24 DC_BATFULL
25,32 3V/5V_EN
2
R73
S5_ENABLE
1
10KR2J-3-GP
114
14
15
GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0
GPIO16
GPIO34
GPIO36
SER/IR
KBC_XI
77
KBC_XO
79
30
CRT_DEC# 20
3D3V_S0
PM_SLP_S3# 14,32,36,39,40
AC_IN#
LID_CLOSE#
SB_ID
25
LID_CLOSE#
SB
24
3G_EN 25
MODEL_ID0 20
PWRLED 31
STDBY_LED 31
MODEL_ID0
25,31 ALL_LED_OFF#
14
PM_PWRBTN#
1
TPAD14-GP
25
R341
10KR2J-3-GP
TPAD14-GP
32
UMA_DISCRETE#
TP29
1ENERGY_DET_KBC
ODD_PWR_EN#
30 TPDATA
30 TPCLK
RSMRST#_KBC 14
PM_SLP_S4# 14,32,35,37
CHARGE_LED 24
HDD_PWR_EN# 20
MODEL_ID1 20
SPI_WP# 29
TP_LOCK_LED 24
BLON_OUT 19
MODEL_ID1
CHG_ON#
22 EC_BEEP
14
EC_TMR
19 KBC_L_BKLTCTL
EJECT_BTN
SB
AD_OFF
29
29
29
29
GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
KBC
13
12
11
10
71
72
GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1
F_SDI
F_SDO
F_CS0#
F_SCK
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
54
55
56
57
58
59
60
61
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
85
ECRST#
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
PS/2
FIU
VCC_POR#
WPCE773LA0DG-GP
USB_PWR_EN#
20,25,26
3D3V_AUX_S5
VCORF
3ECSWI#_KBC
103
1ECSCI#_KBC
GND
GND
GND
GND
GND
GND
3D3V_AUX_S5
3D3V_S0
5
6
7
8
ECRST#
4
3
2
1
MEDIA_INT#
KBRCIN#
SRN10KJ-6-GP
5
18
45
78
89
116
C604
SCD1U16V2ZY-2GP
S5_ENABLE
MMBT3906-4-GP
B
R79
LID_CLOSE#
71.00773.00G
27,32
RSMRST#
84.T3906.A11
2ND = 84.03906.F11
3RD = 84.03906.P11
10KR2J-3-GP
3D3V_AUX_S5
C350
Q6
ECSWI#
AGND
2
1
32KX2
GPIO55/CLKOUT
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
SC1U10V3KX-3GP
ECSCI#_1
R342
10KR2J-3-GP
14
63
117
31
32
118
62
86
87
90
92
SPIDI
SPIDO
SPICS#
SPICLK
44
WPCE773LA0DG-GP
D4
3D3V_AUX_S5
14
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
RN10
VCORF
SB
32KX1/32KCLKIN
20MR3-GP
PCB_VER0
PCB_VER1
KBC_PWRBTN#
2 OF 2
U16B
R71
1
GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#
SMB
8K2R2J-3-GP
R95
SB_ID
84
83
82
91
24 BLUETOOTH_EN
19
DBC_EN
25 WIRELESS_EN
25 WLAN_TEST_LED
R188
GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1
64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110
1 10KR2J-3-GP
DY
R72
68
67
69
70
25,27,43 SMBD_THERM
25,27,43 SMBC_THERM
25 BAT_SDA
25 BAT_SCL
82.30001.841
82.30001.A41
X-32D768KHZ-40GPU
TP27
THERMAL----->
C306
SC6P50V2CN-1GP
E51_TxD
GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04
VREF
A/D
R92
GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#
104
33KR2J-3-GP
13,29 LPC_LFRAME#
13,29 LPC_LAD0
13,29 LPC_LAD1
13,29 LPC_LAD2
13,29 LPC_LAD3
14 INT_SERIRQ
14 PM_CLKRUN#
13
KBRCIN#
13
KA20GATE
R77
10KR2J-3-GP
E51_TxD
DY
124
7
2
3
126
127
128
1
125
8
122
121
29
9
123
X3
3
C332
SC6P50V2CN-1GP
BAT_IN#
U16A
1 OF 2
1KBC_XO_R 2
R93
EC25
DY
10KR2J-3-GP
25
3D3V_S0
VDD
DY
C608
0R0402-PAD
GPIO41
2
R94
E51_RxD
SC27P50V2JN-2-GP
2PLT_RST1#_1
100R2J-2-GP
C616
10KR2J-3-GP
C386
C391
DY
AVCC
R281
1
PLT_RST1#
SC1U16V3ZY-GP
8,14,24,25,29,42
C387
R99
3D3V_AUX_S5_KBC
SMBC_THERM
SMBD_THERM
3D3V_S0
C389
SCD1U16V2ZY-2GP
2
1
3D3V_AUX_S5
C555,C556 colse to Pin VDD
C609
SCD1U16V2ZY-2GP
2
1
C320
SCD1U16V2ZY-2GP
C354
SCD1U16V2ZY-2GP
1
2
3
4
BAT_SCL
BAT_SDA
SCD1U16V2ZY-2GP
8
7
6
5
SRN4K7J-10-GP
DY
C345
EC21
RN9
SC10U10V5ZY-1GP
2
1
3D3V_AUX_S5
3D3V_S0
SCD1U16V2ZY-2GP
3D3V_S0
SC10U10V5ZY-1GP
2
1
3D3V_AUX_S5
D16
RB751V-40-2-GP
3D3V_S0
AD_ON
AD_ON
25
R326
DY
PlanarID
SA: 0,0
SB: 0,1
-1: 1,0
-1M: 1,1
DY
R324
Q5
2N7002-11-GP
84.27002.Y31
G
S
3D3V_AUX_S5
3D3V_AUX_S5
R266
2
1 KBC_PWRBTN#_L1
47KR2J-2-GP
3D3V_AUX_S5
R80
47KR2J-2-GP
Q7
6
KBC_PWRBTN#_L
2N7002EDW-GP
83.R2004.B8F
83.R0304.A8F
KBC_PWRBTN#_L
1
R277
2
0R2J-2-GP
DY
26
KBC_PWRBTN#
KBC_PWRBTN_L
D14
K
RB751V-40-2-GP
R87
47KR2J-2-GP
2
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
KCOL1
2
28
27
20.K0331.026
AD_OFF
KB1
ACES-CON26-3GP
20.K0256.026
470R2J-2-GP
R256
100KR2J-1-GP
D19
C598
SC1U10V3KX-3GP
G
AD_ON_RD
10KR2J-3-GP
R254
47KR2J-2-GP
10KR2J-3-GP
13,24 RTC_BAT
470R2J-2-GP
R275
R271
AD_ON_R
R323
SDM20E40C-7-F-GP
2
R325
83.2R004.081
84.00610.C31
TP0610K-T1-GP
Internal KeyBoard
Connector
PCB_VER0
PCB_VER1
Q4
NDS0610-NL-GP
10KR2J-3-GP
DY
10KR2J-3-GP
GREEN ADAPTER CIRCUIT
1KR2J-1-GP
SB
83.R2004.B8F
83.R0304.A8F
AD_ON_R1
AD_OFF
83.R0304.A8H
2ND = 83.R2002.B8E
3RD = 83.R3004.A8E
R278
2
CH731UPT-GP
G64
GAP-OPEN
EC27
84.27002.G3FSC1KP50V2KX-1GP
DY
MB PIN DEFINE 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Wistron Corporation
K/B
24
Title
KBC WPC775
Size
A2
Document Number
Date:
Tuesday, March 10, 2009
Rev
SB
JM41_Discrete
Sheet
28
of
48
8
7
6
5
EC43
DY
RN33
SRN3K3J-1-GP
3D3V_AUX_S5
1
2
3
4
SCD1U16V2ZY-2GP
3D3V_AUX_S5
SPI_HOLD#
U36
SPICS#
SPIDI
SPI_WP#
1
2
3
4
SPI_DI
SPI_WP#
2 R258
1
33R2F-3-GP
CS#
SO/SIO1
WP#/ACC
GND
VCC
HOLD#
SCLK
SI/SIO0
8
7
6
5
SPI_HOLD#
SPICLK
SPIDO
28
28
28
28
28
16M Bits
SPI FLASH ROM
EC51
DY
2
SC4D7P50V2CN-1GP
72.25X16.A01
EC50
DY
2
72.25165.A01
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
MX25L1605DM2I-12G-GP
DY
EC49
GOLDEN FINGER FOR DEBUG BOARD
13,28 LPC_LAD0
13,28 LPC_LAD1
13,28 LPC_LAD2
13,28 LPC_LAD3
13,28 LPC_LFRAME#
8,14,24,25,28,42 PLT_RST1#
3
PCLK_FWH
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLT_RST1#
PCLK_FWH
1
1
1
1
1
1
1
TP41
TP43
TP42
TP37
TP32
TP44
TP80
TPAD30-1-GP
TPAD30-1-GP
TPAD30-1-GP
TPAD30-1-GP
TPAD30-1-GP
TPAD30-1-GP
TPAD30-1-GP
PCLK_FWH
DY
2
Wistron Corporation
EC47
SC5P50V2CN-2GP

Title
BIOS
Size
Date:
A
Document Number
Rev
JM41_Discrete
29
Sheet
D
SB
of
48
TOUCH PAD
2
1
2
1
TP1
7
1
TP_CLK
TP_DATA
3
4
RN44
SRN33J-5-GP-U
3
4
28 TPCLK
28 TPDATA
EC60
DY
SCD1U10V2KX-4GP
DY
SRN10KJ-5-GP
SCD1U10V2KX-4GP
EC59
RN45
5V_S0
5V_S0
24
24
2
3
4
5
6
TP_BTN_L
TP_BTN_R
DY
ACES-CON6-12-GP
20.K0358.006
SC100P50V2JN-3GP
SC100P50V2JN-3GP
EC58
EC57
DY
Wistron Corporation
Title
Touch PAD
Size
Document Number
Rev
SB
JM41_Discrete
Date:
5
Sheet
1
30
of
48
Q8
DTC143ZUB-GP
R2
R1
84.00143.E1K
84.00143.G1K
28
1
2
R147
150R2F-1-GP
PW RLED
FRONT_PW RLED#
FRONT_PW RLED#_R
FRONT_PW RLED#_R
STDBY_LED#_R
STDBY_LED#_R
26
SB
Q23
DTC143ZUB-GP
R2
R1
84.00143.E1K
84.00143.G1K
28
1
2
R339
150R2F-1-GP
STDBY_LED
STDBY_LED#
26
13
MEDIA_LED#
3D3V_S0
R168
10KR2J-3-GP
Q9
R2
25,28 ALL_LED_OFF#
R1
2
3
MEDIA_LED#_Q
1
R163
MEDIA_LED#_R
2
100R2J-2-GP
MEDIA_LED#_R 25
DTC143ZUB-GP
84.00143.G1K
84.00143.E1K
Wistron Corporation
Title
LED
Size
Document Number
Date:
Rev
SB
JM41_Discrete
5
Sheet
1
31
of
48
ODD Power
5V_ODD_S0
DCBATOUT
Q20
NDS0610-NL-GP
R337
100KR2J-1-GP
Z_12V_D4
74.09711.07F
1
R334
8
7
6
5
SI4800BDY-T1
84.04800.D37
84.08884.037
D18
PDZ9D1B-GP
C669
330KR2J-L1-GP
74.05240.B7F
Z_12V_G3
G5240B2T1U-GP-U
C670
DUMMY-C3
R333
330KR2J-L1-GP
R336
1
10KR2J-3-GP
1
2
3
OUT
GND
NC#3
RUN_POW ER_ON
EN#
IN
SCD22U25V3KX-GP
Z_12V
10KR2J-3-GP
28 ODD_PW R_EN#
5V_S5
U50
1
2
3
4
R332
1
U49
R335
100KR2J-1-GP
5V_S0
84.00610.C31
TP0610K-T1-GP
G
S
S
S
5V_S0
D
D
D
D
3D3V_AUX_S5
Run Power
83.9R103.C3F
83.9R103.F3F
1D5V_S3
1D5V_S0
U18
1
2
3
4
PM_SLP_S3# 14,28,36,39,40
G
S
S
S
2N7002EDW -GP
84.27002.G3F
D
D
D
D
Z_12V_D3
Q21
8
7
6
5
SI4800BDY-T1
84.04800.D37
84.08884.037
R96
1D05V_S0
0R2J-2-GP
DY
R237
56R2F-1-GP
GND
S3_PW RGD 35
PM_SLP_S4# 14,28,35,37
3D3V_AUX_S5
74LVC1G08GW -1-GP
73.01G08.L04
73.01G08.L03
R97
10KR2J-3-GP
4,13
H_PW RGD
H_PW RGD#
B
1
R229
1KR2J-1-GP
C547
SC2D2U16V3KX-GP
Q14
MMBT2222A-3-GP
84.02222.V11
2ND = 84.02222.R11
3RD = 84.02222.S11
R234
10KR2J-3-GP
1
2
2
8,14 PW ROK
DY
B
GND
VCC
Y
74LVC1G08GW -1-GP
3
S0_PW R_GOOD 28
VR_PW RGD_R
2
1
R98
10KR2J-3-GP
VR_PW RGD 14,28,34
D5
BAS16-1-GP
73.01G08.L04
73.01G08.L03
25,28
3V/5V_EN
RSMRST#
RSMRST# 27,28
2ND = 83.00016.K11
3RD = 83.00016.F11
83.00016.B11
D12
BAS16-1-GP
83.00016.B11
2ND = 83.00016.K11
3RD = 83.00016.F11
DY
2
0R2J-2-GP
3D3V_S5 U26
D13
BAS16-1-GP
DY
R115
PW ROK
12KR2F-L-GP
SM_PW ROK_R
SM_PW ROK
B
VCC
R88
3D3V_S5 U23
SM_PW ROK_R
C554
SCD1U16V2ZY-2GP
PM_SLP_S3# 14,28,36,39,40
83.00016.B11
2ND = 83.00016.K11
3RD = 83.00016.F11
DY
Wistron Corporation
Title
Size
RUN & ODD POWER

Document Number
Rev
SB
JM41_Discrete
Date:
Sheet
32
of
48
CPU_CORE
ISL6261A
VID Setting
VID0
D
RT8202
RT8202
1D05V_S0
1D5V_S3
Output Signal
VID0(I / 3.3V)
VID1
PGOOD
VR_PWROK
DCBATOUT_8202_1D05V
VIN
1D5V(O)
1D05V_S0 (10A)
DCBATOUT_8202_1D5V
VIN
1D5V(O)
1D5V_S3 (11A)
D
VID1(I / 3.3V)
VID2
PM_SLP_S3#
VID2(I / 3.3V)
VID3
VID3(I / 3.3V)
VID4
VID4(I / 3.3V)
VID5
EN
PM_SLP_S4#
CPUCORE_ON
PGOOD
EN
CPUCORE_ON
PGOOD
Output Power
VCC_CORE_PWR(O)
VCC_CORE(Imax=18A)
VID5(I / 3.3V)
VID6
GFX_CORE
ISL6263A
VID6(I / 3.3V)
RT9026
5V_S5
Input Signal
CPUCORE_ON
EN (I / 3.3V)
VSS_SENSE
VLDOIN
0D75V_S3 (1.2A)
VTT
PM_SLP_S4#
S3
VID2(I / 3.3V)
VID3
RGND(I / Vcore)
1D5V_S3
CPUCORE_ON
PGOOD
VID1(I / 3.3V)
VID2
VSEN(I / Vcore)
Output Signal
VID0(I / 3.3V)
VID1
Voltage Sense
VCC_SENSE
VID Setting
VID0
0D9V_S0
VIN
0D75V_S3_1
VTTREF
S5
VID3(I / 3.3V)
VID4
VID4(I / 3.3V)
Input Power
DCBATOUT_6261A
5V_S0
Output Power
VDD
DCBATOUT_6263A
VCC(I)
3D3V_S0
Input Power
5V_S0
VCC(I)
VCC(I)
PM_SLP_S3#
VGFXCORE (O)
VIN
Input Signal
CHG_ON#
Input Signal
VR_ON
24750_CELLS
GFXVR_EN
TPS51125
5V/3D3V
VCC_AXG_SENSE
VSS_AXG_SENSE
Input Power
DCBATOUT_51125
VIN
Input Signal
S5_ENABLE
EN0
Output Power
5V(O)
3D3V(O)
ALW_PWRGD_3V_5V
Output Signal
PGOOD
5V(O)
3D3V(O)
Charger MAX8731A
VCC_GFXCORE(7A)
CHGEN#
SRSET
CELLS
VSEN(I / Vcore)
Input Power
RGND(I / Vcore)
AD+
ACN
3D3V_S5 (5A)
Input Signal
AD_OFF
(I)
Output Power
BT+
VOUT (O)
VOUT (O)
Adapter
Output Signal
(O)
DCBATOUT
AD_IN#
5V_AUX_S5
Wistron Corporation
Input Power
AD_JK
VCC(I)

Output Power
VCC(O)
Title
AD+
Power Sequence Logic

Size
B
VCC(I)
Document Number
Date: Monday, March 02, 2009

4
AD_IA
Voltage Sense
5V_AUX_S5
5
AC_IN#
ACGOOD#
5V_S5 (6A)
3D3V_AUX_S5
Output Signal
Rev
JM41_Discrete
Sheet
1
33
SB
of
48
3D3V_S0
DCBATOUT_6261A
R23
G8
1
36
24
UGATE
23
BOOT
22
NC#21
21
BOOT 1
SC82P50V2JN-3GP
C17
2U33_VDIFF_2 1
1K58R3F-GP
VDD
20
VSS
19
VIN
6261A_VO
2
2D2R5F-2-GP
C10
SC180P50V2JN-1GP
1
2
R9
330R2F-GP
6261A_AGND
1
2
SCD1U50V3KX-GP
6261A_VO_R
1
1
6261A_AGND
TC6
0R2J-2-GP
1
2
C14
SCD01U25V2KX-3GP
TC5
R1
1
R5
1KR2F-3-GP
C13
100R2F-L1-GP-U
1
1
2
C20
SCD01U25V2KX-3GP
C12
SC330P50V2KX-3GP
R6
100R2J-2-GP
SCD01U25V2KX-3GP
0R0603-PAD
G72
R4
DCBATOUT_6261A
5 VCORE_VSSSENSE
SC4D7U25V5MX-1GP
6261A_AGND
6261A_SUM
R2
G71
TC3
5V_S0
SC1200P50V2KX-1GP
0R0603-PAD
VSUM
18
17
VO
16
DFB
15
6261A_DFB
DROOP
14
6261A_DROOP
RTN
VSEN
SCD22U50V5KX-3GP
ISL6261ACRZ-T-GP
CYNTEC 1.5uH
Idc=9A 6.5*6.9*3
DCR=14mOhm
6261A_AGND
5V_S0_ISL6261 1
2
C18
SC1U10V3KX-3GP
C15
SCD1U25V3KX-GP
6261A_VIN
2
1
R8
10R3J-3-GP
R3
5 VCORE_VCCSENSE
SE330U2VDM-L-GP
P_77.C3371.051
R10
13
1
2
1KR2F-3-GP
TC1
C31
2BOOT_R
R7
1
2
D003R3720F-1-GP-U
SE330U2VDM-L-GP
P_77.C3371.051
C22
1
330KR2F-L-GP
6261A_RTN
SC120P50V3JN-GP
R12
U33_VDIFF_1
R11
26261A_FB_R 1
6261A_VSEN 12
VDIFF
11
6261A_FB
6261A_UGATE
0R3-0-U-GP
FB
SC4D7U25V5MX-1GP
1
2 VCC_CORE_R
IND-D36UH-9-GP
P_68.R3610.20A
COMP
10
4
3
2
1
6261A_PHASE
SE330U2VDM-L-GP
P_77.C3371.051
VW
VCC_CORE
R146
SE330U2VDM-L-GP
P_77.C3371.051
6261A_COMP
1
6261A_VID3
31
PHASE
OCSET
6261A_VW
SC1KP50V2KX-1GP
P_84.01712.037
L16
R13
6K81R2F-1-GP
C26
1
2
C16
1
4
3
2
1
P_84.01712.037
25
VSSP
SOFT
Iomax=18A
OCP>=27A
SC4D7U10V5KX-4GP
6261A_LGATE
26
5V_S0
2
LGATE
C39
1
27
5
6
7
8
VCCP
6261A_VID4
32
4
3
2
1
6261A_VID0
5
6
7
8
28
U5
NTC
SC4D7U25V5MX-1GP
6261A_VID5
33
VID3
VID0
U6
VR_TT#
6261A_VID1
GAP-CLOSE-PWR
C30
RBIAS
C28
GAP-CLOSE-PWR
1 R14
PMON
C420
6261A_SUM_R
SCD015U25V3KX-GP
6261A_OCSET
2
11K3R2F-2-GP
C421
S
S
S
G
6261A_SOFT
6261A_VID2
29
S
S
S
G
C35
1
6261A_AGND
R15
1
6261A_PMON
30
VID1
FDMS7672-GP
DY
40K2R2F-GP
1
2 6261A_RBIAS
147KR2F-GP
6261A_AGND R16
VID2
FDMS7672-GP
DCBATOUT_6261A
U2
FDMS8692-GP
P_84.01426.037
FDE
R17
6261A_PMON_R
SC1KP50V2KX-1GP
H_VID[6..0]
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
5
6
7
8
6261A_VID6
34
VID6
VR_ON
6261A_DPRSLP
6261A_CORE_ON
35
6261A_DPRSTP#
36
37
DPRSTP#
3V3
DPRSLPVR
39
40
GND_T
R18
R20
R22
R21
R27
R28
R29
D
D
D
D
1
1
1
1
1
1
1
D
D
D
D
6261A_DPRSLP
PGOOD
41
6261A_AGND
C
0R0402-PAD2
0R0402-PAD2
0R0402-PAD2
0R0402-PAD2
0R0402-PAD2
0R0402-PAD2
0R0402-PAD2
S
S
S
G
U4
4,8,13
2
1
2
38
VR_PWRGD
0R0402-PAD
6261A_VO
CPUCORE_ON
6261A_VID0
6261A_VID1
6261A_VID2
6261A_VID3
6261A_VID4
6261A_VID5
6261A_VID6
CLK_EN#
R19
14,28,32
C44
1
8,14
0R0402-PAD
2
C55
6261A_3V3
GAP-CLOSE-PWR
DY
PM_DPRSLPVR
GAP-CLOSE-PWR
G6
1
2
6261A_AGND
H_DPRSTP#
2 499R2F-2-GP
D
D
D
D
6261A_PWRGOOD 2
GAP-CLOSE-PWR
G11
1
2
ST15U25VDM-1-GP
R25
1K91R2F-1-GP
6261A_AGND
GAP-CLOSE-PWR
G10
1
2
TC18
R30
0R0402-PAD
2
1 R31
R24
10R2F-L-GP
SCD1U10V2KX-5GP
GAP-CLOSE-PWR
G9
1
2
VID4
DCBATOUT
VID5
C9
SCD1U25V3KX-GP
G73
1
6261A_AGND
GAP-CLOSE-PWR
6261A_AGND
A
Wistron Corporation
Title
Size
Custom
Date:
5
ISL6261A_CPU CORE
Document Number
Rev
SB
JM41_Discrete
Sheet
1
34
of
48
DCBATOUT
DCBATOUT_8202_1D5V
G68
1D5V_PW R
20090109
GAP-CLOSE-PW R
G56
1
2
DCBATOUT_8202_1D5V
S
S
S
G
GAP-CLOSE-PW R
G49
1
2
GAP-CLOSE-PW R
G48
1
2
Iomax=11A
OCP>16A
GAP-CLOSE-PW R
G47
1
2
20090109
R139
10R2F-L-GP
20090109
RT8202_DH_1D5V
1D5V_PW R
Vout=1.5V
L26
RT8202_LX_1D5V
GAP-CLOSE-PW R
G50
1
2
5V_S5
16
4
TON
PGOOD
RT8202_EN_1D5V
15
EN/DEM
R137
B
2
1
14,28,32,37 PM_SLP_S4#
5
14
NC#5
NC#14
RT8202APQW -GP
OC
FB
10
3
RT8202_OC_1D5V 1
RT8202_FB_1D5V
1D5V_PW R
1
2
1
2
1
RT8202_DL_1D5V
1
1
RT8202_FB_1D5V
C654
GAP-CLOSE-PW R
TC16
SE330U2D5VM-GP
P_77.C3371.10L
R133
21K5R3F-GP
RT8202_LX_1D5V
R136
RT8202_BST_1D5V_L 1
RT8202_DH_1D5V
1R2F-GP
RT8202_LX_1D5V
RT8202_DL_1D5V
R134
5
6
7
8
1
13
12
11
8
VOUT
GND
GND
C407
SCD1U25V3KX-GP
PGND
DY
BOOT
UGATE
PHASE
LGATE
R135
21K5R3F-GP
C404
SCD1U25V3KX-GP
20090109
B
Vout=0.75*(1+Rh/Rl)
RT8202_LX_1D5V
4K32R2F-GP
20090109
17
6
0R0603-PAD
C403
SC47P50V2JN-3GP
1
9
2
RT8202_PGOOD_1D5V
VDDP
DY
VDD
U27
2 R119
1
0R0402-PAD
C401
SC1U10V3KX-3GP
68.1R510.10J
68.1R51A.10G
4
3
2
1
RT8202_VDD_1D5V
1
2
1
2
1
5V_S5
U20
FDMS7672-GP
S
S
S
G
C398
SC100P50V2JN-3GP
C405
SC1KP50V2KX-1GP
RT8202_BST_1D5V
32 S3_PW RGD
RT8202_TON_1D5V
D6
CH521S-30-GP-U1
SCD1U10V2KX-4GP
C406
SC1U10V3KX-3GP
D
D
D
D
R138
820KR2F-GP
R118
10KR2J-3-GP
IND-1D5UH-34-GP
DCBATOUT_8202_1D5V
GAP-CLOSE-PW R
G52
1
2
4
3
2
1
5V_S5
C383
2
5
6
7
8
SC10U25V6KX-1GP
D
D
D
D
U25
FDMS8692-GP
C375
SCD1U50V3KX-GP
C402
SC10U25V6KX-1GP
GAP-CLOSE-PW R
GAP-CLOSE-PW R
G51
1
2
GAP-CLOSE-PW R
G65
1
2
ST15U25VDM-1-GP
20090109
GAP-CLOSE-PW R
G66
1
2
GAP-CLOSE-PW R
G55
1
2
GAP-CLOSE-PW R
G67
1
2
3D3V_S5
GAP-CLOSE-PW R
G53
1
2
GAP-CLOSE-PW R
G70
1
2
TC22
1D5V_S3
G54
GAP-CLOSE-PW R
G69
1
2
Wistron Corporation
Title
Size
A3
Date:
5
RT8202_1D5V
Document Number
Rev
SB
JM41_Discrete
Sheet
1
35
of
48
20090109
DCBATOUT
20090109
DCBATOUT_8202_1D05V
1D05V_PW R
1D05V_S0
G20
G4
GAP-CLOSE-PW R
G19
1
2
S
S
S
G
GAP-CLOSE-PW R
G17
1
2
Iomax=10A
OCP>15A
20090109
GAP-CLOSE-PW R
G18
1
2
4
3
2
1
5V_S5
GAP-CLOSE-PW R
G16
1
2
C21
2
D
D
D
D
U1
FDMS8692-GP
GAP-CLOSE-PW R
C414
SCD1U50V3KX-GP
5
6
7
8
C408
SC10U25V6KX-1GP
GAP-CLOSE-PW R
G3
1
2
GAP-CLOSE-PW R
G12
1
2
GAP-CLOSE-PW R
G2
1
2
GAP-CLOSE-PW R
G13
1
2
DCBATOUT_8202_1D05V
SC10U25V6KX-1GP
ST15U25VDM-1-GP
GAP-CLOSE-PW R
G1
1
2
GAP-CLOSE-PW R
G15
1
2
20090109
GAP-CLOSE-PW R
G7
1
2
DY
R148
10R2F-L-GP
20090109
RT8202_DH_1D05V
RT8202_LX_1D05V
GAP-CLOSE-PW R
G21
1
2
1D05V_PW R
Vout=1.0515V
L15
5V_S5
GAP-CLOSE-PW R
G22
1
2
RT8202_PGOOD_1D05V
16
4
TON
PGOOD
RT8202_EN_1D05V
15
EN/DEM
NC#5
NC#14
RT8202APQW -GP
OC
FB
10
3
VOUT
GND
GND
5
14
PGND
DY
C415
SCD1U25V3KX-GP
13
12
11
8
RT8202_FB_1D05V
RT8202_DL_1D05V
1
TC2
SE330U2D5VM-GP
P_77.C3371.10L
GAP-CLOSE-PW R
G14
1
2
GAP-CLOSE-PW R
R155
10KR3F-L-GP
RT8202_LX_1D05V
C11
1
2
1
1
5
6
7
8
R156
4K02R3F-GP
R151
C419
RT8202_BST_1D05V_L1
SCD1U25V3KX-GP
2
RT8202_DH_1D05V
RT8202_LX_1D05V
0R2J-2-GP
RT8202_DL_1D05V
R154
RT8202_OC_1D05V 1
2 RT8202_LX_1D05V
RT8202_FB_1D05V
4K53R2F-1-GP
1D05V_PW R
20090109
Vout=0.75*(1+Rh/Rl)
20090109
17
6
0R0603-PAD
14,28,32,39,40 PM_SLP_S3#
BOOT
UGATE
PHASE
LGATE
C424
SC47P50V2JN-3GP
4
3
2
1
R150
C423
SC1U10V3KX-3GP
9
VDDP
DY
VDD
U28
1
2
1
2 R157
1
0R0402-PAD
68.1R510.10J
68.1R51A.10G
SCD1U10V2KX-4GP
5V_S5
U3
FDMS7672-GP
S
S
S
G
C418
SC1KP50V2KX-1GP
D7
CH521S-30-GP-U1
RT8202_BST_1D05V
R159
10KR2J-3-GP
C426
SC100P50V2JN-3GP
RT8202_TON_1D05V
820KR2F-GP
C416
SC1U10V3KX-3GP
D
D
D
D
R149
34 CPUCORE_ON
RT8202_VDD_1D05V
DCBATOUT_8202_1D05V
IND-1D5UH-34-GP
3D3V_S5
GAP-CLOSE-PW R
G5
1
2
TC17
Wistron Corporation
Title
Size
A3
Date:
5
Document Number
RT8202_1D05V
Rev
SB
JM41_Discrete
Sheet
1
36
of
48
Iomax=1.2A
OCP>2A
DY
C121
SCD1U10V2KX-4GP
1
2
C125
SC1U10V2KX-1GP
RT9026PFP-GP
GAP-CLOSE-PW R
C119
SC10U10V5KX-2GP
9026_S3
GAP-CLOSE-PW R
G25
1
2
1
2
3
4
5
VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS
0R0603-PAD 1 R40
DDR_VREF_S3_1
10
9
8
7
6
9026_S5
GND
11
0R0603-PAD 1 R41
G23
GAP-CLOSE-PW R
G24
1
2
U7
14,28,32,35 PM_SLP_S4#
DDR_VREF_S3
DDR_VREF_PW R
C122
SC10U10V5KX-2GP
C127
SC1U10V2KX-1GP
1D5V_S3
5V_S5
C116
SC10U10V5KX-2GP
Wistron Corporation
Title
RT9026_0D75V
5
Size
A3
Document Number
Date:
Rev
SB
JM41_Discrete
Sheet
1
37
of
48
DCBATOUT_6263A
DCBATOUT
1 R292
GFXVR_EN
C618
POWER_MONITOR 1
2
0R0402-PAD
GFX
VGFXCORE
GFX_VID[4..0]
SCD01U50V2KX-1GP
G35
G26
TC19
ST15U25VDM-1-GP
GAP-CLOSE-PWR
G37
1
2
GAP-CLOSE-PWR
G38
1
2
GFX
1
R290
3D3V_S0
DY
TPAD14-GP
TP81
2
10KR2J-3-GP
6236A_VID4 1 R288
0R0402-PAD
GFX_VID4
6236A_VID3 1 R287
0R0402-PAD
GFX_VID3
6236A_VID2 1 R286
0R0402-PAD
GFX_VID2
6236A_VID1 1 R285
0R0402-PAD
GFX_VID1
6236A_VID0 1 R284
0R0402-PAD
GFX_VID0
GAP-CLOSE-PWR
G28
1
2
GAP-CLOSE-PWR
G32
1
2
GAP-CLOSE-PWR
G29
1
2
GFX
4
3
2
1
2
1
GFX
SC10U25V6KX-1GP
1
2
5
6
7
8
VID2
SC10U25V6KX-1GP
2
25
Id=7A
Qg=8.7~13nC
Rdson=23~30mohm
GAP-CLOSE-PWR
G31
1
2
GAP-CLOSE-PWR
Cyntec 7*7*3
DCR=8mohm, Irating=13A
Isat=24A
L21
19
6236A_PHASE
18
6236A_UGATE
17
6236A_BOOT
1
2
R255
2D2R3J-2-GP
5
6
7
8
U13
FDMS7672-GP
GFX
GFX
G77
GAP-CLOSE-PWR
2
5V_S0
C600
SCD22U16V3KX-2-GP
4
3
2
1
6236A_VDD
VGFXCORE
GFX
68.1R01A.20B
68.1R01B.10N
G76
GAP-CLOSE-PWR
2
R247
1
2
COIL-1UH-34-GP-U
10R2F-L-GP
GFX
R238
1
Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm
5V_S5
10R2F-L-GP
2K32R2F-1-GP
1
DCBATOUT
10R2F-L-GP
TC12
GFX
R224
Close to choke
and on the same layer
6236A_VSUM_R
2
7K68R2F-GP
GFX
G40
GAP-OPEN-PWR
SCD022U25V2KX-GP
GFX
1 R226
2GFX
4K53R2F-1-GP
2
NTC-10K-27-GP
G39
GAP-OPEN-PWR
2
1 R248
GFX
SCD033U25V3KX-GP
C552
1
2
GFX
C540
1
GFX
2
0R0402-PAD
R274
1
C585
GFX
SCD01U25V2KX-3GP
1
R233
GFX 1KR3F-GP
2
GFX
VGFXCORE Iomax=7A
OCP>10.5A
GFX R245
SCD1U25V3KX-GP
2
1
R231
10R3F-GP
2
1
2
GFX
SC2D2U10V3KX-1GP
DY
20
ISL6263ACRZ-T-GP
C534
R232
10R3F-GP
6236A_LGATE
GAP-CLOSE-PWR
G34
1
2
C246
SCD1U50V3KX-GP
DY
GFX
SC330P50V2KX-3GP
2
1
10 VSS_AXG_SENSE
GAP-CLOSE-PWR
2
21
C239
SE220U2VDM-8GP
P_80.2271V.A9L
GAP-CLOSE-PWR
2
VID3
6236A_PMON
14
6236A_VIN
2
1
DY
C546
G78
1
C606
1
SC1U16V3KX-2GP
R249
C587
SC1KP50V2KX-1GP
GFX
SC1KP50V2KX-1GP
G79
1
16
13
6236A_VSUM
15
12
6263A_VCC_PRM
9
2
DY
10 VCC_AXG_SENSE
22
6236A_PVCC
C594
1
2
C591
GFX
S
S
S
G
GFX
C243
GFX
D
D
D
D
6236A_RTN
U12
FDMS8692-GP
GFX
23
GFX
GFX
C588
SC1KP50V2KX-1GP
BOOT
VDD
VSS
VIN
VSEN
SC560P50V2KX-2GP
26
27
6236A_VR_ON
28
PMON
VID4
6236A_AF_EN
29
VR_ON
6236A_GOOD
30
UGATE
6236A_VSEN
1
31
PHASE
VDIFF
6236A_VDIFF
6236A_FB_R
AF_EN
32
FB
C553
GFX 4K99R2F-L-GP
PGND
VSUM
LGATE
COMP
24
6236A_BOOT_R
GFX
PVCC
VW
VO
6236A_FB
OCSET
DFB
GFX
22K21R3F-L-GP
R251
2
GFX
1
SC180P50V2JN-1GP
GFX
R2531
C597
1
2
6236A_COMP_R
6236A_VW
6236A_COMP
GFX
DROOP
SC68P50V2JN-1GP
1 R252
2
374KR3-GP
SC1KP50V2KX-1GP
1 R259
2
6K98R3F-GP
VID1
VID0
RTN
C603
1
8K66R2F-GP
GFX
DCBATOUT_6263A
R272
0R0402-PAD
SOFT
11
10
C601
1
C6101
2GFX 6236A_SOFT
SCD01U50V2KX-1GP
6236A_OCSET
RBIAS
GAP-CLOSE-PWR
G30
1
2
5V_S0
S
S
S
G
GFX
6236A_DFB
R267
6263A_VCC_PRM
6236A_RBIAS
6236A_DROOP
R2761
PGOOD
150KR2F-L-GPGFX
GAP-CLOSE-PWR
G33
1
2
D
D
D
D
GND_T
U37
FDE
33
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G27
1
2
GFX
2
100KR2J-1-GP
1
R291
1
GAP-CLOSE-PWR
G36
1
2
VCC_GFXCORE
R289
10KR2J-3-GP
6236A_VSUM_R_VCC_PRM
1 R225
2
3K57R2F-GP
GFX
Parallel
VSS_AXG_SENSE_OUTCAP
VCC_AXG_SENSE_OUTCAP
Wistron Corporation
Title
Size
A2
Date:
5
ISL6263A_GFX CORE
Document Number
Rev
SB
JM41_Discrete
Sheet
1
38
of
48
DCBATOUT
DCBATOUT_8202_VGA
G45
GAP-CLOSE-PW R
G44
1
2
1
2
RT8202APQW -GP
1
2
1
2
1
2
5
6
7
8
VGA_CORE_PW R
68.1R510.10Y
GAP-CLOSE-PW R
G61
1
2
GAP-CLOSE-PW R
G60
1
2
4
3
2
1
1
TC15
68.1R510.10K
DY
GAP-CLOSE-PW R
G62
1
2
C653
U21
FDMS7672-GP
P_84.01712.037
+VGA_CORE
G63
IND-1D5UH-23-GP
RT8202_LX_VGA
20090220
GND
GND
20090220
VOUT
PGND
DY
10
3
Iomax=7.8A, OCP>12A
5
6
7
8
VDDP
OC
FB
NC#5
NC#14
5
14
RT8202_OC_VGA_L 1
2
RT8202_FB_VGA
3KR2F-GP
VGA_CORE_PW R
C341
VGA_CORE_PW R
L25
RT8202_LX_VGA
C333
GAP-CLOSE-PW R
G59
1
2
SE330U2VDM-L-GP
P_77.C3371.051
C664
SCD1U25V3KX-GP
4
3
2
1
1
2
9
2
VDD
EN/DEM
15
RT8202_BST_VGA_L
1
2
RT8202_DH_VGA 1R2F-GP
RT8202_LX_VGA
RT8202_DL_VGA
R305
SCD1U10V2KX-4GP
RT8202_EN_VGA
BOOT
UGATE
PHASE
LGATE
13
12
11
8
S
S
S
G
14,28,32,36,40 PM_SLP_S3#
TON
PGOOD
20090220
RT8202_DH_VGA
SCD1U25V3KX-GP
R317
D
D
D
D
R321
1
2
0R2J-2-GP
RT8202_PGOOD_VGA
16
4
C652
1
2RT8202_LX_VGA
17
6
U48
C338
1
2
1
2
1
0R0402-PAD-1-GP
R322
1
2
0R2J-2-GP
14,40 ATI_PW R_ON
C642
SC1U10V3KX-4GP
C316
S
S
S
G
C643
SC100P50V2JN-3GP
C662
SC1KP50V2KX-1GP
U22
FDMS8692-GP
P_84.01426.037
SCD1U50V3KX-GP
20090220
SC10U25V6KX-1GP
5V_S0
SC10U25V6KX-1GP
CH521S-30-GP-U1
RT8202_TON_VGA
R302
D17
SC10U25V6KX-1GP
R301
10KR2F-2-GP
C663
SC1U10V3KX-4GP
D
D
D
D
GAP-CLOSE-PW R
DCBATOUT_8202_VGA
3D3V_S0
1 R320
2
1MR2F-GP
14,40,42 G_VCORE_PGOOD
DCBATOUT_8202_VGA
5V_S0
RT8202_VDD_VGA
RT8202_BST_VGA
ST15U25VDM-1-GP
R319
10R2F-L-GP
GAP-CLOSE-PW R
G42
1
2
TC14
5V_S0
GAP-CLOSE-PW R
G43
1
2
GAP-CLOSE-PW R
G58
1
2
GAP-CLOSE-PW R
G57
1
2
RT8202_DL_VGA
GAP-CLOSE-PW R
G46
1
2
RT8202_FB_VGA
GAP-CLOSE-PW R
R310
12KR2F-L-GP
1
Q19
2N7002-11-GP
Q18
2N7002-11-GP
R331
VCORE_VID1
43
R308
M92_LP core power

ALTV1
ALTV0
Vout
0
0
0.90V
0
1
1.09V
1
0
0.95V
10KR2J-3-GP
C668
SCD1U10V2KX-4GP
G_VID0
84.27002.Y31
VCORE_VID0
43
G_VID1
84.27002.Y31
R300
47KR2F-GP
M92_XT
G_VID0_R
R303
30KR2F-GP
M92_LP
2
R304
187KR2F-GP
2
1
R307
59KR2F-GP
RT8202_FB_VGA
C651
SC47P50V2JN-3GP
G_VID1_R
Vout=0.75*(1+Rh/Rl)
10KR2J-3-GP
C649
SCD1U10V2KX-4GP
M92_XT core power

ALTV1
ALTV0
Vout
0
0
0.90V
0
1
1.09V
1
0
1.2V
Wistron Corporation
Title
Size
A3
Date:
5
RT8202A_VGA CORE
Document Number
Rev
SB
JM41_Discrete
Sheet
1
39
of
48
SB
ATI_PWR_ON
ATI_PWR_ON 14,39
Q22
2N7002-11-GP
ATI_PWR_ON#
ATI_PWR_ON#
+3VS to 1.8V Transfer
3D3V_S0
84.27002.Y31
S
14
+1.5V to +1.5VS_RUN Transfer
+1.5V_RUN
1D5V_S3
AO4468, SO-8
Id=11.6A, Qg=9~12nC
Rdson=17.4~22m ohm
DY
74.09091.G3F
SC10U10V5ZY-1GP
2ND = 84.00610.C31
84.S0610.B31
Q16
NDS0610-NL-GP
RUNON_R
R283
R263
1
2
1
0R2J-2-GP
330KR2J-L1-GP
TC13
ST150U6D3VBM-2-GP
RUN_POWER_ON
DY
C622
SCD1U16V2KX-3GP
84.04800.D37
84.08884.037
C611
SC10U10V5ZY-1GP
1
2
0R2J-2-GP
PM_SLP_S3#
SI4800BDY-T1
C621
C302
I/O 1.8v = 1.9A
5
1
74.09198.C7F
R294
14,28,32,36,39
NC#4
RT9198-18PBR-GP
C625
SC1U10V2KX-1GP
VOUT
BAS16-1-GP
VIN
GND
EN/EN#
1
2
3
4
U40
1
2
3
SC1U10V3KX-3GP
G_ENVCC18
1
D15
83.00016.B11
2ND = 83.00016.K11
3RD = 83.00016.F11
+1.8V_RUN
D
D
D
D
8
7
6
5
G
S
S
S
SC1U10V2ZY-GP
2
ATI_PWR_ON
1.5v (6A)
U17
C627
C630
SCD1U10V2KX-4GP
DY
DIS_EN_1D5_RUN
R260
100KR2J-1-GP
+3VS to 3.3V_DELAY Transfer

3.3v (115mA)
VDDR3
3D3V_S0
R228
100KR2J-1-GP
84.27002.Y31
Q12
2N7002-11-GP
Q15
2N7002-11-GP
G
S
VDDR3discharge CKT
R235
1
2
0R2J-2-GP
ATI_PWR_ON
Q13
AO3413-GP
R250
470R2J-2-GP
1
R236
1
2
0R2J-2-GP
84.27002.Y31
PM_SLP_S3#
14,28,32,36,39
DY
Q11
2N7002-11-GP
6
VOUT
VOUT
+1.1V_RUN
PCIE 1.1v (2.2A)

SC47P50V2JN-3GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
R54
25K5R2F-GP
R2
C245
1
2
C242
DY
Vout=0.8 x [1+(R1/R2)]
A
C247
R1
APL5913-KAC-1-GP
FB
R55
10KR2F-2-GP
SC22U6D3V5MX-2GP
EN
3
4
C304
DY
C296
5
9
SC10U6D3V3MX-GP
1
VIN
VIN
G_ENVCC18
POK
VCNTL
U15
D3
83.00016.B11
2ND = 83.00016.K11
3RD = 83.00016.F11
+1.5V_RUN
C619
SC1U10V2KX-1GP
GND
1
BAS16-1-GP
SCD1U10V2KX-4GP
5V_S5
C533
84.27002.Y31
51KR2F-L-GP
ATI_PWR_ON
+1.5v to PCIE 1.1V Transfer
1
R223
G_ENVCC18
Wistron Corporation
Title
M92S2 power
Size
Custom
Date:
5
Document Number
Rev
SB
JM41_Discrete
Sheet
1
40
of
48
3D3V_S0
SB
VDDR3
1D8V_NB_S0
SEL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RN11
SRN2K2J-1-GP
3
4
SRN2K2J-1-GP
RN20
D
4
3
C241
C240
3
4
6
7
11
12
14
15
C230
BTMDS2+
BTMDS2TMDS2+
BTMDS1+
TMDS2BTMDS1TMDS1+
BTMDS0+
TMDS1BTMDS0TMDS0+
BTMDSCLK+
TMDS0BTMDSCLK- TMDSCLK+
TMDSCLK-
GND
DIS_EN
29
28
27
26
25
24
23
22
2
8
16
18
20
30
40
42
SCD1U10V2KX-4GP
VGA_TXAOUT0+
VGA_TXAOUT0VGA_TXAOUT1+
VGA_TXAOUT2VGA_TXACLK+
VGA_TXACLK-
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
ATMDS2+
ATMDS2ATMDS1+
ATMDS1ATMDS0+
ATMDS0ATMDSCLK+
ATMDSCLK-
SCD1U10V2KX-4GP
42
42
42
42
42
42
42
42
38
37
36
35
34
33
32
31
SCD1U10V2KX-4GP
GMCH_TXAOUT0+
GMCH_TXAOUT0GMCH_TXAOUT1+
GMCH_TXAOUT1GMCH_TXAOUT2+
GMCH_TXAOUT2GMCH_TXACLK+
GMCH_TXACLK-
1
2
2
1
U11
8
8
8
8
8
8
8
8
G_LCD_EDID_CLK
G_LCD_EDID_DAT
LCD_TXAOUT0+ 19
LCD_TXAOUT0- 19
LCD_TXAOUT1+ 19
LCD_TXAOUT1- 19
LCD_TXAOUT2+ 19
LCD_TXAOUT2- 19
LCD_TXACLK+ 19
LCD_TXACLK- 19
GMCH_DAT_DDC_EDID
GMCH_CLK_DDC_EDID
3D3V_S0
U31
3
2
1
8 GMCH_DAT_DDC_EDID
43 G_LCD_EDID_DAT
1
5
10
13
17
19
21
39
41
B0
GND
B1
4
5
6
A
VCC
S
LCD_EDID_DAT
19
NC7SB3157P6X-1GP
73.03157.C0H
U32
43
TS3DV421RUAR-GP
71.03421.003
71.03412.B0G
3
2
1
8 GMCH_CLK_DDC_EDID
43 G_LCD_EDID_CLK
B0
GND
B1
4
5
6
A
VCC
S
LCD_EDID_CLK
19
NC7SB3157P6X-1GP
73.03157.C0H
14,20 DIS_EN
RN5
4
3
43 G_LCD_EDID_DAT
43 G_LCD_EDID_CLK
1
2
LCD_EDID_DAT
LCD_EDID_CLK
19
19
SRN0J-6-GP
DY
5V_S0
SCD1U10V2KX-4GP
2
14,20 DIS_EN
VGA_TXAOUT0+
VGA_TXAOUT1-
1
2
3
4
8
7
6
5
LCD_TXAOUT0+
LCD_TXAOUT1-
U34
DIS_EN
8
GMCH_BLUE
43
G_BLUE
8 GMCH_GREEN
43 G_GREEN
8
GMCH_RED
43
G_RED
RN29
42
42
42
42
C521
1
DIS_EN
19
19
19
19
16
1
2
3
5
6
11
10
14
13
8
VCC
S
IA0
IA1
IB0
IB1
IC0
IC1
ID0
ID1
GND
YA
CRT_BLUE 20
YB
CRT_GREEN 20
YC
CRT_RED 20
YD
12
OE#
15
PI5C3257QE-GP
SRN0J-7-GP
73.53257.B0C
2ND = 73.03257.C0B
DY
RN30
A
42
42
42
42
VGA_TXAOUT2+
VGA_TXAOUT2VGA_TXACLK+
VGA_TXACLK-
1
2
3
4
8
7
6
5
LCD_TXAOUT2+ 19
LCD_TXAOUT2- 19
LCD_TXACLK+ 19
LCD_TXACLK- 19
Wistron Corporation
RN7
SRN0J-7-GP
43
43
DY
43
G_BLUE
G_GREEN
G_RED
1
2
3
4
8
7
6
5

CRT_BLUE 20
CRT_GREEN 20
Title
CRT_RED 20
PX_SWITCH
SRN0J-7-GP
Size
DY
Date:
5
Document Number
Rev
SB
A3
2
Sheet
1
41
of
48
1 OF 7
U113A
D
SSID = VIDEO
RXP0
RXN0
2
2
1 C248
1 C249
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP0 8
PEG_RXN0 8
8
8
PEG_TXP1
PEG_TXN1
AE29
AD28
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
AG29
AF28
RXP1
RXN1
2
2
1 C250
1 C251
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP1 8
PEG_RXN1 8
8
8
PEG_TXP2
PEG_TXN2
AD30
AC31
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
AF27
AF26
RXP2
RXN2
2
2
1 C277
1 C278
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP2 8
PEG_RXN2 8
8
8
PEG_TXP3
PEG_TXN3
AC29
AB28
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
AD27
AD26
RXP3
RXN3
2
2
1 C279
1 C280
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP3 8
PEG_RXN3 8
8
8
PEG_TXP4
PEG_TXN4
AB30
AA31
PCIE_RX4P
PCIE_RX4N
PCIE_TX4P
PCIE_TX4N
AC25
AB25
RXP4
RXN4
2
2
1 C252
1 C253
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP4 8
PEG_RXN4 8
8
8
PEG_TXP5
PEG_TXN5
AA29
Y28
Y23
Y24
RXP5
RXN5
2
2
1 C254
1 C255
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP5 8
PEG_RXN5 8
8
8
PEG_TXP6
PEG_TXN6
Y30
W31
AB27
AB26
RXP6
RXN6
2
2
1 C256
1 C257
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP6 8
PEG_RXN6 8
8
8
PEG_TXP7
PEG_TXN7
W29
V28
Y27
Y26
RXP7
RXN7
2
2
1 C258
1 C259
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP7 8
PEG_RXN7 8
8
8
PEG_TXP8
PEG_TXN8
V30
U31
8
8
PEG_TXP9
PEG_TXN9
U29
T28
8
8
T30
R31
PEG_TXP10
PEG_TXN10
8
8
PEG_TXP11
PEG_TXN11
R29
P28
8
8
PEG_TXP12
PEG_TXN12
P30
N31
8
8
PEG_TXP13
PEG_TXN13
N29
M28
8
8
PEG_TXP14
PEG_TXN14
M30
L31
8
8
PEG_TXP15
PEG_TXN15
L29
K30
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
W24
W23
RXP8
RXN8
2
2
1 C260
1 C261
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP8 8
PEG_RXN8 8
V27
U26
RXP9
RXN9
2
2
1 C262
1 C263
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP9 8
PEG_RXN9 8
U24
U23
RXP10
RXN10
2
2
1 C264
1 C265
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
6 OF 7
U113F
LVDS CONTROL
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
RXP11
RXN11
2
2
1 C266
1 C267
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP11 8
PEG_RXN11 8
T24
T23
RXP12
RXN12
2
2
1 C268
1 C269
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP12 8
PEG_RXN12 8
P27
P26
RXP13
RXN13
2
2
1 C270
1 C271
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP13 8
PEG_RXN13 8
P24
P23
RXP14
RXN14
2
2
1 C272
1 C273
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP14 8
PEG_RXN14 8
M27
N26
RXP15
RXN15
2
2
1 C274
1 C275
SCD1U6D3V1KX-GP
SCD1U6D3V1KX-GP
PEG_RXP15 8
PEG_RXN15 8
AB11
AB12
G_L_BKLTCTL 43
G_LCDVDD_ON 19
AH20
AJ19
AL21
AK20
AH22
AJ21
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AL23
AK22
TXOUT_U3P
TXOUT_U3N
AK24
AJ23
R78
R75
LVTMDP
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
PEG_RXP10 8
PEG_RXN10 8
T26
T27
VARY_BL
DIGON
AH30
AG31
10KR2J-3-GP
PCIE_TX0P
PCIE_TX0N
PCIE_RX0P
PCIE_RX0N
AF30
AE31
10KR2J-3-GP
2
PEG_TXP0
PEG_TXN0
PCI EXPRESS INTERFACE
8
8
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
AL15
AK14
VGA_TXACLK+ 41
VGA_TXACLK- 41
AH16
AJ15
VGA_TXAOUT0+ 41
VGA_TXAOUT0- 41
AL17
AK16
VGA_TXAOUT1+ 41
VGA_TXAOUT1- 41
AH18
AJ17
VGA_TXAOUT2+ 41
VGA_TXAOUT2- 41
AL19
AK18
M92-S2-GP
0201 CAPs
CLOCK
R293
3 CLK_PCIE_VGA
3 CLK_PCIE_VGA#
AK30
AK32
PCIE_REFCLKP
PCIE_REFCLKN
0R2J-2-GP
CALIBRATION
DY
3D3V_S5
U41
14
8,14,24,25,28,29
MXM_RST#
PLT_RST1#
2
3
B
VCC
A
Y
L9
N9
N10
5
4
MXM_RST2#
AL27
NC#L9
NC#N9
NC_PWRGOOD
PCIE_CALRP
PCIE_CALRN
Y22
PCIE_CALRP R68
2 1K27R2F-L-GP
AA22
PCIE_CALRN R67
2 2KR2F-3-GP
+1.1V_RUN
PERSTB
GND
74LVC1G08GW-1-GP
M92-S2-GP
73.01G08.L04
73.01G08.L03
Wistron Corporation
Title
VGA-PCIE/LVDS(1/4)
Size
Custom
Date:
5
Document Number
Rev
SB
JM41_Discrete
Sheet
1
42
of
48
SSID = VIDEO
TXCAP_DPA3P
TXCAM_DPA3N
+1.8V_RUN
MUTI GFX
DPA
TX0P_DPA2P
TX0M_DPA2N
R120
10KR2J-3-GP
R101
10KR2J-3-GP
DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23
DVPDATA20
R117
10KR2J-3-GP
1
R86
10KR2J-3-GP
Samsung
Hynix
DY
R102
10KR2J-3-GP
PIN
DY
R116
10KR2J-3-GP
MEM_TYPE
R100
10KR2J-3-GP
DVPDATA21
DVPDATA22
DVPDATA23
R121
10KR2J-3-GP
1
Hynix
Samsung
STRAPS
TX1P_DPA1P
TX1M_DPA1N
DESCRIPTION
DVPDATA(23:20)
MEMORY TYPE,MAKE AND SIZE INFO

0000 - GDDR3 16Mx32
Qimonda
0001 - GDDR3 32Mx32
Hynix
0010 - GDDR3 32Mx32
Qimonda
0011 - GDDR3 32Mx32
Samsung
(Internal PD)
AA1
Y4
AC7
Y2
U5
U1
Y7
V2
Y8
V4
AB7
W1
AB8
W3
AB9
W5
AC6
W6
AD7
AA3
AC8
AA5
AE8
AA6
AE9
AB4
AD9
AB2
AC10
AC5
HDMI(DPA)
PLACE THESE CAPACITOR CLOSE TO CONNECTOR
DVPDATA [3:0]
0100
64Mx16 Hynix
1000
64Mx16 Samsung
2 OF 7
U113B
DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
DPB
TX3P_DPB2P
TX3M_DPB2N
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
AF2
AF4
G_HDMI_D_CLK+
G_HDMI_D_CLK-
C376 1
C372 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
HDMI_CLK+ 20
HDMI_CLK- 20
AG3
AG5
G_HDMI_TX2+
G_HDMI_TX2-
C390 1
C384 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
HDMI_DATA0+ 20
HDMI_DATA0- 20
AH3
AH1
G_HDMI_TX1+
G_HDMI_TX1-
C396 1
C392 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
HDMI_DATA1+ 20
HDMI_DATA1- 20
AK3
AK1
G_HDMI_TX0+
G_HDMI_TX0-
C400 1
C399 1
2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
HDMI_DATA2+ 20
HDMI_DATA2- 20
AK5
AM3
PLACE THESE RESISTORS CLOSE TO

DIFF. PAIRS AND AVOID STUBS TO ALL
DIFF. TRACES.
AK6
AM5
AJ7
AH6
MINIMIZE THE DISTANCE

BETWEEN THESE RES. AND
100nF AC CAPS
AK8
AL7
+DAC1_AVDD
+1.8V_RUN
I2C
39 VCORE_VID1
R109 1
2
10KR2J-3-GP
VGA_CLK_REQ#
R81
2
45
G_HDMI_DETECT#
G_GPIO_22
20 HDMI_DETECT#
R84
10KR2J-3-GP
JTAG_TRSTB
+DPLL_PVDD
+1.8V_RUN
1
2
499R2F-2-GP
AG24
AE22
+DAC1_AVDD
AE23
AD23
+DAC1_VDD1DI
M92_AVSSQ
GAP-CLOSE
1
2
G41
AC16
1
2
C531
SC4D7U6D3V5KX-3GP
C538
SC1U10V2KX-1GP
1
2
AM12
AK12
20,45
20,45
(Placed between this pin and AVSSQ)

1
R70
G_HSYNC
G_VSYNC
VGA_RSET
C537
SC1U10V2KX-1GP
AD22
VDDR3
AL11
AJ11
AK10
AL9
AH12
AM10
AJ9
25,27,28
25,27,28
SMBC_THERM
SMBD_THERM
DAC2
H2SYNC
V2SYNC
G83
1GAP-CLOSE2
1
2
GAP-CLOSE
G82
C614
SCD1U16V2KX-3GP
KBC_THERM_G781_CLK
KBC_THERM_G781_DAT
G781_ALERT#
AL13
AJ13
8
7
6
5
SMBCLK
VCC
SMBDATA
DXP
ALERT#
DXN
GND
THERM#
1
2
3
4
GPU_TEMP+
GPU_THERM#
C607
SC2200P50V2KX-2GP
40mA
HPD1
VDD2DI
VSS2DI
A2VDD
2mA
A2VDDQ
VREFG
A2VSSQ
GPU_TEMP-
AD19
AC19
+1.8V_RUN
AE20
R262
2K2R2F-GP
R264
2K2R2F-GP
VDDR3
AE17
2mA
AE19
GPU DIE TEMP:

REMOTE2+ and REMOTE2- routing 10mil
trace width and 10 mil spacing.
+1.8V_RUN
VDDR3
AG13
VGA_R2SET
1
R76
2
715R2F-GP
R2SET
G781P8F-GP
40mA
C331
SCD1U16V2KX-3GP
1
2
AD14
120mA
DPLL_VDDC
300mA
DDC1CLK
DDC1DATA
AUX1P
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
AE6
AE5
G_DDCCLK 20
G_DDCDATA 20
AD2
AD4
AC11
AC13
G_HDMI_CLK 20
G_HDMI_DATA 20
VDDR3
AD13
AD11
4
3
XTALIN
XTALOUT
NC#AB22
NC#AC22
1MR2F-GP
R282
GPU_TEMP+
GPU_TEMP-
AM28
AK28
DPLL_PVDD
DPLL_PVSS
3
X4
C624
1
DDC/AUX
AF14
AE14
+DPLL_VDDC
T4
T2
DPLUS
DMINUS
TP88
1
+TSVDD
C330
1
BLM15BD121SN1D-GP
SCD1U16V2KX-3GP
R5
AD17
AC17
DDCAUX5P
DDCAUX5N
TS_FDO
TSVDD
TSVSS
AB22
AC22
RN12
SRN1K5J-GP
THERMAL
L22
+1.8V_RUN
SC1U10V2KX-1GP
C329
2
1
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
PLL/CLOCK
XTAL-27MHZ-74-GP
SC27P50V2JN-2-GP
AH26
AJ27
+1.8V_RUN
1
2
BLM15BD121SN1D-GP
U38
C
Y
COMP
65mA
G_27M_XTALIN
G_27M_XTALOUT
82.30034.611
2ND = 82.30034.421
B2
B2B
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN
+DPLL_PVDD
SCD1U16V2KX-3GP
C344
SC1U10V2KX-1GP
C639
2
1
1
2
C612
SC22P50V2JN-4GP
R74
249R2F-GP
BLM15BD121SN1D-GP
SC10U6D3V3MX-GP
C640
+1.1V_RUN
2
+DPLL_VDDC
G2
G2B
L19
65mA
VGA_VREFG
L23
AC14
R2
R2B
VREFG VOLTAGE DIVIDER IS

(VREFG = VDDR4,5(1.8V) / 3 = .6V)
AB13
W8
W9
W7
AD10
R299
499R2F-2-GP
SCD1U16V2KX-3GP
C357
BLM15BD121SN1D-GP
SC1U10V2KX-1GP
C647
2
1
SC10U6D3V3MX-GP
C648
+1.8V_RUN
1
1
1
1
1
TP34
G_HDMI_DETECT#
L24
TP30
TP40
TP35
TP39
R66
1KR2J-1-GP
1
R131
1KR2J-1-GP
1
2
2
B
L6
L5
L3
L1
K4
AF24
1
1
1
1
TP85
TP83
TP84
JTAG_TESTEN TP82
VDD1DI
VSS1DI
+DAC1_VDD1DI
G_BLUE 41
4K99R2F-L-GP
45mA
2 150R2F-1-GP
2 150R2F-1-GP
VGA_CLK_REQ#
AVDD
AVSSQ
R69
TP87
1 R128
2
10KR2J-3-GP
CLK_VGA_27M_SS
VGA_THERM#
1
TP33
G_TEMP_FAIL
RSET
70mA
R64
41
G_BLUE
41
39 VCORE_VID0
G_GPIO_11
G_GPIO_12
G_GPIO_13
TP36
AH24
AG25
G_RED
G_GREEN
TP45
HSYNC
VSYNC
G_GREEN
2 150R2F-1-GP
45
45
45
VGA_THERM#
G_GPIO_8
G_GPIO_9
AL25
AJ25
R63
45
45
1
G_BL_ON_R
B
BB
DAC1
G_RED
1
2
BLM15BD121SN1D-GP
20mA
DDC6CLK
DDC6DATA
NC_DDCAUX7P
NC_DDCAUX7N
AE16
AD16
1
2
DY
R124
10KR2J-3-GP
TP86
G_GPIO_5
TP38
G
GB
AM26
AK26
C303
SCD1U16V2KX-3GP
G_TEMP_FAIL
45
0R2J-2-GP
2
G_BL_ON
19
1
R90
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_29_DRM_0
GPIO_30_DRM_1
VDDR3
U6
U10
T10
U8
U7
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
M4
R6
W10
M2
P8
P7
N8
N7
T11
R11
G_GPIO_0
G_GPIO_1
G_GPIO_2
C544
SCD01U16V2KX-3GP
42 G_L_BKLTCTL
45
45
45
0R2J-2-GP
2
R
RB
GENERAL PURPOSE I/O

R89
CRT
C545
SCD1U16V2KX-3GP
SCL
SDA
C297
SCD01U16V2KX-3GP
L18
R1
R3
41 G_LCD_EDID_CLK
41 G_LCD_EDID_DAT
G_HDMI_CLK
G_HDMI_DATA
AC1
AC3
AD20
AC20
Wistron Corporation
M92-S2-GP
Title
VGA-TV/CRT/DP PORT(2/4)
5
Size
C
Document Number
Date:
Rev
SB
JM41_Discrete
Sheet
1
43
of
48
SSID = VIDEO
5 OF 7
U113E
MEM CLK
PCIE_PVDD
NC_MPV18
SC10U6D3V3MX-GP
C276
C310
SC1U6D3V2KX-GP
1
2
C292
SC1U6D3V2KX-GP
C286
SCD1U16V2KX-3GP
SC10U6D3V3MX-GP
C300
1
2
C287
SC1U6D3V2KX-GP
C291
SC1U6D3V2KX-GP
1
2
1
2
C295
SC1U6D3V2KX-GP
C294
SC1U6D3V2KX-GP
1
2
C293
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
C336
SC10U6D3V3MX-GP
C355
SC10U6D3V3MX-GP
C337
1
2
C347
SC1U6D3V2KX-GP
C335
SC1U6D3V2KX-GP
C313
SC1U6D3V2KX-GP
C334
SC1U6D3V2KX-GP
1
2
1
2
C318
SC1U6D3V2KX-GP
1
2
C348
SC1U6D3V2KX-GP
C359
SC1U6D3V2KX-GP
2
1
C358
SC1U6D3V2KX-GP
1
2
C328
SC1U6D3V2KX-GP
1
SC10U6D3V3MX-GP
C319
120mA
C353
SCD1U16V2KX-3GP
BBP#1
BBP#2
SPVSS
+VGA_CORE
SPV10 35mA
BACK BIAS
M11
M12
M13
M15
M16
M17
M18
M20
M21
N20
NC_SPV18
+VGA_CORE
SCD1U16V2KX-3GP
C381
J7
C285
SCD01U16V2KX-3GP
2
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
40mA
300mA
H8
SC1U6D3V2KX-GP
C382
2
1
1
2
1
2
BLM15BD121SN1D-GP
SCD1U16V2KX-3GP
C593
2
1
SC1U6D3V2KX-GP
C590
2
1
SC10U6D3V3MX-GP
C551
300mA
+VGA_CORE
C317
SCD1U16V2KX-3GP
L8
H7
1
2
ISOLATED
CORE I/O
VSSRHA
PLL
+SPV10
L13
1
2
VDDRHA
L20
+VGA_CORE
1
2
L16
+PCIE_PVDD
L17
1
2
C352
SCD1U16V2KX-3GP
+VDDRHA
C339
+VGA_CORE
AA15
N15
N17
R13
R16
R18
R21
T12
T15
T17
T20
U13
U16
U18
U21
V15
V17
V20
V21
Y13
Y16
Y18
Y21
VDDR4
VDDR4
VDDR4
VDDR4
220R_2000mA
1
+1.1V_RUN
L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22
110mA
50mA
VDDR5
VDDR5
VDDR5
VDDR5
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26
C351
SC1U6D3V2KX-GP
AA11
AA12
Y11
Y12
VDDR3
VDDR3
VDDR3
VDDR3
170mA
1
2
C327
SCD1U16V2KX-3GP
C321
SC1U6D3V2KX-GP
U11
U12
V11
V12
SC1U6D3V2KX-GP
300mA
1
2
BLM15BD121SN1D-GP
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
CORE
+1.5V_RUN
L10
1
2
BLM15BD121SN1D-GP
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
I/O
AA17
AA18
AB17
AB18
2
1
2
C365
SCD1U16V2KX-3GP
1
2
C364
SCD1U16V2KX-3GP
C363
SC1U6D3V2KX-GP
1
2
VDD_CT
VDD_CT
VDD_CT
VDD_CT
170mA
1
2
C311
SCD1U16V2KX-3GP
1
2
C312
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
C244
LEVEL
TRANSLATION
AA20
AA21
AB20
AB21
AM30
+1.8V_RUN
2A
+VDD_CT
VDDR3
M92-S2-GP
2.2A
L6
300mA
A32
AM1
AM32
500mA
PCIE
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
1
2
C326
SC1U6D3V2KX-GP
C349
SC1U6D3V2KX-GP
2
1
MEM I/O
H13
H16
H19
J10
J23
J24
J9
K10
K23
K24
K9
L11
L12
L13
L20
L21
L22
+1.8V_RUN
VSS_MECH
VSS_MECH
VSS_MECH
4 OF 7
U113D
C374
SCD1U16V2KX-3GP
2
1
2
+1.8V_RUN
L7
1
2
BLM21PG221SN1D-1GP
C360
SCD01U16V2KX-3GP
C325
SC1U6D3V2KX-GP
2
1
C289
SCD1U16V2KX-3GP
2
1
2
C315
SCD01U16V2KX-3GP
C288
SC1U6D3V2KX-GP
C305
SCD1U16V2KX-3GP
1
2
C371
SC1U6D3V2KX-GP
1
2
C356
SC1U6D3V2KX-GP
1
2
C340
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
C380
SC10U6D3V3MX-GP
C368
1
2
1
2
BLM15BD121SN1D-GP
GND
1
2
+1.8V_RUN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
2
POWER
M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U3
U9
V13
V16
V18
V6
Y10
Y15
Y17
Y20
Y6
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C366
SC1U6D3V2KX-GP
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
SC10U6D3V3MX-GP
C301
+1.5V_RUN
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32
1
2
M92-S2-GP
7 of 7
U113G
DPE_VDD10
DPE_VDD10
200mA
AE11
AF11
+DPA_VDD10
SCD1U16V2KX-3GP
+1.1V_RUN
SC1U6D3V2KX-GP
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
AE1
AE3
AG1
AG6
AH5
C379
SC10U6D3V3MX-GP
1
SC1U6D3V2KX-GP
AF6
AF7
C373
L14
2
1
BLM18PG300SN-GP
C385
AG14
AH14
AM14
AM16
AM18
DPA_VDD10
DPA_VDD10
AG20
AG21
C308
NC_DPA_VDD18
NC_DPA_VDD18
+DPE_VDD10
SC1U6D3V2KX-GP
L8
2
1 SC10U6D3V3MX-GP
BLM18PG300SN-GP
1 C307
C314
1A
DP A/B POWER
DPE_VDD18
DPE_VDD18
200mA
C343
2
+1.1V_RUN
AG15
AG16
SCD1U16V2KX-3GP
170mA
DP E/F POWER
+DPE_VDD18
L11
1
2 SC10U6D3V3MX-GP
BLM15BD121SN1D-GP
1 C342
C346
300mA
+1.8V_RUN
SC1U6D3V2KX-GP
DPF_VDD18
DPF_VDD18
200mA
NC_DPB_VDD18
NC_DPB_VDD18
DPF_VDD10
DPF_VDD10
200mA
AF16
AG17
170mA
+DPE_VDD18
+1.1V_RUN
AF22
AG22
AF23
AG23
AM20
AM22
AM24
AE13
AF13
+1.1V_RUN
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPB_VDD10
DPB_VDD10
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
AF8
AF9
AF10
AG9
AH8
AM6
AM8
150R2F-1-GP
1
2
SC1U6D3V2KX-GP
+DPE_PVDD
AG18
AF19
DPE_PVDD
DPE_PVSS
C377
SC1U6D3V2KX-GP
C378
+1.8V_RUN
L12
2
1
BLM18PG300SN-GP
C370
20mA
DP PLL POWER
+1.8V_RUN
DPA_PVDD
DPA_PVSS
AG8
AG7
+DPA_PVDD
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
C324
SCD1U16V2KX-3GP
20mA
1
2 SC10U6D3V3MX-GP
BLM15BD121SN1D-GP
1 C323
C322
300mA
AE10 1 R83
DPAB_CALR
DPEF_CALR
150R2F-1-GP
L9
+1.8V_RUN
1 AF17
2 R297
Wistron Corporation
+1.8V_RUN
20mA
AG19
AF20
NC_DPF_PVDD
NC_DPF_PVSS
DPB_PVDD
DPB_PVSS

AG10
AG11
Title
VGA-POWER/GND(3/4)
M92-S2-GP
Size
A2
Document Number
Date:
Rev
SB
JM41_Discrete
Sheet
1
44
of
48
46
MVDDQ=1.5V FOR DDR3 MEMORY
DDR2/DDR3
DIVIDER RESISTORS
GDDR3
MVREF TO 1.8V
100R
40.2R
MVREF TO GND
100R
100R
+1.5V_RUN
R57
100R2F-L1-GP-U
PLCAE MVREF DIVIDERS AND

CAPS CLOSE TO ASIC
R61
100R2F-L1-GP-U
1
2
C282
SCD1U16V2KX-3GP
+1.5V_RUN
C281
SCD01U16V2KX-3GP
R58
100R2F-L1-GP-U
DY
DY
DY
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
MVREFD
MVREFS
K26
J26
2 243R2F-2-GP
2 243R2F-2-GP
J25
K7
2 243R2F-2-GP
2 243R2F-2-GP
J8
K25
L10
+1.5V_RUN
K8
L7
VDDR3
R91
2KR2F-3-GP
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7
WDQSA_0
WDQSA_1
WDQSA_2
WDQSA_3
WDQSA_4
WDQSA_5
WDQSA_6
WDQSA_7
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
NC_MEM_CALRN0
NC_MEM_CALRN1
WEA0B
WEA1B
MEM_CALRP1
NC_MEM_CALRP0
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
BA2
BA0
BA1
E32
E30
A21
C21
E13
D12
E3
F4
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
H28
C27
A23
E19
E15
D10
D6
G5
RDQSA0
RDQSA1
RDQSA2
RDQSA3
RDQSA4
RDQSA5
RDQSA6
RDQSA7
H27
A27
C23
C19
C15
E9
C5
H4
WDQSA0
WDQSA1
WDQSA2
WDQSA3
WDQSA4
WDQSA5
WDQSA6
WDQSA7
MAA[0..12]
ATI RESERVED CONFIGURATION STRAPS
46
43 G_GPIO_0
43 G_GPIO_1
43 G_GPIO_2
43 G_GPIO_5
43 G_GPIO_8
BA2
BA0
BA1
46
46
46
43 G_GPIO_9
43 G_GPIO_13
43 G_GPIO_12
43 G_GPIO_11
DQMA#[0..7]
R122 1
2 10KR2J-3-GP
R103 1
2 10KR2J-3-GP
R104 1
2 10KR2J-3-GP
GPIO3 , H2SYNC , V2SYNC

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
M92_XT
R123 1
R105
R125
2 10KR2J-3-GP
DY
2 10KR2J-3-GP
DY
2 10KR2J-3-GP
R127
DY
2 10KR2J-3-GP
R106
R107
R126
If BIOS_ROM_EN (GPIO22) = 0
2 10KR2J-3-GP
2 10KR2J-3-GP
128MB
256MB
64MB
32MB
512MB
1GB
2GB
4GB
STRAPS
RDQSA[0..7]
x000
x001
x010
x
x
x
x
x
ST
Microelectronics
Chingis
(formerly PMC)
PIN
TX_PWRS_ENB
VDDR3
20,43 G_VSYNC
H26
H25
CLKA0
CLKA0#
G9
H9
CLKA1
CLKA1#
G22
G17
RASA0#
RASA1#
G19
G16
CASA0#
CASA1#
H22
J22
CSA0_0#
CSA0_1#
TP28
TPAD14-GP
G13
K13
CSA1_0#
CSA1_1#
TP31
TPAD14-GP
K20
J17
CKEA0
CKEA1
G25
H10
WEA0#
WEA1#
CLKA0
CLKA0#
46
46
CLKA1
CLKA1#
46
46
RASA0#
RASA1#
46
46
CASA0#
CASA1#
46
46
CSA0_0#
46
CSA1_0#
46
CKEA0
CKEA1
46
46
WEA0#
WEA1#
46
46
20,43 G_HSYNC
R56
2 10KR2J-3-GP
R62
2 10KR2J-3-GP
0100
0101
0101
0101
0101
Pm25LV512A
Pm25LV010A
0100
0101
Tansmitter Power Savings Enable

0= 50% Tx output swing
1= Full Tx output swing
GPIO0
(Internal PD)
TX_DEEMPH_EN
M25P05A
M25P10A
M25P20
M25P40
M25P80
DESCRIPTION
46
WDQSA[0..7] 46
ODTA0
46
ODTA1
46
Part Number GPIO[13,12,11]

D
2 10KR2J-3-GP
DY
If BIOS_ROM_EN (GPIO22) = 1
Size of the primary

memory apertures GPIO[9,13,12,11] Manufacturer
Transmitter De-emphasis Enable

0= Tx de-emphasis disabled
1= Tx de-emphasis enabled
GPIO1
(Internal PD)
BIF_GEN2_EN_A
GPIO2
BIF_CLK_PM_EN
GPIO8
V 0 = Advertises the PCI-E device

as 2.5GT/s
1 = Advertises the PCI-E device
as 5GT/s
0= Disable CLKREQ#power management capability

1= Enable CLKREQ# power management capability
C
ROMIDCFG[3:0]
GPIO[13,12,11]
(Internal PD)
if BIOS_ROM_EN=1,then Config[3:0]
defines the ROM type
if BIOS_ROM_EN=0,then Config[3:0]
defines the primary memory apeture size
Enable external BIOS ROM device
BIOS_ROM_EN
GPIO_22_ROMCSB V 0= Disable external BIOS ROM device

1= Enable external BIOS ROM device
(Internal PD)
AUD[1]
AUD[0]
AB16
G14
G20
RSVD#1
RSVD#2
RSVD#3
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESE
46
43 G_GPIO_22
L18
K16
ODTA0
ODTA1
MVREFDA
MVREFSA
K17
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
H11
G11
J16
L15
DRAM_RST
AUD[1:0]
00:No audio function
01:Audio for DisplayPort and HDMI
( if adapter is detected)
10:Audio for DisplayPort only
11:Audio for both DisplayPort and HDMI
VGA_HSYNC
VGA_VSYNC
(Internal PD)
CLKTESTA
CLKTESTB
M92-S2-GP
C284
SCD1U16V2KX-3GP
R129 1
R59 1
C283
SCD01U16V2KX-3GP
R65 1
R110 1
+1.5V_RUN
R60
100R2F-L1-GP-U
MDA[0..63]
MEMORY INTERFACE
SSID = VIDEO
3 OF 7
U113C
MEM_RST
C367
SC1U6D3V2KX-GP
DY
R85
4K7R2F-GP
46
R108
4K7R2F-GP
R130
4K7R2F-GP
Wistron Corporation
Title
VGA-MEMORY/STRAPS(4/4)
Size
A2
Document Number
Date:
Rev
SB
JM41_Discrete
Sheet
1
45
of
48
512MB DDR3
U14
VREFC_U0
VREFD_U0
MAA[0..12]
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
DQMA#[0..7]
DQMA#[0..7]
45
QSA#[0..7]
WDQSA[0..7]
45
RDQSA[0..7]
45
45
CASA0#
CASA1#
45
45
CSA0_0#
CSA1_0#
QSA[0..7]
CASA0#
CASA1#
CSA0_0#
CSA1_0#
45
45
45
BA0
BA1
BA2
M2
N8
M3
45
45
45
CLKA0
CLKA0#
CKEA0
J7
K7
K9
VRAM_ODTA0
K1
L2
J3
K3
L3
45
45
45
45
CSA0_0#
RASA0#
CASA0#
WEA0#
QSA2
QSA0
F3
C7
DQMA#2
DQMA#0
E7
D3
QSA#2
QSA#0
G3
B7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK#
CKE
ODT
CS#
RAS#
CAS#
WE#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
DQSL#
DQSU#
45
T2
MEM_RST
1
R246
L8
RESET#
ZQ
MDA17
MDA18
MDA20
MDA21
MDA22
MDA19
MDA23
MDA16
D7
C3
C8
C2
A7
A2
B8
A3
MDA3
MDA2
MDA0
MDA4
MDA6
MDA5
MDA1
MDA7
MDA[0..63]
45
45
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_RUN
A1
A8
C1
C9
D2
E9
F1
H2
H9
+1.5V_RUN
VREFC_U0
VREFD_U0
MAA[0..12]
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
M2
N8
M3
45
45
45
CLKA0
CLKA0#
CKEA0
J7
K7
K9
VRAM_ODTA0
K1
L2
J3
K3
L3
45
CSA0_0#
RASA0#
CASA0#
WEA0#
NC#J1
NC#L1
NC#J9
NC#L9
QSA3
QSA1
F3
C7
DQMA#3
DQMA#1
E7
D3
QSA#3
QSA#1
G3
B7
T2
MEM_RST
1
R280
J1
L1
J9
L9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
BA0
BA1
BA2
243R3F-GP
L8
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK#
CKE
ODT
CS#
RAS#
CAS#
WE#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL#
DQSU#
RESET#
ZQ
E3
F7
F2
F8
H3
H8
G2
H7
MDA24
MDA28
MDA26
MDA27
MDA31
MDA30
MDA25
MDA29
D7
C3
C8
C2
A7
A2
B8
A3
MDA13
MDA10
MDA14
MDA9
MDA12
MDA8
MDA15
MDA11
MDA[0..63]
45
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_RUN
A1
A8
C1
C9
D2
E9
F1
H2
H9
+1.5V_RUN
45
VREFC_U2
VREFD_U2
MAA[0..12]
45
J1
L1
J9
L9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
NC#J1
NC#L1
NC#J9
NC#L9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
45
45
45
BA0
BA1
BA2
M2
N8
M3
45
45
45
CLKA1
CLKA1#
CKEA1
J7
K7
K9
VRAM_ODTA1
K1
L2
J3
K3
L3
45
45
45
45
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
M8
H1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
CSA1_0#
RASA1#
CASA1#
WEA1#
QSA6
QSA5
F3
C7
DQMA#6
DQMA#5
E7
D3
QSA#6
QSA#5
G3
B7
T2
MEM_RST
1
R318
100-BALL
SDRAM DDR3
H5TQ1G63AFR-14C-GP
L8
U19
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK#
CKE
ODT
CS#
RAS#
CAS#
WE#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DQSL
DQSU
DML
DMU
DQSL#
DQSU#
RESET#
ZQ
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E3
F7
F2
F8
H3
H8
G2
H7
MDA51
MDA54
MDA48
MDA52
MDA50
MDA55
MDA49
MDA53
D7
C3
C8
C2
A7
A2
B8
A3
MDA44
MDA42
MDA47
MDA43
MDA45
MDA40
MDA46
MDA41
MDA[0..63]
45
45
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_RUN
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
M8
H1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A1
A8
C1
C9
D2
E9
F1
H2
H9
+1.5V_RUN
45
45
45
BA0
BA1
BA2
M2
N8
M3
45
45
45
CLKA1
CLKA1#
CKEA1
J7
K7
K9
VRAM_ODTA1
K1
L2
J3
K3
L3
45
45
45
45
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
45
CSA1_0#
RASA1#
CASA1#
WEA1#
QSA4
QSA7
F3
C7
DQMA#4
DQMA#7
E7
D3
QSA#4
QSA#7
G3
B7
T2
MEM_RST
1
R298
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREFC_U2
VREFD_U2
MAA[0..12]
243R3F-GP
B1
B9
D1
D8
E2
E8
F9
G1
G9
100-BALL
SDRAM DDR3
H5TQ1G63AFR-14C-GP
H_72.51G63.C0U
+1.5V_RUN
VREFCA
VREFDQ
243R3F-GP
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
M8
H1
45
45
45
45
45
45
45
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E3
F7
F2
F8
H3
H8
G2
H7
L8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
BA0
BA1
BA2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CK
CK#
CKE
ODT
CS#
RAS#
CAS#
WE#
DQSL
DQSU
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
DML
DMU
RESET#
ZQ
MDA39
MDA34
MDA36
MDA32
MDA38
MDA33
MDA37
MDA35
D7
C3
C8
C2
A7
A2
B8
A3
MDA57
MDA61
MDA56
MDA62
MDA60
MDA59
MDA63
MDA58
MDA[0..63]
45
B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_RUN
A1
A8
C1
C9
D2
E9
F1
H2
H9
+1.5V_RUN
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL#
DQSU#
E3
F7
F2
F8
H3
H8
G2
H7
243R3F-GP
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
100-BALL
SDRAM DDR3
H5TQ1G63AFR-14C-GP
H_72.51G63.C0U
VREFCA
VREFDQ
NC#J1
NC#L1
NC#J9
NC#L9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
100-BALL
SDRAM DDR3
H5TQ1G63AFR-14C-GP
H_72.51G63.C0U
H_72.51G63.C0U
+1.5V_RUN
+1.5V_RUN
1
1
R312
4K99R2F-L-GP
+1.5V_RUN
+1.5V_RUN
VREFD_U2
1
C656
SCD1U16V2ZY-2GP
R111
4K99R2F-L-GP
C393
SCD1U16V2ZY-2GP
56R2J-4-GP
0R2J-2-GP
R313
4K99R2F-L-GP
R113
2 VRAM_ODTA1
VREFC_U2
R114
ODTA1
R112
4K99R2F-L-GP
56R2J-4-GP
DY
C581
SCD1U16V2ZY-2GP
R241
4K99R2F-L-GP
2 VRAM_ODTA0
0R2J-2-GP
45
2
ODTA0
VREFD_U0
1
2
C613
SCD1U16V2ZY-2GP
45
R261
2
1
VREFC_U0
R270
4K99R2F-L-GP
R257
R242
4K99R2F-L-GP
+1.5V_RUN
R265
4K99R2F-L-GP
45
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
U46
U39
VREFCA
VREFDQ
45
M8
H1
DY
Samsung : K4W1G1646E-EC12
Hynix : H5TQ1G63BFR-12C
+1.5V_RUN
45
CLKA0#
45
CLKA1
+1.5V_RUN
+1.5V_RUN
C632
SC1U6D3V2KX-GP
C655
SC1U6D3V2KX-GP
2
1
C637
SC1U6D3V2KX-GP
2
1
1
2
C645
SC1U6D3V2KX-GP
2
1
C582
SC1U6D3V2KX-GP
C658
SC1U6D3V2KX-GP
2
1
C636
SC1U6D3V2KX-GP
2
1
1
2
C646
SC1U6D3V2KX-GP
2
1
C615
SC1U6D3V2KX-GP
C617
SC1U6D3V2KX-GP
2
1
C628
SC1U6D3V2KX-GP
2
1
1
2
C605
SC1U6D3V2KX-GP
2
1
C641
SC1U6D3V2KX-GP
C596
SC1U6D3V2KX-GP
2
1
C599
SC1U6D3V2KX-GP
2
1
SCD01U16V2KX-3GP
R239
56R2F-1-GP
C620
SC1U6D3V2KX-GP
2
1
2
2
1 2
C580
1
R240
56R2F-1-GP
C602
SC1U6D3V2KX-GP
2
1
CLKA0
+1.5V_RUN
45
+1.5V_RUN
A
+1.5V_RUN
1
2
1
2
1
2
C650
SC10U6D3V3MX-GP
1
2
C595
SC10U6D3V3MX-GP
1
2
SC10U6D3V3MX-GP
C629
1
2
C661
SC10U6D3V3MX-GP
1
2
C586
SC10U6D3V3MX-GP
CLKA1#
45
1
2
C592
SC10U6D3V3MX-GP
SCD01U16V2KX-3GP
R314
56R2F-1-GP
C623
SC10U6D3V3MX-GP
1 2
C657
1
C626
SC10U6D3V3MX-GP
R315
56R2F-1-GP
Wistron Corporation
Title
VRAM
Size
A2
Date:
Document Number
Rev
SB
JM41_Discrete
Sheet

1
46
of
48
EC2
EC1
EC30
DCBATOUT
EC20
EC24
DY
SCD1U50V3ZY-GP
DY
SCD1U50V3ZY-GP
DY
SCD1U50V3ZY-GP
DY
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
VCC_GFXCORE
1
2
EC7
DY
2
1
2
1
2
1
EC42
DY
DY
2
EC29
DY
1
EC13
DY
2
1
2
1
2
EC41
DY
SCD1U16V2ZY-2GP
DY
SCD1U16V2ZY-2GP
EC10
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC4
EC35
SCD1U16V2ZY-2GP
EC19
DY
SCD1U16V2ZY-2GP
EC18
DY
SCD1U16V2ZY-2GP
EC9
SCD1U16V2ZY-2GP
DY
5V_S5
SCD1U16V2ZY-2GP
DY
EC11
DY
SCD1U16V2ZY-2GP
1D5V_S3
EC38
SCD1U16V2ZY-2GP
DY
SCD1U16V2ZY-2GP
EC17
DY
SCD1U16V2ZY-2GP
DY
DY
1D05V_S0
SCD1U16V2ZY-2GP
EC28
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC26
VGFXCORE
2
1
VGA_CORE_PW R
EC39
SCD1U16V2ZY-2GP
DY
1D5V_S0
DY
EC40
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC16
DY
3D3V_S0
1
4
ZZ.00PAD.571
34.4CQ05.001
HOLE355X355R111-S1-GP
34.4CQ05.001
34.4CQ05.001
ZZ.00PAD.591
34.4CQ05.001
H10
A
HOLET237B315X315R91-S-GP
34.4CQ05.001
H11
W AIT_STFT256BR75H81-GP
ZZ.00PAD.571
H9
H5
H6
H7
H8
W AIT_STFT256BR75H81-GP W AIT_STFT256BR75H81-GP W AIT_STFT256BR75H81-GP W AIT_STFT256BR75H81-GP
Wistron Corporation
SPRING-5-GP
34.41Y01.001
SP4
H4
ZZ.00PAD.571
HOLE389X394R166-S-GP
ZZ.00PAD.571
ZZ.00PAD.571
SPRING-5-GP
34.41Y01.001
H3
H2
SP5
SPRING-62-GP
SPRING-5-GP
H1
SP3
34.39S07.003
SP2
34.41Y01.001
SPRING-5-GP
34.41Y01.001
SP1

Title
Size
Date:
2
EMI/Spring/Boss
Document Number
JM41_Discrete
Sheet
1
47
Rev
SB
of
48
Wistron Corporation
Title
HISTORY
5
Size
A2
Document Number
Date:
Rev
SB
JM41_Discrete
Sheet
1
48
of
48

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Project code: 91.4CQ01.001

JM41 Discrete Block Diagram

AGTL+ CPU I/F

12 USB 2.0/1.1 ports

Active Managemnet Technology(DO)

LVDS, CRT I/F

DDR Memory I/F

Monday, March 02, 2009

ICH9M Functional Strap Definitions

ICH9M Integrated Pull-up

XOR Chain Entrance/

Allows entrance to XOR Chain testing when TP3

PCIE config1 bit0,

This signal has a weak internal pull-down.

PCIE config2 bit2,

This signal has a weak internal pull-up.

ESI Strap (Server Only)

ESI compatible mode is for server platforms only.

ICH9 EDS 642879

Integrated TPM Enable,

Sample low: the Integrated TPM will be disabled.

PCI Express Lane

Signal has weak internal pull-up. Sets bit 27

If sampled high, the system is strapped to the

XOR Chain Entrance.

This signal should not be pull low unless using

Sampled low:the Flash Descriptor Security will be

PCIE Graphics Lane

0 = Reverse Lanes,15->0,14->1 ect..

PCIE Loopback enable

Controllable via Boot BIOS Destination bit

The pull-up or pull-down active when configured for native

Boot BIOS Destination

DMI Termination Voltage, The signal is required to be low for desktop

Montevina Platform Design guide 22339

Cantiga chipset and ICH9M I/O controller

FSB Dynamic ODT

0 = Dynamic ODT Disabled

DMI Lane Reversal

Digital Display Port

0 = Only Digital Display Port

Local Flat Panel

1= LFP Card Present; PCIE disabled

Monday, March 02, 2009

ICS9LPRS365YGLFT setting table

0 = Overclocking of CPU and SRC Allowed

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#

SEL2 SEL1 SEL0

Monday, March 02, 2009

Net "TEST4" as short as possible,

Place these TP on button-side,

All place within 2" to CPU

Monday, March 02, 2009

layout note: "1D5V_VCCA_S0"

VCCSENSE and VSSSENSE lines

Monday, March 02, 2009

Place these inside socket

NCTF TEST PIN:

Place these inside socket

Monday, March 02, 2009

H_SWING routing Trace width and

H_SWING Resistors and

H_RCOMP routing Trace width and