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RCS-985A Generator-Transformer Unit Protection Instruction Manual

Nanjing Nari-Relays Electric Co., Ltd.

RCS-985A Generator transformer unit protection

Preface
Before using this product, please read this chapter carefully. This chapter describes the safety precautions recommended when using the equipment. Before installing and using the equipment, this chapter must be thoroughly read and understood. Instructions and Warnings The following indicators and standard definitions are used:

DANGER

means that death, severe personal injury, or considerable equipment

damage will occur if safety precautions are disregarded. WARNING means that death, severe personal injury, or considerable equipment

damage could occur if safety precautions are disregarded. CAUTION means the light personal injury or equipment damage may occur if

safety precautions are disregarded. This particularly applies to damage to the device and to resulting damage of the protected equipment.

WARNING!
The firmware may be upgraded to add new features or enhance/modify existing features, please make sure that the version of this manual is compatible with the product in your hand. During operation of electrical equipment, certain parts of these devices are under high voltage. Severe personal injury or significant equipment damage could result from improper behavior. Only qualified personnel should work on this equipment or in the vicinity of this equipment. These personnel must be familiar with all warnings and service procedures described in this manual, as well as safety regulations. In particular, the general facility and safety regulations for work with high-voltage equipment must be observed. Noncompliance may result in death, injury, or significant equipment damage.

DANGER!
Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage.

WARNING!
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RCS-985A Generator transformer unit protection

Exposed terminals

Do not touch the exposed terminals of this equipment while the power is on, as the high voltage generated is dangerous. l Residual voltage

Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It takes a few seconds for the voltage to discharge.

CAUTION!
l Earth The earthing terminal of the equipment must be securely earthed l Operating environment

The equipment must only be used within the range of ambient environment detailed in the specification and in an environment free of abnormal vibration. l Ratings

Before applying AC voltage and current or the DC power supply to the equipment, check that they conform to the equipment ratings. l Printed circuit board

Do not attach and remove printed circuit boards when DC power to the equipment is on, as this may cause the equipment to malfunction. l External circuit

When connecting the output contacts of the equipment to an external circuit, carefully check the supply voltage used in order to prevent the connected circuit from overheating. l Connection cable

Carefully handle the connection cable without applying excessive force.

Copyright
Version: RCS-985A3YD V3.12 T060707 Manual: V1.0 P/N: EN_YJBH2011.0091.1101 Copyright NR 2006. All rights reserved NANJING NARI-RELAYS ELECTRIC CO., LTD. 99 Shengtai Rd. Jiangning, Nanjing 211106 China Tel: 86-25-52127776, Fax: 86-25-52127841 Website: www.nari-relays.com Email: international@nari-relays.com

We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination to third parties is strictly forbidden except where expressly authorized. The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If the user nevertheless detects any errors, he is appreciated any suggested correction or improvement. We reserve the rights to make technical improvements without notice.

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RCS-985A Generator transformer unit protection

Table of contents
Preface .............................................................................................................................................. i Table of contents ........................................................................................................................... iii Chapter 1 Introduction ................................................................................................................... 1 1.1 Application............................................................................................................................... 1 1.1.1 Typical applications .......................................................................................................... 1 1.1.2 Constitution of the scheme............................................................................................... 3 1.2 Functions................................................................................................................................. 5 1.3 Features .................................................................................................................................. 8 1.3.1 High performance hardware............................................................................................. 8 1.3.2 New philosophy used in RCS-985A................................................................................. 9 1.3.3 Intellectuality................................................................................................................... 12 Chapter 2 Technical Data............................................................................................................. 13 2.1 Atmospheric Environment tests ............................................................................................ 13 2.2 Electrical Specifications ........................................................................................................ 13 2.2.1 Analog input ratings........................................................................................................ 13 2.2.2 Power Supply ................................................................................................................. 14 2.2.3 Binary input..................................................................................................................... 14 2.2.4 Binary Output ................................................................................................................. 14 2.2.5 Power supply output for Optical isolators....................................................................... 15 2.3 Mechanical Specifications..................................................................................................... 15 2.4 Rear Communication Port..................................................................................................... 15 2.5 Terminals .............................................................................................................................. 16 2.6 Type tests.............................................................................................................................. 17 2.6.1 Environmental tests........................................................................................................ 17 2.6.2 Mechanical tests............................................................................................................. 17 2.6.3 Electrical tests ................................................................................................................ 17 2.6.4 Electromagnetic compatibility......................................................................................... 17 2.7 Certifications ......................................................................................................................... 19 2.8 Protective functions............................................................................................................... 19 2.8.1 Accurate operating scope .............................................................................................. 19 2.8.2 General error of analog input metering .......................................................................... 19 2.8.3 Generator-transformer unit differential protection, main transformer differential protection................................................................................................................................. 19 2.8.4 Generator differential protection, split phase transverse differential protection and differential protection of exciter ............................................................................................... 20 2.8.5 Stepdown transformer and excitation transformer differential protection...................... 21 2.8.6 High sensitive transverse differential protection ............................................................ 21 2.8.7 Longitudinal zero sequence voltage protection for turn-to-turn fault ............................. 22 2.8.8 Earth fault protection of stator ........................................................................................ 22 2.8.9 Earth fault protection of rotor.......................................................................................... 22
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RCS-985A Generator transformer unit protection

2.8.10 Overload protection of stator........................................................................................ 23 2.8.11 Negative sequence overload protection....................................................................... 23 2.8.12 Overload protection of excitation winding (AC quantity).............................................. 23 2.8.13 Overload protection of excitation winding (DC quantity).............................................. 23 2.8.14 Loss of excitation protection of generator .................................................................... 24 2.8.15 Out-of-step protection of generator.............................................................................. 24 2.8.16 Voltage protection of generator.................................................................................... 24 2.8.17 Over excitation protection ............................................................................................ 25 2.8.18 Power protection of generator...................................................................................... 25 2.8.19 Frequency protection of generator............................................................................... 25 2.8.20 Accident energization protection of generator ............................................................. 25 2.8.21 Startup/shutdown protection of generator.................................................................... 26 2.8.22 Low impedance protection ........................................................................................... 26 2.8.23 Voltage controlled directional overcurrent protection .................................................. 26 2.8.24 Directional zero sequence overcurrent protection ....................................................... 26 2.8.25 Gap protection.............................................................................................................. 26 2.8.26 Pole disagreement protection ...................................................................................... 27 2.8.27 Mechanical protection .................................................................................................. 27 2.8.28 Measurements and Recording Facilities...................................................................... 27 Chapter 3 Description of Operation Theory .............................................................................. 29 3.1 Software Structure ................................................................................................................ 29 3.2 Fault detectors ...................................................................................................................... 29 3.2.1 Using fault detector improves the security of tripping.................................................... 29 3.2.2 Differential protection of generator-transformer unit and main transformer .................. 30 3.2.3 Backup protection of main transformer.......................................................................... 31 3.2.4 Differential protection of stepdown transformer............................................................. 32 3.2.5 Backup protection of stepdown transformer .................................................................. 32 3.2.6 Fault detector of differential protection, phase-splitting transverse differential protection of generator ............................................................................................................................. 33 3.2.7 Interturn fault protection of generator............................................................................. 34 3.2.8 Earth fault protection of stator of generator ................................................................... 34 3.2.9 Generator rotor earth fault protection............................................................................. 35 3.2.10 Generator stator overload protection ........................................................................... 35 3.2.11 Negative sequence overcurrent protection of generator ............................................. 35 3.2.12 Generator loss-of-excitation protection ........................................................................ 35 3.2.13 Generator out-of-step protection.................................................................................. 35 3.2.14 Generator overvoltage protection ................................................................................ 35 3.2.15 Generator over excitation protection............................................................................ 36 3.2.16 Generator reverse power protection ............................................................................ 36 3.2.17 Generator frequency protection ................................................................................... 36 3.2.18 Generator accident energization protection................................................................. 36 3.2.19 Startup and shutdown protection of generator............................................................. 36 3.2.20 Differential and overcurrent protection of excitation transformer or exciter................. 36

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RCS-985A Generator transformer unit protection

3.2.21 Overload protection of exciter winding......................................................................... 37 3.2.22 Mechanical protection .................................................................................................. 37 3.3 Theory of protective elements .............................................................................................. 37 3.3.1 Preparation knowledge of transformer........................................................................... 37 3.3.2 Preparation knowledge of generator.............................................................................. 39 3.3.3 Differential protection of generator-transformer unit, main transformer, stepdown transformer and excitation transformer ................................................................................... 40 3.3.4 Differential protection, phase-splitting transverse differential protection of generator and differential protection of exciter ............................................................................................... 48 3.3.5 DPFC Current Differential Element................................................................................ 51 3.3.6 Restrict earth fault protection of main transformer or stepdown transformer (REF) ..... 53 3.3.7 Backup protection of main transformer.......................................................................... 57 3.3.8 Interturn fault protection of generator............................................................................. 63 3.3.9 Backup protection of generator ...................................................................................... 67 3.3.10 Earth fault protection of stator ...................................................................................... 70 3.3.11 Earth fault protection of rotor........................................................................................ 74 3.3.12 Generator stator overload protection ........................................................................... 75 3.3.13 Negative sequence overload protection....................................................................... 77 3.3.14 Loss-of-Excitation protection........................................................................................ 79 3.3.15 Out-of-step protection .................................................................................................. 83 3.3.16 Voltage protection ........................................................................................................ 84 3.3.17 Overexcitation protection ............................................................................................. 85 3.3.18 Power protection .......................................................................................................... 86 3.3.19 Frequency protection ................................................................................................... 88 3.3.20 Accidental energization protection ............................................................................... 88 3.3.21 Generator startup and shutdown protection ................................................................ 90 3.3.22 Excitation winding overload protection......................................................................... 91 3.3.23 Excitation transformer and exciter protection .............................................................. 93 3.3.24 Stepdown transformer backup protection .................................................................... 95 3.3.25 Pole Disagreement Protection ..................................................................................... 96 3.3.26 CT circuit failure alarm ................................................................................................. 98 3.3.27 VT circuit failure alarm ............................................................................................... 100 3.3.28 Mechanical protection ................................................................................................ 100 Chapter 4 Self-supervision, measurements and records ...................................................... 103 4.1 Self-supervision................................................................................................................... 103 4.1.1 Start-up self-testing ...................................................................................................... 103 4.1.2 Continuous self-testing................................................................................................. 104 4.1.3 List of alarm messages ................................................................................................ 105 4.2 Metering .............................................................................................................................. 112 4.2.1 Measured voltages and currents.................................................................................. 112 4.2.2 Sequence voltages and currents ................................................................................. 112 4.2.3 Rms. voltages and currents ......................................................................................... 113 4.2.4 Differential current and relevant quantities .................................................................. 113

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RCS-985A Generator transformer unit protection

4.2.5 Phase angles................................................................................................................ 113 4.2.6 Measurement display quantities .................................................................................. 113 4.2.7 All metering data displayed on LCD............................................................................. 113 4.3 Signaling ............................................................................................................................. 128 4.3.1 Enabling binary inputs of transformer .......................................................................... 129 4.3.2 Enabling binary inputs of generator ............................................................................. 129 4.3.3 Enabling binary inputs of excitation and stepdown transformer protection ................. 130 4.3.4 Binary inputs of mechanical protection ........................................................................ 131 4.3.5 Auxiliary binary input .................................................................................................... 132 4.3.6 Fault detector flag generated internal by MON............................................................ 133 4.3.7 Other Binary Inputs ...................................................................................................... 134 4.4 Event & fault records........................................................................................................... 134 4.4.1 Introduction................................................................................................................... 134 4.4.2 Event & Fault records................................................................................................... 135 4.4.3 Type of event................................................................................................................ 135 4.4.4 Change of state of binary inputs .................................................................................. 135 4.4.5 Relay alarm conditions................................................................................................. 137 4.4.6 Protection element pickup and trips............................................................................. 139 4.4.7 Viewing event records via DBG-2000 support software .............................................. 141 4.5 Disturbance Record ............................................................................................................ 141 4.6 Time Synchronization ......................................................................................................... 142 Chapter 5 Hardware Description............................................................................................... 143 5.1 Hardware overview ............................................................................................................. 143 5.1.1 Front view ..................................................................................................................... 143 5.1.2 Rear view...................................................................................................................... 145 5.1.3 Functional block diagram of RCS-985A....................................................................... 146 5.2 Standard connectors and terminals.................................................................................... 147 5.2.1 General description ...................................................................................................... 147 5.2.2 Pins definition of 1A connectors. ................................................................................ 147 5.2.3 Pins definition of 1B connectors ................................................................................. 148 5.2.4 Pins definition of 2A connectors ................................................................................. 149 5.2.5 Pins definition of 2B connectors ................................................................................. 150 5.2.6 Pins definition of 3A connectors ................................................................................. 151 5.2.7 Pins definition of 3B connectors ................................................................................. 152 5.2.8 Pins definition of 4A connectors ................................................................................. 153 5.2.9 Pins definition of 4B connectors ................................................................................. 154 5.2.10 Pins definition of 5A connectors ............................................................................... 156 5.2.11 Pins definition of 5B connectors ............................................................................... 157 5.2.12 Pins definition of 6B connectors ............................................................................... 158 5.2.13 Pins definition of 7B, 8B connectors ....................................................................... 159 5.2.14 Pins definition of 9B connectors ............................................................................... 160 5.2.15 Pins definition of 9C connectors............................................................................... 161 5.2.16 Pins definition of 10B connectors ............................................................................. 162

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RCS-985A Generator transformer unit protection

5.2.17 Pins definition of 10C connectors............................................................................. 163 5.2.18 Pins definition of 11B connectors ............................................................................. 163 5.2.19 Pins definition of 11C connectors............................................................................. 164 5.2.20 Pins definition of 12B connectors ............................................................................. 165 5.2.21 Pins definition of 12C connectors............................................................................. 166 5.3 Output.................................................................................................................................. 167 5.3.1 Tripping outputs............................................................................................................ 167 5.3.2 Signaling outputs.......................................................................................................... 168 5.3.3 Alarming outputs .......................................................................................................... 170 5.3.4 Other outputs................................................................................................................ 171 Chapter 6 Software Overview.................................................................................................... 173 6.1 Software Overview.............................................................................................................. 173 6.2 System services software ................................................................................................... 173 6.3 Platform software ................................................................................................................ 174 6.3.1 Record logging ............................................................................................................. 174 6.3.2 Settings database......................................................................................................... 174 6.3.3 Database interface ....................................................................................................... 174 6.3.4 Protection and control software.................................................................................... 174 6.4 Software downloading......................................................................................................... 177 Chapter 7 Settings ...................................................................................................................... 183 7.1 Equipment parameters........................................................................................................ 183 7.1.1 Setting list ..................................................................................................................... 183 7.1.2 Setting instruction of the parameters ........................................................................... 183 7.1.3 Setting path .................................................................................................................. 185 7.2 System Settings .................................................................................................................. 185 7.2.1 Logic settings of configuring functions ......................................................................... 185 7.2.2 Transformer system parameters.................................................................................. 189 7.2.3 Generator system parameters ..................................................................................... 191 7.2.4 Stepdown transformer system parameters.................................................................. 194 7.2.5 System parameters of excitation transformer or exciter .............................................. 196 7.2.6 Implicit configuration settings ....................................................................................... 198 7.3 Protection Settings.............................................................................................................. 205 7.3.1 Settings of differential protection of generator-transformer unit .................................. 205 7.3.2 Settings of differential protection of main transformer ................................................. 207 7.3.3 Settings of phase to phase fault protection of main transformer ................................. 211 7.3.4 Settings of earth fault protection of main transformer.................................................. 217 7.3.5 Settings of over excitation protection of main transformer .......................................... 224 7.3.6 Settings of differential protection of generator ............................................................. 227 7.3.7 Settings of splitting-phase transverse differential protection of generator .................. 230 7.3.8 Settings of turn-to-turn fault protection of generator .................................................... 231 7.3.9 Settings of phase to phase fault backup protection of generator ................................ 234 7.3.10 Settings of earth fault protection of stator windings................................................... 238 7.3.11 Settings of earth fault protection of rotor.................................................................... 241
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RCS-985A Generator transformer unit protection

7.3.12 Settings of thermal overload protection of stator ....................................................... 243 7.3.13 Settings of negative sequence overload protection of stator..................................... 245 7.3.14 Settings of Loss-of-Excitation protection of generator............................................... 248 7.3.15 Settings of out-of-step protection of generator .......................................................... 254 7.3.16 Settings of voltage protection..................................................................................... 257 7.3.17 Settings of overexcitation protection of generator ..................................................... 258 7.3.18 Settings of power protection of generator.................................................................. 261 7.3.19 Settings of underfrequency and overfrequency protection of generator ................... 263 7.3.20 Settings of startup and shutdown protection of generator......................................... 266 7.3.21 Settings of accidental energization protection of generator....................................... 268 7.3.22 Settings of differential protection of excitation transformer or exciter........................ 270 7.3.23 Settings of backup protection of excitation transformer or exciter............................. 271 7.3.24 Settings of overload protection of excitation .............................................................. 273 7.3.25 Settings of differential protection of stepdown transformer ....................................... 275 7.3.26 Settings of backup protection at HVS of stepdown transformer................................ 276 7.3.27 Settings of backup protection at LVS of stepdown transformer ................................ 279 7.3.28 Settings of restrict earth fault protection of stepdown transformer............................ 281 7.3.29 Settings of mechanical protection .............................................................................. 282 7.3.30 Settings of pole disagreement protection of circuit breaker....................................... 284 7.4 Calculated parameters........................................................................................................ 285 7.4.1 Calculated parameters of primary rated current .......................................................... 285 7.4.2 Calculated parameters of secondary rated current...................................................... 286 7.4.3 Calculated parameters of secondary rated voltage ..................................................... 288 7.4.4 Calculated parameters of differential coefficient.......................................................... 290 Chapter 8 Human Machine Interface ........................................................................................ 293 8.1 User interfaces and menu structure.................................................................................... 293 8.2 Introduction to the relay ...................................................................................................... 293 8.2.1 Front panel ................................................................................................................... 293 8.2.2 LCD .............................................................................................................................. 295 8.2.3 LED indications ............................................................................................................ 312 8.2.4 Keypad ......................................................................................................................... 313 8.2.5 Menu............................................................................................................................. 314 8.2.6 Operation instruction of Menu ...................................................................................... 316 Chapter 9 Communications....................................................................................................... 339 9.1 Introduction ......................................................................................................................... 339 9.2 Rear communication port of EIA(RS)485 ........................................................................... 339 9.2.1 Rear communication port EIA(RS)485 interface.......................................................... 339 9.2.2 EIA(RS)485 bus ........................................................................................................... 340 9.2.3 Bus termination ............................................................................................................ 340 9.2.4 Bus connections & topologies ...................................................................................... 340 9.3 IEC60870-5-103 communication ........................................................................................ 341 9.3.1 Overview of IEC60870-5-103....................................................................................... 341 9.3.2 Messages description in IEC60870-5-103 protocol type ............................................. 341
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RCS-985A Generator transformer unit protection

9.4 MODBUS protocol .............................................................................................................. 348 9.4.1 Overview....................................................................................................................... 348 9.4.2 Fetch real time status (Binary) ..................................................................................... 349 9.4.3 Fetch metering values of equipment............................................................................ 358 9.4.4 Fetch settings value of equipment ............................................................................... 365 9.4.5 Diagnostics (Function Code: 08H) ............................................................................... 383 9.4.6 Exception Responses .................................................................................................. 384 9.5 EIA(RS)232 Interface.......................................................................................................... 384 9.6 Communication with printer ................................................................................................ 385 9.7 Communication with External GPS pulse Source .............................................................. 385 Chapter 10 Installation ............................................................................................................... 387 10.1 Receipt of Relays .............................................................................................................. 387 10.2 Handling of Electronic Equipment..................................................................................... 387 10.3 Storage.............................................................................................................................. 388 10.4 Unpacking ......................................................................................................................... 388 10.5 Relay Mounting ................................................................................................................. 388 10.5.1 Rack Mounting ........................................................................................................... 388 10.5.2 Panel mounting .......................................................................................................... 390 10.6 RELAY WIRING................................................................................................................ 391 10.6.1 Medium and heavy duty terminal block connections ................................................. 391 10.6.2 EIA (RS) 485 port ....................................................................................................... 392 10.6.3 IRIG-B connections (if applicable) ............................................................................. 392 10.6.4 EIA(RS)232 front port of downloading/monitoring ..................................................... 392 10.6.5 Ethernet port (if applicable)........................................................................................ 392 10.6.6 Test port ..................................................................................................................... 393 10.6.7 Earth connection ........................................................................................................ 393 Chapter 11 Commission ............................................................................................................ 395 11.1 Introduction ....................................................................................................................... 395 11.2 Precautions ....................................................................................................................... 395 11.3 Relay commission tools .................................................................................................... 396 11.4 Setting Familiarization....................................................................................................... 396 11.5 Product checks.................................................................................................................. 397 11.5.1 With the relay de-energized ....................................................................................... 397 11.5.2 With the relay energized ............................................................................................ 400 11.5.3 Setting Testing ........................................................................................................... 409 11.5.4 Rear communications port EIA(RS) 485.................................................................... 410 11.5.5 On-load checks .......................................................................................................... 410 11.5.6 Final check ................................................................................................................. 411 11.6 Use of assistant test software DBG-2000......................................................................... 411 11.6.1 Function summary of DBG-2000 communication software ....................................... 411 11.6.2 Connection way of protection equipment and personal computer ............................ 412 11.6.3 Configuration of PC and the software before use...................................................... 412 11.6.4 Operation instruction of the software ......................................................................... 413
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RCS-985A Generator transformer unit protection

Chapter 12 Maintenance ............................................................................................................ 415 12.1 Maintenance period .......................................................................................................... 415 12.2 Maintenance checks ......................................................................................................... 415 12.2.1 Alarms ........................................................................................................................ 415 12.2.2 Binary Inputs .............................................................................................................. 415 12.2.3 Binary output .............................................................................................................. 415 12.2.4 Analog inputs.............................................................................................................. 415 12.3 Method of Repair .............................................................................................................. 415 12.3.1 Replacing the complete relay..................................................................................... 416 12.3.2 Replacing a PCB ........................................................................................................ 416 12.4 Changing the relay battery................................................................................................ 417 12.4.1 Instructions for replacing the battery.......................................................................... 417 12.4.2 Battery disposal.......................................................................................................... 418 12.5 Cleaning ............................................................................................................................ 418 Chapter 13 Ordering Form......................................................................................................... 419 13.1 Loose equipment .............................................................................................................. 419 13.2 Panel installed................................................................................................................... 420 Chapter 14 Firmware and service manual version history .................................................... 421 Chapter 15 ANNEX...................................................................................................................... 423 15.1 Appendix A: Settings Sheet .............................................................................................. 423 15.1.1 Equipment parameters............................................................................................... 423 15.1.2 Logic settings of configuring functions ....................................................................... 423 15.1.3 Transformer system parameters................................................................................ 424 15.1.4 Generator system parameters ................................................................................... 425 15.1.5 Stepdown transformer system parameters................................................................ 425 15.1.6 System parameters of excitation transformer or exciter ............................................ 426 15.1.7 Implicit configuration settings..................................................................................... 427 15.1.8 Settings of differential protection of generato-transformer unit ................................. 427 15.1.9 Settings of differential protection of main transformer ............................................... 427 15.1.10 Settings of phase to phase fault protection of main transformer............................. 428 15.1.11 Settings of earth fault protection of main transformer.............................................. 429 15.1.12 Settings of over excitation protection of main transformer ...................................... 430 15.1.13 Settings of differential protection of generator ......................................................... 431 15.1.14 Settings of splitting-phase transverse differential protection of generator .............. 431 15.1.15 Settings of turn-to-turn fault protection of generator................................................ 431 15.1.16 Settings of phase to phase fault backup protection of generator ............................ 432 15.1.17 Settings of earth fault protection of stator windings................................................. 432 15.1.18 Settings of earth fault protection of rotor.................................................................. 433 15.1.19 Settings of thermal overload protection of stator ..................................................... 433 15.1.20 Settings of negative sequence overload protection of stator................................... 434 15.1.21 Settings of Loss-of-Excitation protection of generator............................................. 434 15.1.22 Settings of out-of-step protection of generator ........................................................ 435
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RCS-985A Generator transformer unit protection

15.1.23 Settings of voltage protection................................................................................... 435 15.1.24 Settings of overexcitation protection of generator ................................................... 435 15.1.25 Settings of power protection of generator................................................................ 436 15.1.26 Settings of underfrequency and overfrequency protection of generator ................. 436 15.1.27 Settings of startup and shutdown protection of generator....................................... 437 15.1.28 Settings of accidental energization protection of generator..................................... 438 15.1.29 Settings of differential protection of excitation transformer or exciter...................... 438 15.1.30 Settings of backup protection of excitation transformer or exciter........................... 438 15.1.31 Settings of overload protection of excitation ............................................................ 439 15.1.32 Settings of differential protection of stepdown transformer ..................................... 439 15.1.33 Settings of backup protection at HVS of stepdown transformer.............................. 440 15.1.34 Settings of backup protection at LVS of stepdown transformer .............................. 440 15.1.35 Settings of restrict earth fault protection of stepdown transformer.......................... 441 15.1.36 Settings of mechnical protection .............................................................................. 441 15.1.37 Settings of pole disagreement protection of circuit breaker .................................... 442 15.1.38 Calculated parameters of primary rated current ...................................................... 442 15.1.39 Calculated parameters of secondary rated current ................................................. 442 15.1.40 Calculated parameters of secondary rated voltage ................................................. 443 15.1.41 Calculated parameters of differential coefficient...................................................... 443 15.2 Appendix B: DBG2000 for RCS-985 (User Version) ........................................................ 444 15.2.1 General....................................................................................................................... 444 15.2.2 Menu bar .................................................................................................................... 445 15.2.3 Tool bar ...................................................................................................................... 447 15.2.4 Report......................................................................................................................... 453 15.2.5 Trip Tests.................................................................................................................... 454

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Chapter 1 Instroduction

Chapter 1 Introduction
1.1 Application
RCS-985A is a kind of microprocessor based generator-transformer unit protection relay integrated main and backup protection. It provides complete electrical protection for large-sized generators-transformer unit of various types, which usually comprise generator, main transformer, stepdown transformer and exciter or excitation transformer. It also can meet the requirements of power plant automation. RCS-985A suits connection of generator-transformer unit with stepdown transformer: two-winding main transformer (220 kV or 500 kV), generator with capacity 100 MW or above, one stepdown transformers with at most three windings or one winding-split stepdown transformer and excitation transformer or exciter. For a large generator-transformer unit, two sets of RCS-985As can be used and then main protection, abnormal operation condition protection and backup protection can be duplicated. Operating circuits and mechanical protection equipment (RCS-974 series) are installed on a separated panel. Independent CT groups are used by these two RCS-985As while main and backup protection elements in a RCS-985A share one CT group. Outputs of the protection correspond to independent trip coils. Therefore, the following features can be achieved: Clear design and arrangement of the secondary circuits; Convenient, reliable and secure for operation of equipment and requirements of accident prevention; Convenient for configuration, testing and maintenance.

RCS-985A relay is suited to be flush mounted into a control panel. Figure 1-1 and Figure 1-2 show typical applications of RCS-985A.

1.1.1 Typical applications


Figure 1-1 or Figure 1-2 typical protection configuration schemes consist of three protection panels, in which panels A and B comprises separately one set of electrical protection of generator-transformer unit (RCS-985A). Different groups of CT are used for them respectively. Panel C (RCS-974 series) comprises mechanical protection as well as pole disagreement protection, circuit breaker failure initiation and circuit breaker interposing relay set if needed. In the figure, polarity mark is marked out for panel A, which is available for panel B. RCS-985A can be suited for the scheme in which exciter is replaced by excitation transformer without any modification on protection software or hardware.

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Chapter 1 Instroduction

Figure 1-1 Typical application scheme 1 of RCS-985A

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 1 Instroduction 220kV


Busbar VT

Panel A
RCS-985A

Panel B
RCS-985A

Panel C
CZX-12 RCS-974A

Main transformer

VT1 VT2 VT3


Excitation transformer

Stepdown transformer

Gennerator

Figure 1-2 Typical application scheme 2 of RCS-985A

1.1.2 Constitution of the scheme


1.1.2.1 Differential protection Scheme1: For a large-sized generator-transformer unit with capacity over 300MW, panel A and B are both equipped with differential protection of generator-transformer unit, main transformer, generator and stepdown transformer. Usually, the whole stepdown transformer is included in the overall generator-transformer differential protection zone. However, user can decide whether or not the stepdown transformer is included in overall differential protection by configuring the CT used in overall differential protection. Scheme2: For a large-sized generator-transformer unit with capacity between 100MW and 300MW, panel A and B are both equipped with differential protection of main transformer, generator and stepdown transformer. For differential protection of generator-transformer unit, main transformer and stepdown
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Chapter 1 Instroduction

transformer, there are two kinds of discrimination principle for inrush current: secondary harmonic discrimination and waveform discrimination. It is recommended that one set of RCS-985A adopts secondary harmonic discrimination and the other one adopts waveform discrimination. In RCS-985A, two kinds of percentage differential protection (variable slope percentage differential protection and DPFC percentage differential protection) are equipped to get high performance not only in speed but also in security. 1.1.2.2 Backup protection Panel A and B are equipped with complete set of backup protection of generator respectively and use two groups of independent CTs. (1) For zero sequence overcurrent protection, if there is only one group of zero sequence CT, it can be connected to panel A. While panel B can adopt calculated zero sequence current from bushing CTs. Protection zone of these two kinds of zero sequence current protection are different with each other. Their settings shall be calculated separately. (2) As to earth fault protection of rotor, two sets of such protection cannot work simultaneously otherwise influence between them will appear. Only one set of earth fault protection of rotor can be enabled during operation. If the other set will be switched over sometimes, this one shall be disabled firstly. 1.1.2.3 20HZ voltage-injecting earth fault protection for stator If 20Hz voltage-injecting earth fault protection for stator is considered, special facilities should be equipped, such as 20Hz power supply source, filter, inter current transformer, shunt resistance, load resistance, and so on. All these auxiliary facilities can be integrated into one additional panel. 1.1.2.4 Current transformer (1) Panels A and B adopt different groups of CTs. (2) Main protection and backup protection adopt one group of CT. (3) Currents at the terminal of generator are included in generator and main transformer differential protection. Therefore, these two kinds of differential protection can use one common group of CT at terminal of generator without any influence. In fact, two groups of CT input channels are provided in RCS-985A. One of them is reserved for special case. (4) Current sampled at HV side of stepdown transformer is included both in differential protection of main transformer and in differential protection of stepdown transformer. Since capacities of these two transformers are different to each other significantly, in order to ensure performance of differential protection, it is better to adopt two groups of CT for them. One CT with big ratio is prepared for differential protection of main transformer, and the other with small ratio is for differential protection of stepdown transformer. However, if there is only one group of CT can be used for them, it is also possible if make related configuration by software. (5) On 220 kV side, there shall be one group of CT to be adopted dedicatedly for circuit breaker failure protection and pole disagreement protection.

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1.1.2.5 Voltage transformer (1) Panel A and B shall adopt different VTs or their different windings if possible. (2) For turn-to-turn fault protection of generator, in order to prevent unwanted operation due to VT circuit failure on HV side used dedicatedly for this protection, one set of protection shall adopt two groups of VT. However, if we consider adopting only independent VT windings, too much VTs will be installed at generator terminal. It is not reasonable. So it is recommended to equip three VTs at generator terminal, named VT1, VT2 and VT3. Panel A adopts voltage from VT1 and VT3 while panel B from VT2 and VT3. During normal operation, panel A adopts VT1 and panel B adopts VT2 while VT3 is as a backup VT to both of them. If circuit of VT1 or VT2 fails, VT3 will be switched over automatically by software. (3) For zero sequence voltage, there are no two independent windings adopted by two sets of protection equipments simultaneously in general. So the only one zero sequence voltage can be used by two panels. 1.1.2.6 Circuit Breaker Failure Initiation Circuit breaker failure initiation is very important to power plant. In general, generator protection tripping contact is an essential condition to circuit breaker failure initiation. Considering importance of such protection, it is recommended to realize it as follows: (1) Only one set of circuit breaker failure initiation shall be equipped. (2) In order to make it more reliable, circuit breaker failure initiation function cant be integrated into one equipment with electrical protection relays.

1.2 Functions
Table 1-1 Protective functions for generator

No.
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.

Protection function overview for generator


Current differential protection Unrestrained instantaneous differential protection DPFC current differential protection Spilt-phase transverse differential protection High sensitive transverse differential protection Longitudinal zero sequence overvoltage protection for turn-to-turn fault DPFC directional protection for turn-to-turn fault Two stages phase-to-phase impedance protection Voltage controlled overcurrent protection Fundamental zero sequence overvoltage protection for stator earth fault

IEEE
87G 87UG 87G 87G 87G 59N/60 7/67 21G 51V 64G1

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No.
11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30.

Protection function overview for generator


Third harmonic protection for stator earth fault Two stages of one-point-earth fault protection of rotor Two-point earth fault protection of rotor Definite and inverse time stator thermal overload protection Definite and inverse time negative sequence overload protection of rotor Loss-of-excitation protection Out-of-step protection Two stages phase-to-phase overvoltage protection Phase-to-phase undervoltage protection Two stages definite time over-excitation protection Inverse time over-excitation protection Reverse power protection Sequent-tripping reverse power protection Four stages underfrequency protection Two stages overfrequency protection Startup/shutdown protection of generator Accidental energization protection Voltage balance function Voltage transformer supervision Current transformer supervision
Table 1-2 Protective functions for excitation

IEEE
27/59TN, 64G2 64R 64R 49S 46/50, 46/51, 49R 40 68/78 59G 27G 24 24 32G 32G 81G 81O

50/27 60 47,60G 50/74

No. 1. 2. 3. 4.

Protection function overview for excitation Current differential protection for excitation transformer Current differential protection of AC exciter Overcurrent protection Definite and inverse time thermal overload protection for exciting windings

IEEE 87T 87G 50P/51P 87G

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No. 5.

Protection function overview for excitation Current transformer supervision of excitation set

IEEE 50/74

Table 1-3 Protective functions for main transformer

No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18.

Protection function overview for main transformer Generator-transformer unit current differential protection Transformer current differential protection Unrestrained differential protection DPFC current differential protection Impedance protection at HV side Voltage controlled overcurrent protection at HV side Voltage controlled zero-sequence overcurrent protection at HV side Voltage controlled directional zero-sequence overcurrent protection at HV side Zero-sequence overvoltage protection at HV side (Gap overvoltage) Zero-sequence overcurrent protection at HV side (Gap overcurrent) Overexcitation protection Thermal overload protection Cooling initiation function Zero-sequence voltage alarm of branches at LV side Pole disagreement function VT circuit failure supervision CT circuit failure supervision CT saturation detection

IEEE 87GT 87T 50/87UT 87T 21T 50P/ 51P 50N/ 51N 67N 59N 50N/51N 24 49 49 59G 92PD

Table 1-4 Other functions of RCS-985A

Other functions overview Automatic self-supervision Metering Fault recording CPU module Relay hardware supervision and secondary circuit supervision 24 samples per cycle 32 latest fault waveforms reports, 8 latest fault

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Other functions overview MON module Event recording Present recording Loacal HMI Remote HMI Front communication port (RS232) Rear communication ports to host Ports type Protocol type self-supervision report binary input chang report 4 or 8 seconds continuous oscillogram function for latest fault 32 latest abnormality reports 32 latest binary status input change reports One normal operating waveform triggered manually LCD and keypad DBG-2000 software or substation automation system software for software DBG-2000 with local protocol four RS-485 ports (two can be configured as fiber port) IEC 60870-5-103/MODBUS one RS-485 or RS-232 IRIG-B (optional)

Rear communication port to printer Time synchronisation port Voltage and current drift auto-adjustment

1.3 Features
1.3.1 High performance hardware
1.3.1.1 Parallel calculation of double CPU system The hardware of any one CPU system comprises a 32-bit microprocessor and two digital signal processors (DSP). Two CPU systems can operate in parallel companied by fast 14bits A/D converter. The 32-bit microprocessor performs logic calculation and the DSPs perform the protection calculation. High performance hardware ensures real time calculation of all protection relays within a sampling interval. On the premise of 24 samples per cycle, all data measurement, calculation and logic discrimination could be done within one sampling period. The event recording and protection logic calculation are completed simultaneously. 1.3.1.2 Independent fault detectors There is a set of independent fault detectors in the CPU processor in the RCS-985A relay. Its operation supervises the tripping outputs. They will connect power supply to output relays when operate. There are different fault detectors in the CPU module used for various protective functions. The relay could drive a tripping output only when the fault detectors in the CPU module and the fault detectors in the MON module operate simultaneously. This kind of independent supervision of tripping outputs using fault detectors can avoid any maloperation possibly caused by any hardware component fails. This highly increases the security. 1.3.1.3 Integration of main and backup protection Main and backup protection are integrated in one set of protection equipment. Protection

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information such as sampled data and binary inputs are shared by all protective elements and no more than one group of CTs or VTs at same side of the transformer need to be input into the equipment for different protective element. Shunt connection of VT and serial connection of CT that usual seen in secondary circuit before can be avoided, which greatly reduce the possibility of circuit failure. Whilst the equipment can gather all information of any fault and record, all relevant waveforms of it for offline analysis. 1.3.1.4 Flexible configuration of output Elaborately designed tripping logic makes it possible of operation circuit to suit for various circuit breakers.

1.3.2 New philosophy used in RCS-985A


1.3.2.1 Variable slope percentage differential protection The percentage differential protection adopts variable slope restraint characteristics and actual unbalanced differential current effect can be simulated. In order to prevent unwanted operation of differential protection due to CT saturation, countermeasures to discriminate CT saturation are provided by means of waveform identification of phase current at each side. 1.3.2.2 DPFC percentage differential protection DPEC percentage differential protection reflects only deviation components of differential current and restraint current and is not affected by load current. It can detect small fault within generator. Besides, it is insensitive to CT saturation since its restraint coefficient is set comparatively higher than that of conventional differential protection. 1.3.2.3 Ratio corrected by software for differential protection Current from CTs of each side with different ratios are corrected to a single standard before calculation. 1.3.2.4 Provide two inrush current distinguishing methods Two discrimination principles for inrush current are provided: harmonics restraint and waveform distortion restraint. 1.3.2.5 CT saturation detection Based on the operation sequence of DPFC restraint current element and DPFC differential current element of differential protection, external fault with CT saturation or internal fault can be distinguished correctly. In case of internal fault, the relay will operate immediately. While in case of external fault with CT saturation, the criterion of current waveform is adopted then. The relay will not operate in case of persisting external fault if only CT saturation occur no less than 5ms after the fault detectors pickup, but operate quickly when evolving external to internal fault occurs. 1.3.2.6 High sensitive transverse differential protection Transverse differential protection adopts percentage phase current restraint and floating threshold to get high sensitivity in internal fault and high security in external fault. In addition, by adopting techniques of the frequency tracking technique, digital filter technique and Fourier transformation
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technique, the filtration ratio of third harmonic component can reach more than 100. These entire countermeasure guarantees the reliability of the protection in all occasions as mentioned as below: Advantages of percentage restraint by phase current: (1) The transverse differential protection can get reliable restraint effect because the faulty phase current increases greatly while transverse differential current increases less in external fault situation. (2) The protection has very high operation sensitivity because transverse differential current increases comparatively large whereas phase current change not too observably in slightly interturn fault situation. (3) The high-setting stage of transverse differential current protection will operate quickly and reliably when severe interturn fault occurs in stator winding. (4) In case of phase-to-phase fault of stator winding, not only transverse differential current but also phase current increase greatly, therefore just low percentage restraint by phase current guarantees the reliable operation of transverse differential protection against the fault. (5) As for other increment of transverse differential unbalanced current in normal operation condition, transverse differential current protection uses float threshold technique to avoid unwanted operation. 1.3.2.7 Performance of percentage restraint interturn protection By adopting techniques of the frequency tracking technique, digital filter technique and Fourier transformation technique, the filtration ratio of third harmonic component can reach more than 100. New criteria of generator current percentage restraint: (1) Fault current increase greatly while longitudinal residual voltage increase less in external three-phase fault three-phase fault, therefore the protection tends to be reliably restrained thanks to current increment as restraint quantity. (2) If external asymmetric fault occurs, phase current increases greatly with negative sequence current, but the longitudinal residual voltage has a little bit increment, therefore the protection tends to be reliably restrained by the mixing quantity of current increment and negative-sequence component. (3) The protection has very high operation sensitivity because longitudinal residual voltage increases comparatively large whereas phase current hardly changes in slightly interturn faulty situation. (4) The high-setting stage of transverse differential current protection will operate quickly and reliably when severe interturn fault occurs in stator winding. (5) As for other increment of unbalanced longitudinal residual voltage in normal operation condition, the protection uses floating-threshold technique to avoid unwanted operation.
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1.3.2.8 Stator earth fault protection performance (1) By adopting techniques of the frequency tracking technique, digital filter technique and Fourier transformation technique, the filtration ratio of third harmonic component can reach more than 100. (2) The sensitive stage of fundamental residual voltage protection operates and issues trip command only if the dual criterias of residual voltages of generator terminal and neutral point are satisfied at the same time. (3) The ratio settings of third harmonic of generator terminal to that of neutral point used in third harmonic ratio criteria will automatically suit to the change of ratio fore-and-aft incorporating in power network third harmonic voltage of the plant unit. This automation adjustment function ensures the correctness of signals generated and issued by the third harmonic voltage criteria even during incorporation or isolation course of generator. (4) The ratio and phase-angle difference of third harmonic voltage of generator terminal to that of neutral point keeps almost stable when the generator is in normal operation condition; also it is a slow developing course. Through real time adjustment of coefficient of amplitude value and phase, RCS-985 makes differential voltage between generator terminal and neutral point as 0 in normal operation condition. When stator earth fault occurs, the criteria tend to operate reliably and sensitively. 1.3.2.9 Performance of rotor earth fault protection Rotor earth fault protection adopts sampling-switch (ping-pong type) principle. Direct current is inputted by high-performance isolated amplifier. Via switching two different electronic switch RCS-985 solves four different ground-loop equations to compute rotor winding voltage, rotor ground resistance and earthing position on real time and display these information on LCD of the protection. If one point earth fault protection only issues alarm signals instead of tripping after operation, then two-points earth fault protection will be put into service with a certain fixed delay automatically and will operated to trip when two-point earth fault of rotor occurs. 1.3.2.10 Performance of loss-of-excitation protection Loss-of-excitation protection adopts optimizing protection scheme in which stator impedance criteria, reactive power criteria, rotor voltage criteria, busbar voltage criteria and criteria of stator active power decrement, could be optionally combined to meet various demands of operation of the unit for different generator. 1.3.2.11 Performance of out-of-step protection Out-of-step protection adopts three-impedance element (got from positive-sequence current and positive sequence voltage of generator) to distinguish out-of-step from steady oscillation. More than that, the protection can accurately locates the position of oscillation center and record oscillation slid numbers of external and internal oscillation respectively in real time.

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1.3.2.12 VT circuit failure supervision Two groups of VT inputs are equipped at generator terminal. If one group fails, the equipment will issue alarm and switch over to the healthy one automatically. It doesnt need to block protective element relevant to voltage. 1.3.2.13 CT circuit failure alarm and blocking This function adopts percentage differential principle. Detection ability of CT circuit failure can be enhanced significantly and unwanted operation can be avoided then.

1.3.3 Intellectuality
1.3.3.1 Friendly HMI interface The HMI interface with a LCD and a 9-button keypad on the front panel is very friendly to the user. Real time, connection diagram, phase current, differential current and voltage can be displayed on LCD during normal condition. 1.3.3.2 Transparency More than 500 sampled data including differential current and phase angle etc. can be displayed on LCD. Meanwhile more than 1500 internal data of the equipment can be supervised through dedicated auxiliary software DBG2000, which provides user with great convenience to know about the operation situation of RCS-985. 1.3.3.3 Perfect fault recording function CPU module: latest 32 groups of fault data and event sequence, 8 groups of fault oscillograms, 32 changes of binary input status and 32 self-supervision reports can be recorded. MON module: when the equipment picks up, oscillograms of all analog sampling quantity, differential current and operation of the protection equipment can be recorded with duration up to 4 seconds or 8 seconds. The file format of event or fault report is compatible with international COMTRADE format. 1.3.3.4 Communication ports One front RS232 port (For DBG2000 software) Two rear RS-485 ports with IEC 60870-5-103 protocol or MODBUS protocol, which can be re-configured as optical fiber ports. One rear RS-485 with clock synchronization, One rear RS-232 or RS-485 with printer. 1.3.3.5 Various clock synchronizations Various GPS clock synchronizations: second/minute pulse via binary input or RS-485, message via communication ports and IRIG-B synchronization.

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Chapter 2 Technical Data


2.1 Atmospheric Environment tests
Items Standard Recommended temperature during service Specified service temperature range Transport and storage temperature range Permissible humidity Permissible atmospheric pressure Information IEC60255-6:1988 -100C +550C -250C +550C -400C+700C 5%--95%, condensation not permissible 70kPa~106kPa

2.2 Electrical Specifications


2.2.1 Analog input ratings
Items Rated Voltage Vn Information 100 V / 3 , 110 V / 3 106V 100 V , 110 V 140V

Linear to Thermal withstand capability -continuously -10s Burden at rated Rated frequency Phase rotation Rated Current In Minimum measurable current Linear to Thermal withstand capability -continuously -for 10s -for 1s -for half a cycle Burden

120V 200 V < 0.2 VA at Vn 50Hz5Hz60Hz5Hz ABC 1A 0.1A 40A (non-offset AC current).

120V 200 V < 1.0 VA at Vn

5A 0.5A 200A (non-offset AC current).

4In 20In 100In 250In < 0.2 VA/phase @ 1A

4In 20In 100In 250In < 1.0 VA/phase @ 5A

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2.2.2 Power Supply


Rated Voltage Variation Ripple in the DC auxiliary voltage Power supply interruption 110/125Vdc 88 - 144 Vdc 220/250Vdc 176 - 288 Vdc

Max 12% of the DC value. Per IEC 60255-11 Bridging time 20ms during failure/short circuit of auxiliary voltage de-energizing. at Vdc

110V,

without

Per IEC 60255-11:1979 Burden -Quiescent condition -Operating condition -Additions for energized binary input, per opt input Power-up Time Starting time Backup battery type <15W <25W 0.25W(110/125Vdc) 0.50W(220/250Vdc) <10s <2S 1/2AA 3.6V, 1000mAh

2.2.3 Binary input


Rated Voltage Pickup voltage Dropout voltage Maximum permitted voltage Current drain Recognition time Withstand 24VDC 14.4VDC 13VDC 28.8V 2mA 0.5ms 2kVac 48VDC 28.8VDC 26VDC 57.6V 110/125VDC 66VDC 55VDC 150V 220/250VDC 132VDC 110VDC 300V

2.2.4 Binary Output


Item Continuous carry Short duration current -1s Pickup time Bounce time 35A <5ms 1ms 30 <10ms 1ms Used for tripping contact 13A Used for other contacts 5A

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Item Breaker capacity -L/R=40ms at 220VDC Durability -Loaded contact -Unloaded contact

Used for tripping contact 0.4A

Used for other contacts 0.2A

10,000 operations minimum 100,000 operations minimum

10,000 operations minimum 100,000 operations minimum

2.2.5 Power supply output for Optical isolators


Item Rated Voltage Max current Information 24V 100mA

2.3 Mechanical Specifications


Item Enclosure dimensions Mounting Way Trepanning dimensions Case color Weight of the relay Enclosure class Information 487mm(W)530.4mm(H)285 mm(D) Flush mounted 450mm(W)531.5mm(H)M6 screw Silver grey Approx. 30kg Per IEC605291989 Front side: IP51 (flush mounted) Sides of the case: IP30 Rear side, connection terminals: IP20

2.4 Rear Communication Port


Item EIA(RS)485 Information EIA-485: Baud rate: Protocol: 2 Rear ports 4800-19200 bps IEC60870-5-103

Twisted Pair: two wire connections, M4 screw, for screened twisted pair cable, multi-drop, 1000m max. Capacity support 32 nodes within 500m

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Chapter 2 Technical Data

Item Ethernet

Information Two ports. Protocol : IEC61850, IEC60870-5-103 over TCP/IP

Twisted Pair: RJ45, 10/100M,100BaseT Optional optical Fiber connection: SC,100Base-FX, Multi-mode Fiber 62.5/125 m , 1310nm Front Download/Monitor Port EIA(RS)232, 9 pin D-type female connector. For firmware downloads through DBG2000 software. Isolation to ELV level. Printing Port EIA(RS)232, 9 pin D-type male connector. Baud Rate: 4800bps or 9600bps for EPSON 300K printer. Optional Interface Rear IRIG-B AC model and DC model RS485 differential interface BNC plug RG59LSF flame retardant, halogen isolated, armored 50 ohm coaxial cable. Clock Interface synchronization Standard EIA-485 port, support second pulse and IRIG-B differential pulse

2.5 Terminals
Item AC Current & AC Voltage Information Heavy duty terminal block. Threaded M4 terminals, for jointing terminals. M4 screw; 2.5mm 24.0mm 2 lead; CT inputs have integral safety shorting, upon removal of the terminal block General input/output Power supply, Opt input, Output contacts and RS485 communications: Threaded M4 terminals, for jointing terminals 1.5mm 22.5mm 2 lead; Case Protective Connections Earth Two rear BVR type yellow and green stub connections threaded M4. Must be grounded for safety, wire size 2.5mm 24.0mm2 Jointing terminal;

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2.6 Type tests


2.6.1 Environmental tests
Dry cold test Per IEC60068-2-1: 1990 Test Ad for 16 h at -25C Dry heat test Per IEC60068-2-2:1974 Test Bd for 16 h at 70C Damp heat test, cyclic Per IEC60068-2-30:1980 Test Db Two (12+12) hour cycles 95%RH,+25C+55C

2.6.2 Mechanical tests


Test Vibration Shock and bump Seismic Type test values Class Class I Class I Class I Reference standards IEC 60255-21-1 IEC 60255-21-2 IEC 60255-21-3

2.6.3 Electrical tests


Dielectric tests -Test voltage Impulse voltage tests -Test voltage Per IEC 60255-5:2000 2kV, 50Hz, 1min According to the IEC60255-5:2000 5kV, unipolar impulses, waveform 1.2/50s, source energy 0.5J According to the IEC 60255-5:2000 >100M500Vdc

Insulation resistance measurements -Isolation resistance

2.6.4 Electromagnetic compatibility


EMC immunity test level requirements consider the IEC 60255-26 1MHz burst disturbance test -Common mode -Differential mode Per IEC 60255-22-1 (idt IEC61000-4-12) class 2.5kV 1.0kV Electrostatic discharge test -For contact discharge -For air discharge Per IEC60255-22-2 class IV 8kV 15kV

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EMC immunity test level requirements consider the IEC 60255-26 Radio frequency interference tests -Conducted, common mode Per IEC 60255-22-6 class 10V(rms), f=150kHz80MHz -Radiated amplitude-modulated Per IEC 60255-22-3 10V/m(rms), f=801000MHz -Radiated pulse-modulated Per IEC 60255-22-3 10Vm(rms), f=900MHz -Radiated, test with a portable transmitter Per IEC 60255-22-3 f=77.2MHz, P=6W; f=172.25MHz, P=5W Fast transient disturbance tests -Power supply, I/O, Earth -Communication terminals Surge immunity test -Power supplyAC inputI/O port -Communication port Conducted RF Electromagnetic Disturbance -Power supply, AC, I/O, Comm. terminal Power frequency Disturbance Per IEC 60255-22-4, Class IV, 4kV, 2.5kHz,5/50ns Class IV, 2kV, 5kHz, 5/50ns Per IEC 60255-22-5,1.2/50us class IV 4kV, line to earth; 2kV line to line 2kV, line to earth; 1kV line to line Per IEC 60255-22-6 Class III, 10Vrms, 150kHz~100MHz Per IEC 60255-22-7 (idt IEC 61000-4-16 ) CM 500 V / DM 250 V via 0.1F 10s Power Frequency Magnetic Field Immunity Per IEC 61000-4-8: 1993 Class 5: 100A/m for 1min 1000A/m for 3s Pulse Magnetic Field Immunity IEC 61000-4-9: 1993 Class 5: 6.4 / 16 s 1000A/m for 3s Damped oscillatory magnetic field immunity IEC 61000-4-10: 1993 Class 5 100 kHz & 1 MHz 100A/m Voltage dips and voltage short interruptions Per IEC 61000-4-11 100%/20ms, 60%/100ms Supply variations immunity IEC 60255-6 Vn 20%

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EMC immunity test level requirements consider the IEC 60255-26 Supply frequency fluctuations IEC 60255-6 50 Hz: from 47 to 54 Hz 60 Hz: from 57 to 63 Hz Electromagnetic emission tests -Conducted, RF emission -Radiated RF-emission Per IEC 60255-252000 Class A Class A

2.7 Certifications
ISO9001: 2000 ISO14001:2004 OHSAS18001: 1999 CMMI L2 EMC: 89/336/EEC, EN50263: 2000 Products safety(PS): 73/23/EEC, EN61010-1: 2001,EN60950-2002

2.8 Protective functions


2.8.1 Accurate operating scope
Current Voltage: frequency df/dt time delay: 0.05In20In 0.4V100V 45Hz55Hz 0.3Hz/s10Hz/s 0100s

2.8.2 General error of analog input metering


Current, voltage: Real power, reactive power: Power frequency metering: Accuracy of GPS synchronization Resolution of SOE: 0.2% 0.5% 0.01Hz 1ms 1ms

2.8.3 Generator-transformer unit differential protection, main transformer differential protection


Pickup setting of percentage differential current fault detector Scope: 0.1 Ie 1.5 Ie Setting accuracy: 5% or 0.01In Setting of unrestrained instantaneous differential protection Scope: 2 Ie 14 Ie Setting accuracy: 2.5%
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Setting of the first slope of percentage differential protection Scope: 0.00 0.10 Setting accuracy: 2.5% Setting of the maximum slope of percentage differential protection Scope: 0.40 0.60 Setting accuracy: 2.5% Operation time of percentage differential protection 25 ms

(Id2[I_Pkp_PcntDiff_ GTU(Tr)])

Operation time of unrestrained instantaneous differential protection 20 ms (Id1.5[I_InstDiff_ GTU(Tr)]) Note: Inrated secondary current of CT Ie rated secondary current of generator or transformer, Iddifferential current

2.8.4 Generator differential protection, split phase transverse differential protection and differential protection of exciter
Pickup setting of percentage differential current fault detector Scope: 0.1 Ie 1.5 Ie Setting accuracy: 5% or 0.01In Setting of unrestrained instantaneous differential protection Scope: 2 Ie 10 Ie Setting accuracy: 2.5% Setting of the first slope of percentage differential protection Scope: 0.05 0.50 Setting accuracy: 2.5% Setting of the maximum slope of percentage differential protection Scope: 0.50 0.80 Setting accuracy: 2.5% Operation time of percentage differential protection 25ms (Id2[I_Pkp_Pcnt(SPT)Diff_Gen]) Operation time of unrestrained instantaneous differential protection 20 ms (Id1.5[I_Inst(SPT)Diff_Gen]) Note: Inrated secondary current of CT, Ie rated secondary current of generator or exciter, Iddifferential current.

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2.8.5 Stepdown transformer and excitation transformer differential protection


Pickup setting of percentage differential current fault detector Scope: 0.1 Ie 1.5 Ie Setting accuracy: 5% or 0.01In Setting of unrestrained instantaneous differential protection Scope: 2 Ie 14 Ie Setting accuracy: 2.5% Setting of the first slope of percentage differential protection Scope: 0.10 0.50 Setting accuracy: 2.5% Setting of the maximum slope of percentage differential protection Scope: 0.50 0.80 Setting accuracy: 2.5% Secondary harmonic restraint coefficient Scope: 0.10 0.35 Setting accuracy: 2.5% Operation time of percentage differential protection 35 ms

(Id2[I_Pkp_Diff_Exc(ST)] )

Operation time of unrestrained instantaneous differential protection 25 ms (Id1.5[I_InstDiff_Exc(ST)]) Note: Inrated secondary current of CT. Ie rated secondary current of stepdown or excitation transformer. Iddifferential current.

2.8.6 High sensitive transverse differential protection


Current setting of transverse differential protection [I_SensTrvDiff_Gen] Scope: 0.5A 50A Setting accuracy: 2.5% or 0.01In High setting of transverse differential protection [I_UnsensTrvDiff_Gen] Scope: 0.5A 50A Setting accuracy: 2.5% or 0.01In Additional delay of transverse differential protection [t_TrvDiff_Gen] Scope: 0.5 2.0 Setting accuracy: 1% setting 40ms Operation time of transverse differential protection Scope: 35 ms (at 1.5current setting)

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2.8.7 Longitudinal zero sequence voltage protection for turn-to-turn fault


Longitudinal zero sequence voltage setting [V_SensROV_Long1_Gen] Scope: 1 V 20 V Setting accuracy: 2.5% or 0.05V Longitudinal Zero sequence voltage high setting [V_UnsensROV_Long1_Gen] Scope: 2 V 20 V Setting accuracy: 2.5% or 0.05V Phase current restraint coefficient [Slope1_ROV_Long1_Gen] Scope: 0.1 2.0 Time delay setting [t_ROV_Long1_Gen] Scope: Setting accuracy:

0.1 s 10 s 1% setting40 ms

Operation time of longitudinal zero sequence voltage protection Scope: 40 ms (at 1.5setting) Setting accuracy: 1% setting40 ms Operation time of DPFC directional protection Scope: Setting accuracy:

40 ms 1% setting40 ms

2.8.8 Earth fault protection of stator


Zero sequence voltage setting [V_SensROV_Sta] Scope: 1 V 20 V Setting accuracy: 2.5% or 0.05V Zero sequence voltage high setting [V_UnsensROV_Sta] Scope: 1 V 30 V Setting accuracy: 2.5% or 0.05V Ratio setting of third harmonic voltage protection [k_3rdHRatio_PreSync(PostSync)_Sta] Scope: 0.5 10 Setting accuracy: 5% Slope setting of third harmonic voltage differential protection [k_V3rdHDiff_Sta] Scope: 0.1 2.0 Setting accuracy: 5% Time delay setting [t_V3rdH_Sta] Scope: Setting accuracy:

0.1 s 10 s 1% setting40 ms

2.8.9 Earth fault protection of rotor


One point ground resistance setting [R_1PEF_RotWdg] Scope: 0.1 100 k
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Chapter 2 Technical Data

Setting accuracy: Two points ground location setting Scope: Second harmonic voltage setting Time delay setting Scope: Setting accuracy:

10% setting or 0.5k

1% 10% 0.1 V 10 V

0.1s 10s 1% setting +1S

2.8.10 Overload protection of stator


Definite time current setting 0.1 A 100 A Definite time delay setting 0.1 s 10 s Inverse time initiating current setting 0.1 A 10 A Heat capacity of rotors winding 1 100 Heat emission factor 0.1 2.0 Tolerance of definite and inverse time current setting 2.5% or 0.01 In Tolerance of time delay setting 1% setting40 ms

2.8.11 Negative sequence overload protection


Definite time negative sequence current setting 0.1 A 100 A Definite time delay setting 0.1 s 10 s Inverse time initiating negative sequence current setting 0.05 A 10 A Heat constant of rotor 1 100 Continuous tolerable negative sequence current of generator 0.05 A 10 A Tolerance of definite and inverse time negative sequence current setting 2.5% or 0.01 In Tolerance of time delay setting 1% setting40 ms

2.8.12 Overload protection of excitation winding (AC quantity)


Definite time current setting 0.1 A 100 A Definite time delay setting 0.1 s 10 s Inverse time initiating current setting 0.1 A 10 A Heat capacity factor 1 100 Reference current 0.1 A 10 A Tolerance of definite and inverse time current setting 2.5% or 0.01 In Tolerance of time delay setting 1% setting40 ms

2.8.13 Overload protection of excitation winding (DC quantity)


Definite time current setting
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0.1 kA 30.0 kA
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Chapter 2 Technical Data

Definite time delay setting 0.1 s 10 s Inverse time initiating current setting 0.1 kA 10 kA Heat capacity factor 1 100 Reference current 0.1 kA 10 kA Tolerance of definite and inverse time current setting 2.5% or 0.01 In Tolerance of time delay setting 1% setting40 ms

2.8.14 Loss of excitation protection of generator


Impedance setting Z1 Impedance setting Z2 Reverse reactive power setting Under voltage setting of rotor No-load voltage setting of rotor Under voltage factor setting of rotor Under voltage setting of busbar Reduced active power setting Time delay setting of stages 1/2/3 Time delay setting of stage 4 Tolerance of impedance setting Tolerance of rotors voltage setting Tolerance of power setting Tolerance of busbar voltage setting Tolerance of time delay setting Note: Pn: rated active power of generator. Un: rated voltage of generator. 0.1 100 0.1 100 0 50% Pn 1 V 500 V 1 V 500 V 0.1 10 10 V 100 V 10%50%Pn 0.1 s 10 s 0.1 min 60 min 2.5% or 0.1 5% or 0.1Un 1% Sn or 0.2% Sn 2.5% or 0.1 V 1% setting40 ms

2.8.15 Out-of-step protection of generator


Impedance setting ZA/ZB/ZC Phase angle setting Interior angle setting of lens Interior angle setting of alarm lens Number of pole slipping setting Tolerate tripping current setting Tolerance of impedance setting Tolerance of current setting Tolerance of angle setting 0.1 100 60 90 60 150 10 90 1 1000 0.1 A 10 A 2.5% or 0.1 2.5% or 0.01 In 3

2.8.16 Voltage protection of generator


Overvoltage setting Under voltage setting Time delay setting 110 V 170 V 10 V 100 V 0.1 s 10 s
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Chapter 2 Technical Data

Tolerance of voltage setting Tolerance of time delay setting

2.5% or 0.05 V 1% setting40 ms

2.8.17 Over excitation protection


Definite time V/F setting Time delay setting Inverse time V/F setting Time delay of inverse time protection Tolerance of V/F measurement Tolerance of definite time delay setting 0.5 2. 0 0.1 s 20 s 0.5 2. 0 0.1 s 3000 s 2.5% or 0.01 1% setting40 ms

2.8.18 Power protection of generator


Reverse power setting 0.5% - 10% Pn Underpower setting 1% - 100% Pn Power setting of reverse power sequent trip protection 0.5% - 10% Pn Time delay of reverse power protection 0.1 s 600 s Time delay of underpower protection 0.1 min 600 min Time delay of reverse power sequent trip protection 0.1s 10s Tolerance of reverse power setting 10% or 0.002 Pn Tolerance of time delay setting 1% setting40 ms

2.8.19 Frequency protection of generator


Setting of under frequency stage 1-4 45 Hz 50 Hz Setting of over frequency stage 1-2 50 Hz 55 Hz Time delay of frequency protection (accumulated) * 0.1 min 300 min Time delay of frequency protection (not accumulated) * 0.1 s 600 s Tolerance of frequency setting 0.02 Hz Tolerance of time delay setting 1% setting40 ms

2.8.20 Accident energization protection of generator


Current setting Blocking frequency setting Time delay of unwanted closing protection Negative sequence current setting Time delay of circuit breaker flashover protection Tolerance of current setting Tolerance of time delay setting 0.1 A 100 A 40 Hz 50 Hz 0.01 s 10 s 0.1 A 50 A 0.01 s 10 s 2.5% or 0.02 In 1% setting40 ms

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Chapter 2 Technical Data

2.8.21 Startup/shutdown protection of generator


Blocking frequency setting Differential current setting Overcurrent setting in low frequency Zero sequence voltage setting Time delay setting Tolerance of differential current setting Tolerance of zero sequence voltage setting Tolerance of differential current setting Tolerance of time delay setting Frequency range 40 Hz 50 Hz 0.2 Ie 10 Ie 0.1A 100A 5 V 25 V 0.1 s 10 s 5% or 0.02 In 5% or 0.2 V 5% or 0.02 In 1% setting40 ms 15 Hz 65 Hz

2.8.22 Low impedance protection


Forward impedance setting Reverse impedance setting Time delay setting Tolerance of impedance setting Tolerance of time delay setting 0.1 100 0.1 100 0.1 s 10 s 2.5% or 0.1 1% setting40 ms

2.8.23 Voltage controlled directional overcurrent protection


Negative sequence voltage setting Under voltage setting Current setting Time delay setting Directional definition Tolerance of voltage setting Tolerance of current setting Tolerance of time delay 1 V 20 V 10 V 110 V 0.1 A 100 A 0.1 s 10 s 0 point to transformer, I point to system 2.5% or 0.05 V 2.5% or 0.01 In 1%setting 40 ms

2.8.24 Directional zero sequence overcurrent protection


Zero sequence overcurrent setting Zero sequence overvoltage setting Directional definition Time delay setting Tolerance of zero sequence voltage setting Tolerance of zero sequence current setting Tolerance of time delay 0.1 A 100 V 1 V 100 V 0 point to system, I point to transformer 0.1 s 10 s 2.5% or 0.05 V 2.5% or 0.01 In 1%setting 40 ms

2.8.25 Gap protection


Gap zero sequence overcurrent setting Gap zero sequence overvoltage setting Time delay setting Tolerance of zero sequence voltage setting Tolerance of zero sequence current setting
26

0.1 A 100 V 10 V 220 V 0.1 s 10 s 2.5% or 0.05 V 2.5% or 0.01 In


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Chapter 2 Technical Data

Tolerance of time delay

1%setting 40 ms

2.8.26 Pole disagreement protection


Current setting Time delay setting current setting accuracy delay setting accuracy 0.1 A 20 A 0.1 s 10 s 2.5% or 0.01 In 1%40 ms

2.8.27 Mechanical protection


Time delay setting Tolerance of time delay 0 s 600.00 s 1%setting 40 ms

2.8.28 Measurements and Recording Facilities


Measurements

Current: Accuracy: Voltage: Accuracy:


Performance

0.05 20In 1.0% of reading 0.052Vn 1.0% of reading

Real time clock accuracy: External clock synchronization:

<2% seconds/day Conforms to IRIG standard 200-98, format B

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Chapter 2 Technical Data

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Chapter 3 Description of Operation Theory

Chapter 3 Description of Operation Theory


3.1 Software Structure
The RCS-985A protection is composed of current differential protection as main protection, kinds of protection mentioned in Table 1-1and Table 1-2 as backup protection and abnormal operation protection. VT supervision (VTS) and CT supervision (CTS) function is also included. Every protective element has its own fault detector element in CPU and DSP respectively. When the fault detector in CPU picks up, power supply of output relays will be connected. When both two detector elements and operational element pick up, the protection element will operate to trip.

3.2 Fault detectors


3.2.1 Using fault detector improves the security of tripping
The additional output blocking circuit controlled by general fault detectors calculated in MON module makes the output circuit more secure, because not only the relationship between tripping command sending and additional output blocking circuit is logic and in software, but also they keeps the logic and relationship in hardware. It is displayed in below figure.
+ 24 V
QDJ controlled by fault detectors in MON module trip relay trip contact

+ 24 V

tripping commands from CPU module

G1
1 1 >= 1 1

tripping transistor

"or" gate

Figure 3-1 Logic relationship of CPU and MON module QDJ contact is controlled by general fault detectors calculated independently in MON module.

When the contact closes, the DC source of tripping relay is provided. The function of gate G1 is to receive tripping commands sent from CPU module. When a tripping command arrives at the gate G1, the driving transistor will be activated, and the trip relays contact will close to trip the breaker. The general fault detectors calculated in MON module and operation elements calculated in CPU module use their independent data sampled by themselves, so the equipment will not operate by mistake due to any of modules data channels failure.

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Chapter 3 Description of Operation Theory

3.2.2 Differential protection of generator-transformer unit and main transformer


3.2.2.1 Fault detector of differential current of generator-transformer unit

I d max > [I_Pkp_PcntDiff_GTU]


Where:

(Equation 3-1)

I d max is the maximum value of three phase differential currents of generator-transformer unit. [I_Pkp_PcntDiff_GTU] is the setting of phase differential currents of generator-transformer
unit. It is used to release differential protection of generator-transformer unit. 3.2.2.2 Fault detector of differential current of main transformer

I d max > [ I _ Pkp _ PcntDiff _ Tr ]


Where:

(Equation 3-2)

I d max is the maximum value of three phase differential currents of main transformer. [I_Pkp_PcntDiff_Tr] is the setting of phase differential currents of main transformer.
It is used to release differential protection of main transformer. 3.2.2.3 Fault detector of DPFC differential current of main transformer

I d > 1.25I dt + I dth I d = I 1 + I 2 + ... + I m


Where:

(Equation 3-3)

I dt is the floating threshold value which will arise automatically and gradually according to
increasing of the output of deviation component. In order to ensure that the threshold value of voltage is slightly higher than the unbalance output, multiple 1.25 of the deviation component is reasonable.

I 1 . I m are the DPFC current of each side of transformer respectively. I d is the half-cycle integral value of differential current.
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Chapter 3 Description of Operation Theory

I dth is the fixed threshold.


This fault detector is not influenced by the direction of power flow and so it is very sensitive. The setting is fixed and need not to be set. It is used to release DPFC percentage differential protection.

3.2.3 Backup protection of main transformer


3.2.3.1 Fault detector of phase current of main transformer

I max > [ I _ OC1(2) _ Tr ]


Where: [I_OC1(2)_Tr] is the setting of overcurrent stage 1 or 2 of main transformer.

(Equation 3-4)

This fault detector will operate if maximum value of three phases current is higher than its setting value. It is used to release stage 1 or 2 of overcurrent protection. 3.2.3.2 Fault detector of DPFC of phase current of main transformer.

I > 1.25I t + I th
Where:

(Equation 3-5)

I t is the floating threshold which will arise automatically and gradually according to increasing of
the output of deviation component. In order to ensure that the threshold current is slightly higher than the imbalance value, multiple 1.25 of the deviation component is reasonable.

I is the half-wave integral of phase-to-phase current. I th is the fixed threshold of 0.2In and
need not to be set on site. This fault detector is used to release the distance protection at relevant side. 3.2.3.3 Fault detector of zero sequence current of main transformer

3I 0 > [ I _ ROC1(2,3) _ Tr ]
Where:

(Equation 3-6)

& +I & +I & . 3I 0 is calculated zero sequence current, 3I 0 = I A B C


[I_ROC1(2,3)_Tr] is the setting of overcurrent stage 1, 2 or 3 of main transformer. This fault detector will operate if the zero sequence current is higher than its setting value.
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Chapter 3 Description of Operation Theory

It is used to release calculated zero sequence overcurrent protection with stage 1, 2 or 3 at relevant side. 3.2.3.4 Fault detector of Gap zero sequence voltage of main transformer

3U 0 > [V_ROV_Gap_Tr]

(Equation 3-7)

This fault detector will operate if the zero sequence voltage of open-delta VT is higher than its setting value. It is used to release zero sequence overvoltage protection of Gap.

3.2.4 Differential protection of stepdown transformer


Fault detector of differential current of stepdown transformer.

I d max > [ I _ Pkp _ PcntDiff _ ST ]


Where:

(Equation 3-8)

I d max is the maximum value of three phase differential currents of stepdown transformer. [ I _ Pkp _ PcntDiff _ ST ] is the setting of phase differential currents of stepdown transformer.
It is used to release differential protection of stepdown transformer.

3.2.5 Backup protection of stepdown transformer


3.2.5.1 Fault detector of HV side phase current of stepdown transformer.

I max > [ I _ OC1(2) _ ST ]


Where:

(Equation 3-9)

I max is the maximum value of three phase currents at HV side of stepdown transformer.
[I_OC1(2)_ST] is the setting of overcurrent stage 1 or 2 at HV side of stepdown transformer. This fault detector will operate if maximum value of three phases current is higher than its setting value. It is used to release overcurrent protection at HV side. 3.2.5.2 Fault detector of HV side or LV side overcurrent protection of stepdown transformer

I max > [ I _ OC1 _ LVS ( HVS ) _ ST ]


Where:

(Equation 3-10)

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Chapter 3 Description of Operation Theory

I max is the maximum value of three phase currents at HV side or LV side of stepdown
transformer. [I_OC1_LVS(HVS)_ST] is the setting of overcurrent stage 1 at HV side or LV side of stepdown transformer. This fault detector will operate if maximum value of three phase currents of branch of auxiliary stepdown transformer is higher than its setting value. It is used to release overcurrent protection of branch of stepdown transformer. 3.2.5.3 Fault detector of HV side or LV side residual overcurrent of stepdown transformer

3I 0 > [ I _ ROC1 _ LVS ( HVS ) _ ST ]


Where:

(Equation 3-11)

3I 0 is directly-input zero sequence current of branch of stepdown transformer.


This fault detector will operate if the zero sequence current is higher than its setting value. It is used to release branch zero sequence overcurrent protection of stepdown transformer.

3.2.6 Fault detector of differential protection, phase-splitting transverse differential protection of generator
This fault detector of differential protection will pick up when any one of the following two elements is satisfied. 3.2.6.1 Fault detector of differential current of generator

I d max > [ I _ Pkp _ PcntDiff _ Gen]


Where:

(Equation 3-12)

I d max is the maximum value of three phase differential currents of generator. [I_Pkp_PcntDiff_Gen] is the setting of phase differential currents of generator.
It is used to release differential protection of generator. 3.2.6.2 Fault detector of DPFC differential current of generator

I d > 1.25I dt + I dth I d = I 1 + I 2 + ... + I m


(Equation 3-13)

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Chapter 3 Description of Operation Theory

Where:

I dt is the floating threshold value I 1 . I m are the DPFC current of each side of generator respectively. I d is the half-cycle integral value of differential current. I dth is the fixed threshold.
This fault detector is not influenced by the direction of power flow and so it is very sensitive. The setting is fixed and need not to be set on site. It is used to release DPFC percentage differential protection of generator. 3.2.6.3 Fault detector of phase-splitting transverse differential current of generator When the phase-splitting transverse differential current reaches pickup value of generator phase-splitting transverse differential protection [I_Pkp_PcntSPTDiff_Gen], the fault detector of it picks up. It is used to release phase-splitting transverse differential protection of generator.

3.2.7 Interturn fault protection of generator


3.2.7.1 Fault detector of transverse differential current of generator The fault detector will operate when the transverse differential current is greater than the setting [I_SensTrvDiff_Gen]. 3.2.7.2 Fault detector of longitudinal zero sequence voltage of generator The fault detector will operate when the longitudinal zero sequence voltage is greater than the setting [V_SensROV_Longl_Gen]. 3.2.7.3 Fault detector of DPFC direction of generator The fault detector will operate when the calculated directional element is met operating condition.

3.2.8 Earth fault protection of stator of generator


3.2.8.1 Fault detector of zero sequence overvoltage element The fault detector will operate when the calculated zero sequence voltage is in excess of the setting [V_SensROV_Sta]. 3.2.8.2 Fault detector of third harmonic ratio of stator The fault detector will operate when the ratio of 3rd harmonics voltage of neutral point to 3rd harmonics voltage at the terminal is greater than its ratio setting [k_V3rdHRatio_PreSync_Sta] or [k_V3rdHRatio_PostSync_Sta].
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Chapter 3 Description of Operation Theory

3.2.8.3 Fault detector of deviation of third harmonic of generator The fault detector will operate when the differential 3rd harmonic voltage of neutral point and 3rd harmonics voltage at the terminal of generator is greater than its setting [k_V3rdHDiff_Sta].

3.2.9 Generator rotor earth fault protection


3.2.9.1 Fault detector of one-point earth fault of generator The fault detector operates when grounded resistance of rotor is less than its setting [R_1PEF_RotWdg]. 3.2.9.2 Fault detector of two-point earth fault of generator The fault detector operates when change of location of ground point of rotor is greater than its internal setting.

3.2.10 Generator stator overload protection


3.2.10.1 Definite time overload fault detector The fault detector operates when maximum value of three phase currents is higher than its setting [I_OvLd_Sta]. 3.2.10.2 Inverse time overload fault detector The fault detector operates when inverse time accumulated value is higher than its setting [I_InvOvLd_Sta].

3.2.11 Negative sequence overcurrent protection of generator


3.2.11.1 Definite time negative sequence overload fault detector The fault detector operates when maximum value of negative sequence current is higher than its setting [I_NegOC_Sta]. 3.2.11.2 Inverse time overload fault detector The fault detector operates when inverse time accumulated value is higher than its setting [I_InvNegOC_Sta].

3.2.12 Generator loss-of-excitation protection


The fault detector operates when locus of calculated impedance enters into impedance circle.

3.2.13 Generator out-of-step protection


The fault detector operates when locus of calculated impedance leaves boundary of impedance operation zone.

3.2.14 Generator overvoltage protection


The fault detector operates when maximum value of three phase-to-phase voltage is higher than its setting.

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Chapter 3 Description of Operation Theory

3.2.15 Generator over excitation protection


3.2.15.1 Definite time over excitation Fault detector The fault detector operates when measured U/F is higher than definite time setting. 3.2.15.2 Inverse time over excitation Fault detector The fault detector operates when over excitation inverse time accumulated value is higher than inverse time setting.

3.2.16 Generator reverse power protection


When measured reverse power is greater than setting, the fault detector of reverse power of generator picks up.

3.2.17 Generator frequency protection


3.2.17.1 Under frequency fault detector The fault detector operates when frequency is lower than its setting for a specified time interval. 3.2.17.2 Over frequency fault detector The fault detector operates when frequency is higher than its setting for a specified time interval.

3.2.18 Generator accident energization protection


3.2.18.1 Fault detector of unwanted closing The fault detector operates when maximum phase current of generator is higher than setting of unwanted closing protection. 3.2.18.2 Fault detector of circuit breaker flashover The fault detector operates when negative sequence current of generator is higher than setting of circuit breaker flashover protection.

3.2.19 Startup and shutdown protection of generator


The fault detector operates when differential current of generator or excitation transformer is higher than its setting, or zero sequence voltage of generator is higher than its setting.

3.2.20 Differential and overcurrent protection of excitation transformer or exciter


3.2.20.1 Fault detector of differential current of excitation transformer or exciter The fault detector operates when maximum value of three phase differential currents is higher than its setting. 3.2.20.2 Fault detector of overcurrent of excitation transformer or exciter The fault detector operates when maximum value of three phase currents is higher than its setting.

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Chapter 3 Description of Operation Theory

3.2.21 Overload protection of exciter winding


3.2.21.1 Fault detector of definite time overload of exciter winding The fault detector operates when maximum value of three phase currents of exciter winding is higher than its definite time setting. 3.2.21.2 Fault detector of inverse time overload of exciter winding The fault detector operates when inverse time accumulated value is higher than inverse time setting.

3.2.22 Mechanical protection


The fault detector operates when duration of operation of mechanical protection is higher than its delay setting.

3.3 Theory of protective elements


3.3.1 Preparation knowledge of transformer
By applying the Ampere-turn balance on different transformer connections, the RCS-985A relay forms the current differential equations. During the normal operation, the magnitude and angle of secondary currents at each side of transformer are different due to different CT ratios, different voltage levels and different transformer connection groups. This kind of current differentiations shall be eliminated under normal operation and compensated in fact by a built-in compensation method. 3.3.1.1 Calculate rated primary current at each side of transformer

I b1n =
Where:

Sn 3U b1n

(Equation 3-14)

S n is the maximum rated capacity of all windings(i.e. [Sn_Tr]). U b1n is the rated phase-to-phase voltage at the calculated side of the transformer (i.e.
[U1n_HVS_Tr] or [U1n_LVS_Tr] .) 3.3.1.2 Calculate rated secondary current at each side of transformer

Ib2n =
Where:

I b1n nbLH

(Equation 3-15)

I b1n is the rated primary current at the calculated side of transformer.

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Chapter 3 Description of Operation Theory

nbLH is the ratio of CT at the calculated side of transformer.


3.3.1.3 Calculate the correction coefficient of each side of transformer

K ph =
Where:

I b 2 n b Ib2n

(Equation 3-16)

I b 2n is the rated secondary current at the calculated side. I b 2nb is the rated secondary current of base side.
The currents used in the following analysis have been corrected, that means the currents are the products of the original secondary current of each side multiplying its own correction coefficient ( K ph ). 3.3.1.4 Phase shift compensation By defining which particular connection group the protected transformer belongs to, the proper calculation routine will be applied. The following transforming method is based on the assumptions listed here: CTs at each side of transformer are connected in star type. Secondary currents of each CT are connected to the equipment directly. The positive polarity of CT at HV and MV side is at busbar side and that at LV side is at branch side or generator side. Polarity of each secondary winding of CT is as same as shown in Figure 1-1 to Figure 1-2. The secondary current phase shift compensation for all CTs are achieved by software, Y transform method is used for this purpose. For connection Y/-11, the correction equations are as follows: At side Y0:
' I A = (I A I B ) / 3 ' = I ( I I B B C)/ 3 ' I C = ( I C I A ) / 3

(Equation 3-17)

At side :

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Chapter 3 Description of Operation Theory


' I a = I a ' I b = I b ' I c = Ic

(Equation 3-18)

Where:

I A , I B , I C are the secondary currents of CT at side Y.


I ' A , I ' B , I ' C are the corrected current of each phase at side Y. I a , I b , I c are the secondary currents of CT at side .

I ' a , I ' b , I ' c are the corrected currents of each phase at side ;
For other connection typethe current can be calculated according to the equations listed above. The connection type can be selected by following logic settings (refer to chapter 7 power system parameters). [Yd11_Conn] [Yyd11_Conn] Note: If your actual transformer connection group is not included in above two groups, please let us know before you make the order.

3.3.2 Preparation knowledge of generator


3.3.2.1 Calculate rated primary current of generator

I f 1n =
Where:

Pn / cos 3U f 1n

(Equation 3-19)

Pn is the rated capacity of generator ([Pn_Gen]). cos is the power factor of generator ([PF_Gen]). U f 1n is the rated voltage at the calculated side of generator (i.e. [U1n_Gen] or
[U1n_VT_NP_Gen].)
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Chapter 3 Description of Operation Theory

3.3.2.2 Calculate rated secondary current of generator

I f 2n =
Where:

I f 1n n fLH

(Equation 3-20)

I f 1n is the rated primary current at the calculated side of generator. nbLH is the ratio of CT at the calculated side of generator. 3.3.3 Differential protection of generator-transformer unit, main transformer, stepdown transformer and excitation transformer
3.3.3.1 Percentage differential protection(SPDP) Figure 3-2 shows operation characteristic of this percentage differential protection.

Id

Operation area

Kbl2

Restraint area

Icdqd
0

Kbl1

Ie

nIe

Ir

Figure 3-2 Operation characteristic of percentage differential protection

Operation criterion of this percentage differential protection is

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Chapter 3 Description of Operation Theory

I d > K bl I r + I cdqd K bl = K bl1 + K blr ( I r / I e ) I d > K bl 2 ( I r nI e ) + b + I cdqd K blr = ( K bl 2 K bl1 ) /(2 n) b = ( K bl1 + K blr n) nI e I + I 2 + I3 + I 4 + I 5 Ir = 1 2 I = I 1 + I 2 + I 3 + I 4 + I 5 d
Where:

( I r < nI e ) ( I r nI e )

(Equation 3-21)

I d is differential current, I r is restraint current, I cdqd is pickup value of differential current fault detector I e is rated current. K bl is percentage differential restraint factor and K blr is its increment. K bl 1 is the first slope of percentage differential with setting range 0.05 0.15. 0.10 is applicable
usually.

K bl 2 is the second slope of percentage differential with setting range 0.50 0.80. 0.70 is
applicable usually. n is the multiple of restraint current at the second slope and is fixed at 6. Note: For differential current of generator-transformer unit and main transformer, definition is different for different program versions and can be found on individual project document. For differential current of stepdown transformer, I1 , I 2 and I 3 are currents of HV side, branches A/B on LV side of stepdown transformer respectively. I 4 as no definition yet.

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Chapter 3 Description of Operation Theory

For differential current of excitation transformer, I1 and I 2 are currents of HV side and LV side respectively. I 3 and I 4 have no definition yet. 3.3.3.2 High setting percentage differential protection element(HSDP) A percentage differential protection with high percentage and high setting is equipped with the equipment to prevent delayed operation of percentage differential protection caused by CT saturation and other factors during serious internal fault. This protection is blocked only by inrush current criterion i.e. second harmonic of differential current or waveform discrimination. It can prevent influence of steady state and transient CT saturation during external fault and can operate correctly and quickly during internal fault even if CT is in saturation condition. Operation criterion of this high setting percentage differential protection is:

I d > 1.2 I e I d > 1.0 I r


Where

(Equation 3-22)

I d is differential current as mentioned above. I r is restraint current as mentioned above.

Figure 3-3 Operation characteristic of steady state high setting percentage differential protection When fault occurs, the operation criterion will be discriminated phase by phase and percentage differential protection will operate if the criterion is met. For more detailed operation characteristic please see Figure 3-4. Note: Parameters of this protection have been fixed in program and do not need to be configured by
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Chapter 3 Description of Operation Theory

user. 3.3.3.3 Unrestrained instantaneous differential protection element(UIDP) The aim of unrestrained instantaneous differential protection for transformer is to accelerate the trip speed for transformers inner fault. So the element does not need any block element, but the setting should be greater than maximum inrush current. Its operation criterion is:

I d max > [I_InstDiff _ Tr ]


Where:

(Equation 3-23)

I d max is the maximum value of three-phase differential currents.


[I_InstDiff_Tr] is the setting of the unrestrained instantaneous differential protection of transformer. Note: All the settings mentioned below are from main transformer for example. Figure 3-4 shows operation characteristic of unrestrained instantaneous differential protection. 3.3.3.4 Operation characteristic of current differential protection

Figure 3-4 Operation characteristic of current differential protection

The meanings of

I cdqd , I d , I r , I e , K bl 1 and K bl 2 are described above.

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Chapter 3 Description of Operation Theory

I cdsd is the setting of unrestrained instantaneous differential protection [ I_InstDiff_Tr].


(1) Steady state percentage differential protection element (described in section 3.3.3.1) will not send tripping signal after CT saturation, CT circuit failure (optional), inrush current and overexcitation. It can ensure sensitivity of protection and avoid unwanted operation when CT is saturated during external fault. Its operation area is tint shadow area. (2) High setting percentage differential protection element (described in section 3.3.3.2) will not send tripping signal only after CT circuit failure (optional) and inrush current. It eliminates influence of transient and steady saturation of CT during external fault and ensures reliable operation even if CT is in saturation condition during internal fault by means of its percentage restraint characteristic. Its operation area is deep shadow area. (3) Unrestrained instantaneous differential protection element (described in section 3.3.3.3) will send tripping signal without any blocking if differential current of any phase reaches its setting. Its operation area is over the above two areas with no shadow. 3.3.3.5 Inrush current detection element Second harmonic restraint principle

In the equipment, the second harmonic of differential current can be used to distinguish inrush current. Its operation criterion is:

I 2 nd > K 2 xb I1st
Where:

(Equation 3-24)

I 2 nd is the second harmonic of each phase differential current. I1st is the differential fundamental current of corresponding phase. k 2 xb is the setting of restraint coefficient of second harmonic [k_Harm_PcntDiff_Tr]. k 2 xb = 0.15 is
recommended. Waveform distortion discrimination principle

During internal fault, differential currents of various sides transferred by CT are basically fundamental sinusoidal wave. But when the transformer is energized, lots of harmonics occur. The waveform is intermittent and unsymmetrical. A special algorithm can be used for discrimination of the inrush current. During internal fault, following relation exists:

S > kb*S + S > S t


44

(Equation 3-25)

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Where: S is the full cycle integral of differential current;

S + is full cycle integral of the sum of instantaneous value of differential current and that of half
cycle before.

kb is a fixed constant. S t is a threshold value which can be represented as follows: S t = * I d + 0.1* I e


Where: (Equation 3-26)

I d is the full cycle integral of differential current. is a proportional constant. I e is the secondary rated current of transformer.
If any one of three phases can not meet above equation, the differential current can be considered as inrush current and percentage differential relay will be blocked. In this protection equipment, logic setting [Opt_Inrush_Ident_Tr] is provided for user to select the restraint blocking principle. If the logic setting is set as 0, discrimination by harmonics is enabled. Otherwise, discrimination by waveform distortion is enabled. 3.3.3.6 CT saturation detection element In order to prevent unwanted operation of steady state percentage differential protection caused by transient or steady state saturation of CT during external fault, composite harmonics of secondary differential current is used for the protection equipment to discriminate saturation of CT. The expression is as following:

I cop > K nxb I1


Where:

(Equation 3-27)

I cop is the composite harmonics of phase differential current. I1 is the fundamental component of corresponding phase differential current. knxb is proportional coefficient.
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Chapter 3 Description of Operation Theory

When fault occurs, if DPFC of restraint current and DPFC of differential current appear simultaneously, this is an internal fault. If DPFC of restraint current appears before DPFC of differential current, this maybe an external fault and criterion of CT saturation shall be adopted in this case. So unwanted operation of percentage differential protection due to CT saturation can be prevented. 3.3.3.7 Differential current abnormality alarm and CT circuit failure blocking function Differential current abnormality alarm with percentage restraint (see section 3.3.26.2) and instant CT circuit failure blocking function (see section 3.3.26.3) are equipped with the equipment. CT circuit failure blocking function can be configured by logic setting [Opt_CTS_Blk_PcntDiff_Tr]. When such failure occurs and is discriminated, issuing alarm signal only or blocking percentage differential protection is optional. If the logic setting is set as 1, percentage differential protection will be blocked immediately. 3.3.3.8 Overexcitation detection element When a transformer is overexcited, the exciting current will increase sharply which may result in unwanted operation of differential protection. Therefore the overexcitation shall be discriminated to block the current differential protection. The fifth harmonic of differential current is used as criterion of overexcitation discrimination.

I 5th > k5 xb * I1st


Where:

(Equation 3-28)

I1st is fundamental component of differential current. I 5th is fifth harmonic of differential current. k5 xb is the fifth harmonic restraint coefficient, it is fixed at 0.25.
Note: High setting percentage differential protection is not blocked by fifth harmonic of differential current.

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3.3.3.9 Logic scheme of steady state differential protection

Figure 3-5 Logic diagram of differential protection Where: UIDP element indicates that the criterion of UIDP element is met. HSDP element indicates that the criterion of HSDP element is met. SPDP element indicates that the criterion of SPDP element is met. EBI_Diff_Tr: binary input for enabling differential protection of transformer [En_PcntDiff_Tr]: logic setting for enabling percentage differential protection of transformer [En_InstDiff_Tr]: logic setting for enabling unrestrained instantaneous differential protection of transformer Op_InstDiff_Tr: operation of unrestrained instantaneous differential protection of transformer.

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Chapter 3 Description of Operation Theory

Op_PcntDiff_Tr: operation of percentage differential protection of transformer.

3.3.4 Differential protection, phase-splitting transverse differential protection of generator and differential protection of exciter
3.3.4.1 Percentage differential protection(SPDP) Operation characteristic of this percentage differential protection is as shown as Figure 3-6. Id Icdsd
unrestraint operation area

operation area

Kbl2 restraint area

Kbl1

Icdqd
0

Ie

nIe

Ir

Figure 3-6 Operation characteristic of percentage differential protection Operation equation of this percentage differential protection is

I d > K bl I r + I cdqd K bl = K bl 1 + K blr ( I r / I e ) I d > K bl 2 ( I r nI e ) + b + I cdqd K blr = ( K bl 2 K bl 1 ) /(2 n) b = ( K bl 1 + K blr n) nI e


I 1+ I2 Ir = 2 I d = I 1 I 2

( I r < nI e ) ( I r nI e )

(Equation 3-29)

Where:

I d is differential current, I r is restraint current, I cdqd is pickup value of differential current I e is rated current of generator.
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Chapter 3 Description of Operation Theory

K bl is percentage differential restraint coefficient and K blr is its increment. K bl 1 is the first slope of percentage differential with setting range 0.05 0.15. 0.05 is
recommended usually.

K bl 2 is the second slope of percentage differential with setting range 0.30 0.70. 0.50 is
recommended usually. n is the multiple of restraint current at second percentage restraint coefficient and is fixed at 4. For differential protection of generator and exciter, I1 and I 2 are currents of terminal and neutral point respectively. 3.3.4.2 High performance blocking technique during CT saturation In order to prevent unwanted operation of steady state percentage differential protection due to CT transient or steady state saturation during external fault, discrimination of waveform of differential current principle is adopted as criterion of CT saturation. When fault occurs, the equipment decides firstly whether it is internal or external fault. If it is external fault, criterion of CT saturation is enabled. If any phase differential current of differential protection meets the criterion, it is decided that this differential current comes from CT saturation and the percentage differential protection will be blocked. 3.3.4.3 High setting percentage differential protection(HSDP) A percentage differential protection with high percentage and high setting is equipped with the equipment to prevent operation of percentage differential protection delayed by CT saturation and other factors during serious internal fault. It can prevent influence of steady state and transient CT saturation during external fault due to its percentage restraint characteristic and can operate correctly and quickly during internal fault and CT being saturated. Operation criterion of this high setting percentage differential protection is

I d > 1.2 I e I d > 1.0 I r


Where:

(Equation 3-30)

Differential current I d and restraint current I r are the same as mentioned above. When fault occurs, the operation criterion will be discriminated phase by phase and percentage differential protection will operate if the criterion is met. Parameters of this protection are configured during manufacturing and not need to be configured in site.
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Chapter 3 Description of Operation Theory

3.3.4.4 Unrestrained differential protection(UIDP) This protection will operate and trip immediately if differential current of any phase is higher than its setting. 3.3.4.5 Differential current abnormality alarm and CT circuit failure blocking function Differential current abnormality alarm with percentage restraint (see section 3.3.26.2) and instant CT circuit failure blocking function (see section 3.3.26.3) are equipped with the equipment. CT circuit failure blocking function can be configured by logic setting [Opt_CTS_Blk_PcntDiff_Gen]. When such failure occurs and is discriminated, issuing alarm signal only or blocking percentage differential protection is optional. If the logic setting is set as 1, percentage differential protection will be blocked immediately. 3.3.4.6 Logic diagram of percentage differential protection
UIDP element EBI_Diff_Gen =1 [En_Diff_Gen] =1 [En_InstDiff_Gen] =1 FD_Diff_Gen =1 HSDP element
EBI_Diff_Gen =1

&

&

Op_InstDiff_Gen

&

&

&

[En_Diff_Gen] =1 [En_PcntDiff_Gen] =1 CTS element

>=1
FD_Diff_Gen =1 CT saturation detection element SPDP element EBI_Diff_Gen =1 [En_Diff_Gen] =1 [En_PcntDiff_Gen] =1 CTS element

Op_PcntDiff_Gen

&

&

&

FD_Diff_Gen =1

Figure 3-7 Logic diagram of percentage differential protection of generator or exciter Where: EBI_Diff_Gen is the position flag of binary input for enabling all kinds of differential protection of generator. FD_Diff_Gen is the internally generated flag indicating that fault detector of differential protection
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Chapter 3 Description of Operation Theory

picks up. CTS element indicates that CT supervision program detects failure of CT circuit with no delay considered into account. CT saturation detection element indicates that CT is in saturation condition.

3.3.5 DPFC Current Differential Element


If slight fault occurs in generator or transformer, steady state differential protection may not response sensitively due to influence of load current. DPFC percentage differential protection of generator and transformer is equipped with the equipment for that and it can significantly improve sensitivity of the protection during small current internal fault of generator and transformer. 3.3.5.1 Operation characteristic of DPFC The operation criteria of DPFC percentage differential are as follows:

I d > 1.25I dt + I dth I d > 0.6I r I > 0.75I 0.3I r e d

I r < 2 I e I r > 2 I e
(Equation 3-31)

I r = I1 + I 2 + I 3 + I 4 I I I I I = + + + 1 2 3 4 d
Where:

I dt is floating threshold which increases progressively along with DPFC increasing. Take its
multiple as 1.25 can ensure threshold voltage always a bit higher than imbalance current. So that unwanted operation of the equipment can be avoided during power swing and frequency deviation conditions. For differential protection of main transformer, I1 , I 2 , I 3 and I 4 are DPFCs of currents of sides 1 and 2 at HVS of main transformer, terminal of generator and HV side of stepdown transformer respectively. For differential protection of generator, I1 and I 2 are currents at the terminal of generator and neutral point respectively. I 3 and I 4 have not specified. For split phase transverse differential protection, I1 and I 2 are currents of two branches of neutral point.

I d is DPFC of differential current. I dth is fixed threshold. I r is DPFC of restraint current


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Chapter 3 Description of Operation Theory

whose maximum value is taken for actual restraint. Note: Calculation of restraint current of DPFC percentage differential protection is different from the steady state percentage differential protection, it is difficult to test this function on site, so we recommend only qualitative function test on site. DPFC differential protection is equipped to each phase of generator, but user should know that the restraint DPFC quantity for every phase is the same maximum value among the three phases. The following figure shows operating characteristic of DPFC percentage differential protection.
? Id differential current

0.75

Icdqd

0.6 restraint current 2 Ie ? Ir

Figure 3-8 Operating characteristic of DPFC percentage differential protection

When fault occurs, the operation criterion will be discriminated phase by phase and percentage differential protection will operate if the criterion is met. For DPFC percentage differential protection of main transformer, second harmonic or waveform inrush current blocking and fifth harmonic over excitation blocking are adopted. It can prevent influence of steady state and transient CT saturation during external fault due to its percentage restraint characteristic. This protective element has high ability to eliminate the effect of transient and steady saturation of CT during the external fault because the restraint coefficient is set at a higher value.

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3.3.5.2 Logic scheme of DPFC differential protection

Figure 3-9 Logic diagram of DPFC percentage differential protection In the figure: Op_DPFC_Diff_Gen is the internally generated flag indicating equation 3-31 is meet. EBI_Diff_Gen is the position flag of binary input for enabling all kinds of differential protection of generator. Flg_IntanCTS is the internally generated flag indicating that CT supervision program detects failure of CT circuit with no delay considered into account. Settings of DPFC percentage differential protection is are fixed and need not to be set on site.

3.3.6 Restrict earth fault protection of main transformer or stepdown transformer (REF)
Restricted earth fault (REF) protection is also called zero-sequence differential protection, which includes zero-sequence percentage differential protection element and unrestrained instantaneous zero-sequence differential protection element. REF protection is used to protect the auto-transformer or the transformer with neutral point earthed with/without resistance. 3.3.6.1 Amplitude ratio compensation If CTs used for REF have different ratios, then the ratio compensation is needed. Here is the method.

K ph =

K TA K TA _ max

Kb

K b = min(

K TAmax ,4) K TAmin

(Equation 3-32)

Where:

K TA is the CT ratio at calculated side. K TA _ min is the minimum CT ratio among all side. K TA _ max is the maximum CT ratio among all side.
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Chapter 3 Description of Operation Theory

In principle, this method take the minimum rated secondary current of all sides as the base of calculation and all other sides will be considered as its multiples. If ratio of the maximum CT ratio to minimum CT ratio is larger than 4, the multiple of the maximum to minimum will be taken as 4 and other side will be calculated proportionally. If ratio of the maximum to minimum is less than 4, the multiple of the minimum rated current will be taken as 1, and other side will be calculated proportionally. Thus the maximum setting range of current ration correction coefficient K ph of each side can be up to 4. The currents used in the following analyze are based on the assumption that they have been adjusted, that means the currents are the products of original current of each side and its own adjustment coefficient ( K ph ). 3.3.6.2 Principle of zero-sequence percentage differential protection (PcntREF) Zero-sequence percentage differential protection is used for earth fault at HV side of main transformer(Wye connection), LV side of stepdown transformer(Wye connection). Its operation criteria are as follows:

I 0 d > I 0 cdqd I > K I 0bl 0r 0d I 0 r = max{ I 01 , I 02 , I 03 , I 0 n } I 0 d = I 01 + I 02 + I 03 I 0 n


Where:

(Equation 3-33)

I 01 , I 02 , I 03 are zero sequence currents of branches A1, A2, A3.

For HV side of main

transformer, there are only one branch I 01 and other branches have no definition. For LV side of stepdown transformer, I 01 , I 02 , I 03 are zero sequence currents of branches A1, A2, A3 according to the actual situation.

I 0 n is zero sequence current on neutral point side. I 0cdqd is the pick up setting of zero-sequence percentage differential protection. I 0 d is zero-sequence differential current. I 0r is zero-sequence restraint current.

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Chapter 3 Description of Operation Theory

k 0 bl is the setting of percentage restraint coefficient of zero-sequence percentage differential


protection.

k 0 bl = 0.5 is recommended;

When equation above is satisfied, the zero-sequence percentage differential protection will operate. Zero-sequence differential currents on various sides except neutral point are got from internal calculation, and the polarity check of zero-sequence current transformers (CT) on various sides is not needed. Figure 3-10 shows operation characteristic of this zero-sequence percentage differential protection. 3.3.6.3 Unrestrained instantaneous zero-sequence differential protection (UIREF) The aim of unrestrained instantaneous zero-sequence differential protection for transformer is to accelerate the trip speed for transformers inner earth fault with high fault resistance. So the element does not need any block element, but the setting should be greater than maximum inrush current. The operation of this protection shall trip all breakers at all sides of a transformer when any unrestrained zero-sequence differential current is higher than its setting. Its operation criterion is:

I 0d > [ I _ InstREF ]
Where:

(Equation 3-34)

I 0 d is the zero-sequence differential currents.


[I_InstREF] is the setting of the unrestrained instantaneous zero-sequence differential protection. Figure 3-10 shows operation characteristic of this unrestrained instantaneous differential protection.
Operation area of UIREF Operation area of PcentREF

It

Figure 3-10 Operating characteristic of restricted earth fault protection


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Chapter 3 Description of Operation Theory

The meaning of I 0 d , I 0 r , K 0 bl , and I 0 cdqd has been described.

I t will be automatically changed according to the pickup current I 0cdqd and restrict coefficient K 0bl .
3.3.6.4 Prevention of unwanted operation due to difference of CT transient characteristics Difference of transient characteristic and saturation of CT will increase zero sequence current in differential scheme during external three-phase short circuit fault. In order to eliminate this effect, positive sequence current restraint blocking criterion and CT saturation criterion are used. Positive sequence current restraint principle can be expressed as following:

I 0 > 0 * I1
Where:

(Equation 3-35)

I 0 is the zero sequence current at one side. I1 is its corresponding positive sequence current.
0 is a proportional coefficient.
The relay also adopts 2nd harmonic component to identify the CT saturation. 3.3.6.5 Zero sequence differential current abnormality alarm When the zero sequence differential current is above the alarm setting [I_Alm_REF] for 10s, the circuit alarm for REF protection [Alm_REF] will be issued. But the REF protection is also in service. 3.3.6.6 Logic scheme HV side of main transformer and LV side of stepdown transformer have restricted earth fault protection and their logics are same. Here take HV side of main transformer as an example.

Figure 3-11 Logic diagram of restricted earth fault protection at HV side of main transformer
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Chapter 3 Description of Operation Theory

Op_REF_Tr: restricted earth fault protection of main transformer. EBI_REF_Tr: binary input of REF of main transformer is 1. [En_EF_Tr]: enable earth fault protection of main transformer.

3.3.7 Backup protection of main transformer


3.3.7.1 Phase-to-phase impedance protection 3.3.7.1.1 Operation characteristic of impedance protection Impedance protection is used as backup protection of generator-transformer unit. Three kinds of impedance characteristic can be selected, i.e., circular impedance, directional circular impedance and drifted circular impedance characteristics. Circular impedance characteristic suits case of forward setting of a zone being equal to its reverse setting. Directional circular impedance characteristic suits case of reverse setting of a zone being set as 0. Drifted circular impedance characteristic suits case of forward setting of a zone being higher than its reverse setting. Reach angle of impedance protection is 78 . Positive direction of the impedance protection is configurable and generally points to transformer. Figure 3-12 shows operation characteristic of impedance element. In this figure, I is current of a phase, U is corresponding phase-to-phase voltage, Zn is reverse impedance setting, Zp is forward impedance setting.

jX

I Zp m

U I Zp

I Zn

U + I Zn

Figure 3-12 Operation characteristic of impedance element

Operation criterion:

90 < Arg
o

(U I Z P ) (U + I Z n )

< 270 o

(Equation 3-36)

The fault detector of impedance protection adopts DPFC of phase current and negative sequence current. Initiation of the fault detector will be lasted for 500 ms and will be kept if impedance relay operates during this time interval. Operation criterion of the fault detector is

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Chapter 3 Description of Operation Theory

I > 1.25I t + I th
Where:

(Equation 3-37)

I t is floating threshold which increases progressively along with DPFC increasing. Take its
multiple as 1.25 can ensure threshold current always a bit higher than imbalance current. So that unwanted operation of the equipment can be avoided during system swing and frequency deviation conditions.

I th is the fixed threshold. When DPFC of phase-to-phase current is higher than 0.3 Ie, the fault
detector operates. The impedance protection will be disabled automatically if the VT circuit failure is discriminated. 3.3.7.1.2 Logic diagram of distance protection of transformer
Flg_VTS =0 Z1 Element & [En_PPF_Tr] =1 EBI_PPF_Tr =1 FD_Dist_HVS & t Impedance protection tripping &

Figure 3-13 Logic diagram of distance protection of transformer

Where: Z1 Element is internally generated indicating that distance protective element of transformer operates. EBI_PPF_Tr is position flag of binary input for enabling phase-to-phase backup protection of HV side which including phase-to-phase distance protection and voltage-controlling overcurrent protection. 1 means enabled. 3.3.7.2 Voltage controlled overcurrent protection of main transformer Function of overcurrent protection with composite voltage blocking is equipped with RCS-985A. This protection, consisting of 2 stages and 2 time delays per stage, is used for phase-to-phase backup protection of main transformer. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting. 3.3.7.2.1 Voltage control element The voltage control element is an element which will operate if phase-to-phase voltage is lower than its setting or negative sequence voltage is higher than its setting. Criteria:

U < [Vpp_VCE_Tr] Or U 2 > [V_NegOV_VCE_ Tr]


58

(Equation 3-38)

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Chapter 3 Description of Operation Theory

Where:

U is phase-to-phase voltage of local side. U 2 is negative sequence voltage of local side.


[Upp_VCE_Tr] is setting of undervoltage control element of local side. [U2_VCE_Tr] is setting of negative-sequence overvoltage control element of local side. All two stages of definite time overcurrent protection can be controlled by voltage element by configuring related logic settings [En_VCE_Ctrl_OC1_Tr] and [En_VCE_Ctrl_OC2_Tr]. Meanwhile, User can decide by which side voltage overcurrent protection be controlled by configuring related settings. For example, if the setting [En_LVS.VCE_Ctrl_OC_Tr] is set as 1, then the overcurrent protection is controlled not only by HV side voltage element but also by LV side voltage element. 3.3.7.2.2 Function of current memory For self and parallel-excited generator, current will decrease so quick during fault that it may be lower than overcurrent setting before tripping. So function to remember fault current is equipped with this protection. Logic setting [En_Mem_Curr_Tr] is used for configuration of this function. Note: When logic setting [En_Mem_Curr_Tr] is enabled, the overcurrent must be controlled by voltage element. 3.3.7.2.3 Influence of VT circuit failure on voltage control element When VT on one side is under maintenance or bus-tie breaker is used for the transformer but its VT has not been switched over to the protection equipment, VT circuit failure is detected. Logic setting [Opt_VTS_Ctrl_OC_Tr] is used to configure performance of voltage control element during VT circuit failure. When this logic setting is set as 1, if VT circuit failure is detected, the voltage control element cannot pick up and the protection will not operate. When this logic setting is set as 0, if this side VT circuit failure is detected, voltage control element is forced to be satisfied, then the voltage controlled directional overcurrent protection will becomes a pure overcurrent protection.

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Chapter 3 Description of Operation Theory

3.3.7.2.4 Logic diagram of voltage controlled overcurrent protection of transformer


Upp< [Vpp_VCE_Tr] U2>[V_NegOV_VCE_ Tr] 1 Flag_VTS=1 & [Opt_VTS_Ctrl_OC_Tr]=1 1 & >=1 & & >=1 1 & t Op_OCn_Tr >=1 & >=1 Composite voltage operates

[En_Mem_Curr_Tr]=1 Overcurrent element Composite voltage operates [En_VCE_Ctrl_OCn_Tr]=1 [En_PPF_Tr]=1 EBI_PPF_Tr=1

FD of OC prot

Figure 3-14 Logic diagram of voltage controlled overcurrent protection of transformer

Where: Flag_VTS is the internally generated flag indicating the failure of VT circuit. [Opt_VTS_Ctrl_OC_Tr] is the setting to configure the VCE mode under VT failure. [En_Mem_Curr_Tr] is the setting to enable/disable the function of current memory. Overcurrent element indicates that the maximum phase current is above the settings. [En_VCE_Ctrl_OCn_Tr] is the setting to enable/disable the VCE element in stage n of overcurrent protection of transformer. [En_PPF_Tr] is the setting to enable/disable phase to phase fault protection. EBI_PPF_Tr is the binary input to enable/disable phase to phase fault protection. Op_OCn_Tr indicates that the stage n of overcurrent protection operates. 3.3.7.3 Zero sequence directional overcurrent protection of transformer Zero sequence overcurrent relay is mainly used as backup protection of ground fault for transformer with neutral point earthed. Two stages and two time delays zero sequence overcurrent relay is equipped with RCS-985A. The zero sequence current is usually adopted from neutral point CT. By setting logic settings, following functions of any stages of this protection can be selected: Whether it will be controlled by directional relay;

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Chapter 3 Description of Operation Theory

Whether it will be controlled by zero sequence voltage; Whether it will be enabled or disabled.

3.3.7.3.1 Direction element The direction of zero sequence overcurrent protection points to system definitely with the reach angle 75. If the VT failure at HV side occurs, the directional element will not work. The voltage used by directional relay is definitely the calculated voltage. The direction mentioned above is based on the CT positive polarity for calculated zero sequence current being at the side of busbar. The details are shown in Figure 1-1 to Figure 1-2. Figure 3-15 shows operating characteristic of directional protection in which the hatched area is operation zone.

3U0 f I o
Point to system
Figure 3-15 Operating characteristic of zero sequence directional overcurrent protection
lm =

75

3.3.7.3.2 Zero sequence voltage element Zero sequence voltage element uses definitely the open-delta voltage of VT. 3.3.7.3.3 Logic diagram of zero sequence overcurrent protection
3U0>[V_ROV_VCE_Tr] [En_VCE.ROV_Ctrl_ROCn_Tr]=1 Zero directional element [En_Dir_Ctrl_ROCn_Tr]=1 Zero sequence overcurrent element [En_EF_Tr]=1 EBI_EF_Tr=1 FD of ROC 1 & 1 >=1 & >=1

&

Op_ROCn_Tr

Figure 3-16 Logic diagram of zero sequence overcurrent protection of transformer


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Chapter 3 Description of Operation Theory

Where: [En_VCE.ROV_Ctrl_ROCn_Tr] is used to select whether zero sequence overcurrent relay will be blocked by zero sequence overvoltage. If the logic setting is set as 1, it will be blocked by zero sequence overvoltage. [En_Dir_Ctrl_ROCn_Tr] is used to select whether stage n of zero sequence overcurrent relay is control by directional relay. If this logic setting is set as 1, the stage n of zero sequence overcurrent protection will be controlled by directional relay. Zero directional element indicates that the criterion of directional element is met. Zero sequence overcurrent indicates that the zero sequence current is above the setting. En_EF_Tr is the setting to enable/disable the earth fault protection of transformer. EBI_EF_Tr is the binary input to enable/disable the earth fault protection of transformer. Op_ROCn_Tr indicates that the stage n of zero sequence overcurrent protection operates. 3.3.7.4 Gap zero sequence overvoltage protection Gap zero sequence overvoltage protection is used for backup protection of main transformer with neutral point ungrounded or grounded through gap. Zero sequence overvoltage protection with one stage and two time delays is equipped for RCS-985A. Zero sequence overvoltage protection can be enabled by link of the protection panel as well as external contact input. If the setting [En_BI_Ctrl_ROC_Gap_Tr] is set as 0, the Gap ROV protection is controlled by the link only. If the setting [En_BI_Ctrl_ROC_Gap_Tr] is set as 1, the Gap ROV protection is enabled only when both the link is closed and binary external input (BI_Reserved) is 1. 3.3.7.5 Zero sequence voltage alarm at LV side of main transformer According to the case that circuit breaker is equipped at the terminal of generator, a zero sequence voltage alarm can be provided on main transformer LV side as the supervision of earthing fault. The voltage setting is usually set as 10V to 15V. The alarm can be enabled or disabled by logic setting [En_Alm_ROV_LVS_Tr]. The function outputs alarm signals. To RCS-985A, AC voltage input is from connectors (19, 20) of 10B. 3.3.7.6 VT circuit failure supervision VT circuit failure supervision principle refers to section 3.3.27. 3.3.7.7 Protection of other failures Overload alarm and initial cooling are equipped with backup protection of HV side of main transformer. Overload alarm and initial cooling can be enabled or disabled by logic settings [En_OvLd_Tr] and [En_InitCool_OvLd_Tr]. Outputs of initial cooling are three normal open contacts.

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3.3.8 Interturn fault protection of generator


3.3.8.1 High sensitive transverse differential protection Transverse differential protection installed on connection between two neutral points of generator is used as main protection of short circuit interturn fault of generators stator winding, open circuit fault of branches and short circuit fault between phases. Since this protection adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can response the fundamental component only. This protection comprises two stages: unsensitive stage (high setting stage) and sensitive stage. 3.3.8.2 High setting stage of the protection This stage is equivalent to traditional transverse differential protection. When the transverse differential current is in excess of the setting [I_UnsensTrvDiff_Gen], the protective element operates. 3.3.8.3 Sensitive stage of the protection Phase current percentage restraint principle is used for this stage. The operation criterion is

I d > I hcZD I MAX I e I > (1 + K ) I hcZD d hcZD I e


Where:

when when

I MAX I e I MAX > I e

(Equation 3-39)

I d is the transverse differential current , I hcZD is the transverse differential current setting [I_SensTrvDiff_Gen], I MAX is the maximum value of three phase current of generator, I d is the rated current of generator K hcZD is the restraint coefficient.
Phase current percentage restraint transverse differential principle can ensure no unwanted operation during external fault and sensitive operation during internal fault. As this principle is adopted, current setting of the transverse differential protection shall be only higher than unbalance current during normal operation and much less than that of traditional transverse differential current protection. Sensitivity for interturn fault of generator can be enhanced then. This protection has also a floating threshold for high transverse differential unbalance current
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during other normal operation conditions. Operation of the high sensitive transverse differential protection will lead a tripping immediately. When rotor of generator is grounded at one point, a configurable time delay [t_TrvDiff_Gen] will be inserted in the tripping course. Figure 3-17 shows logic diagram of this protection. 3.3.8.4 Logic diagram of sensitive transverse differential protection
Alm_1PEF_Rot =1 [En_1PEF_Rot] =1 [En_Alm_1PEF_Rot] =1 Op_TransDiff_Gen =1 [En_IntTurn_Gen] =1 [En_Sens_TransDiff_Gen] =1 EBI_IntTurn_Gen =1 FD_TransDiff_Gen =1 & & & t >=1 Sensitive transverse diffrential protection tripping

&

&

Figure 3-17 Logic diagram of transverse differential protection of generator

Where: Alm_1PEF_Rot is internally generated flag indicating the one-point earth fault protection of rotor operates. EBI_1PEF_Rot is position flag of binary input for enabling one-point earth fault protection of rotor. 1 means enabled. EBI_IntTurn_Gen is position flag of binary input for enabling interturn protection of generator, including transverse differential protection, longitudinal zero sequence voltage protection and directional DPFC protection. 1 means enabled. 3.3.8.5 Longitudinal zero sequence voltage protection Longitudinal zero sequence voltage protection is configured for inter-turn fault of stator winding of generator. It uses open-delta voltage of dedicated VT at the terminal of generator as the criterion. Since this protection adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can response the basic wave component only. This protection comprises two stages: unsensitive stage (high setting stage) and sensitive stage. High setting stage of the protection

Setting of this stage shall be higher than maximum unbalance voltage during external fault, whilst directional flag indicating internal fault must be satisfied. When measured longitudinal zero sequence voltage is in excess of the setting [V_UnsensROV_Longl_Gen] and lasts for longer than the delay setting [t_ROV_Longl_Gen], this protective element will trip breakers according to the configuration of [TrpLog_IntTurn_Gen].
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Sensitive stage of the protection


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Phase current percentage restraint principle is used for this stage. The operation criterion is

U zo > [ 1 + K zo I m / I e ] U zozd Im = 3 I2 when I MAX < I e when I MAX I e I m = (I MAX - Ie ) + 3 I 2


Where:

(Equation 3-40)

U zozd is the zero sequence voltage setting [V_SensROV_Longl_Gen], I MAX is the maximum value among three phase current of generator, I2 is the negative sequence current of generator, I e is the rated current of generator K z 0 is the restraint coefficient.
Likely to transverse differential principle, this protective element can ensure no unwanted operation during external fault and sensitive operation during internal fault. As for the percentage restraint characteristic, zero sequence voltage setting of the zero sequence voltage protection shall be only higher unbalance voltage during normal operation. Sensitivity for interturn fault of generator can be enhanced then. This protective element has also a floating threshold for high unbalance longitudinal zero sequence voltage during other operation conditions. Operation of this element is usually configured to be delayed shortly by 0.1 s 0.2 s. 3.3.8.6 VT circuit failure alarm and blocking Longitudinal zero sequence voltage protection for inter-turn fault of stator shall be blocked when the dedicated VT2 circuit at the terminal of generator fails. There are two criteria to decide to whether or not block the protection. Criterion 1 (including 3 sub-criteria): Negative sequence voltage of VT1: Negative sequence voltage of VT2: 3U2 < U2_set1; 3U2 < U2_set2;

Calculated zero sequence voltage of VT2: 3U0>Uozd(zero sequence voltage setting). In the above three criterion, if one of the former two and the third are met simultaneity, the longitudinal zero sequence voltage protection will be blocked. Criterion 2 (including 3 sub-criteria):
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| U AB - U ab | > 5V | U BC - U bc | > 5V | U CA - U ca | > 5V


Where: U AB , U BC , U CA are phase-to-phase voltages of VT1 and U ab , U bc , U ca are phase-to-phase voltages of VT2. That one of these three sub-criteria is met means criterion 2 picks up. When any of criterion 1 and criterion 2 operates, alarm of VT2 circuit failure will be issued by delay 40 ms and zero sequence voltage protection will be blocked. After VT circuit failure reverting to normal condition, blocking can be released by pressing the Target-reset button on the faceplate of the protection. 3.3.8.7 Longitudinal zero sequence voltage protection logic diagram
Op_LongiROV_Sta =1 Flg_VTS =0 [En_IntTurn_Gen] =1 [En_SensROV_Longl_Gen] =1 EBI_IntTurn_Gen =1 FD_IntTurn_Sta =1

(Equation 3-41)

& & & t

longitudinal zero sequence voltage protection trips

Figure 3-18 Logic diagram of longitudinal zero sequence voltage protection

Where: Op_LongiROV_Sta is internally generated flag indicating the longitudinal zero-sequence overvoltage protection of stator operates. 3.3.8.8 Directional DPFC protection for interturn fault The operation criterion is:

F Re[ U 2 I 2 e j ] > + 1.25 dF U 2 > 0.5V + 1.25du I 2 > 0.02In + 1.25di

(a)

(b)

(Equation 3-42)

(c)

If the three criterions are met simultaneity, the directional flag of protection is set. Under negative sequence voltage and negative sequence current controlling, the protection operates after 0.2-0.5s time delay.

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AC current and voltage input of directional DPFC protection are from the generator terminal directly. When the VT1 at the generator terminal fails, directional DPFC protection is blocked. The setting is default setting. The sensitivity is about 3V of longitudinal zero sequence voltage. Directional DPFC protection for inter-turn fault cant response to inter-turn fault before the generator is connected into the power system.

3.3.9 Backup protection of generator


3.3.9.1 Phase-to-phase impedance protection Two stages impedance protection is equipped at the terminal of generator as its phase-to-phase backup protection. Phase-to-phase current used in impedance relay is derived from CT at the neutral point of generator. Circular impedance, directional circular impedance or drifted circular impedance characteristic can be selected to act for these two stages. Circular characteristic suits case of forward setting of a zone being equal to its reverse setting. Directional circular characteristic suits case of reverse setting of a zone being set as 0. Drifted circular characteristic suits case of forward setting of a zone being higher than its reverse setting. Reach angle of impedance protection is 78. Positive direction of the impedance protection is configurable and generally points to generator. Figure 3-19 shows operation characteristic of impedance element. In this figure, I is current of a phase, U is corresponding phase-to-phase voltage, Zn is reverse impedance setting, Zp is forward impedance setting. Operation criterion:

90 < Arg
o

(U I Z P ) (U + I Z n )

< 270o

(Equation 3-43)

DPFC of phase current and negative current element are adopted as fault detector of impedance protection. Initiation of the fault detector will be extended to 500 ms and will be kept if impedance relay operates during this time interval. Operation criterion of the fault detector is

I > 1.25I t + I th
Where:

(Equation 3-44)

I t is floating threshold which increases gradually along with DPFC increasing. Take its multiple
as 1.25 can ensure threshold voltage always a bit higher than imbalance voltage.

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jX

I Zp m

U I Zp

I Zn

U + I Zn

Figure 3-19 Operation characteristic of impedance element

So unwanted operation of the equipment can be avoided during system swing and frequency deviation conditions. I th is the fixed threshold. When DPFC of phase-to-phase current is higher than 0.2 Ie, the fault detector operates. Note: If TV circuit failure occurs, the distance protection of generator will be blocked. 3.3.9.2 Logic diagram of distance protection of generator
Flg_VTS =0 Op_Zn_Gen =1 & [En_PPF_Gen] =1 EBI_PPF_Gen =1 FD_Dist_Gen & t Op_Zn_Gen &

Figure 3-20 Logic diagram of distance protection of generator

Where: Op_Zn_Gen is internally generated indicating stage n of distance protective element of generator operates. EBI_PPF_Gen is position flag of binary input for enabling phase-to-phase backup protection of generator which including phase-to-phase distance protection and voltage-controlling overcurrent protection. 1 means enabled. 3.3.9.3 Voltage controlled overcurrent protection This protection is used as a backup protection of generator, main transformer, HV busbar and neighboring power lines. There are two stages with their own delay settings respectively. Stage 1 is used to trip bus coupler breaker or other circuit breaker and stage 2 to shut down the generator. Figure 3-21 shows its logic diagram. (1) Composite voltage element Composite voltage element consists of phase-to-phase undervoltage element and negative
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sequence overvoltage element. These two elements are jointed together by OR gate. By relevant logic setting, stage 1 and stage 2 of overcurrent protection can be configured to be controlled by composite voltage element respectively. (2) Function of current memory For generators with self shunt excitation, current will decrease so quickly during fault that it may be lower than overcurrent setting before tripping. So function to remember fault current is equipped with this protection. Logic setting [Opt_ExcMode_Gen] is used for configuration of this function. See details about the setting in section 7.3.9. Note: When logic setting [En_Mem_Curr_Gen] is enabled, the overcurrent must be controlled by voltage element. (3) Blocking by HV side composite voltage Overcurrent protection can be blocked not only by composite voltage at terminal of generator but also by composite voltage on HV side of main transformer. This function can be configured by setting logic setting [En_HVS.VCE_Ctrl_OC_Gen] as 1. (4) Protection performance during VT circuit failure A logic setting [Opt_VTS_Ctrl_OC_Gen] is used to configure action of composite voltage element during VT circuit failure. When this logic setting is set as 1, if this side VT circuit failure is detected, the composite voltage element will not meet conditions to operate. When this logic setting is set as 0, if this side VT circuit failure is detected, composite voltage element is disabled, the overcurrent protection will not be blocked and becomes a pure overcurrent protection.

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3.3.9.4 Logic Diagram of voltage controlled Overcurrent Protection


Upp<[Vpp_VCE_Gen] U2>[V_NegOV_VCE_Gen] Flg_VTS = 0 & [Opt_VTS_Ctrl_OC_Gen]=0 >=1 & >=1 Op_VCE_Gen =1

[Opt_ExcMode_Gen] =1 Op_OCn_Gen =1 Op_VCE_Gen =1 [En_VCE_Ctrl_OCn_Gen] =1 [En_PPF_Gen] =1 BI_PPF_Gen =1

& >=1 & & >=1 t Stage n of overcurrent protection operates

&

FD_OC_Gen =1

Figure 3-21 Logic diagram of overcurrent relay with composite voltage blocking

Where Upp represents any one of the three phase-to-phase voltage of generator. U2 is negative sequence voltage of generator calculated by protection. Op_OCn_Gen is internally generated flag indicating stage n of overcurrent operates, which means the measured current is in excess of its setting [I_OCn_Gen]. Where n represents stage serial number 1 and 2. As for principle of discrimination of VT circuit failure, see section 3.3.27.

3.3.10 Earth fault protection of stator


3.3.10.1 Fundamental zero sequence overvoltage earth fault protection Single-phase earth fault within 85% - 95% range from terminal of stator winding can be protected by fundamental zero-sequence overvoltage protection. Fundamental zero-sequence overvoltage protection reacts to magnitude of zero sequence voltage of generator. Since it adopts frequency tracing, digital filtering and full cycle Fourier algorithm, the third harmonic can be reduced to 1/100 within the frequency tracing range and the protection can response the basic wave component only. This protection comprises two stages: sensitive stage and unsensitive stage (high setting stage). (1) Sensitive stage of the protection Operation criterion for alarm of this stage is

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U n0 > U 0zd
Where:

(Equation 3-45)

U 0zd = K rel U unb.max , U 0zd is operation threshold setting of fundamental zero sequence voltage
[V_SensROV_Sta].

U unb.max is the maximum measured value of unbalance zero sequence voltage. K rel is reliability coefficient, 1.2~1.3 in general.
To assure its security, user should check the setting by comparing it with the transferred zero sequence voltage through coupling capacitance between HV side and LV side of transformer when external earth fault occurs on the HV side of the transformer. Meanwhile, settings, including time delay and operation setting, should be considered to cooperate with that of earth fault protection of the system. (2) High setting stage of the protection Operation criterion for alarm of this zone is

U n0 > U 0hzd
Where:

(Equation 3-46)

U n0 is zero sequence voltage of neutral point of generator U 0hzd is the zero sequence voltage high setting. 20V ~ 25V is recommended generally.
3.3.10.2 Third harmonic voltage ratio earth fault protection of stator This protection is designed to cover only about 25% of earth fault of the stator. Third harmonic voltage of generator terminal is got from its open-delta zero sequence voltage. Third harmonic voltage of neutral point side is got from neutral point VT of the generator. Operation criterion of this protection

U 3T / U 3N > K 3wzd
Where:

(Equation 3-47)

U 3T and U 3N are third harmonic voltage of generator terminal and neutral point respectively. K 3wzd is the third harmonic voltage percentage setting.

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During incorporation of generator to power system, the ratio U 3T / U 3N

changes considerably

owing to variation of equivalent capacitive reactance at generator terminal. So two different settings are designed for protection before and after connection of generator with system, and these two settings can be switched over with alternation of contacts position of the terminal breaker. In addition, settings are provided for deciding whether the ratio protection of third harmonics voltage is used for alarm or tripping or both. 3.3.10.3 Third harmonic voltage differential ground protection Operation criterion of this protection

U 3T K t U 3 N > Kre U 3 N
Where:

(Equation 3-48)

U 3T and U 3 N are third harmonic vector voltage of generator terminal and neutral point, K t is automatic tracing regulation coefficient. K re is third harmonic differential percentage setting.
This protection is enabled automatically when the generator has been connected with the system and load current is higher than 0.2 Ie (generator rated current) and only issues alarms if operates. 3.3.10.4 VT circuit failure blocking (1) Open-delta VT circuit failure alarm of terminal and neutral point of generator Since open-delta voltages of VT at neutral point and generator terminal are taken for zero sequence voltage protection of stator, failure of these VT circuits will make this protection fail to operation. So alarm shall be issued during this case. Third harmonic voltage ratio criterion and third harmonic voltage differential criterion shall be disabled during VT circuit failure at generator neutral point. Criterion of VT circuit failure: Positive sequence voltage of secondary winding of generator terminal is higher than 0.9Un and third harmonic of zero sequence voltage is lower than 0.1V. VT circuit failure alarm will be issued by delay 10s and reverted automatically by delay 10s when the failure vanishes. (2) Primary circuit failure of VT1 at generator terminal Secondary circuit failure of VT1 of generator terminal will not influence ground protection of stator.
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Primary circuit failure of VT1 of generator terminal will cause basic wave component of zero sequence voltage of generator terminal increasing and third harmonic component decreasing, and will not cause unwanted operation of basic wave zero sequence voltage protection and third harmonic voltage ratio protection. However, it will cause unwanted operation of third harmonic voltage differential protection, so this protection shall be blocked during this failure. Operation criterion of this failure are: Negative sequence voltage of VT2, 3U2 < 3V; Negative sequence voltage of VT1, 3U2 > 8V; Calculated zero sequence voltage of VT1, 3U0> 8V. When these criterions are met, VT1 primary circuit failure alarm will be sent by short delay and third harmonic voltage differential protection will be blocked. 3.3.10.5 Logic diagram of earth fault protection of stator Figure 3-22 and Figure 3-23 show logic diagrams of fundamental zero sequence voltage earth fault protection and third harmonic voltage earth fault protection respectively.
[En_Alm_ROV_Sta] =1 Flg_VTS =0 Op_SensROV_Sta =1 [En_EF_Sta] =1 & [En_Trp_ROV_Sta] =1 EBI_En_ROV_Sta =1 FD_EF_Sta =1 & t basic wave zero sequence voltage protection tripping & basic wave zero sequence voltage protection alarm

&

Figure 3-22 Logic diagram of fundamental zero sequence overvoltage earth fault protection of stator

Where: Op_SensROV_Sta is internally generated flag indicating fundamental zero-sequence overvoltage element operates, that is fundamental zero-sequence voltage is in excess of its setting. EBI_EN_ROC_Sta is state flag of binary input of enabling earth fault protection. 1 means enabled.

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[En_Alm_V3rdHRatio_Sta] =1 Flg_VTS =1 Op_V3rdHRatio_Sta =1 [En_EF_Sta] =1 & [En_Trp_V3rdHRatio_Sta] =1 EBI_En_V3rd_Sta =1 FD_EF_Sta & t third harmonic voltage ratio protection tripping & third harmonic voltage ratio protection alarm

&

Figure 3-23 Logic diagram of third harmonic voltage earth fault protection of stator

Where: Op_Alm_V3rdHRatio_Sta is internally generated flag indicating alarm issued by ratio element of 3rd harmonics voltage is available, that is, the ratio is in excess of its setting. EBI_EN_V3rd_Sta is state flag of binary input of enabling ratio protection of 3rd harmonics voltage. 1 means enabled.

3.3.11 Earth fault protection of rotor


3.3.11.1 Ping-pang type (Switch-over sampling) rotor one point earth fault protection If one-point earth fault of rotor occurs, insulation resistance between rotor winding and the axis will drop down. Rotor earth fault protection measures earthing resistance Rg of the winding by an unbalance bridge as shown in Figure 3-24. Corresponding equations can be got by switching over S1 and S2 alternately, and earthing resistance Rg and location of the earthing point can be found by calculation. There are two stages equipped for one-point earth protection: sensitive stage and regular stage. Sensitive stage is used for alarm and regular stage for tripping or alarm.
aU
U rotor R Rg R

S1

S2

Figure 3-24 Measurement of earth resistance of rotor

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3.3.11.2 Ping-pang type rotor two points earth fault protection If one-point earth protection is used for alarm only, when earth resistance Rg is less than setting of its regular stage[R_1PEF_RotWdg], it will switch over two-points ground protection program by a delay automatically. If location of the earthing point varies and the variation reaches its setting value (fixed value 3%), two points earth fault protection will trip. In order to improve the reliability, the two points earth fault protection can be blocked by setting [En_VCE_2PEF_RotWdg] as 1. Figure 3-25 and Figure 3-26 show logic diagram of one point and two points earth fault protection of rotor. 3.3.11.3 Logic diagram of earth fault protection of rotor
Rg < [R_Sens_1PEF_RotWdg] [En_Alm_Sens_1PEF_RotWdg] =1 [En_Alm_1PEF_RotWdg] =1 Rg <[R_1PEF_RotWdg] [En_EF_RotWdg] =1 [En_Trp_1PEF_RotWdg] =1 EBI_1PEF_RotWdg =1 FD_EF_RotWdg =1 & & t One-point earth fault protection tripping & & t One-point earth fault protection alarm & sensitive stage of one point earth fault prottion alarm

Figure 3-25 Logic diagram of one-point earth fault protection of rotor


Op_1PEF_RotWdg a>3% [En_EF_RotWdg] =1 Op_V2ndH_VCE_2PEF_RotWdg =1 two points earth fault protection tripping t &

>=
[En_VCE_2PEF_RotWdg] =1 [En_2PEF_RotWdg] =1 EBI_EF_RotWdg =1 FD_EF_Rotor =1

&

Figure 3-26 Logic diagram of two-points earth fault protection of rotor

3.3.12 Generator stator overload protection


Stator overload represents average heating of winding of the stator. This protection takes currents at generator terminal and neutral point as its criterion. 3.3.12.1 Definite time stator overload protection There are two stages equipped with definite time stator overload protection: one for alarm and another for tripping. Figure 3-28 shows its logic diagram.
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3.3.12.2 Inverse time stator overload protection Inverse time stator overload protection consists of three parts: low setting initiator, inverse time part and upper limit definite time part. Inverse time part can simulates generator-heating process including heat accumulation and dissipation. When stator current reaches its low setting I SZD , inverse time part initiates and the heat is accumulated. When the stator current is lower than rated value, the heat accumulation will decrease accordingly. Figure 3-27 shows the inverse time curve. In the figure, t min is delay of upper limit of inverse time curve and I SZD is setting of the inverse time protection.
I Ih

Iszd

t min

t max

Figure 3-27 Operation curve of inverse time stator overload protection

Operation criterion of inverse time part:

[( I I ezd (K srzd ) ] t KS zd
2 2

(Equation 3-49)

Where:

K SZD is time constant of generator heating, K SRZD is heat dissipation factor of generator I eZD is rated secondary current of generator.
Figure 3-29 shows logic diagram of inverse time stator overload protection.

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3.3.12.3 Logic diagram of stator overload protection


I>[I_Alm_OvLd_Sta] [En_OvLd_Sta] =1 I>[I_OvLd_Sta] [En_OvLd_Sta] =1 [TrpLog_OvLd_Sta].bit0 =1 EBI_Ovld_Sta FD_Ovld_Sta =1 & & & t Definite time stator overload protection trips & t Definite time stator overload alarm

Figure 3-28 Logic diagram of stator definite time overload protection


I > [I_InvOvLd_Sta] & [TrpLog_InvOvLd_Sta].bit0 =1 [TrpLog_InvOvLd_Sta].bit0 =1 [EBI_EF_Sta] =1 FD_InvOvLd_Sta =1 tmin & & & Inverse time stator overload protection tripping

Figure 3-29 Logic diagram of inverse time stator overload protection

3.3.13 Negative sequence overload protection


Negative sequence overload reflects overheating on surface of the rotor and other abnormality due to negative sequence current. This protection takes negative sequence current at generator terminal and neutral point as its criterion. 3.3.13.1 Definite time negative sequence overload protection There are two stages equipped with definite time negative sequence overload protection: one for alarm and the other for tripping. Figure 3-31 shows its logic diagram. 3.3.13.2 Inverse time negative sequence overload protection Inverse time negative sequence protection consists of three parts: low setting initiator, inverse time part and upper limit definite time part. Inverse time part can simulate generator-heating process including heat accumulation and dissipation. When negative sequence current reaches its low setting [I_InvNegOC_Sta], inverse time part initiates and the heat is accumulated. When the stator current is lower than permissive continuous negative sequence current [I2_Perm_Sta], the heat accumulation will decrease accordingly. Operation criterion of inverse time part:

[( I 2 I ezd (I 21 ) ] t A
2 2

(Equation 3-50)

Where:

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I 2 is generator negative sequence current, I eZD is generator rated current, I 21 is permissive continuous negative sequence current (per unit value), and
A is negative sequence heating constant of rotor. Figure 3-30 shows the inverse time curve. In the figure, t min ([tmin_InvNegOC_Sta]) is delay of upper limit of inverse time curve and I 2 SZD ([I_InvNegOC_Sta]) is setting of the inverse time negative sequence overload protection.
I

I2zd

t min

t max

Figure 3-30 Operation curve of inverse time negative sequence overload protection of stator

3.3.13.3 Logic diagram of negative sequence overload protection of stator


[En_NegOC_Sta] =1 I2>[I_Alm_NegOC_Sta] I2>[I_NegOC1_Sta] [En_NegOC_Sta] =1 [TrpLog_NegOC_Sta].bit0 =1 EBI_NegOC_Sta =1 FD_NegOC_Sta =1 & & & t [t_NegOCn_Sta] & Definite time negative sequence overload alarm [t_Alm_NegOC_Sta] t Definite time negtive sequence overload protection trips

Figure 3-31 Logic diagram of definite time negative sequence overload protection
I >[I_InvNegOC_Sta] [En_NegOC_Stator]=1 [TrpLog_InvNegOC_Sta].bit0 =1 EBI_InvNegOC_Sta =1 FD_InvNegOC_Sta =1 & t
min

& & & Inverse time negative sequence overload protection trips

Figure 3-32 Logic diagram of inverse time negative sequence overload protection
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3.3.14 Loss-of-Excitation protection


3.3.14.1 Theory of loss-of-excitation protection Loss of excitation represents abnormal operation of generator due to excitation failure. There are four criterion used for loss-of-excitation protection: under voltage, stator side impedance, rotor side undervoltage/excitation voltage and power output reduction. 3.3.14.2 Under voltage criterion Three phase voltages on bus generally and those at generator terminal sometimes are taken as this criterion. Criterion of simultaneous three phases under voltage is

U pp < U lezd
Where: Upp is phase-to-phase voltage of busbar or of generator terminal. Ulezd is undervoltage setting [V_BusUV_LossExc_Gen].

(Equation 3-51)

When bus voltage is taken as the criterion, if bus VT circuit fails, the protection will be blocked. When generator terminal voltage is taken as the criterion, if one group of VT circuit fails, the other group of VT will be switched over automatically. 3.3.14.3 Stator side impedance criterion This criterion is impedance circle including asynchronous impedance circle and steady state stabilization limit circle. The operation criterion is

270 Arg

Z + jX B 90 Z jX A

(Equation 3-52)

Where:

X A can be set as the system impedance Xs for steady state stabilization limit circle and X A = 1/2X 'd for asynchronous impedance circle; X B is taken as Xd + 1/2X 'd for round rotor generator and (X d + X q )/2 + X 'd /2 for salient pole
generator. The impedance criterion can be combined with reverse reactive power criterion, i.e.,

Q < [Q_RevQ_LossExc_Gen].
Figure 3-33 a) and b) show operation characteristics of steady state stabilization impedance relay and asynchronous impedance relay, where the hatched area is operating area, and the dotted line is operation limit of reverse reactive power.
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jx
Z1 -Qzd

jx R
-Qzd Z1

Z2

a)

Z2

b)

(a)

(b)

Figure 3-33 Operation characteristic of stator side impedance relay

Besides operation criterion mentioned above, there are also auxiliary operation criterion, namely: (1) (2) (3) Positive sequence voltage is higher than or equal to 6V; Negative sequence voltage U2 is lower than 0.1 Un (rated voltage of generator); and Current of generator is no less than 0.1 Ie (rated current of generator).

3.3.14.4 Rotor side criterion Rotor side criterion comprises: (1) Rotor undervoltage criterion: U r < U rlzd ;

(2)

Variable exciter voltage criterion:

U r < K r X dz S U f0

Where:

Ur is exciting voltage. U rlZD is the setting [V_RotUV_LossExc_Gen]. X dz = X d + X s , X d is synchronous reactance of generator (per unit value); Xs is equivalent reactance on system side connected with the generator (per unit value); S is rated apparent power of generator (per unit value); U f0 is rated voltage of exciter during generator without load; K r is reliability coefficient.
If Ur drops to zero or minus value suddenly during loss of excitation, the rotor under voltage criterion will be met quickly before steady state stability limit of the generator reaches. If Ur drops to zero or reduces to a value gradually during loss of excitation, the variable excitation voltage
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criterion will be reached. Excitation under voltage or loss of excitation will cause out-of-step, and then excitation voltage and output power of the generator will swing seriously. In this case, the rotor under voltage criterion and the variable excitation voltage criterion will be met and withdrawn periodically in general. So the excitation voltage element will revert with delay during out-of-step condition while the impedance entering the steady state stability limit circle. 3.3.14.5 Reduced power output Active power criterion for power output reduction is P > Pzd. When out-of-step occurs during loss of excitation, power output of generator will swing within a certain range. P represents average power output within an oscillation period. Pzd is the setting [P_LossExc_Gen]. 3.3.14.6 Logic diagram of loss-of-excitation protection Three stages are equipped with loss-of-excitation protection: stage 1 is used for reduction of power output and alarm, stage 2 (with bus undervoltage criterion) is used for tripping and stage 3 is used for tripping with long delay. Figure 3-34

Figure 3-34shows logic diagram of stage 1 of loss-of-excitation protection. If excitation is lost, this stage will be used to reduce power output to a pre-set level and issue alarm.

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Figure 3-34 Logic diagram of loss-of-excitation protection stage 1 Figure 3-35 shows logic diagram of stage 2 of loss of excitation protection. If excitation is lost and voltage on HV side bus of main transformer ( or voltage at terminal of generator) is lower than its setting, this stage will trip with delay. In configuring this stage, considering of security, it is strongly recommended that impedance criterion should be used as well as busbar criterion rather than the model that only busbar undervoltage criterion and rotor undervoltage criterion are used.
Upp<[V_BusUV_LossExc_Gen] [En_BusUV_LossExc2_Gen] =1 Ur<[V_RotUV_LossExc_Gen]

& >=1

Ur < Kr Xdz Sn Uf0


[En_RotUV_LossExc2_Gen] =1
270 Arg Z + jX Z jX
B A

& >=1 & t Op_LossExc2_Gen

90

&

& >=1 &

[En_Z_LossExc1_Gen] =1 Q>[Q_RevQ_LossExc_Gen] [En_RevQ_LossExc_Gen]=1 [En_LossExc_Gen]=1 EBI_LossEXC_Gen =1 [TrpLog_LossExc2_Gen].bit 0=1 FD_LossExc_Gen =1

Figure 3-35 Logic diagram of stage 2 of loss of excitation protection

Figure 3-36 shows logic diagram of stage 3 of loss of excitation protection. It is used for tripping
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with long delay


Ur<[V_RotUV_LossExc_Gen] U r < K r X dz S n U f0 [En_RotUV_LossExc3_Gen] =1
270 Arg Z + jX Z jX
B A

>=1 & >=1

90

&

& >=1 & & t Op_LossExc3_Gen

[En_Z_LossExc3_Gen] =1 Q>[Q_RevQ_LossExc_Gen] [En_RevQ_LossExc_Gen]=1 [En_LossExc_Gen]=1 EBI_LossEXC_Gen =1 [TrpLog_LossExc3_Gen].bit 0=1 FD_LossExc_Gen =1

Figure 3-36 Logic diagram of stage 3 of loss of excitation protection

3.3.15 Out-of-step protection


Out-of step represents asynchronous operation of generator due to out-of-step. Figure 3-37 shows operation characteristic of the protection that comprises three parts: lens part, boundary part and reactance line part.

jx
U D OL IL
1 2

Za Zc
3 1

IR

OR

0 L Zb R

Figure 3-37 Operation characteristic of out-of-step protection

In Figure 3-37, lens divides impedance plane into inside part I and outside part O, boundary divides the impedance plane into left part L and right part R, and reactance line divides the impedance plane into upper part U and lower part D. Considering lens and boundary comprehensively, the impedance plane is divided into four
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area: OL, IL, IR and OR. If trace of impedance is passing through these four areas in sequence from right to left or vice versa, and staying in each area for a moment longer than the setting, this case is considered as system swing. Times of the passing through are accumulated and the grand total is considered as the times of pole sliding. When the grand total reaches its setting value, out-of-step protection operates. As to reactance line , if the impedance trace passes through the upper part U, the swing center is considered outside the generator; If the trace passes through the lower part D, the swing center is considered within the generator. Settings of times of pole sliding can be configured separately for these two cases. Out-of-step protection can be used either for alarm only or for tripping. Minimum swing period which can be identified by this protection is 120 ms. Figure 3-38 shows logic diagram of out-of-step protection.

Figure 3-38 Logic diagram of out-of-step protection

3.3.16 Voltage protection


Voltage protection of generator comprises overvoltage and undervoltage protection. 3.3.16.1 Overvoltage protection Overvoltage protection is used as protection against stator overvoltage occurring in various operation conditions. It will issue tripping command when the maximum phase-to-phase voltage at the terminal of generator is in excess of the setting. Calculation of voltage is independent of variation of frequency. Two stages of overvoltage protection are equipped with RCS-985A for tripping. Figure 3-39 shows logic diagram of overvoltage protection. 3.3.16.2 Undervoltage protection Undervoltage protection responses to reduction of phase-to-phase voltage at the terminal of generator and will trip terminal breaker of the generator with configurable delay. The protection is controlled by external binary such as control equipment of synchronous condenser [BI_SyncCondenser]. Only one stage is equipped with it. Figure 3-40 shows logic diagram of undervoltage protection.

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3.3.16.3 Logic diagram of overvoltage protection and undervoltage protection


Upp>[V_OVn_Gen] & [En_VoltProt_Gen] =1 [TrpLog_Ovn_Gen].bit0 =1 EBI_VoltProt_Gen =1 FD_OV_Gen =1 & & t Overvoltage protection trips

Figure 3-39 Logic diagram of overvoltage protection


BI_SyncCondenser =1 Upp.max<[V_UV_Gen] [En_VoltProt_Gen] =1 [TrpLog_UV_Gen].bit0=1 EBI_VoltProt_Gen =1 FD_UV_Gen =1 & & & t

undervoltage protection trips

Figure 3-40 Logic diagram of under voltage protection

3.3.17 Overexcitation protection


Overexcitation protection is used to prevent generator or transformer form damage due to over excitation. It represents multiple of over excitation at terminal of generator (or LV side of main transformer) and comprises two kinds of protection: generator over excitation protection and main transformer over excitation protection. Besides, each kind of over excitation protection comprises definite time protection and inverse time protection. 3.3.17.1 Definite time over excitation protection Two stages for tripping and one stage for alarm are equipped for definite over excitation protection. Their time delay can be configured. Multiple of over excitation n can be expressed as follows:

n = U pu / Fpu
Where U pu and Fpu are per unit value of voltage and frequency respectively. Figure 3-42 shows logic diagram of definite time over excitation protection. 3.3.17.2 Inverse time over excitation protection

(Equation 3-53)

Inverse time over excitation protection realizes inverse time characteristic by linear processing on given inverse time operation characteristic, obtaining multiple of over excitation by calculation, and getting corresponding operation delay by sectional linear insertion. It reflects heat accumulation and radiation.

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Figure 3-43 shows inverse time operation characteristics of over excitation protection. It can be specified by 8 over excitation multiple settings n0 n7.
U/F n0 n1 n2 n3 n4 n5 n6 n7

t0 t1 t2 t3

t4

t5

t6

t(s)

t7

Figure 3-41 Inverse time operation characteristics of over excitation protection

The over excitation multiple settings n (= U/F) are within range of 1.0 1.5 in general. Maximum time delay t is considered as long as 3000 s. Relation between various settings of n and t are: n0 n1 n2 n3 n4 n5 n6 n7 t0 t1 t2 t3 t4 t5 t6 t7 3.3.17.3 Logic diagram of excitation protection
[En_OvExc_Gen] =1 U/F > [k_Alm_OvExc_Gen] U/F > [k_OvExc n_Gen] [En_OvExc_Gen] =1 [TrpLog_OvExcn_Gen].bit0 =1 EBI_OvExc_Gen =1 [En_OvExc_Gen] =1 FD_OvExc_Gen =1 & & & t definite time overexcitation protection alarm definite time overexcitation protection trips

&

Figure 3-42 Logic diagram of definite time over excitation protection


U/F >[k n_InvOvExc_Gen] [En_OvExc_Gen] =1 [TrpLog_InvOvExc_Gen].bit0 =1 EBI_OvExc_Gen=1 [En_OvExc_Gen]=1 FD_OvExc_Gen=1 & & & Inverse time overexcitation protection trips

Figure 3-43 Logic diagram of inverse time over excitation protection

3.3.18 Power protection


Power protection comprises reverse power protection, underpower protection and sequence tripping reverse power protection. Only one stage is equipped for reverse power protection and underpower protection. Operation of this protection will cause tripping.

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3.3.18.1 Reverse power protection Reverse power protection can prevent turbine blades or gears from damage in the case that the generator transforms into a motor mode and flows reverse power due to loss of its motive force. Operation criterion of this reverse power protection is

P - [P_RevP_Gen]
Where

(Equation 3-54)

P is the power calculated from three phase voltages and currents at terminal of generator. [P_RevP_Gen] is the reverse power setting. One stage for tripping and another stage for alarm with independent delay setting respectively are equipped with this protection. Range of reverse power setting is 0.5% - 10% Pn , where Pn is rated active power of the generator. Range of delay is 0.1 s 600 s. Figure 3-44 shows logic diagram of reverse power protection. 3.3.18.2 Underpower protection One stage of underpower protection are equipped for tripping. It is blocked by the binary input for emergency shutoff generator [BI_UrgBrake]. 3.3.18.3 Sequence tripping reverse power protection Sometimes, when overload, over excitation or loss-of-excitation protection of generator initiate and tripping is needed, the steam valve of turbine has to be closed firstly. Sequent-tripping reverse power protection is used for this condition. Such protection is a reverse power protection blocked by position contact of steam valve and circuit breaker of generator. It can trip relevant circuit breaker with a certain delay since the steam valve being closed. Its setting range is 0.5% - 10% Pn. Figure 3-45 shows logic diagram of sequent-tripping reverse power protection. 3.3.18.4 Logic diagram of power protection
P>-[P_RevP_Gen] [En_PwrProt_Gen]=1 [TrpLog_RevP_Gen].bit0 =1 EBI_PwrProt_Gen =1 FD_PwrProt_Gen=1 & & & t reverse power protection trips

Figure 3-44 Logic diagram of reverse power

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BI_52b_Gen=1 BI_Valve_Turbine=1 P>-[P_SeqTrp_RevP_Gen] [En_PwrProt_Gen]=1 [TrpLog_SeqTrp_RevP_Gen].bit0=1 EBI_PwrProt_Gen=1 FD_PwrProt_Gen=1 & & & t Sequent-tripping reverse power protection trips

Figure 3-45 Logic diagram of program reverse power protection

3.3.19 Frequency protection


Frequency protection of generator comprises under frequency and over frequency protection. Permissive range of frequency of large generator is 48.5Hz 50.5Hz. When frequency is lower than 48.5 Hz and if the accumulated time or duration of once under frequency operation reaches setting value, the protection will issue alarm or trip. This protection is blocked by position contact of circuit breaker and no current flag. Four stages of underfrequency protection are equipped for RCS-985A. Stage 1 is usually configured as accumulating frequency protection, and can be reset to zero only after erasing reports. Stages 2, 3 and 4 can be configured as continuous frequency protection. As to over frequency protection, two stages are equipped for RCS-985A and they will issue alarm or trip when operates.
[En_Alm_UFn_Gen]=1 [BI_52b_CB_HVS1(2)_Tr]=1 f<[f_UFn_Gen] [En_FreqProt_Gen]=1 [f_UFn_Gen].bit0=1 EBI_FreqProt_Gen=1 FD_FreqProt_Gen=1 & & t Stage n of underfrequency protection trips & & t underfrequency protection alarm

Figure 3-46 Logic diagram of frequency protection of generator

3.3.20 Accidental energization protection


Accidental energization protection comprises unwanted closing protection and breaker flashover protection. 3.3.20.1 Unwanted closing protection Unwanted closing protection is used for following cases: (1) In the course of axis alignment of generator (low frequency condition), if it has been excited, breaker closure by accident may lead to asynchronous starting of the generator. The protection is put into use automatically with time delay t1 when two groups of voltage derived from two independent VTs are all less than undervoltage setting and exit with time delay t2
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(designed to cooperate with low-frequency blocking criterion) when the two groups of voltage recovered to normal level. (2) When generator breaker is closed by accident in excited condition but frequency is under normal level which may occurred in startup-and-shutdown process. The protection is put into use automatically with time delay t3 while Low Frequency criterion is met and returns with time delay t4 after the frequency criteria releases. Here, t4 should be set as long as to ensure the completion of tripping course. (3) If the circuit breaker is closed by accident when phase angle difference of bus and generator voltage is very high, such as around 180, the through closing current will be too high also. In this case, the excitation shall be shut off firstly and breaker of generator can be tripped until the generator current falls down to below setting. Considering security of the protection, both currents from generator terminal and neutral point are used in the logic as criteria. Figure 3-47 shows logic diagram of unwanted closing protection of generator. 3.3.20.2 Breaker flashover protection During process of synchronization of generator, flashover in circuit breaker is possible when difference of phase angle of bus voltage and generator voltage is around 180. Breaker flashover protection is provided for this fault. One phase and two phases flashover is considered by this protection but three-phase flashover is ignored. Criterion of circuit breaker flashover: (1) (2) (3) Position contacts of three phases of circuit breaker are open; Negative sequence current is higher than setting; Excitation has been applied to generator, and generator voltage is higher than setting.

Operation of this protection will shut off excitation and activating circuit breaker failure protection. Figure 3-48 shows logic diagram of breaker flashover protection. Generally, the protection is equipped two time delay settings, the first is for shutting off excitation and the second is for tripping the local line breaker.

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3.3.20.3 Logic diagram of accidental energization protection


Undervoltage element operates F<[f_UF_AccEnerg_Gen] [En_UF_Ctrl_AccEnerg_Gen]=1 BI_52b_GCB =0

&

t1

t2

&
t3 t4

&
Flg_NoCurr_CB_Gen =1 [En_CB_Ctrl_AccEnerg_Gen]=1 I>[I_OC_AccEnerg_Gen] [En_Ibrk_Ctrl_Trp_TCB]=1 overcurrent at generator end operates overcurrent at generator neutral point operates Flg_NoCurr_CB_Tr=1
t3 t4

&

&

& t

Trip of circuit breaker

&

&
[En_AccEnerg_Gen]=1 EBI_AccEnerg_Gen=1 FD_AccEnerg_Gen=1

&

&

Trip of other breakers

Figure 3-47 Logic diagram of unwanted closing protection of generator


BI_52b_CB=0 I2>[I2_Flash_GCB] U>Uset.fix [En_AccEnerg_Gen]=1 EBI_AccEnerg_Gen=1 FD_AccEnerg_Gen=1

& & & t Breaker flashover protection trips

Figure 3-48 Logic diagram of breaker flashover protection

3.3.21 Generator startup and shutdown protection


Protections for phase-to-phase fault and stator earth fault are provided during startup and shutdown process of generator. Differential overcurrent protections are provided for faults of generator and excitation transformer respectively. A zero sequence overvoltage protection is provided for stator earth fault. Since frequency during startup and shutdown process is usually very low, algorithm independent of frequency is used for this protection. Whether the protection should be blocked or not by frequency element or auxiliary contact of circuit breaker can be determined by logic setting.

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F<[f_UF_Ctrl_StShut_Gen] [En_StShut_Gen]=1
Op_**_ StShut_Gen =1 t0 & &

[TrpLog_**_StShut_Gen].bit0 =1
EBI_ StShut_Gen =1 FD_ StShut_Gen =1

T>[t_**_StShut_Gen] generator & startup and t shutoff protection trips

Figure 3-49 Logic diagram of generator startup and shutdown protection

Where: ** represent one of the three protective elements, GenDiff, UF_OC and StaROV. The three protective elements diagrams are so likely that they can be expressed in a figure instead of three for them respectively.

3.3.22 Excitation winding overload protection


Excitation winding overload protection is equipped to reflect average heating condition of excitation winding. Excitation transformer current, exciter current or rotor current of generator can be taken as criterion of this protection. To exciter, frequency can be configured as 50 Hz or 100 Hz. Excitation winding protection comprises definite time and inverse time protection. 3.3.22.1 Definite time excitation winding overload protection One stage of alarm and one stage of tripping are equipped for definite time excitation winding overload protection. Figure 3-51 shows logic diagram of definite time excitation winding overload protection. 3.3.22.2 Inverse time excitation winding overload protection Inverse time excitation winding overload protection consists of three parts: low setting initiator, inverse time part and high setting definite part. Minimum operation time delay ([tmin_InvOvLd_RotWdg]) is provided for extreme overload condition. When current in excitation circuit reaches the low setting [I_InvOvLd_RotWdg], the inverse time protection initiates and the heating accumulation starts. When the heating accumulation reaches its setting, alarm will be issued. The inverse time protection can simulate heating accumulation and radiation process.

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Il Ilh

Ilszd

t min

t max t

Figure 3-50 Operation characteristic of inverse time overload protection of excitation winding

In the figure, I l is the current in excitation circuit, I lh is the high setting of the protection; I lsZD is the low setting of the protection [I_InvOvLd_RotWdg];

t min

is

minimum

delay

[tmin_InvOvLd_RotWdg] . Its operation criterion is:

[( I l I jzzd 1] t KLzd
2

(Equation 3-55)

Where:

I jzzd is inverse time reference current of excitation circuit; KLzd is setting of heat capacity factor of excitation circuit.
Figure 3-52 shows logic diagram of inverse time excitation winding overload protection.
I>[I_Alm_OvLd_RotWdg] [En_OvLd_RotWdg]=1 I>[I_OvLd_RotWdg] [En_OvLd_RotWdg]=1 [TrpLog_OvLd_RotWdg].bit0 =1 EBI_OvLd_RotWdg=1
FD_ OvLd_RotWdg=1 & & t & t

Excitation winding overload alarm Excitation winding overload protection trips

&

Figure 3-51 Logic diagram of definite time excitation winding overload protection

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I>[I_InvOvLd_RotWdg] [En_OvLd_RotWdg]=1

& tmin &

& & inverse time rotor winding overload protection trips

[TrpLog_InvOvLd_RotWdg].bit0 =1 EBI_OvLd_RotWdg =1 FD_OvLd_RotWdg=1

Figure 3-52 Logic diagram of inverse time excitation winding overload protection

3.3.23 Excitation transformer and exciter protection


3.3.23.1 Excitation transformer and exciter differential protection (1) Operation criterion of excitation transformer differential protection is:

I d > K bl I r + I cdqd K bl = K bl1 + K blr ( I r / I e ) I d > K bl 2 ( I r nI e ) + b + I cdqd K blr = ( K bl 2 K bl1 ) /(2 n) b = ( K bl1 + K blr n) nI e
.
I1 + I 2 Ir = 2 I d = I 1 + I 2

( I r < nI e ) ( I r nI e )

(Equation 3-56)

The criterion is the same to Equation 3-1 except the differential current and restraint current. Here: For excitation transformer: I1 and I 2 are currents of HV side and LV side respectively. (2) Please refer to section 3.3.1 to see operation criterion of exciter differential protection. The differential protection of exciter can adopt the two kinds of frequency: 50Hz and 100Hz according the setting [fn_Exciter]. 3.3.23.2 Excitation transformer and exciter overcurrent protection Two stages overcurrent protection are equipped for excitation transformer or exciter overcurrent protection as backup protection. These two stages will trip the circuit breaker with configurable delay. Figure 3-53 shows its logic diagram.

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I>[I_OC n_Exc] [En_Bak_Exc] =1 EBI_Bak_Exc =1 [TrpLog_OC n_Exc].bit0 =1 FD_Bak_Exc =1 & & Stage n of overcurrent protection T>[t_OC n_Exc] trips t

Figure 3-53 Logic diagram of excitation transformer or exciter overcurrent protection

3.3.23.3 Excitation transformer voltage controlled overcurrent protection Function of overcurrent protection with composite voltage blocking is equipped with RCS-985A. This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase backup protection of excitation transformer or exciter. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting. 3.3.23.3.1 Voltage control element The voltage control element is an element which will operate if phase-to-phase voltage is lower than its setting or negative sequence voltage is higher than its setting. Criteria:

U < [Vpp_VCE_Exc] Or U 2 > [V_NegOV_VCE_ Exc]


Where:

(Equation 3-57)

U is phase-to-phase voltage of local side. U 2 is negative sequence voltage of local side.


[Upp_VCE_Exc] is setting of undervoltage control element of local side. [U2_VCE_Exc] is setting of negative-sequence overvoltage control element of local side. All two stages of definite time overcurrent protection can be controlled by voltage element by configuring related logic settings [En_VCE_Ctrl_OC1_Exc] and [En_VCE_Ctrl_OC2_Exc]. 3.3.23.3.2 Influence of VT circuit failure on voltage control element Logic setting [Opt_VTS_Ctrl_OC_Exc] is used to configure performance of voltage control element during VT circuit failure. When this logic setting is set as 1, if VT circuit failure is detected, the voltage control element cannot pick up and the protection will not operate. When this logic setting is set as 0, if this side VT circuit failure is detected, voltage control element is forced to be satisfied, then the voltage controlled overcurrent protection will becomes a pure overcurrent protection.

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3.3.23.3.3 Logic diagram of voltage controlled overcurrent protection of excitation transformer


Upp< [Vpp_VCE_Exc] U2>[V_NegOV_VCE_Exc] 1 Flag_VTS=1 & [Opt_VTS_Ctrl_OC_Exc]=1 Overcurrent element Composite voltage operates [En_VCE_Ctrl_OCn_Exc]=1 [En_Bak_Exc]=1 EBI_Bak_Exc=1 FD of OC prot 1 & >=1 1 & & t Op_OCn_Exc

>=1 & >=1 Composite voltage operates

Figure 3-54 Logic diagram of voltage controlled overcurrent protection of transformer

Where: Flag_VTS is the internally generated flag indicating the failure of VT circuit. [Opt_VTS_Ctrl_OC_Exc] is the setting to configure the VCE mode under VT failure. Overcurrent element indicates that the maximum phase current is above the settings. [En_VCE_Ctrl_OCn_Exc] is the setting to enable/disable the VCE element in stage n of overcurrent protection of excitation transformer. [En_Bak_Exc] is the setting to enable/disable phase to phase fault protection. EBI_Bak_Exc is the binary input to enable/disable phase to phase fault protection. Op_Bak_Exc indicates that the stage n of overcurrent protection operates.

3.3.24 Stepdown transformer backup protection


3.3.24.1 Backup protection of HV side of stepdown transformer Function of voltage controlled overcurrent protection for stepdown transformer is equipped with RCS-985A. This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase backup protection of stepdown transformer. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting. 3.3.24.1.1 Voltage control element It is same to the voltage control element in section 3.3.7.2.1 3.3.24.1.2 Function of current memory It is same to the function of current memory element in section 3.3.7.2.2
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3.3.24.1.3 Influence of VT circuit failure on voltage control element It is same to the influence of VT circuit failure in section 3.3.7.2.3 3.3.24.1.4 Logic diagram of voltage controlled overcurrent protection of stepdown transformer It is same to the logic diagram in section 3.3.7.2.4. 3.3.24.2 Backup protection of LV side of stepdown transformer This protection, consisting of 2 stages and 1 time delay per stage, is used for phase-to-phase backup protection of stepdown transformer. Of which, function of composite voltage element can be enabled or disabled by configuration of logic setting. 3.3.24.2.1 Voltage control element It is same to the voltage control element in section 3.3.23.3.1 3.3.24.2.2 Influence of VT circuit failure on voltage control element It is same to the influence of VT circuit failure in section 3.3.23.3.2 3.3.24.2.3 Logic diagram of voltage controlled overcurrent protection of stepdown transformer It is same to the logic diagram in section3.3.23.3.3. 3.3.24.3 Earth fault protection of LV side of stepdown transformer Two stages zero sequence current protection with delay used for tripping is equipped for LV side of stepdown transformer. One stage zero sequence voltage protection with delay used for alarm is equipped for LV side of stepdown transformer. 3.3.24.4 Other protection of stepdown transformer Overload alarm and initial cooling are equipped for backup protection of stepdown transformer. These functions can be set by logic settings. One normal-open contact is used for output of initial cooling. On load tap change of stepdown transformer is equipped in RCS-985A.

3.3.25 Pole Disagreement Protection


3.3.25.1 Application Pole disagreement protection is used for protection of HV side circuit breaker. The fault can be detected by auxiliary position contact of breaker, zero sequence current or negative sequence current. Whether zero or negative sequence current is used for detection can be configured by corresponding logic setting. Two time delay stages are provided for pole disagreement protection and time delay stage 2 can be configured to be supervised by binary input of protection tripping contact. The current criteria are:

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I max [I_OC_PD] or I 2 [I_NegOC_PD] or 3I 0 [I_ROC_PD]


Where:

(Equation 3-58)

I max is the maximum value of HV side three-phase current. I 2 is negative sequence current of HV side. I 0 is zero sequence current of HV side.
[I_OC_PD] is setting of pole-disagreement phase current element. [I_NegOC_PD] is setting of pole-disagreement negative-sequence current element. [I_ROC_PD] is setting of pole-disagreement zero-sequence current element. Current element will pick up if any one criterion is satisfied with corresponding logic setting be set as 1. 3.3.25.2 Logic scheme of pole disagreement protection stage 1

Figure 3-55 Logic diagram of pole-disagreement protection stage 1

[En_ROC_PD]: logic setting of pole disagreement protection operating supervised by zero-sequence current element. [EN_NegOC_PD]: logic setting of pole disagreement protection operating supervised by negative sequence current element. [BI_PoleDisagr_CB]: binary input of HV side breaker in pole disagreement. [EBI_Reserved1]: binary input of enabling pole disagreement protection. Here, we usually adopt the pole disagreement protection in RCS-974. [En_PoleDisagr_CB]: logic setting of enabling pole disagreement protection
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OP_PD1: Pole disagreement protection Delay: time delay of pole disagreement protection stage 1 [t_PD1]. 3.3.25.3 Logic scheme of pole disagreement protection stage 2

Figure 3-56 Logic diagram of pole-disagreement protection stage 2

Where: [BI_ROC_PD], [En_NegOC_PD], [BI_PoleDisagr_CB], [EBI_Reserved1]: just same as mentioned in section above. [En_PoleDisagr_CB], and

[En_ExTrp_Ctrl_PD2]: logic setting of pole disagreement protection stage 2 initiated by binary input of protection trip contact. [BI_SyncConderser]: binary input of protection trip contact to initiate pole disagreement protection. [En_OC_PD2]: logic setting of pole disagreement protection stage 2 operating supervised by phase current element. OP_PD2: Pole disagreement protection stage 2 Delay: time delay of pole disagreement protection stage 2 [t_PD2].

3.3.26 CT circuit failure alarm


3.3.26.1 Three-phase current circuit failure alarm Operation criterion of the alarm is:

3I 0 > 0.04 Ie + 0.25 I max


Where:

(Equation 3-59)

3I 0 is zero sequence current;


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I e is secondary rated current I max is maximum phase current.


If this criterion is met, CT circuit failure alarm will be issued with 10s delay. Once the condition reverts normal condition, the alarm will be reset with 10s delay. 3.3.26.2 Differential current alarm in differential protection circuit This function is enabled only when relevant differential protection logic setting is set as enabled. If the criterion is met, the alarm will be sent by delay 10 s and corresponding differential protection will not be blocked. When the differential current eliminates, the alarm will be reset by delay 10 s. In order to increase sensitivity of this alarm, percentage restraint differential current alarm criterion is adopted as shown as below.

I d > I dbjzd I d > kbj I res

(Equation 3-60)

If the differential current reaches its threshold and reaches differential alarm level of percentage restraint factor multiplied by restraint current, the differential current alarm will be issued. 3.3.26.3 Alarm or blocking to differential protection by CT circuit failure Function of instantaneous CT circuit failure discrimination is equipped for differential protection. Only when related logic setting and relevant enabling binary input of protection are set on, this function of alarm or blocking of instantaneous CT circuit failure discrimination will be enabled. If internal fault occurs, at least one of following four conditions will be present: (1) Negative sequence voltage on any side is higher than 2 V; (2) Any phase current of a certain side increases after fault detector picks up; (3) Maximum phase current is higher than 1.2 Ie after initiation; (4) At least three phase-currents increases after fault detector picks up. If none of above four conditions occurs within 40 ms after differential protections fault detectors picks up, the protection treats it as CT circuit failure. If the logic setting [Opt_CTS_Blk_PcntDiff_Gen] (or [Opt_CTS_Blk_SPTDiff_Gen], [Opt_CTS_Blk_PcntDiff_Exc] [Opt_CTS_Blk_PcntDiff_ST], [Opt_CTS_Blk_PcntDiff_GTU], [Opt_CTS_Blk_PcntDiff_Tr]) is set as 1, the differential protection will be blocked and alarm will be issued. If this logic setting is set as 0, the differential protection will trip and alarm will be issued simultaneously. If the alarm is issued, the signal can be removed only when the failure is removed and the equipment is reset by manual. Note:
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The CT failure is disabled and differential protection will generator-transformer unit is connected to power system.

not be blocked before

3.3.27 VT circuit failure alarm


3.3.27.1 VT circuit of any side failure alarm Operation criterion of this failure is: (1) Positive sequence voltage is below than 18 V and any phase current is higher than 0.04 In; (2) Negative sequence voltage 3U2 is in excess of 8 V. If any one condition occurs, VT circuit failure alarm will be issued with delay 10 s, and the alarm will be removed automatically by delay 10 s when the failure is removed. 3.3.27.2 Voltage balance on generator terminals Two groups of VT are equipped at generator terminal. VT circuit failure can be detected by comparison of phase voltage and positive sequence voltage of these two groups of VT. Operation criterions are:

U AB1 - U AB 2 > 5 V ; U BC1 - U BC 2 > 5 V ; U CA1 - U CA 2 > 5 V ; U 11 - U12 > 3 V ;


Where: UAB1, UBC1, UCA1 and U11 are phase-to-phase voltage and positive sequence voltage of VT group 1; UAB2, UBC2, UCA2 and U12 are phase-to-phase voltage and positive sequence voltage of VT group 2. If any condition mentioned above occurs, VT circuit failure alarm will be issued with delay 0.2 s and the VT group used will be switched over. When only a VT fails, it will not influence the function of related protection such as loss-of-excitation, out-of-step, overvoltage, over-excitation, reverse power, frequency, impedance protection and overcurrent protection. If only one group of VT is provided at generators terminal, user can set this function as disable.
(Equation 3-61)

3.3.28 Mechanical protection


Interfaces of mechanical protection such as thermo-technical protection, interruption of water protection, excitation system protection and one spare mechanical protection are equipped for the equipment. External protection equipments send those signals to RCS-985A makes the event record and sends alarm and maybe tripping command to relevant circuit breaker with delay.
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Enabling binary inputs are provided for those protections. Setting ranges of time delay of those protection are all 0 s 6000 s.

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Chapter 4 Self-supervision, records


4.1 Self-supervision

measurements

and

If hardware failure of the equipment itself is detected, protection functions of the equipment will be blocked and equipment blocking alarm will be issued. Hardware failure includes those on RAM, EPROM, settings, power supply, DSP. When following abnormal status is detected, abnormal warning will be issued: AC voltage or current circuit failure, persist pickup, mismatch state of pickup between CPU and DSP and alarm of protection element. The relay includes a number of self-monitoring functions to check the operation of its hardware and software when it is in service. These are included so that if an error or fault occurs within the relays hardware or software, the relay is able to detect and report the problem and attempt to resolve it by performing a re-boot. This involves the relay being out of service for a short period of time that is indicated by the Healthy LED on the faceplate of the relay being extinguished and the watchdog contact at the rear operating. If the restart fails to resolve the problem, then the relay will take itself permanently out of service. Again this will be indicated by the ALARM LED and watchdog contact. If a problem is detected by the self-monitoring functions, the relay attempts to store a maintenance record in battery backed-up SRAM to allow the nature of the problem to be notified to the user. The self-monitoring is implemented in two stages: firstly a thorough diagnostic check which is performed when the relay is booted-up, e.g. at power-on, and secondly a continuous self-checking operation which checks the operation of the relays critical functions whilst it is in service.

4.1.1 Start-up self-testing


The self-testing which is carried out when the relay is started takes a few seconds to complete, during which time the relays protection is unavailable. This is signaled by the Healthy LED on the front of the relay which will illuminate when the relay has passed all of the tests and entered operation. If the testing detects a problem, the relay will remain out of service until it is manually restored to working order. The operations that are performed at start-up are as follows: 4.1.1.1 System boot The integrity of the flash memory is verified using a checksum before the program code and data stored in it is copied into SRAM to be used for execution by the processor. When the copy has been completed the data then held in SRAM is compared to that in the flash to ensure that the two are the same and that no errors have occurred in the transfer of data from flash to SRAM. The entry point of the software code in SRAM is then called which is the relay initialization code.

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4.1.1.2 Initialization software The initialization process includes the operations of initializing the processor registers and interrupts, starting the watchdog timers (used by the hardware to determine whether the software is still running), starting the real-time operating system and creating and starting the supervisor task. In the course of the initialization process the relay checks: The integrity of the battery backed-up SRAM that is used to store event, fault and disturbance records. The integrity of the flash that is used to store program. The correctness of the settings that ensures relays proper response to fault. The operation of DSP and CPU. The voltage level of the field voltage supply which is used to drive the opto-isolated inputs. The operation of the LCD controller. The watchdog operation. At the conclusion of the initialization software the supervisor task begins the process of starting the platform software. 4.1.1.3 Platform software initialization & monitoring In starting the platform software, the relay checks the integrity of the data held in non-volatile memory with a checksum. The final test that is made concerns the input and output of data, the presence and healthy condition of the input board is checked and the analog data acquisition system is checked through sampling the reference voltage. At the successful conclusion of all of these tests the relay is entered into service and the protection started-up.

4.1.2 Continuous self-testing


When the relay is in service, it continually checks the operation of the critical parts of its hardware and software. The checking is carried out by the system services software and the results reported to the platform software. The functions that are checked are as follows: The flash containing all program code, setting values and language text is verified by a checksum The code and constant data held in SRAM is checked against the corresponding data in flash to check for data corruption The SRAM containing all data other than the code and constant data is verified with a checksum The level of the field voltage The integrity of the digital signal I/O data from the opto-isolated inputs and the relay contacts is checked by the data acquisition function every time it is executed. The operation of the analog data acquisition system is continuously checked by the acquisition function every time it is executed, by means of sampling the reference voltages. In the unlikely event that one of the checks detects an error within the relays subsystems, the
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platform software is notified and it will attempt to log a maintenance record in battery backed-up SRAM. If the problem is of no importance (no possibility of leading to maloperation), the relay will continue in operation. However, for problems detected in any important area the relay will initiate a shutdown and re-boot. This will result in a period of up to 5 seconds when the protection is unavailable, but the complete restart of the relay including all initializations should clear most problems that could occur. As described above, an integral part of the start-up procedure is a thorough diagnostic self-check. If this detects the same problem that caused the relay to restart, i.e. the restart has not cleared the problem, then the relay will take itself permanently out of service. This is indicated by the Healthy LED on the front of the relay, which will extinguish, and the watchdog contact that will operate. Voltage transformer supervision(VTS). See section 3.3.27 for detail. Current transformer supervision (CTS). See section 3.3.26 for detail. If the alarm is issued, the alarm signal can be reset only when the failure is removed and the equipment is reset by pressing RESET button on panel or re-power it up. Overload Alarm On condition that the relay does not picks up, adding current in excess of the setting of overload protection, alarm messages are displayed and ALARM LED is lit after the timer stage duration has elapsed. Binary input status monitoring Any status of binary input changing will be monitored. Tripping output circuit monitoring Tripping output relay driving transistor is always monitored in normal program, and blocking message will be issued when the equipment finds abnormality of the tripping output circuit.

4.1.3 List of alarm messages


When hardware failure is detected, all protection functions will be blocked and block signal will be sent. The equipment cannot work in this case. Hardware failure such as failure of RAM, error of EEPROM, settings invalid, loss of power source of opto-coupler, error of DSP, tripping output circuit failure, etc, will be issued whilst the relay will be blocked. All the failure alarms can be found on LCD and in event recording report. The following table gives a list of these alarm signals and the behavior of the relay responding to these failures. Note: There are three alarm LEDs on HMI module: ALARM LED, CT ALARM LED and VT ALARM LED. In following tables the solid point in columns HEALTHY, ALARM, CT ALARM and VT ALARM means the corresponding LED is turned on. If LED HEALTHY illuminates, the relay will be on work ,otherwise the relay will be blocked. Abnormality information printed or displayed on LCD and trouble shooting are described in following table.
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No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Alarm Report Note Note1 Note2 Note3 Note4 Note5 Note6 Note7 Note8 Note9 Note10 Note11 Note12 Note13 Note14 Note15 Note16 Note17 Note18 Note19 Note20 Note21 Note22 Note23 Note24 Note25 Note26 Note27 Note28 Note29 Note30 Note31 Note32 Note33 Note34 Note35 Note36 Note37 Note38 Note39 Note40 HEALTHY ALARM CT ALARM Alm_SwOv_VTS1_Gen Alm_SwOv_VTS2_Gen Alm_BlkV3rdHDiff_VTS1 Alm_BlkIntTurn_VTS2 Alm_VTS_HVS_Tr Alm_VTS1_Term_Gen Alm_VTS2_Term_Gen Alm_VTS_NP_Gen Alm_DeltVTS1_Term_Gen Alm_DeltVTS2_Term_Gen Alm_VTS_RotWdg Alm_Pos_CB_HVS1_Tr Alm_Pos_CB_HVS2_Tr Alm_VTS_LossExc_RotWdg Alm_VTS_ET Alm_PM_DSP1_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_Term_Gen Alm_CTS_NP_Gen Alm_CTS_SP1_Gen Alm_CTS_SP2_Gen Alm_CTS_S1_Exc Alm_CTS_S2_Exc Alm_CTS_TrvDiff_Gen Alm_Diff_Gen Alm_SPTDiff_Gen Alm_Diff_ET Alm_Diff_Exciter Alm_DPFC_IntTurn_Gen Alm_Pos_GCB Alm_CTS_Diff_Gen Alm_CTS_SPTDiff_Gen Alm_CTS_Diff_ET Alm_CTS_Diff_Exciter Alm_BO_OC2_Gen Alm_On_2PEF_RotWdg Alm_Ext_OOS_Gen Alm_Int_OOS_Gen Alm_Accel_OOS_Gen VT ALARM Sugge stion Note J Note J Note J Note J Note J Note J Note J Note J Note J Note J Note J Note I Note I Note J Note J Note A Note J Note J Note J Note J Note J Note J Note J Note J Note J Note J Note J Note J Note J Note E Note I Note K Note K Note K Note K Note E Note E Note E Note E Note E
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No 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 Alarm Report Note Note41 Note42 Note43 Note44 Note45 Note46 Note47 Note48 Note49 Note50 Note51 Note52 Note53 Note54 Note55 Note56 Note57 Note58 Note59 Note60 Note61 Note62 Note63 Note64 Note65 Note66 Note67 Note68 Note69 Note70 Note71 Note72 Note73 Note74 Note75 Note76 Note77 Note78 Note79 Note80 Note81 HEALTHY ALARM CT ALARM Alm_Decel_OOS_Gen Alm_LossExc_Gen Alm_OvExc_Gen Alm_OvLd_Sta Alm_NegOC_Sta Alm_OvLd_RotWdg Alm_ROV_Sta Alm_V3rdHRatio_Sta Alm_V3rdHDiff_Sta Alm_Sens_1PEF_RotWdg Alm_1PEF_RotWdg Alm_UF1_Gen Alm_UF2_Gen Alm_UF3_Gen Alm_UF4_Gen Alm_OF1_Gen Alm_OF2_Gen Alm_RevP_Gen Alm_BO_UC_OvSp_Gen Alm_VTS_Term_Gen Alm_VTS_HVS_Tr Alm_VTS_LVS_ST Alm_MechRly1 Alm_MechRly2 Alm_MechRly3 Alm_MechRly4 Alm_OvLd_Tr Alm_InitCool2_OvLd_Tr Alm_InitCool1_OvLd_Tr Alm_InitCool2_OvLd_ST Alm_OvLd_ST Alm_PwrLoss_MechRly Alm_InitCool1_OvLd_ST Alm_PM_DSP2_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_LVS_Tr Alm_CTS_HVS_ST Alm_CTS_HVS_Tr Alm_REF_Tr Alm_CTS2_HVS_ST VT ALARM Sugge stion Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note E Note J Note J Note J Note E Note E Note E Note E Note E Note E Note E Note E Note E Note D Note E Note A Note J Note J Note J Note J Note J Note K Note J 107

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No 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 Alarm Report Note Note82 Note83 Note84 Note85 Note86 Note87 Note88 Note89 Note90 Note91 Note92 Note93 Note94 Note95 Note96 Note97 Note98 Note99 Note100 Note101 Note102 Note103 Note104 Note105 Note106 Note107 Note108 Note109 Note110 Note111 Note112 Note113 Note114 Note115 Note116 Note117 HEALTHY ALARM CT ALARM Alm_CTS1_HVS_ST Alm_CTS_LVS_ST Alm_REF_ST Alm_Diff_GTU Alm_Diff_Tr Alm_Diff_ST Alm_CTS_Diff_GTU Alm_CTS_Diff_Tr Alm_CTS_Diff_ST Alm_OvLd_LVS_ST Alm_OvExc_Tr Alm_UrgBrake Alm_Inconsist_MechRly Alm_PoleDisagr_CB Alm_ROV_LVS_Tr Alm_ROV_LVS_ST Alm_RAM_CPUBrd Alm_ROM_CPUBrd Alm_EEPROM_CPUBrd Alm_InvalidSetting Alm_ModifiedSetting Alm_PwrLoss_Opto Alm_TripOutput Alm_InnerComm Alm_DSP_CPUBrd Alm_PersistFD_CPUBrd Alm_InconsistFD Alm_Sample_CPUBrd Alm_BI_CPUBrd Alm_RAM_MONBrd Alm_ROM_MONBrd Alm_EEPROM_MONBrd Alm_DSP_MONBrd Alm_PersistFD_MONBrd Alm_MONBrd Alm_Sample_MONBrd VT ALARM Sugge stion Note J Note J Note J Note J Note J Note J Note K Note K Note K Note E Note E Note E Note D Note I Note E Note E Note A Note A Note A Note B Note C Note D Note A Note F Note A Note H Note G Note A Note A Note A Note A Note A Note A Note H Note A Note A

Note: Note1: Note2:


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Alarm indicating VT1 circuit failure and start to switch over voltage circuit. Alarm indicating VT2 circuit failure and start to switch over voltage circuit.
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Note3: Alarm indicating VT1 circuit failure and blocking 3rd harmonics voltage differential protection. Note4: Alarm indicating VT2 circuit failure and blocking interturn protection. Note5: Alarm indicating secondary circuit failure of VT at HV side of main transformer. Note6: Alarm indicating secondary circuit failure of VT1 at generator terminal. Note7: Alarm indicating secondary circuit failure of VT2 at generator terminal. Note8: Alarm indicating secondary circuit failure of VT at the neutral point of generator. Note9: Alarm indicating secondary circuit failure at open-delta side of VT1 at generator terminal. Note10: Alarm indicating secondary circuit failure at open-delta side of VT2 at generator terminal. Note11: Alarm indicating secondary circuit failure of VT for rotor earth fault protection. Note12: Alarm indicating the position of circuit breaker of branch 1 at HV side is abnormal. Note13: Alarm indicating the position of circuit breaker of branch 2 at HV side is abnormal. Note14: Alarm indicating rotor voltage circuit failure which used by loss-of-excitation protection. Note15: Alarm indicating secondary circuit failure of VT of excitation transformer. Note16: The DSP chip in CPU board damaged. Note17: Alarm indicating secondary circuit abnormality of CT at branch 1 of HV side of transformer. Note18: Alarm indicating secondary circuit abnormality of CT at branch 2 of HV side of transformer. Note19: Alarm indicating secondary circuit abnormality of CT at generator terminal. Note20: Alarm indicating secondary circuit abnormality of CT at the neutral point of generator. Note21: Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch1 at the neutral point of generator . Note22: Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch2 at the neutral point of generator. Note23: Alarm indicating secondary circuit failure of CT at side1 of excitation set used in differential protection of excitation. Note24: Alarm indicating secondary circuit failure of CT at side2 of excitation set used in differential protection of excitation. Note25: Alarm indicating the secondary circuit failure of CT for transverse differential protection of generator. Note26: Alarm indicating differential current of generator is in excess of normally endurable level. Note27: Alarm indicating splitting-phase transverse differential current of generator is in excess of normally endurable level. Note28: Alarm indicating differential current of exciter is in excess of normally endurable level. Note29: Alarm indicating differential current of excitation transformer is in excess of normally endurable level. Note30: Alarm indicating operation of DPFC interturn protective element. Note31: Alarm indicating the position of circuit breaker at terminal of generator is abnormal. Note32: Alarm indicating secondary circuit failure of CTs used for differential protection of generator. Note33: Alarm indicating secondary circuit failure of CTs used for splitting-phase transverse differential protection of generator. Note34: Alarm indicating secondary circuit failure of CT used in excitation transformer differential
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protection. Note35: Alarm indicating secondary circuit failure of CT used in exciter differential protection. Note36: Alarm indicating operation of overcurrent element used for driving a set of contact to block other circuit. Note37: Alarm indicating 2 points earth fault protection has been put input operation after operation of 1 point earth fault protection of rotor. Note38: Alarm indicating out-of-step of system occurs while its oscillation center is outside protective zone. Note39: Alarm indicating out-of-step of system occurs and its oscillation center is inside protective zone. Note40: Alarm indicating accelerate out-of-step occurs. Note41: Alarm indicating decelerate out-of-step occurs. Note42: Alarm indicating operation of loss-of-excitation protective element. Note43: Alarm indicating operation of over excitation protective element. Note44: Alarm indicating operation of overload element of stator. Note45: Alarm indicating operation of negative overcurrent protective element of stator. Note46: Alarm indicating operation of overload protective element of rotor winding. Note47: Alarm indicating operation of sensitive stage of ROV protection of stator earth fault. Note48: Alarm indicating operation of 3rd harmonics ratio earth fault protective element of stator. Note49: Alarm indicating operation of 3rd harmonics differential earth fault protective element of stator. Note50: Alarm indicating operation of sensitive stage of 1 point earth fault protective element of rotor. Note51: Alarm indicating operation of normal stage of 1 point earth fault protective element of rotor. Note52: Alarm indicating operation of stage 1 of under frequency protective element of generator. Note53: Alarm indicating operation of stage 2 of under frequency protective element of generator. Note54: Alarm indicating operation of stage 3 of under frequency protective element of generator. Note55: Alarm indicating operation of stage 4 of under frequency protective element of generator. Note56: Alarm indicating operation of stage 1 of over frequency protective element of generator. Note57: Alarm indicating operation of stage 2 of over frequency protective element of generator. Note58: Alarm indicating operation of reverse power protection. Note59: Alarm indicating operation of electric over speed protection of generator. Note60: Alarm indicating secondary circuit failure of VT at generator terminal. Note61: Alarm indicating secondary circuit failure of VT at HV side of main transformer. Note62: Alarm indicating secondary circuit failure of VT at LV side of stepdown transformer. Note63: Alarm indicating operation of mechanical repeater 1. Note64: Alarm indicating operation of mechanical repeater 2. Note65: Alarm indicating operation of mechanical repeater 3. Note66: Alarm indicating operation of mechanical repeater 4. Note67: Alarm indicating overload of main transformer. Note68: Alarm indicating stage 2 of initial cooling of main transformer. Note69: Alarm indicating stage 1 of initial cooling of main transformer. Note70: Alarm indicating stage 2 of initial cooling of stepdown transformer.
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Note71: Alarm indicating overload of stepdown transformer. Note72: Alarm indicating power loss of mechanical relay. Note73: Alarm indicating stage 1 of initial cooling of stepdown transformer. Note74: Alarm indicating DSP2 in CPU module damaged. Note75: Alarm indicating secondary circuit failure of CT at branch 1 of HV side of main transformer. Note76: Alarm indicating secondary circuit failure of CT at branch 2 of HV side of main transformer. Note77: Alarm indicating secondary circuit failure of CT at LV side of main transformer. Note78: Alarm indicating secondary circuit failure of HV side of stepdown transformer. Note79: Alarm indicating secondary circuit failure of CT at HV side of main transformer. Note80: Alarm indicating the zero sequence differential current is abnormal in REF differential protection of main transformer. Note81: Alarm indicating secondary circuit failure of CT1 at HV side of stepdown transformer. Note82: Alarm indicating secondary circuit failure of CT2 at HV side of stepdown transformer. Note83: Alarm indicating secondary circuit failure of CT at LV side of stepdown transformer. Note84: Alarm indicating the zero sequence differential current is abnormal in REF differential protection of stepdown transformer. Note85: Alarm indicating the differential current is abnormal in differential protection of generator and transformer unit. Note86: Alarm indicating the differential current is abnormal in differential protection of main transformer. Note87: Alarm indicating the differential current is abnormal in differential protection of stepdown transformer. Note88: Alarm indicating secondary circuit failure of CT in differential protection of generator and transformer unit. Note89: Alarm indicating secondary circuit failure of CT in differential protection of main transformer. Note90: Alarm indicating secondary circuit failure of CT in differential protection of stepdown transformer. Note91: Alarm indicating overload at LV side of stepdown transformer. Note92: Alarm indicating over excitation of main transformer. Note93: Alarm indicating emergency brake of generator. Note94: Alarm indicating circuit of mechanical is abnormal. Note95: Alarm indicating the binary input of pole disagreement is in excess of 10s. Note96: Alarm indicating operation of ROV protection of LV side of main transformer. Note97: Alarm indicating operation of ROV protection of LV side of stepdown transformer. Note98: CPU module RAM damaged. Note99: CPU module flash memory damaged. Note100: CPU module EEPROM damaged judged by the mismatch of summation of all the settings with the CRC code. Note101: Without modifying protection setting after modification of rated secondary current of CT. Note102: The relay is in the proceeding of setting parameters.
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Note103: Loss of power supply of the optical couplers for binary inputs. Note104: Driving transistor of binary output damaged. Note105: Inner communication error between CPU and MON modules. Note106: The DSP chip in CPU board damaged. Note107: Duration of pickup of any fault detector in MON board is in excess of 10s. Note108: Mismatch of pickup of same type fault detectors in CPU and MON. Note109: Failure of sampled data in CPU board. Note110: Any one of binary input sampled directly does not match with that of reorganization of protection itself. Note111: MON module RAM damaged. Note112: MON module flash memory damaged. Note113: MON module EEPROM damaged. Note114: The DSP chip in MON board damaged. Note115: Duration of pickup of any fault detector in MON board is in excess of 10s. Note116: MON module damaged Note117: Failure of sampled data in MON board. Note A: Note B: Note C: Note D: Note E: Note F: Note G: Note H: Note I: Note J: Note K: Inform manufacturer for maintenance. Modify and check protection setting again. Do nothing except waiting for completion of the process. Check if the power circuit of OPT module is connected correctly with DC module. Treat according to specific application requirement. Check the connection between FACE and CPU modules. Check the metering between CPU and MON modules. Check the secondary circuit and the corresponding settings. Check the corresponding binary input. Check the metering and secondary circuit. Disable the link and check the secondary circuit. After clear the error, reset the relay.

4.2 Metering
The relay produces a variety of both directly and calculated power system quantities. These measurement values are updated on a per half second basis and can be viewed in the menu VALUES of the relay or via relay communication. This relay is able to measure and display the following quantities as summarized:

4.2.1 Measured voltages and currents


The relay produces both phase-to-ground and phase-to-phase voltage and current values. They are produced directly from the DFT (Discrete Fourier Transform) used by the relay protection functions and present both magnitude and phase angle measurement.

4.2.2 Sequence voltages and currents


Sequence quantities are produced by the relay from the measured Fourier values; these are displayed as magnitude and phase angle values.
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4.2.3 Rms. voltages and currents


Rms. phase voltage and current values are calculated by the relay using the sum of the samples squared over a cycle of sampled data.

4.2.4 Differential current and relevant quantities


Differential current and restrained current calculated in differential protection is displayed to user for monitoring the correctness of operation or testing of the differential protection.

4.2.5 Phase angles


Calculated phase angles are also displayed on LCD to help user to check the correctness of CT or VT circuit.

4.2.6 Measurement display quantities


Here are VALUES available in the relay for viewing of measurement quantities. All the measurement quantities can be divided into CPU quantities or DSP quantities by their origin where they are derived. These can also be viewed with DBG-2000 (see DBG-2000 User Manual) and are shown below:

4.2.7 All metering data displayed on LCD


4.2.7.1 Differential currents and related values in transformer metering in CPU and MON

DIFF CURR Id_Diff_Tr: Ir_Diff_Tr: Id_2ndH: Id_5thH: Icorr_HVS1_Tr: Icorr_HVS2_Tr: Icorr_LVS_Tr Icorr_HVS_ST: 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie

Figure 4-1 Differential currents and related values in transformer metering in CPU and MON

Where: Ie: secondary calculated rated current of generator. Id_Diff_Tr: Phase A,B and C of per unit value of transformer differential current. Ir_Diff_Tr: Phase A,B and C of per unit value of transformer restraint current. Id_2ndH: Phase A, B and C of 2nd harmonic component in differential current of transformer. Id_5thH: Phase A, B and C of 5th harmonic component in differential current of transformer. Icorr_HVS1_Tr: Corrected current of phase A, B and C at branch1 of HV side of transformer.

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Icorr_HVS2_Tr: Corrected current of phase A, B and C at branch2 of HV side of transformer. Icorr_LVS_Tr: Corrected current of phase A, B and C at LV side of transformer. Icorr_HVS_ST: Corrected current of phase A, B and C at HV side of stepdown transformer.. Id_1stH_REF_Tr: Zero sequence differential current for transformer restrict earth fault protection. Ir_REF_Tr: Zero sequence restraint current for transformer restrict earth fault protection. I0_Tr: Zero sequence current of HV side branche of transformer. I0_NP_Tr: Zero sequence current of neutral point of transformer. Access path in menu is VALUES CPU METERINGTR METERING DIFF CURR and VALUES MON METERINGTR METERING DIFF CURR. Note: The contents inside the first window are the default display seen by user entering this submenu. User can navigate to the following items by scrolling the arrow keys on the faceplate of the relay. What user meets similar to this case later can be dealt with in same way. 4.2.7.2 Currents in transformer metering in CPU and MON

TR CURR I_HVS1_Tr: I1_HVS1_Tr: I2_HVS1_Tr: I0_HVS1_Tr: I_HVS2_Tr: I1_HVS2_Tr: I2_HVS2_Tr: I0_HVS2_Tr: 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A

Figure 4-2 Currents in transformer metering in CPU and MON

Where: I_HVS1_Tr: Currents of phase A,B and C of branch 1 at HV side of transformer. I1_HVS1_Tr: Positive sequence currents of branch 1 at HV side of transformer. I2_HVS1_Tr: Negative sequence currents of branch 1 at HV side of transformer. I0_HVS1_Tr: Zero sequence currents of branch 1 at HV side of transformer. I_HVS2_Tr: Currents of phase A,B and C of branch 2 at HV side of transformer. I1_HVS2_Tr: Positive sequence currents of branch 2 at HV side of transformer. I2_HVS2_Tr: Negative sequence currents of branch 2 at HV side of transformer. I0_HVS2_Tr: Zero sequence currents of branch 2 at HV side of transformer. I_LVS_Tr: Currents of phase A,B and C at LV side of transformer.
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I1_LVS_Tr: Positive sequence currents of at LV side of transformer. I2_LVS_Tr: Negative sequence currents of at LV side of transformer. I0_LVS_Tr: Zero sequence currents of at LV side of transformer. I_HVS_Tr: Current sum of phase A, B and C of branch 1 and 2 at HV side of transformer. Ipp_HVS_Tr: phase to phase currents at HV side of transformer. I1_HVS_Tr: Positive sequence current at HV side of transformer. I2_HVS_Tr: Negative sequence current at HV side of transformer. I0_HVS_Tr: Zero sequence current at HV side of transformer. I0_NP_HVS_Tr: Zero sequence current of neutral point at HV side of transformer. I0_Gap_HVS_Tr: Zero sequence current of gap CT at HV side of transformer. Access path in menu is VALUES CPU METERINGTR METERING CURR and VALUES MON METERINGTR METERING CURR. 4.2.7.3 Voltages at HV side of transformer metering in CPU and MON

HVS VOLT U_HVS_Tr: Upp_HVS_Tr: U1_HVS_Tr: U2_HVS_Tr: U0_HVS_Tr: U0_DeltVT_HVS_Tr: U0_DeltVT_LVS_Tr: U/F_OvExc_Tr: 000.00 000.00 000.00 V 000.00 000.00 000.00 V 000.00 V 000.00 V 000.00 V 000.00 V 000.00 V 00.000

Figure 4-3 Voltages in transformer metering in CPU and MON

Where: U_HVS_Tr: Phase voltages at HV side of transformer. Upp_HVS_Tr: Phase to phase voltages at HV side of transformer. U1_HVS_Tr: Positive sequence voltage at HV side of transformer. U2_HVS_Tr: Negative sequence voltage at HV side of transformer. U0_HVS_Tr: Zero sequence voltage at HV side of transformer. U0_DeltVT_HVS_Tr: Zero sequence voltage of delta VT at HV side of transformer. U0_DeltVT_LVS_Tr: Zero sequence voltage of delta VT at LV side of transformer. U/F_OvExc_Tr: Calculated ratio between voltage and frequency of transformer. Accu_InvOvExc_Tr: Accumulation of thermal due to inverse time over-excitation of generator. Access path in menu is VALUES CPU METERINGTR METERING HVS VOLT and VALUES MON METERINGTR METERING HVS VOLT.
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4.2.7.4 Differential currents in stepdown transformer metering in CPU and MON

DIFF CURR Id_Diff_ST: Ir_Diff_ST: Id_2ndH: Icorr_HVS_ST: Icorr_LVS_ST: Id_1stH_REF_ST: Ir_REF_ST: I0_ST: 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 In 000.00 In 000.00 In

Figure 4-4 Differential currents in stepdown transformer metering in CPU and MON

Where: Id_Diff_ST: Phase A, B and C of per unit value of stepdown transformer differential current. Ir_Diff_ST: Phase A, B and C of per unit value of stepdown transformer restraint current. Id_2ndH: The 2nd harmonic component in differential current of stepdown transformer. Icorr_HVS_ST: Corrected current of phase A, B and C at HV side of stepdown transformer. Icorr_LVS_ST: Corrected current of phase A, B and C at LV side of stepdown transformer. Id_1stH_REF_ST: Zero sequence differential current for stepdown transformer restrict earth fault protection. Ir_REF_ST: Zero restraint current for stepdown transformer restrict earth fault protection. I0_ST: Zero sequence current of LV side branche of stepdown transformer. I0_NP_ST: Zero sequence current of neutral point of stepdown transformer. Access path in menu is VALUES CPU METERINGST METERING DIFF CURR and VALUES MON METERINGST METERING DIFF CURR.

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4.2.7.5 Currents at HV side of stepdown transformer metering in CPU and MON

HVS CURR I_CT1_HVS_ST: I1_CT1_HVS_ST: I2_CT1_HVS_ST: I0_CT1_HVS_ST: I_CT2_HVS_ST: I1_CT2_HVS_ST: I2_CT2_HVS_ST: I0_CT2_HVS_ST: 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A

Figure 4-5 Currents at HV side of stepdown transformer metering in CPU and MON

Where: I_CT1_HVS_ST: Currents of CT1 at HV side of stepdown transformer. I1_CT1_HVS_ST: Positive sequence currents of CT1 at HV side of stepdown transformer. I2_CT1_HVS_ST: Negative sequence currents of CT1 at HV side of stepdown transformer. I0_CT1_HVS_ST: Zero sequence currents of CT1 at HV side of stepdown transformer. I_CT2_HVS_ST: Currents of CT2 at HV side of stepdown transformer. I1_CT2_HVS_ST: Positive sequence currents of CT2 at HV side of stepdown transformer. I2_CT2_HVS_ST: Negative sequence currents of CT2 at HV side of stepdown transformer. I0_CT2_HVS_ST: Zero sequence currents of CT2 at HV side of stepdown transformer. Access path in menu is VALUES CPU METERINGST METERINGHVS CURR and VALUES MON METERINGST METERINGHVS CURR.

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4.2.7.6 Values at LV side of stepdown transformer metering in CPU and MON

LVS METERING I_LVS_ST: I1_LVS_ST: I2_LVS_ST: I0_LVS_ST: I0_NP_LVS_ST: Upp_LVS_ST: U1_LVS_ST: U2_LVS_ST: 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A 000.00 A 000.00 000.00 000.00 V 000.00 V 000.00 V

Figure 4-6 Values at LV side of stepdown transformer metering in CPU and MON

Where: I_LVS_ST: Currents of LV side of stepdown transformer. I1_LVS_ST: Positive sequence current of LV side of stepdown transformer. I2_LVS_ST: Negative sequence current of LV side of stepdown transformer. I0_LVS_ST: Positive sequence current of LV side of stepdown transformer. I0_NP_LVS_ST: Zero sequence current of neutral point of stepdown transformer. Upp_LVS_ST: Voltages at LV side of stepdown transformer. U1_LVS_ST: Positive sequence voltage at LV side of stepdown transformer. U2_LVS_ST: Negative sequence voltage at LV side of stepdown transformer. U0_DeltVT_LVS_ST: Zero sequence voltage of delta VT at LV side of stepdown transformer. Access path in menu is VALUES CPU METERINGST METERINGLVS METERING and VALUES MON METERINGST METERING LVS METERING.

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4.2.7.7 Values of generator-transformer unit metering in CPU and MON

GTU METERING Id_Diff_GTU: Ir_Diff_GTU: Id_2ndH: Id_5thH: Icorr_HVS_GTU: Icorr_NP_Gen: Icorr_ST: I_HVS_Tr: 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 A

Figure 4-7 Values of generator-transformer unit metering in CPU and MON

Where: Id_Diff_GTU: Phase A,B and C of per unit value of generator-transformer unit differential current. Ir_Diff_GTU: Phase A,B and C of per unit value of generator-transformer unit restraint current. Id_2ndH: Phase A, B and C of 2nd harmonic component in differential current of generator-transformer unit. Id_5thH: Phase A, B and C of 5th harmonic component in differential current of generator-transformer unit. Icorr_HVS_GTU: Corrected current of phase A, B and C at HV side of generator-transformer unit. Icorr_NP_Gen: Corrected current of phase A, B and C at neutral point of generator-transformer unit. Icorr_ST: Corrected current of phase A, B and C of stepdown transformer. I_HVS_Tr: Current of phase A, B and C at HV side of transformer. I1_HVS_Tr: Positive sequence current at HV side of transformer. I2_HVS_Tr: Negative sequence current at HV side of transformer. I0_HVS_Tr: Zero sequence current at HV side of transformer. Access path in menu is VALUES CPU METERINGGTU METERING and VALUES MON METERINGGTU METERING.

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4.2.7.8 Differential currents in generator metering in CPU and MON

DIFF CURR Id_Diff_Gen: Ir_Diff_Gen: I_Term_Gen: I1_Term_Gen: I2_Term_Gen: I0_Term_Gen: I_NP_Gen: I1_NP_Gen: 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A 000.00 000.00 000.00 A 000.00 A

Figure 4-8 Differential currents in generator metering in CPU and MON

Where: Id_Diff_Gen: Phase A,B and C of per unit value of generator differential current. Ir_Diff_Gen: Phase A,B and C of per unit value of generator restraint current. I_Term_Gen: Phase A,B and C of current derived from CT at generator terminal. I1_Term_Gen: Positive sequence current of generator terminal. I2_Term_Gen: Negative sequence current of generator terminal. I0_Term_Gen: Calculated zero sequence current of generator terminal. I_NP_Gen: Phase A,B and C of current derived from CT at generator neutral point. I1_NP_Gen: Positive sequence current of generator neutral point. I2_NP_Gen: Negative sequence current of generator neutral point. I0_NP_Gen: Calculated zero sequence current of generator neutral point. Access path in menu is VALUES CPU METERINGGEN METERING DIFF CURR and VALUES MON METERINGGEN METERING DIFF CURR.

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4.2.7.9 Transverse differential currents of generator in CPU and MON

TRVDIFF CURR Id_TrvDiff_Gen: Id_3rdH_TrvDiff_Gen: Id_SPTDiff_Gen: Ir_SPTDiff_Gen: Icorr_SP1_Gen: Icorr_SP2_Gen: I_SP1_Gen: I1_SP1_Gen: 000.00 A 000.00 A 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 A 000.00 A

Figure 4-9 Transverse differential current and related values in CPU and MON

Where: Id_TrvDiff_Gen: transverse differential current of generator. Id_3rdH_TrvDiff_Gen: 3rd harmonics component of transverse differential current. Id_SPTDiff_Gen: Phase A, B and C of per unit value of phase-splitting transverse differential current of generator. Ir_SPTDiff_Gen: Phase A, B and C of per unit value of restraint current of phase-splitting transverse differential protection. Icorr_SP1_Gen: Phase A, B and C of per unit value of branch1s corrected current. Icorr_SP2_Gen: Phase A, B and C of per unit value of branch2s corrected current. I_SP1_Gen: Phase A, B and C of split branch1s current. I1_SP1_Gen: Split branch1s positive sequence current. I2_SP1_Gen: Split branch1s negative sequence current. I0_SP1_Gen: Split branch1s zero sequence current. I_SP2_Gen: Phase A, B and C of Split branch2s current. I1_SP2_Gen: Split branch2s positive sequence current. I2_SP2_Gen: Split branch2s negative sequence current. I0_SP2_Gen: Split branch2s zero sequence current. Access path in menu is VALUES CPU METERING GEN METERING GEN TRVDIFF CURR and VALUES MON METERING GEN METERING GEN TRVDIFF CURR.

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4.2.7.10 Voltages of generator metering in CPU and MON

VOLTAGE U_VT1_Term_Gen: U1_VT1_Term_Gen: U2_VT1_Term_Gen: U0_VT1_Term_Gen: U_VT2_Term_Gen: U1_VT2_Term_Gen: U2_VT2_Term_Gen: U0_VT2_Term_Gen: 000.00 000.00 000.00 V 000.00 V 000.00 V 000.00 V 000.00 000.00 000.00 V 000.00 V 000.00 V 000.00 V

Figure 4-10 Voltages and related values in CPU and MON

Where: U_VT1_Term_Gen: Phase A, B and C of voltage derived from VT1 at the generators terminal. U1_VT1_Term_Gen: Calculated positive sequence voltage of VT1. U2_VT1_Term_Gen: Calculated negative sequence voltage of VT1. U0_VT1_Term_Gen: Calculated zero sequence voltage of VT1. U_VT2_Term_Gen: Phase A, B and C of voltage derived from VT2 at the generators terminal. U1_VT2_Term_Gen: Calculated positive sequence voltage of VT2. U2_VT2_Term_Gen: Calculated negative sequence voltage of VT2. U0_VT2_Term_Gen: Calculated zero sequence voltage of VT2. Upp_VT1_Term_G: Phase-to-phase voltage of VT1Uab, Ubc, Uca. Upp_VT2_Term_G: Phase-to-phase voltage of VT2Uab, Ubc, Uca. U0_DeltVT1_Term_Gen: Zero sequence voltage derived from open-delta side of VT1 at the generators terminal. U0_NP_Gen: Zero sequence voltage derived from VT at the neutral point of generator. U0_3rdH_VT1_Term_Gen: Calculated 3rd harmonics of VT1 at the generators terminal. U0_3rdH_VT_NP_Gen: Calculated 3rd harmonics of VT at the neutral point of generator. Ud_3rdH_Sta: 3rd harmonics differential voltage between the terminal and the neutral point of generator. U0_Longl_Gen: Longitude zero sequence voltage of generator. U0_3rdH_Longl_Gen: 3rd harmonics voltage in longitude zero voltage. Access path in menu is VALUES CPU METERING GEN METERING VOLTAGE and VALUES MON METERING GEN METERING VOLTAGE.

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4.2.7.11 Misc metering quantities of generator in CPU and MON

GEN MISC VALUES P_Gen: Q_Gen: Accu_InvOvLd_Sta: Accu_Therm_RotBody: U/F_OvExc_Gen: Accu_InvOvExc_Gen: f_Gen: Accu_UF1_Gen: + 000.00 % + 000.00 % 000.00 % 000.00 % 00.000 000.00 % 000.00 Hz 000.00 Min

Figure 4-11 Misc metering quantities of generator

Where: P_Gen: Active power of generator. Q_Gen: Reactive power of generator. Accu_InvOvLd_Sta: Accumulation of thermal due to overload of stator. Accu_Therm_RotBody: Accumulation of thermal due to negative sequence current through stator result from interaction between rotor and stator. U/F_OvExc_Gen: Calculated ratio of per unit values of voltage and frequency. Accu_InvOvExc_Gen: Accumulation of thermal due to overexcitation of generator. f_Gen: real time calculated frequency of generator. Accu_UF1_Gen: Accumulation of underfrequency condition time of generator to decide operation of state 1 of underfrequency protection. Accu_UF2_Gen: Accumulation of underfrequency condition time of generator to decide operation of state 1 of underfrequency protection. U_RotWdg: voltage of positive pole of rotor to negative pole. R_EF_RotWdg: Calculated grounded resistance of rotor.. Location_EF_RotWdg: Location of earth fault of rotor winding of generator. U1_2ndH_VT1_Term_Gen: Positive sequence voltage of 2nd harmonics voltage of stator derived from VT1 at the generators terminal. U2_2ndH_VT1_Term_Gen: Negative sequence voltage of 2nd harmonics voltage of stator derived from VT1 at the generators terminal. Access path in menu is VALUES CPU METERING GEN METERINGMISC METERING and VALUES MON METERING GEN METERINGMISC METERING.

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4.2.7.12 Differential currents in excitation metering in CPU and MON

DIFF CURR Id_Diff_Exc: Ir_Diff_Exc: Id_2ndH: Icorr_S1_Exc: Icorr_S2_Exc: 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie

Figure 4-12 Differential currents in excitation metering in CPU and MON

Where: Id_Diff_Exc: Phase A, B and C of differential current of excitation transformer or exciter. Ir_Diff_Exc: Phase A, B and C of restraint current of excitation transformer or exciter. Id_2ndH: Phase A, B and C of 2nd harmonics component in differential current of excitation transformer or exciter. Icorr_S1_Exc: Phase A, B and C of corrected current on the high voltage side of excitation transformer or terminal side of exciter (Side 1). Icorr_S2_Exc: Phase A, B and C of corrected current on the low voltage side of excitation transformer or neutral point side of exciter (Side 2) . Access path in menu is VALUES CPU METERING EXC METERING DIFF CURR and VALUES MON METERING EXC METERING DIFF CURR. 4.2.7.13 AC metering in excitation metering in CPU and MON

AC METERING I_S1_Exc: I1_S1_Exc: I2_S1_Exc: I0_S1_Exc: I_S2_Exc: I1_S2_Exc: I2_S2_Exc: I0_S2_Exc: 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A 000.00 000.00 000.00 A 000.00 A 000.00 A 000.00 A

Figure 4-13 AC metering in excitation metering in CPU and MON


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Where: I_S1_Exc: Phase A, B and C current on side 1 of excitation transformer or exciter. I1_S1_Exc: Positive sequence current of side 1 of excitation transformer or exciter. I2_S1_Exc: negative sequence current of side 1 of excitation transformer or exciter. I0_S1_Exc: zero sequence current of side 1 of excitation transformer or exciter. I_S2_Exc: Phase A, B and C current on side 2 of excitation transformer or exciter. I1_S2_Exc: Positive sequence current of side 2 of excitation transformer or exciter. I2_S2_Exc: negative sequence current of side 2 of excitation transformer or exciter. I0_S2_Exc: zero sequence current of side 2 of excitation transformer or exciter. Upp_ET: Phase to phase voltages of excitation transformer. U1_ET: Positive sequence voltage of excitation transformer. U2_ET: Negative sequence voltage of excitation transformer. I_RotWdg: excitation current through rotor winding. I_Exc: alternative excitation current on the rectifiers AC side Accu_Therm_RotWdg: accumulation of thermal of rotor winding. Access path in menu is VALUES CPU METERING EXC METERING AC METERING and VALUES MON METERING EXC METERING AC METERING. 4.2.7.14 Phase angles of transformer metering

TR PHASE ANGLE _HVS1_Tr_&_HVS2_Tr: _HVS1_Tr_&_LVS_Tr: _HVS1_Tr_&_HVS_ST: _HVS_Tr_&_NP_Tr: _HVS_Tr_&_HVS_ST: I0_Tr_&_NP_Tr: ipp_HVS1_Tr: ipp_HVS2_Tr: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000
o o o o o o o o

Figure 4-14 Phase angle of transformer metering

Where: _HVS1_Tr_&_HVS2_Trphase angle between same-phase currents derived from branch 1 and 2 of HV side of transformer. _HVS1_Tr_&_LVS_Trphase angle between same-phase currents derived from branch 1 at HV side and form LV side of transformer. _HVS1_Tr_&_HVS_ST phase angle between same-phase currents derived from branch 1 at HV side of transformer and form HV side of stepdown transformer.
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_HVS_Tr_&_NP_Trphase angle between same-phase currents from sum currents of HV side and neutral point of transformer. _HVS_Tr_&_HVS_ST phase angle between same-phase currents from sum currents of HV side and HV side of stepdown transformer. I0_Tr_&_NP_Trphase angle between zero sequence currents from sum currents of HV side and neutral point of transformer. ipp_HVS1_Tr: phase angle between phase A and B, B and C, C and A of currents derived from HVS1 of transformer. ipp_HVS2_Tr: phase angle between phase A and B, B and C, C and A of currents derived from HVS2 of transformer. ipp_HVS_Tr: phase angle between phase A and B, B and C, C and A of currents derived from HVS of transformer. ipp_LVS_Tr: phase angle between phase A and B, B and C, C and A of currents derived from LVS of transformer. vpp_Tr: phase angle between phase A and B, B and C, C and A of voltages of transformer. vi_Tr: phase angle between voltages and currents of phase A, B and C of transformer. vi0_Tr: phase angle between zero sequence voltage and zero sequence current of transformer. Access path in menu is VALUES PHASE ANGLE TR PHASE ANGLE 4.2.7.15 Phase angles of auxiliary metering

ST PHASE ANGLE _HVS_ST_&_LVS_ST: i0_ST_&_NP_ST: ipp_CT1_HVS_ST: ipp_CT2_HVS_ST: ipp_LVS_ST: vpp_LVS_ST: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000
o o o o o o

Figure 4-15 Phase angles of stepdown transformer metering

Where: _HVS_ST_&_LVS_ST phase angle between same-phase voltages of HVS and LVS of stepdown transformer. i0_ST_&_NP_STphase angle of zero sequence current of HVS and neutral point of stepdown transformer. ipp_CT1_HVS_ST: phase angle between phase A and B, B and C, C and A of current derived from CT1 at HV side of stepdown transformer.
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ipp_CT2_HVS_ST: phase angle between phase A and B, B and C, C and A of current derived from CT2 at HV side of stepdown transformer. ipp_LVS_ST: phase angle between phase A and B, B and C, C and A of currents of LV side of stepdown transformer. vpp_LVS_ST: phase angle between phase A and B, B and C, C and A of voltages of LV side of stepdown transformer. Access path in menu is VALUES PHASE ANGLE ST PHASE ANGLE. 4.2.7.16 Phase angles of generator metering

GEN PHASE ANGLE _Term_Gen_&_NP_Gen: _SP1_Gen_&_SP2_Gen: ipp_Term_Gen: ipp_NP_Gen: ipp_SP1_Gen: ipp_SP2_Gen: vpp_VT1_Term_Gen: vpp_VT2_Term_Gen: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000
o o o o o o o o

Figure 4-16 Phase angles of generator metering

Where: _Term_Gen_&_NP_Gen phase angle between same-phase currents derived from CT at generators terminal and at generators neutral point. _SP1_Gen_&_SP2_Gen: phase angle between same-phase currents derived from CT at phase-splitting branch 1 and branch2. ipp_Term_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at generators terminal. ipp_NP_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at generators neutral point. ipp_SP1_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at the phase-splitting branch 1. ipp_SP2_Gen: phase angle between phase A and B, B and C, C and A of current derived from CT at the phase-splitting branch 2. vpp_VT1_Term_Gen: phase angle between phase A and B, B and C, C and A of voltage derived from VT1 at generators terminal. vpp_VT2_Term_Gen: phase angle between phase A and B, B and C, C and A of voltage derived from VT2 at generators terminal. v_VT1_Gen_&_VT2_Gen: phase angle between same-phase voltage derived from VT1 and VT2
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at generators terminal. _V3rdH_Gen: phase angle between phase A and B, B and C, C and A of 3rd harmonics voltage derived from VT1 at generators terminal. vi_Term_Gen: phase angle between same-phase voltage and current of generators terminal. Access path in menu is VALUES PHASE ANGLE GEN PHASE ANGLE. 4.2.7.17 Phase angle of excitation metering

EXC PHASE ANGLE 1_S1_Exc_&_S2_Exc: ipp_S1_Exc: ipp_S2_Exc: vpp_Exc: 000 000 000 000 000 000 000 000 000 000 000 000
o o o o

Figure 4-17 Excitation System metering of generator

Where: i_S1_Exc_&_S2_Exc: phase angle between same-phase currents derived from CT at generators terminal and that at generators neutral point ipp_S1_Exc: phase angle between phase A and B, B and C, C and A of currents derived from CT at side 1 of excitation transformer or exciter. ipp_S2_Exc: phase angle between phase A and B, B and C, C and A of currents derived from CT at side 2 of excitation transformer or exciter. vpp_Exc: phase angle between phase A and B, B and C, C and A of voltages of excitation transformer or exciter. Access path in menu is VALUES PHASE ANGLE EXC PHASE ANGLE.

4.3 Signaling
Signals here mean changes of binary inputs. All these signals can be displayed on LCD, locally printed or sent to automation system of substation via communication channel.

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4.3.1 Enabling binary inputs of transformer


TR PROT EBI EBI_Diff_GTU: EBI_Diff_Tr: EBI_PPF_Tr: EBI_EF_Tr: EBI_REF_Tr: 0 0 0 0 0

Figure 4-18 Enabling binary inputs of transformer protection

Where: EBI_Diff_GTUEnabling binary input of differential protection of generator-transformer unit. EBI_Diff_Tr: Enable binary input of differential protection of transformer. EBI_PPF_TrEnabling binary input of phase-to-phase backup protection of transformer. EBI_EF_TrEnabling binary input of earth fault protection of transformer. EBI_REF_Tr: Enabling binary input of restrict earth fault protection of transformer. Access path in menu is VALUES CPU BI STATE TR PROT EBI and VALUES MON BI STATE TR PROT EBI .

4.3.2 Enabling binary inputs of generator


GEN PROT EBI EBI_Diff_Gen: EBI_SPTDiff_Gen: EBI_PPF_Gen: EBI_IntTurn_Gen: EBI_ROV_Sta: EBI_V3rd_Sta: EBI_1PEF_RotWdg: EBI_2PEF_RotWdg: 0 0 0 0 0 0 0 0

Figure 4-19 Enabling binary inputs of generator protection

Where: EBI_Diff_GenEnabling binary input of differential protection of generator.


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EBI_SPTDiff_Gen: Enabling binary input of spilt phase differential protection of generator. EBI_PPF_Gen Enabling binary input of phase-to-phase backup protection of generator. EBI_IntTurn_GenEnabling binary input of interturn protection of generator. EBI_ROV_Sta: Enabling binary input of zero sequence overvoltage protection of stator. EBI_V3rd_Sta: Enabling binary input of 3rd harmonics voltage protection of generator. EBI_1PEF_RotWdg: Enabling binary input of 1 point earth fault protection of rotor. EBI_2PEF_RotWdg: Enabling binary input of 2 points earth fault protection of rotor. EBI_OvLd_Sta: Enabling binary input of overload protection of stator. EBI_NegOC_Sta: Enabling binary input of negative overcurrent protection of stator. EBI_LossExc_Gen: Enabling binary input of loss-of-excitation protection of generator. EBI_OOS_Gen: Enabling binary input of out-of-step protection of generator. EBI_VoltProt_Gen: Enabling binary input of over-voltage and under-voltage protection of generator. EBI_OvExc_Gen: Enabling binary input of over-excitation protection of generator. EBI_PwrProt_Gen: Enabling binary input of power protection of generator. EBI_FreqProt_Gen: Enabling binary input of over-frequency and under-frequency protection of generator. EBI_AccEnerg_Gen: Enabling binary input of accidental energization protection of generator. EBI_StShut_Gen: Enabling binary input of startup and shutdown protection of generator. Access path in menu is VALUES CPU BI STATE GEN PROT EBI and VALUES MON BI STATE GEN PROT EBI.

4.3.3 Enabling binary inputs of excitation and stepdown transformer protection


ET&ST PROT EBI EBI_Diff_Exc: EBI_Bak_Exc: EBI_Diff_ST: EBI_Bak_HVS_ST: EBI_Bak_LVS_ST: EBI_REF_ST: 0 0 0 0 0 0

Figure 4-20 Enabling Binary Input list of excitation and stepdown transformer protection

Where: EBI_Diff_Exc: Enabling binary input of differential protection of excitation transformer of exciter. EBI_Bak_Exc: Enabling binary input of backup protection of excitation transformer of exciter.
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EBI_Diff_ST: Enabling binary input of differential protection of stepdown transformer. EBI_Bak_HVS_ST: Enabling binary input of backup protection of HV side of stepdown transformer. EBI_Bak_LVS_ST: Enabling binary input of backup protection of LV side of stepdown transformer. EBI_REF_ST: Enabling binary input of restrict earth fault protection of stepdown transformer. Access path in menu is VALUES CPU BI STATE ET&ST PROT EBI and VALUES MON BI STATE ET&ST PROT EBI .

4.3.4 Binary inputs of mechanical protection


Mech Prot BI EBI_Trp_MechRly1: EBI_Trp_MechRly2 EBI_Trp_MechRly3: EBI_Trp_MechRly4: BI_MechRly1: BI_MechRly2: BI_MechRly3: BI_MechRly4 0 0 0 0 0 0 0 0

Figure 4-21 Binary Inputs of mechanical protection

Where: EBI_Trp_MechRly x: Enabling binary input of mechanical protection to allow mechanical repeater x to initial tripping. BI_MechRly x: Binary input indicating operation of mechanical repeater x. BI_SyncCondenser: Binary input indicating the synchronous condenser is put into operation. Access path in menu is VALUES CPU BI STATE EXC PROT EBI and VALUES MON BI STATE EXC PROT EBI.

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4.3.5 Auxiliary binary input


AUX BI BI_52b_GCB: BI_52b_CB_HVS1_Tr: BI_52b_CB_HVS1_Tr: BI_Valve_Turbine: BI_PoleDisagr_CB: BI_UrgBrake: BI_Reserved: BI_PS_Superv: 0 0 0 0 0 0 0 0

Figure 4-22 Auxiliary binary input

Where: BI_52b_GCBBinary input of auxiliary contact of close position of circuit breaker at generators terminal. BI_52b_CB_HVS1_Tr: Binary input of auxiliary contact of close position of circuit breaker at branch 1 of HV side of transformer. BI_52b_CB_HVS2_Tr: Binary input of auxiliary contact of close position of circuit breaker at branch 2 of HV side of transformer. BI_Valve_Turbine: Binary input indicating the valve of steam turbine is in close position. BI_PoleDisagr_CB: Binary input of pole disagreement of circuit breaker. BI_UrgBrake: Binary input indicating the generator is in urgent braking condition. BI_Reserved: Reserved binary input. BI_PS_Superv: Binary input indicating the power supply for all binary input circuit is working in good condition. Access path in menu is VALUES CPU BI STATE AUX BI and VALUES MON BI STATE AUX BI.

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4.3.6 Fault detector flag generated internal by MON


MON FD MON.FD_Diff_Tr/GTU: MON.FD_PPF_&_EF_Tr: MON.FD_Diff_ST: MON.FD_Bak_ST: MON.FD_Diff_Gen: MON.FD_EF_Sta: MON.FD_EF_RotWdg: MON.FD_OvLd_Sta: 0 0 0 0 0 0 0 0

Figure 4-23 Fault detector flag generated internal by MON

Where: MON.FD_Diff_Tr/GTUInternally generated binary input indicating operation of fault detector of differential protection of transformer or generator-transformer unit. MON.FD_PPF_&_EF_Tr: Internally generated binary input indicating operation of phase to phase fault and earth fault protection of transformer. MON.FD_Diff_ST: Internally generated binary input indicating operation of differential protection of stepdown transformer. MON.FD_Bak_ST: Internally generated binary input indicating operation of backup protection of stepdown transformer. MON.FD_Diff_Gen: Internally generated binary input indicating operation of differential protection of generator. MON.FD_EF_Sta: Internally generated binary input indicating operation of fault detector of earth fault protection of stator. MON.FD_EF_RotWdg: Internally generated binary input indicating operation of fault detector of earth fault protection of rotor. MON.FD_OvLd_Sta: Internally generated binary input indicating operation of fault detector of overload protection of stator. MON.FD_Bak_Gen: Internally generated binary input indicating operation of fault detector of backup protection of generator. MON.FD_OV_&_OvExc_Gen: Internally generated binary input indicating operation of fault detector of overvoltage and overexciatation protection of generator. MON.FD_FreqProt_Gen: Internally generated binary input indicating operation of fault detector of frequency protection of generator. MON.FD_LossExc_&_OOS_Gen: Internally generated binary input indicating operation of fault detector of loss-of-excitation and out-of-step protection of generator.

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MON.FD_Pwr&AccEnerg_Gen: Internally generated binary input indicating operation of fault detector of power protection and accidental energization protection of generator. MON.FD_StShut_Gen: Internally generated binary input indicating operation of fault detector of startup and shutdown protection of generator. MON.FD_Prot_Exc: Internally generated binary input indicating operation of fault detector of protections of excitation transformer or exciter. MON.FD_MechRly: Internally generated binary input indicating operation of fault detector of mechanical protection of excitation transformer. Access path in menu is VALUES CPU BI STATE MON FD and VALUES MON BI STATE MON FD.

4.3.7 Other Binary Inputs


PS SUPERV BI BI_PS_Superv: BI_PS_Opto: BI_ResetTarget: BI_Pulse_GPS: BI_Print: 1 1 0 0 0

Figure 4-24 Other binary inputs

Where: BI_PS_Superv: binary input indicating the power supply of mechanical repeater is in proper working condition. BI_PS_Opto: binary input indicating the power supply of optical isolators is in proper working condition. BI_ResetTarget: binary input of signal reset button. BI_Pulse_GPS: binary input of GPS clock synchronous pulse. BI_Print: binary input represents the print button. Access path in menu is VALUES CPU BI STATE PS SUPERV BI and VALUES MON BI STATE PS SUPERV BI.

4.4 Event & fault records


4.4.1 Introduction
The RCS-985A is equipped with integral measurements, event, fault and disturbance recording facilities suitable for analysis of complex system disturbances. The relay is flexible enough to allow
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for the programming of these facilities to specific user application requirements and is discussed below.

4.4.2 Event & Fault records


The relay records and time tags up to 32 events and stores them in non-volatile (battery backed up) memory. This enables the system operator to establish the sequence of events that occurred within the relay following a particular power system condition, switching sequence etc. When the available space is exhausted, the oldest event is automatically overwritten by the new one. The real time clock within the relay provides the time tag to each event, to a resolution of 1ms. The event records are available for viewing either via the front plate LCD or remotely, via the communications ports (courier and MODBUS versions only). Local viewing on the LCD is achieved in the menu column entitled REPORT. This column allows viewing of event and fault records and is shown by setting sequence No. of the event or fault report by user. Refer to section 8 for details of operation method.

4.4.3 Type of event


An event may be a change of state of a control input or output relay, an alarm condition and operation reports of protection etc.

4.4.4 Change of state of binary inputs


If one or more of the opto inputs has changed state since the last time that the protection algorithm ran, the new status is logged as an event. When this event is selected to be viewed on the LCD, the applicable cells will become visible as shown below:

Record No. BI CHANG REPORT Dataxxxx - xx xx Timexx : xx : xx : xxx Binary input name Changing manner

Figure 4-25 Format of Event Report

Where Record NO. means the sequence No. of the record which is generated by RCS-985A automatically. Date: DD-MM-YY and Time: HH:MM:SS:xxxxms commonly comprise the absolute time tag of the record. Binary input Name shows the name of the binary input whose state changes. Changing manner shows how to change of the state of the binary input. For instance:
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No. 011

BI Change Report 2007 - 01 - 01 15 : 19 : 00 : 003 0 -> 1

EBI_Diff_Gen

Figure 4-26 Example of Binary Input Changing Report

All the binary input that may be shown in the menu can be found in section 4.3, here list them again.
Table 4-2 List of binary input of RCS-985A No. BI name

No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25.
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BI name

EBI_Diff_Gen EBI_IntTurn_Gen EBI_ROV_Sta EBI_V3rdH_Sta EBI_1PEF_RotWdg EBI_2PEF_RotWdg EBI_OvLd_Sta EBI_NegOC_Sta EBI_LossExc_Gen EBI_OOS_Gen EBI_VoltProt_Gen EBI_OvExc_Gen EBI_PwrProt_Gen EBI_FreqProt_Gen EBI_AccEnerg_Gen EBI_StShut_Gen EBI_Diff_Exc EBI_Bak_Exc EBI_Trp_MechRly1 EBI_Trp_MechRly2 EBI_Trp_MechRly3 EBI_Trp_MechRly4 EBI_PPF_Gen EBI_SPTDiff_Gen BI_UrgBrake

36. 37. 38. 39. 40. 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. 51. 52. 53. 54. 55. 56. 57. 58. 59. 60.

EBI_Bak_HVS_ST EBI_Bak_LVS_ST EBI_REF_ST EBI_Reserved2 EBI_Reserved3 BI_Print BI_Pulse_GPS BI_ResetTarget BI_PS_Opto BI_MechRly1 BI_MechRly2 BI_MechRly3 BI_MechRly4 BI_52b_GCB BI_52b_CB_HVS1_Tr BI_52b_CB_HVS2_Tr BI_PoleDisagr_CB BI_Valve_Turbine MON.FD_Diff_Tr MON.FD_PPF&EF_Tr MON.FD_Diff_ST MON.FD_Bak_ST MON.FD_Diff_Gen MON.FD_EF_Sta MON.FD_EF_RotWdg
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No. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35.

BI name BI_SyncCondenser BI_Reserved BI_PS_Superv EBI_Diff_Tr EBI_PPF_Tr EBI_EF_Tr EBI_REF_Tr EBI_Diff_GTU EBI_Reserved1 EBI_Diff_ST

No. 61. 62. 63. 64. 65. 66. 67. 68. 69. 70.

BI name MON.FD_OvLd_Sta MON.FD_PPF_Gen MON.FD_OvExc_Gen MON.FD_FreqProt_Gen MON.FD_LossExc_&_OOS_Gen MON.FD_Pwr&AccEnerg_Gen MON.FD_StShut_Gen MON.FD_Prot_Exc MON.FD_MechRly

4.4.5 Relay alarm conditions


Any alarm conditions generated by the relays will also be logged as individual events. The access method and display format is similar to that of binary input changing record as shown as below.

Record No. ALARM REPORT Data xxxx - xx xx Time xx : xx : xx : xxx ALARM ELEMENT

Figure 4-27 Format of alarm report on LCD

The above figure shows the abbreviated description that is given to the various alarm conditions and also a corresponding value between 0 and 31. This value is appended to each alarm event in a similar way as for the input events previously described. It is used by the event extraction software, such as DBG2000, to identify the alarm and is therefore invisible if the event is viewed on the LCD. The following table shows all of the alarm elements that may be displayed in this item.
Table 4-3 List of alarm elements No. Alarm name

No. 1. 2. 3.

Alarm name

Alm_SwOv_VTS1_Gen Alm_SwOv_VTS2_Gen Alm_BlkV3rdHDiff_VTS1

60. 61. 62.

Alm_MechRly2 Alm_MechRly3 Alm_MechRly4


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No. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. 42. 43. 44. 45. 46.

Alarm name Alm_BlkIntTurn_VTS2 Alm_VTS_HVS_Tr Alm_VTS1_Term_Gen Alm_VTS2_Term_Gen Alm_VTS_NP_Gen Alm_DeltVTS1_Term_Gen Alm_DeltVTS2_Term_Gen Alm_VTS_RotWdg Alm_Pos_CB_HVS1_Tr Alm_Pos_CB_HVS2_Tr Alm_VTS_LossExc_RotWdg Alm_VTS_ET Alm_PM_DSP1_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_Term_Gen Alm_CTS_NP_Gen Alm_CTS_SP1_Gen Alm_CTS_SP2_Gen Alm_CTS_S1_Exc Alm_CTS_S2_Exc Alm_CTS_TrvDiff_Gen Alm_Diff_Gen Alm_SPTDiff_Gen Alm_Diff_ET Alm_Diff_Exciter Alm_DPFC_IntTurn_Gen Alm_Pos_GCB Alm_CTS_Diff_Gen Alm_CTS_SPTDiff_Gen Alm_CTS_Diff_ET Alm_CTS_Diff_Exciter Alm_BO_OC2_Gen Alm_On_2PEF_RotWdg Alm_Ext_OOS_Gen Alm_Int_OOS_Gen Alm_Accel_OOS_Gen Alm_Decel_OOS_Gen Alm_RevP_Gen Alm_LossExc_Gen Alm_OvExc_Gen Alm_OvLd_Sta Alm_NegOC_Sta

No. 63. 64. 65. 66. 67. 68. 69. 70. 71. 72. 73. 74. 75. 76. 77. 78. 79. 80. 81. 82. 83. 84. 85. 86. 87. 88. 89. 90. 91. 92. 93. 94. 95. 96. 97. 98. 99. 100. 101. 102. 103. 104. 105.

Alarm name Alm_BO_UC_OvSp_Gen Alm_VTS_Term_Gen Alm_VTS_HVS_Tr Alm_VTS_LVS_ST Alm_MechRly1 Alm_OvLd_Tr Alm_InitCool2_OvLd_Tr Alm_InitCool1_OvLd_Tr Alm_InitCool2_OvLd_ST Alm_OvLd_ST Alm_PwrLoss_MechRly Alm_InitCool1_OvLd_ST Alm_PM_DSP2_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_LVS_Tr Alm_CTS_HVS_ST Alm_CTS_HVS_Tr Alm_REF_Tr Alm_CTS2_HVS_ST Alm_CTS1_HVS_ST Alm_CTS_LVS_ST Alm_REF_ST Alm_Diff_GTU Alm_Diff_Tr Alm_Diff_ST Alm_CTS_Diff_GTU Alm_CTS_Diff_Tr Alm_CTS_Diff_ST Alm_OvLd_LVS_ST Alm_OvExc_Tr Alm_UrgBrake Alm_Inconsist_MechRly Alm_PoleDisagr_CB Alm_ROV_LVS_Tr Alm_ROV_LVS_ST Alm_RAM_CPUBrd Alm_ROM_CPUBrd Alm_EEPROM_CPUBrd Alm_InvalidSetting Alm_ModifiedSetting Alm_PwrLoss_Opto Alm_TripOutput

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No. 47. 48. 49. 50. 51. 52. 53. 54. 55. 56. 57. 58. 59.

Alarm name Alm_OvLd_RotWdg Alm_ROV_Sta Alm_V3rdHRatio_Sta Alm_V3rdHDiff_Sta Alm_Sens_1PEF_RotWdg Alm_1PEF_RotWdg Alm_UF1_Gen Alm_UF2_Gen Alm_UF3_Gen Alm_UF4_Gen Alm_OF1_Gen Alm_OF2_Gen Alm_RevP_Gen

No. 106. 107. 108. 109. 110. 111. 112. 113. 114. 115. 116. 117. 118.

Alarm name Alm_InnerComm Alm_DSP_CPUBrd Alm_PersistFD_CPUBrd Alm_InconsistFD Alm_Sample_CPUBrd Alm_BI_CPUBrd Alm_RAM_MONBrd Alm_ROM_MONBrd Alm_EEPROM_MONBrd Alm_DSP_MONBrd Alm_PersistFD_MONBrd Alm_MONBrd Alm_Sample_MONBrd

4.4.6 Protection element pickup and trips


Any operation of protection elements, (either a pickup or a trip condition) will be logged as an event record, consisting of a text string indicating the operated element and an event sequence NO.. Again, this number is intended not only for use by the event extraction software, such as DBG2000, but also for the user, and is therefore visible when the event is viewed on the LCD. The below figure shows the format of protection element operation record.

Record No. TRIP REPORT Data xxxx - xx xx Time xx : xx : xx : xxx OPERATE ELEMENT xxx ms

Figure 4-28 Format of trip report

Where: Record NO. means the sequence No. of the record which is generated by RCS-985A automatically. Date: xxxx-xx-xx and Time: xx:xx:xx:xxxxms commonly comprise the absolute time tag of the record.
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Operation Element shows the name of the operation element. If there are more than one elements operating, they will scroll one by one to display on LCD. xxx ms shows the relative time of operation element to fault detector of the relay. The following table lists all the operation elements that may be displayed on LCD.
Table 4-4 List of operation elements Operation element name No. Operation element name 55. Op_GenDiff_StShut_Gen Op_InstDiff_Gen 56. Op_PcntDiff_Gen Op_SPTDiff_StShut_Gen 57. Op_DPFC_Diff_Gen Op_ETDiff_StShut_Gen 58. Op_InstSPTDiff_Gen Op_StaROV_StShut_Gen 59. Op_PcntSPTDiff_Gen Op_OC1_ET 60. Op_InstDiff_Exciter Op_OC2_ET 61. Op_PcntDiff_Exciter Op_InstDiff_Tr 62. Op_InstDiff_ET Op_PcntDiff_Tr 63. Op_PcntDiff_ET Op_DPFC_Diff_Tr 64. Op_DPFC_IntTurn_Gen Op_OC11_Tr 65. Op_SensTrvDiff_Gen Op_OC12_Tr 66. Op_OC21_Tr Op_UnsensTrvDiff_Gen 67. Op_SensIntTurn_Gen Op_OC22_Tr 68. Op_UnsensIntTurn_Gen Op_ROC11_Tr 69. Op_ROC12_Tr Op_SensROV_Sta 70. Op_UnsensROV_Sta Op_ROC21_Tr 71. Op_ROC22_Tr Op_V3rdHRatio_Sta 72. Op_V3rdHDiff_Sta Op_ROC31_Tr 73. Op_1PEF_RotWdg Op_ROC32_Tr 74. Op_TrDiff_StShut_Gen Op_2PEF_RotWdg 75. Op_OvLd_Sta Op_STDiff_StShut_Gen 76. Op_InvOvLd_Sta Op_InstDiff_GTU 77. Op_NegOC_Sta Op_PcntDiff_GTU 78. Op_InvNegOC_Sta Op_InstREF_Tr 79. Op_PcntREF_Tr Op_OvLd_RotWdg 80. Op_InvOvLd_RotWdg Op_Z11_Tr 81. Op_OC1_Gen Op_Z12_Tr 82. Op_OC2_Gen Op_Z21_Tr 83. Op_OV1_Gen Op_Z22_Tr 84. Op_OV2_Gen Op_ROV1_Gap_Tr 85. Op_UV_Gen Op_ROV2_Gap_Tr 86. Op_OvExc1_Gen Op_ROC1_Gap_Tr 87. Op_OvExc2_Gen Op_ROC2_Gap_Tr 88. Op_InvOvExc_Gen Op_PD1 89. Op_UF1_Gen Op_PD2 90. Op_UF2_Gen Op_InstREF_ST 91. Op_UF3_Gen Op_PcntREF_ST
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No. 38. 39. 40. 41. 42. 43. 44. 45. 46. 47. 48. 49. 50. 51. 52. 53. 54.

Operation element name Op_UF4_Gen Op_OF1_Gen Op_OF2_Gen Op_Z1_Gen Op_Z2_Gen Op_LossExc1_Gen Op_LossExc2_Gen Op_LossExc3_Gen Op_Ext_OOS_Gen Op_Int_OOS_Gen Op_RevP_Gen Op_UP_Gen Op_SeqTrpRevP_Gen Op_AccEnerg1_Gen Op_AccEnerg2_Gen Op_Flash1_TCB Op_Flash2_TCB

No. 92. 93. 94. 95. 96. 97. 98. 99. 100. 101. 102. 103. 104. 105. 106. 107. 108.

Operation element name Op_InstDiff_ST Op_PcntDiff_ST Op_OC1_HVS_ST Op_OC2_HVS_ST Op_OC1_LVS_ST Op_OC2_LVS_ST Op_ROC1_LVS_ST Op_ROC2_LVS_ST Op_OvExc1_Tr Op_OvExc2_Tr Op_InvOvExc_Tr Op_MechRly1 Op_MechRly2 Op_MechRly3 Op_MechRly4 Op_UrgBrake

4.4.7 Viewing event records via DBG-2000 support software


What the event records are extracted and viewed on a PC they look slightly different than what viewed on the LCD. The following figure shows an example of how various events appear when displayed using DBG-2000:

Figure 4-29 Trip reports seen by DBG-2000

4.5 Disturbance Record


The integral disturbance recorder has an area of memory specifically set aside for record storage. The number of records that may be stored by the relay is dependent upon the selected recording duration. The recorder of CPU board can typically store a minimum of 32 records, among them 8
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records with instantaneous waveform. The record is composed of tripping element, faulty phase, operation time and the waveform content is composed of differential currents, corrected current of each side of generator or transformer, three-phase current of each side, zero sequence current of each side (if available), three-phase voltages, zero sequence voltage of each side, negative sequence voltage and tripping pulse. The MON board can store up to 4 seconds (24 sampling points per cycle) or 8 seconds (12 sampling points per cycle) continual waveform, which including all channels analog quantities (sampled data, differential currents and so on), all the binary input changing state, binary output, pick up flags of fault detectors, alarm signals, operation signals and tripping signals. Disturbance records continue to be recorded until the available memory is exhausted, at which time the oldest record(s) are overwritten to make space for the newest one. It is not possible to view the disturbance records locally via the LCD; they must be extracted using suitable software such as DBG-2000. This process is fully explained in the section 11.6. The CPU board can also record latest 8 cycles of waveform in normal operation condition, which is composed of three phases current, corrected current of each side for differential protection, three phases voltage and zero sequence voltage of each side. This function can help user to check the poles correctness of secondary circuit by comparing the phase of related quantities shown in wave figure. This manual gives the detail instruction of getting normal operation waveform in section 11.6.

4.6 Time Synchronization


In modern protective schemes it is often desirable to synchronize the relays real time clock so that events from different relays can be placed in chronological order. This can be done using the IRIG-B input, if fitted, or via the communication interface connected to the substation control system. In addition to these methods the RCS-985A range offers the facility to synchronize via an opto-input. Pulsing this input will result in the real time clock snapping to the nearest minute. The recommended pulse duration is 20ms to be repeated no more than once per minute. An example of the time sync. function is shown.
Time of Sync. Pulse 19:47:00 to 19:47:29 19:47:30 to 19:47:59 Corrected Time 19:47:00 19:48:00

Note: The above assumes a time format of hh:mm:ss

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Chapter 5 Hardware Description


5.1 Hardware overview
The protections hardware is based on a modular design whereby the relay is made up of an assemblage of several modules that are drawn from a standard range. Some modules are essential while others are optional depending on the users requirements. The case materials of the relay are constructed from pre-finished steel that has a conductive covering of aluminum and zinc. This provides good earthing at all joints giving a low impedance path to earth that is essential for performance in the presence of external noise. The boards and modules use a multi-point earthing strategy to improve the immunity to external noise and minimize the effect of circuit noise. Ground planes are used on boards to reduce impedance paths and spring clips are used to ground the module metalwork. Heavy duty terminal blocks are used at the rear of the relay for the current and voltage signal connections. Medium duty terminal blocks are used for the digital logic input signals, the output relay contacts, the power supply and the rear communication port. A BNC connector may be used for the optional IRIG-B signal. 9-pin female D-connector is used at the front of the relay for data communication. Inside the protection the PCBs plug into the connector blocks at the rear, and can be removed from the rear of the relay only. The connector blocks to the relays CT inputs are provided with internal shorting links inside the relay which will automatically short the current generator circuits before they are broken when the board is removed. The front panel consists of a membrane keypad with tactile dome keys, an LCD and 5 LEDs mounted on an aluminum face plate.

5.1.1 Front view


RCS-985A is made of a single layer 12U height 19 chassis with 21 connectors on its rear. Figure 5-1 shows front view.

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Figure 5-1 Front view of RCS-985A

Components mounted on its front include a 240128 dot matrix LCD, a 9 button keypad, 5 LED indicators, a signal reset button, a DB9 connector for communication with HELP-90A or PC. The five LED indicators are, from top to bottom: HEALTHY: VT ALARM : CT ALARM: ALARM: TRIP: Equipment running normally; Voltage circuit failure ; Current circuit failure; Abnormal; Tripping output;

As to the buttons of the keypad, ENT is enter, GRP is setting group selector and ESC is escape.

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5.1.2 Rear view

Figure 5-2 Rear view of RCS-985A

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5.1.3 Functional block diagram of RCS-985A


5.1.3.1 Functional block diagram of RCS-985A
binary status input

AC curren t and voltag e

LP F

A /D

D SP1 D SP2

optocoupler

CPLD

LC D C PU m odule M M I-C PU

MMI

C PU 1

output relay

com m ports and port to printer MMI

QDJ E+ optocoup ler bin ary status inp ut

LPF
DC 220 V or 110 V

A /D

D SP3 D SP4

DC/DC

24 V

MMI
24 V to optic-coupler

C PU 2

m a nagem en t m odule co m m po rts and p ort to printer

Figure 5-3 Functional block diagram of RCS-985A

5.1.3.2 Brief description of operation The equipment RCS-985A uses Motorola 32 bits monolithic microprocessor MC68332 as control kernel for output logic and management functions, and high-speed digital signal processor DSP for protection calculation. Sampling rate of the equipment is 24 points per cycle. Real time data are processed parallel for all algorithms during whole process of fault. So the equipment can ensure very high inherent reliability and security. AC currents and voltages of CT and VT are transferred to low voltage signals by isolating transformers and are inputted to CPU module and MON module. Data and logic are processed respectively in these two modules with same hardware. The CPU module carries out functions of protection algorithms, tripping logic, event record and printing. The MON module comprises general fault detector and fault recorder. The fault detector will connect positive pole of power supply of output relays after pickup. Format of the record is compatible with COMTRADE, and the data recorded can be uploaded via separate serial port for communication or printing. Power supply part is located in DC module. It converts DC 250/220/125/110 V into different DC voltage levels needed by various modules of the equipment. DC module also comprises 24V and 250/220/125/110V opto-couplers for binary inputs. AC current and voltage are converted to low voltage signals in modules AC1, AC2, AC3 and AC4. Two ratings of AC current are option, 1A or 5A. It shall be stated definitely during ordering and checked during commissioning. Binary output of tripping commands, tripping signal output and status binary input parts are comprised in five modules: SIG1, SIG2, SIG3, SIG4 and RLY. 24V and 250/220/125/110V opto-couplers are used here for binary input.
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Chapter 5 Hardware Description

Briefly, the equipment is composed of twelve modules to achieve the work of busbar protection. The modules are AC voltage and current input module1(AC1), AC current input modules(AC2, AC3 and AC4), management/record module(MON)protection CPU module(CPU), power supply module(DC), signal modules(SIG1, SIG2, SIG3 and SIG4), tripping contacts output(RLY) and human machine interface(HMI). The relay hardware is based on a modular design whereby the relay is made up of an assemblage of several modules.

5.2 Standard connectors and terminals


5.2.1 General description
There are 21 connectors for external connections mounted on rear panel of the equipment as shown in Figure 5-2, of which, 15 connectors are 30 pins while 6 connectors are 18 pins. Connectors with 30 pins are used for DC power supply, binary input, communication and printer, tripping, alarm and other signal output and AC voltage input. Numbers of these connectors are 1A, 1B, 2A, 2B, 3A, 3B, 4A, 4B, 5B, 6B, 7B, 8B and 9B. Figure 5-4 a) shows layout of 30 pins of these connectors. Connectors with 18 pins are used for AC voltage input and current input. Numbers of these connectors are 9C, 10C, 10C, 11B, 11C, 12B and 12C. Figure 5-4 b) shows layout of pins of these connectors.
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 1 3 5 7 9 11 13 15 17

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18

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26

28

30

10

12

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16

18

a) connector with 30 pins

b) connector with 18 pins

Figure 5-4 Layout of pins of two kinds of connectors

Each connector will be introduced in detail in the following sections.

5.2.2 Pins definition of 1A connectors.


Connector 1A: 30 pins male connector for tripping output Attention: For showing the relation of each terminal clearly, the terminals location shown in the figure may be different from the real physical location, and we neednt figure out the blank terminals. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

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30

Figure 5-5 Connector 1A of RCS-985A

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1A1,1A30 Binary output of tripping: 1A3-1A5 1A7-1A9 1A11-1A13 1A15-1A17 1A19-1A21 1A23-1A25 1A27-1A29 1A2-1A4 1A6-1A8 1A10-1A12 1A14-1A16 1A18-1A20 1A22-1A24 1A26-1A28

blank tripping output channel 1-1, TJ1-1 tripping output channel 1-2, TJ1-2 tripping output channel 1-3, TJ1-3 tripping output channel 1-4, TJ1-4 tripping output channel 2-1, TJ2-1 tripping output channel 2-2, TJ2-2 tripping output channel 2-3, TJ2-3 tripping output channel 3-1, TJ3-1 tripping output channel 3-2, TJ3-2 tripping output channel 3-3, TJ3-3 tripping output channel 3-4, TJ3-4 tripping output channel 4-1, TJ4-1 tripping output channel 4-2, TJ4-2 tripping output channel 5-1, TJ5-1

5.2.3 Pins definition of 1B connectors


Connector 1B: 30 pins male connector for tripping output

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29

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30

Figure 5-6 Connector 1B of RCS-985A

Binary output of tripping: 1B1-1B3 1B5-1B7 1B9-1B11 1B13-1B15 1B17-1B19 1B21 -1B23 1B25-1B27 1B2-1B4 1B6-1B8 1B10-1B12 1B14-1B16 tripping output channel 2-4, TJ2-4 tripping output channel 6-1, TJ6-1 tripping output channel 6-2, TJ6-2 tripping output channel 6-3, TJ6-3 tripping output channel 7-1, TJ7-1 tripping output channel 8-1, TJ8-1 tripping output channel 9-1, TJ9-1 tripping output channel 5-2, TJ5-2 tripping output channel 5-3, TJ5-3 tripping output channel 5-4, TJ5-4 tripping output channel 11-1, TJ11-1

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1B18-1B20 1B22-1B24 1B26-1B28 1B29-1B30

tripping output channel 11-2, TJ11-2 tripping output channel 12-1, TJ12-1 tripping output channel 12-2, TJ12-2 tripping output channel 10-1, TJ10-1

5.2.4 Pins definition of 2A connectors


Connector 2A: 30 pins male connector for signal output

Figure 5-7 Connector 2A of RCS-985A

Binary output of local signal: 2A1 2A1-2A7 2A1-2A13 2A1-2A19 2A1-2A25 2A2 2A2-2A8 2A2-2A14 2A2-2A20 2A2-2A26 2A3 2A3-2A9 2A3-2A15 2A3-2A21 2A3-2A27 2A4 2A4-2A10 2A4-2A16 2A4-2A22 local signal: common terminal 1 local signal: generator differential protection tripping local signal: stator earth fault protection tripping local signal: stator overload protection tripping local signal: generator loss-of-excitation protection tripping Local signal: common terminal 2 Local signal: generator-transformer unit differential protection tripping Local signal: transformer differential protection tripping Local signal: phase to phase fault protection of transformer tripping or pole disagreement protection tripping Local signal: earth fault protection of transformer tripping Remote signal: common terminal 1 Remote signal: generator differential protection tripping Remote signal: stator earth fault protection tripping Remote signal: stator overload protection tripping Remote signal: generator loss-of-excitation protection tripping Remote signal: common terminal 2 Remote signal: generator-transformer unit differential protection tripping Remote signal: transformer differential protection tripping Remote signal: phase to phase fault protection of transformer tripping or pole disagreement protection tripping

Binary output of remote signal:

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2A4-2A28 2A5 2A5-2A11 2A5-2A17 2A5-2A23 2A5-2A29 2A6 2A6-2A12 2A6-2A18 2A6-2A24 2A6-2A30

Remote signal: earth fault protection of transformer tripping Event record: common terminal 1 Event signal: generator differential protection tripping Event signal: stator earth fault protection tripping Event signal: stator overload protection tripping Event signal: generator loss-of-excitation protection tripping Event signal: common terminal 2 Event signal: generator-transformer unit differential protection tripping Event signal: transformer differential protection tripping Event signal: phase to phase fault protection of transformer tripping or pole disagreement protection tripping Event signal: earth fault protection of transformer tripping

Binary output of event record:

5.2.5 Pins definition of 2B connectors


Connector 2B: 30 pins male connector for signal output

Figure 5-8 Connector 2B of RCS-985A

Binary output of local signal: 2A1-2B1 2A1-2B7 2A1-2B13 2A1-2B19 2A1-2B25 2A2-2B2 2A2-2B8 2A2-2B14 2A3-2B3 2A3-2B9 2A3-2B15 2A3-2B21
150

Local signal: generator loss of excitation protection tripping Local signal: generator over voltage protection tripping Local signal: generator reverse power protection tripping Local signal: generator startup and shutoff protection tripping Local signal: generator accidental energization protection tripping Local signal: restrict earth fault protection of main transformer tripping Local signal: mechanical protection tripping Local signal: exciter differential protection tripping Remote signal: generator loss of excitation protection tripping Remote signal: generator over voltage protection tripping Remote signal: generator reverse power protection tripping Remote signal: generator startup and shutoff protection tripping
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Binary output of remote signal:

Chapter 5 Hardware Description

2A3-2B27 2A4-2B4 2A4-2B10 2A4-2B16 2A5-2B5 2A5-2B11 2A5-2B17 2A5-2B23 2A5-2B29 2A6-2B6 2A6-2B12 2A6-2B18 2B20-2B22 2B24-2B26 2B28-2B30

Remote signal: generator accidental energization protection tripping Remote signal: restrict earth fault protection of main transformer tripping Remote signal: mechanical protection tripping Remote signal: exciter differential protection tripping Event record: generator loss of excitation protection tripping Event record: generator over voltage protection tripping Event record: generator reverse power protection tripping Event record: generator startup and shutoff protection tripping Event record: generator accidental energization protection tripping Event record: restrict earth fault protection of main transformer tripping Event record: mechanical protection tripping Event record: exciter differential protection tripping Binary output of stage 2 of initial cooling of main transformer. Tripping output channel 13-1, TJ13-1 Tripping output channel 13-2, TJ13-2

Binary output of event record:

Other binary output

5.2.6 Pins definition of 3A connectors


Connector 3A: 30 pins male connector for signal output

Figure 5-9 Connector 3A of RCS-985A

Binary output of local signal: 3A1 3A1-3A7 3A1-3A13 3A1-3A19 3A1-3A25 3A2 3A2-3A8 3A2-3A14 Local signal: common terminal 1 Local signal: generator interturn fault protection tripping Local signal: rotor earth fault protection tripping Local signal: generator negative sequence overload protection tripping Local signal: generator out-of-step protection tripping Local signal: common terminal 2 Local signal: Stepdown transformer differential protection tripping Local signal: HV side of stepdown transformer backup protection tripping
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3A2-3A20 3A2-3A26 3A3 3A3-3A9 3A3-3A15 3A3-3A21 3A3-3A27 3A4 3A4-3A10 3A4-3A16 3A4-3A22 3A4-3A28 3A5 3A5-3A11 3A5-3A17 3A5-3A23 3A5-3A29 3A6 3A6-3A12 3A6-3A18 3A6-3A24 3A6-3A30

Local signal: LV side of stepdown transformer backup protection tripping Local signal: Stepdown transformer restrict earth fault protection tripping Remote signal: common terminal 1 Remote signal: generator interturn fault protection tripping Remote signal: rotor earth fault protection tripping Remote signal: generator negative sequence overload protection tripping Remote signal: generator out-of-step protection tripping Remote signal: common terminal 2 Remote signal: Stepdown transformer differential protection tripping Remote signal: HV side of stepdown transformer backup protection tripping Remote signal: LV side of stepdown transformer backup protection tripping Remote signal: Stepdown transformer restrict earth fault protection tripping Event record: common terminal 1 Event record: generator interturn fault protection tripping Event record: rotor earth fault protection tripping Event record: generator negative sequence overload protection tripping Event record: generator out-of-step protection tripping Event record: common terminal 2 Event record: Stepdown transformer differential protection tripping Event record: HV side of stepdown transformer backup protection tripping Event record: LV side of stepdown transformer backup protection tripping Event record: Stepdown transformer restrict earth fault protection tripping

Binary output of remote signal:

Binary output of event record:

5.2.7 Pins definition of 3B connectors


Connector 3B: 30 pins male connector for signal output

Figure 5-10 Connector 3B of RCS-985A

Binary output of local signal: 3A1-3B1 3A1-3B7


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Local signal: reserved output 1 Local signal: generator over excitation protection tripping
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3A1-3B13 3A1-3B19 3A1-3B25 3A2-3B2 3A2-3B8 3A2-3B14 3A3-3B3 3A3-3B9 3A3-3B15 3A3-3B21 3A3-3B27 3A4-3B4 3A4-3B10 3A4-3B16 3A5-3B5 3A5-3B11 3A5-3B17 3A5-3B23 3A5-3B29 3A6-3B6 3A6-3B12 3A6-3B18 3B20-3B22 3B24-3B26 3B28-3B30

Local signal: generator sequence reverse power protection tripping Local signal: generator phase to phase backup protection tripping Local signal: generator frequency protection tripping Local signal: reserved output 2 Local signal: reserved output 3 Local signal: exciter overload protection tripping Remote signal: reserved output 1 Remote signal: generator over excitation protection tripping Remote signal: generator sequence reverse power protection tripping Remote signal: generator phase to phase backup protection tripping Remote signal: generator frequency protection tripping Remote signal: reserved output 2 Remote signal: reserved output 3 Remote signal: exciter overload protection tripping Event record: reserved output 1 Event record: generator over excitation protection tripping Event record: generator sequence reverse power protection tripping Event record: generator phase to phase backup protection tripping Event record: generator frequency protection tripping Event record: reserved output 2 Event record: reserved output 3 Event record: exciter overload protection tripping Binary output of stage 2 of initial cooling of stepdown transformer. Tripping output channel 14-1, TJ14-1 Tripping output channel 14-2, TJ14-2

Binary output of remote signal:

Binary output of event record:

Other binary output

5.2.8 Pins definition of 4A connectors


Connector 4A: 30 pins male connector for signal and alarm output.

Figure 5-11 Connector 4A of RCS-985A


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Binary output of local signal: 4A1 4A1-4A3 4A1-4A5 4A1-4A7 4A1-4A9 4A1-4A11 4A1-4A13 4A1-4A15 4A1-4A17 4A1-4A19 4A1-4A21 4A1-4A23 4A1-4A25 4A1-4A27 4A1-4A29 4A2 4A2-4A4 4A2-4A6 4A2-4A8 4A2-4A10 4A2-4A12 4A2-4A14 4A2-4A16 4A2-4A18 4A2-4A20 4A2-4A22 4A2-4A24 4A2-4A26 4A2-4A28 4A2-4A30 Common terminal Equipment being blocked Equipment alarm CT circuit failure alarm VT circuit failure alarm Overload alarm Negative sequence overcurrent alarm Excitation overload alarm Stator earth fault alarm 1 point earth fault of rotor alarm Loss-of-excitation alarm Out-of-step alarm Under frequency alarm Reverse power alarm Overexcitation alarm Common terminal Equipment being blocked Equipment alarm CT circuit failure alarm VT circuit failure alarm Overload alarm Negative sequence overcurrent alarm Excitation overload alarm Stator earth fault alarm 1 point earth fault of rotor alarm Loss-of-excitation alarm Out-of-step alarm Under frequency alarm Reverse power alarm Overexcitation alarm

Binary output of remote signal:

5.2.9 Pins definition of 4B connectors


Connector 4B: 30 pins male connector for alarm and other output

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Figure 5-12 Connector 4B of RCS-985A

4B2

blank Normal open contact 1 indicating operation of overcurrent element of stepdown transformer protection Normal closed contact 2 indicating operation of overcurrent element of stepdown transformer protection Normal open contact 1 indicating operation of stage 1 of initial cooling of main transformer. Normal open contact 2 indicating operation of stage 1 of initial cooling of main transformer. Normal open contact 1 indicating operation of stage 1 of initial cooling of stepdown transformer. Normal open contact 2 indicating operation of stage 1 of initial cooling of stepdown transformer. Reserved blank SOE of event: common terminal CT circuit failure alarm VT circuit failure alarm Overload alarm Negative sequence overload alarm Excitation overload alarm Stator earth fault alarm 1 point earth fault of rotor alarm Loss-of-excitation alarm Out-of-step alarm Under frequency alarm Equipment being blocked Equipment alarm Reverse power alarm Overexcitation alarm

Binary output of abnormality contact: 4B1-4B3 4B5-4B7 4B9-4B11 4B13-B15 4B17-4B19 4B21-4B23 4B25-4B27 4B2 4B4 4B4-4B6 4B4-4B8 4B4-4B10 4B4-4B12 4B4-4B14 4B4-4B16 4B4-4B18 4B4-4B20 4B4-4B22 4B4-4B24 4B4-4B26 4B4-4B28 4B4-4B29 4B4-4B30

Binary output of event record signal:

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5.2.10 Pins definition of 5A connectors


Connector 5A: 30 pins male connector for status input (via 220V/250V or 110V/125V opto-coupler)

Figure 5-13 Connector 5A of RCS-985A

Binary output of remote signal of mechanical repeaters: 5A1 5A1-5A3 5A1-5A5 5A1-5A7 5A1-5A9 5A2 5A2-5A4 5A2-5A6 5A2-5A8 5A2-5A10 5A11 5A11-5A12 5A11-5A13 5A11-5A14 5A11-5A15 5A11-5A16 5A17 5A18 5A19 5A20 common terminal External mechanical repeater3 External mechanical repeater4 External mechanical repeater2 External mechanical repeater1 common terminal External mechanical repeater3 External mechanical repeater4 External mechanical repeater2 External mechanical repeater1 common terminal External mechanical repeater4 External mechanical repeater2 Monitoring of power supply voltage External mechanical repeater3 External mechanical repeater1 Binary input of external mechanical repeater3-- BI_MechRly3 Binary input of external mechanical repeater4-- BI_MechRly4 Binary input of external mechanical repeater2-- BI_MechRly2 Binary input of external mechanical repeater1-- BI_MechRly1 Monitoring auxiliary contact of power supply of mechanical protection-BI_PS_Superv Auxiliary contact of generator breaker-- BI_52b_GCB

Binary output of event record of mechanical repeaters:

Binary output of local signal of mechanical repeaters:

Binary input (via 220V or 110V opto-coupler) :

Binary input of auxiliary contact(via 220V or 110V opto-coupler) 5A21 5A22

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5A23 5A24 5A25 5A26 5A27 5A28 5A29 5A30

Auxiliary contact of breaker A at HV side of main transformer-BI_52b_CB_HVS1_Tr Auxiliary contact of breaker B at HV side of main transformer-BI_52b_CB_HVS2_Tr Reversed binary input of pole disagreement of breakerBI_PoleDisagr_CB Auxiliary contact of valve of steam turbine-- BI_Valve_Turbine Positive pole of mechanical repeaters power supply. Blank Negative pole of mechanical repeaters power supply. Blank

5.2.11 Pins definition of 5B connectors


Connector 5B: 30 pins male connector for binary input

Figure 5-14 Connector 5B of RCS-985A

5B30 5B29 5B1 5B2 5B3 5B4 5B5 5B6 5B7 5B8 5B9 5B10

negative pole of DC 24V for 24 V opto-coupler positive pole of DC 24V for 24 V opto-couple Blank Blank Enabling binary input of generator differential protectionEBI_Diff_Gen Enabling binary input of generator interturn protectionEBI_IntTurn_Gen Enabling binary input of zero sequence overvoltage stator earth fault protection EBI_ROV_Sta Enabling binary input of 3rd harmonics voltage stator earth fault protection EBI_V3rd_Sta Enabling binary input of rotor 1 point earth fault protection EBI_1PEF_RotWdg Enabling binary input of rotor 2 points earth fault protection EBI_2PEF_RotWdg Enabling binary input of overload protection of stator EBI_OvLd_Sta Enabling binary input of stator negative sequence overcurrent protection

Binary input (via 24 V opto-coupler):

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EBI_NegOC_Sta 5B11 5B12 5B13 5B14 5B15 5B16 5B17 5B18 5B19 5B20 5B21 5B22 5B23 5B24 5B25 5B26 5B27 5B28 Enabling binary input of generator loss-of-excitation protection EBI_LossExc_Gen Enabling binary input of generator out-of-step protectionEBI_OOS_Gen Enabling binary input of generator overvoltage protection EBI_VoltProt_Gen Enabling binary input of generator overexcitation protection EBI_OvExc_Gen Enabling binary input of generator reverse power protection EBI_PwrProt_Gen Enabling binary input of generator frequency protection EBI_FreqProt_Gen Enabling binary input of generator accidental energization protection EBI_AccEnerg_Gen Enabling binary input of generator startup and shutdown protection EBI_StShut_Gen Enabling binary input of excitation transformer differential protection EBI_Diff_Exc Enabling binary input of excitation backup protectionEBI_Bak_Exc Enabling binary input of external mechanical repeater 3 for tripping EBI_Trp_MechRly3 Enabling binary input of external mechanical repeater 4 for tripping EBI_Trp_MechRly4 Enabling binary input of external mechanical repeater 2 for tripping EBI_Trp_MechRly2 Enabling binary input of external mechanical repeater 1 for tripping EBI_Trp_MechRly1 Enabling binary input of generator backup protectionEBI_PPF_Gen Enabling binary input of generator split-phase transverse differential protection EBI_SPTDiff_Gen Blank Blank

5.2.12 Pins definition of 6B connectors


Connector 6B: 30 pins male connector for status input 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29

24V 0V

DC/DC

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26

28

30

Figure 5-15 Connector 6B of RCS-985A

6B27 6B25 6B16


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negative pole of DC power supply positive pole of DC power supply negative pole of DC 24V for 24 V opto-coupler
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6B17 6B1 6B2 6B3 6B4 6B5 6B6 6B7 6B8 6B9 6B10 6B11 6B12 6B13 6B14 6B15 6B18 6B19 6B20 6B21 6B22 6B23 6B24 6B26 6B28 6B29 6B30

positive pole of DC 24V for 24 V opto-couple Enabling binary input of differential protection of main transformerEBI_Diff_Tr Enabling binary input of phase to phase backup protection of main transformer EBI_PPF_Tr Enabling binary input of earth fault protection of main transformer --- EBI_EF_Tr Enabling binary input of restrict earth fault protection of main transformer --EBI_REF_Tr Enabling binary input of differential protection of generator-transformer unit protection --- EBI_Diff_GTU Enabling binary input of pole disagreement protection of breaker --- EBI_Reserved1 Enabling binary input of differential protection of stepdown transformer --EBI_Diff_ST Enabling binary input of backup protection of HV side of stepdown transformer --EBI_Bak_HVS_ST Enabling binary input of backup protection of LV side of stepdown transformer --EBI_Bak_LVS_ST Enabling binary input of restrict earth fault protection of stepdown transformer --EBI_REF_ST Reserved binary input 2 Reserved binary input 3 Binary input of print button BI_Print Binary input of clock synchronization pulse BI_Pulse_GPS Binary input of signal reset button BI_ResetTarget Blank Binary input indicating the urgent brake condition of generator-- BI_UrgBrake Binary input indicating the synchronize condenser generator is put into operation -BI_SyncCondenser Reserved binary input Reserved binary input Binary input used for monitoring the power supply of all the BIs -- BI_PS_Opto Blank Blank Blank Earth Earth

Binary input (via 24 V opto-coupler):

5.2.13 Pins definition of 7B, 8B connectors


Connector 7B, 8B: 30 pins male connector for communication and printing.

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Note: The definitions of connector 7B and connector 8B are same.

Figure 5-16 Connectors 7B, 8B of RCS-985A

7B1/8B1 7B3/8B3 7B5/8B5 7B7/8B7 7B9/8B9 7B11/8B11 7B21/8B21 7B23/8B23 7B27/8B27 7B30/8B30

clock synchronizing pulse input, RS-485 A clock synchronizing pulse input, RS-485 B conmmunication RS-485 port1 A conmmunication RS-485 port1 B conmmunication RS-485 port2 A conmmunication RS-485 port2 B printer RS232 port, Tx printer RS232 port, Rx ground of communication port ground of chassis

5.2.14 Pins definition of 9B connectors


Connector 9B: 30 pins for voltage input

Figure 5-17 Connector 9B of RCS-985A

9B1, 9B26,
160

Blank
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9B28, 9B30 9B3 9B5 9B7 9B9 9B11 9B13 9B23 9B25 9B2 9B4 9B6 9B8 9B10 9B12 9B14 9B16 9B18 9B20 9B22 9B24 Zero sequence voltage of TV 1 at generator (polarity mark) Zero sequence voltage of TV 1 at generator Zero sequence voltage at neutral point of generator (polarity mark) Zero sequence voltage at neutral point of generator Zero sequence voltage of TV 2 at generator (polarity mark) Zero sequence voltage of TV 2 at generator Zero sequence voltage of main transformer (polarity mark) Zero sequence voltage of main transformer Phase A voltage of TV 1 at generators terminal Phase B voltage of TV 1 at generators terminal Phase C voltage of TV 1 at generators terminal Neutral point voltage of TV1 at generators terminal Phase A voltage of TV 2 at generators terminal Phase B voltage of TV 2 at generators terminal Phase C voltage of TV 2 at generators terminal Neutral point voltage of TV 2 at generators terminal Phase A voltage at HV side of main transformer Phase B voltage at HV side of main transformer Phase C voltage at HV side of main transformer Neutral point voltage at HV side of main transformer

5.2.15 Pins definition of 9C connectors


Connector 9B:
1 2

18 pins for current input


3 4 5 6 7 8 9 10 11 12

I AN

IA

I BN

IB

I CN

IC

I 0 N L _ S T I 0 L _ ST

13

14

15

16

17

18

Figure 5-18 Connector 9C of RCS-985A

9C1 9C2

IA , phase A current from bushing CT at HV side of main transformer IA , phase A current from bushing CT at HV side of main transformer (polarity

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mark) 9C3 9C4 9C5 9C6 9C7-12 9C13 9C14 9C15-18 IB , phase B current from bushing CT at HV side of main transformer IB , phase B current from bushing CT at HV side of main transformer (polarity mark) IC , phase C current from bushing CT at HV side of main transformer IC , phase C current from bushing CT at HV side of main transformer (polarity mark) Reserved 3I0, Zero sequence current from LV side CT of stepdown transformer 3I0, Zero sequence current from LV side CT of stepdown transformer (polarity mark) Reserved

5.2.16 Pins definition of 10B connectors


Connector 10B:
1 2

30 pins for voltage input


5 6 9 10 13 14 17 18 21 22 25 26 29 30

UA

' UA

UC

' UC

UB

' UB

U 0 L _ ST U 0' L _ ST

11

12

15

16

19

20

23

24

27

28

Figure 5-19 Connector 10B of RCS-985A

10B1 10B2 10B3 10B4 10B5 10B6 10B7-18 10B19 10B20 10B21-30

UA , phase A voltage from LV side VT of stepdown transformer(polarity mark) UA , phase A voltage from LV side VT of stepdown transformer UB , phase B voltage from LV side VT of stepdown transformer(polarity mark) UB , phase B voltage from LV side VT of stepdown transformer UC , phase C voltage from LV side VT of stepdown transformer(polarity mark) UC , phase C voltage from LV side VT of stepdown transformer Reserved 3U0, Zero sequence voltage from LV side delta VT of stepdown transformer (polarity mark) 3U0, Zero sequence voltage from LV side delta VT of stepdown transformer Reserved

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Note: The zero sequence voltage of LV side of main transformer shares the same voltage input 10B19-20 with that of stepdown transformer.

5.2.17 Pins definition of 10C connectors


Connector 10C: 18 pins for voltage and current input
1 2 3 5 7 9 11 13 15 17

I 04

I 04 N

UR+ 2

UR2

IR+ TO LPF

IR-

20 K
UR+ UR-

Figure 5-20 Connector 10C of RCS-985A

Terminal 10C1 10C2 10C3 10C5 10C7 10C9 10C11 10C13 10C15 10C17 others

Name I04 I04N UR+2 UR-2 IR+ IRTest terminal UR+ Axis of rotor UR-

Function Zero sequence current input channel 4, N means non-polarity terminal DC voltage input of rotor DC current input of rotor

DC voltage input for rotor earth fault protection

Reserved

5.2.18 Pins definition of 11B connectors


Connector 11B: 18 pins for current input

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I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

Figure 5-21 Connector 11B of RCS-985A

11B1 11B2 11B3 11B4 11B5 11B6 11B7 11B8 11B9 11B10 11B11 11B12 11B13 11B14 11B15 11B16 11B17 11B18

IA , phase A current from HV side CT1 of main transformer IA , phase A current from HV side CT1 of main transformer (polarity mark) IB , phase B current from HV side CT1 of main transformer IB , phase B current from HV side CT1 of main transformer (polarity mark) IC , phase C current from HV side CT1 of main transformer IC , phase C current from HV side CT1 of main transformer (polarity mark) IA , phase A current from HV side CT2 of main transformer IA , phase A current from HV side CT2 of main transformer (polarity mark) IB , phase B current from HV side CT2 of main transformer IB , phase B current from HV side CT2 of main transformer (polarity mark) IC , phase C current from HV side CT2 of main transformer IC , phase C current from HV side CT2 of main transformer (polarity mark) IA , phase A current from HV side CT with big ratio of stepdown transformer, IA , phase A current from HV side CT with big ratio of stepdown transformer (polarity mark) IB , phase B current from HV side CT with big ratio of stepdown transformer IB , phase B current from HV side CT with big ratio of stepdown transformer (polarity mark) IC , phase C current from HV side CT with big ratio of stepdown transformer IC , phase C current from HV side CT with big ratio of stepdown transformer (polarity mark)

5.2.19 Pins definition of 11C connectors


Connector 11C: 18 pins for current input

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I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

Figure 5-22 Connector 11C of RCS-985A

11C1 11C2 11C3 11C4 11C5 11C6 11C7 11C8 11C9 11C10 11C11 11C12 11C13 11C14 11C15 11C16 11C17 11C18

IA , phase A current from terminal CT of generator IA , phase A current from terminal CT of generator (polarity mark) IB , phase B current from terminal CT of generator IB , phase B current from terminal CT of generator (polarity mark) IC , phase C current from terminal CT of generator IC , phase C current from terminal CT of generator (polarity mark) IA , phase A current from neutral point CT of generator IA , phase A current from neutral point CT of generator (polarity mark) IB , phase B current from neutral point CT of generator IB , phase B current from neutral point CT of generator (polarity mark) IC , phase C current from neutral point CT of generator IC , phase C current from neutral point CT of generator (polarity mark) IA , reserved current input. IA , reserved current input (polarity mark) IB , reserved current input IB , reserved current input (polarity mark) IC , reserved current input IC , reserved current input (polarity mark)

5.2.20 Pins definition of 12B connectors


Connector 12B: 18 pins for current input

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I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

Figure 5-23 Connector 12B of RCS-985A

12B1 12B2 12B3 12B4 12B5 12B6 12B7 12B8 12B9 12B10 12B11 12B12 12B13 12B14 12B15 12B16 12B17 12B18

IA , phase A current from HV side CT with small ratio of stepdown transformer IA , phase A current from HV side CT with small ratio of stepdown transformer (polarity mark) IB , phase B current from HV side CT with small ratio of stepdown transformer IB , phase B current from HV side CT with small ratio of stepdown transformer (polarity mark) IC , phase C current from HV side CT with small ratio of stepdown transformer IC , phase C current from HV side CT with small ratio of stepdown transformer (polarity mark) IA , phase A current from LV side CT of stepdown transformer IA , phase A current from LV side CT of stepdown transformer (polarity mark) IB , phase B current from LV side CT of stepdown transformer IB , phase B current from LV side CT of stepdown transformer (polarity mark) IC , phase C current from LV side CT of stepdown transformer IC , phase C current from LV side CT of stepdown transformer (polarity mark) IA , reserved current input IA , reserved current input (polarity mark) IB , reserved current input IB , reserved current input (polarity mark) IC , reserved current input IC , reserved current input (polarity mark)

5.2.21 Pins definition of 12C connectors


Connector 12C: 18 pins for current input

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I AN

IA

I BN

IB

I CN

IC

I AN

IA

I BN

IB

I CN

IC

I 'trans

I trans I 0 N _ tr

I 0 _ tr

I g 0 N _ tr I g 0 _ tr

Figure 5-24 Connector 12C of RCS-985A

12C1 12C2 12C3 12C4 12C5 12C6 12C7 12C8 12C9 12C10 12C11 12C12 12C13 12C14 12C15 12C16 12C17 12C18

IA , phase A current from one side CT of exciter or excitation transformer. IA , phase A current from one side CT of exciter or excitation transformer (polarity mark) IB , phase B current from one side CT of exciter or excitation transformer IB , phase B current from one side CT of exciter or excitation transformer (polarity mark) IC , phase C current from one side CT of exciter or excitation transformer IC , phase C current from one side CT of exciter or excitation transformer (polarity mark) IA , phase A current from the other side CT of exciter or excitation transformer IA , phase A current from the other side CT of exciter or excitation transformer (polarity mark) IB , phase B current from the other side CT of exciter or excitation transformer IB , phase B current from the other side CT of exciter or excitation transformer (polarity mark) IC , phase C current from the other side CT of exciter or excitation transformer IC , phase C current from the other side CT of exciter or excitation transformer (polarity mark) Transverse differential current input Transverse differential current input (polarity mark) 3I0 , zero sequence current input of main transformer 3I0 , zero sequence current input of main transformer (polarity mark) 3I0 , Gap zero sequence current input of main transformer 3I0 , Gap zero sequence current input of main transformer (polarity mark)

5.3 Output
5.3.1 Tripping outputs
The equipment provides 14 groups of tripping relays with 33 pairs of contacts totally as shown in
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following figure. These tripping relays can be configured by tripping output logic setting, and practical and flexible tripping modes can be provided by each protective function then. Tripping output logic setting is a specific setting of each certain protective function. Please refer to Chapter 7 for details of setting.

Figure 5-25 List of tripping outputs The tripping output logic setting is a 4 digits hexadecimal number or a 16 bits binary number. Every bit corresponds to a circuit breaker. The breaker will be tripped if the corresponding bit is set as 1 and not tripped if the bit is set as 0.

No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Bit No. Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 Bit 10 Bit 11 Bit 12 Bit 13 Bit 14 Note:

Table 5-1 Tripping logic and contacts of output relays Tripping group No. Quantity of tripping contacts Tripping function enabled TJ1: group 1 of tripping output 4 TJ2: group 2 of tripping output 4 TJ3: group 3 of tripping output 4 TJ4: group 4 of tripping output 2 TJ5: group 5 of tripping output 4 TJ6: group 6 of tripping output 3 TJ7: group 7 of tripping output 1 TJ8: group 8 of tripping output 1 TJ9: group 9 of tripping output 1 TJ10: group 10 of tripping output 1 TJ11: group 11 of tripping output 2 TJ12: group 12 of tripping output 2 TJ13: group 13 of tripping output 2 TJ14: group 14 of tripping output 2

Outputs of TJ1, 2, 5, 6 are instantaneous contacts, which can be used to trip CB or initial failure of CB. While other outputs are expand 100ms after contacts operate.

5.3.2 Signaling outputs


The equipment provides 36 signals and each signal consists of 1 magnetic latching contact (for local signals) and 2 wiper-type contacts (for SOE and remote signals). See the figure below.
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(a) Group 1

(b) Group 2

(c) Group 3

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(d) Group 4 Figure 5-26 List of signaling outputs

5.3.3 Alarming outputs

Figure 5-27 List of alarming outputs

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5.3.4 Other outputs


Cooling initiation of MT with time delay 1 ZBFL-1 4B09 4B11 4B13 ZBFL-2 4B15 Cooling initiation of ST with time delay 1 4B17 4B21 CBFL-1 CBFL-2 4B19 4B23

Cooling initiation of MT with time delay 2 BY2 2B20 2B22 OLTC blocking BSTY-1 BSTY-2

Cooling initiation of ST with time delay 2 3B20 BY3 3B22

4B01 4B05

4B03 4B07

Figure 5-28 List of other outputs

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Chapter 6 Software Overview

Chapter 6 Software Overview


6.1 Software Overview
The software for the relay can be conceptually split into three elements: the system services software, the platform software and the protection and control software. These three elements are not distinguishable to the user, and are all processed by the same processor board. The distinction between the three parts of the software is made purely for the purpose of explanation here:

Figure 6-1 Software structure of RCS-985A

6.2 System services software


As shown in Figure 6-1, the system services software provides the interface between the relays hardware and the higher-level functionality of the platform software and the protection & control software. For example, the system services software provides drivers for items such as the LCD display, the keypad and the remote communication ports, and controls the boot of the processor and downloading of the processor code into SRAM from flash EPROM at power up.

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6.3 Platform software


The platform software has three main functions: o control the logging of records that are generated by the protection software, including alarms T and event, fault, and maintenance records. To store and maintain a database of all of the relays settings in non-volatile memory. To provide the internal interface between the settings database and each of the relays user interfaces, i.e. the front panel interface and the front and rear communication ports, using whichever communication protocol has been specified (Courier, MODBUS, IEC 60870-5-103).

6.3.1 Record logging


The logging function is provided to store all alarms, events, faults and maintenance records. The records for all of these incidents are logged in battery backed-up SRAM in order to provide a non-volatile log of what has happened. The relay maintains four logs: one each for up to 32 alarms, 32 event records, 32 fault records and 8 cycles of normal operation waveform. The logs are maintained such that the oldest record is overwritten with the newest record. The logging function can be initiated from the protection software or the platform software is responsible for logging of a maintenance record in the event of a relay failure. This includes errors that have been detected by the platform software itself or error that are detected by either the system services or the protection software function. See also the section on supervision and diagnostics in this manual.

6.3.2 Settings database


The settings database contains all of the settings and data for the relay, including system parameters, equipments parameters and the protection settings. The parameters and settings are maintained in non-volatile memory. The platform softwares management of the settings database includes the responsibility of ensuring that only one user interface modifies the settings of the database at any one time. This feature is employed to avoid conflict between different parts of the software during a setting change.

6.3.3 Database interface


The other function of the platform software is to implement the relays internal interface between the database and each of the relays user interfaces. The database of settings and measurements must be accessible from all of the relays user interfaces to allow read and modify operations. The platform software presents the data in the appropriate format for each user interface.

6.3.4 Protection and control software


The protection and control software task is responsible for processing all of the protection elements and measurement functions of the relay. To achieve this it has to communicate with both the system services software and the platform software as well as organize its own operations. The protection software has the highest priority of any of the software tasks in the relay in order to provide the fastest possible protection response. The protection & control software has a supervisor task that controls the start-up of the task and deals with the exchange of messages between the task and the platform software.
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Figure 6-2 Flow char of protection and control software

6.3.4.1 Overview - protection and control scheduling After initialization at start-up, the protection and control task is suspended until there are sufficient samples available for it to process. The acquisition of samples is controlled by a sampling function which is called by the system services software and takes each set of new samples from the input module and stores them in a two-cycle buffer. The protection and control software resumes execution when the number of unprocessed samples in the buffer reaches a certain number. For the RCS-985A protection relay, the protection task is executed as the same speed as the sampling rate, i.e. the relays finishes calculation of all the relay before next sampling process. During the residual time, operations by other software tasks take place. 6.3.4.2 Signal processing The sampling function provides filtering of the digital input signals from the opto-isolators and frequency tracking of the analog signals. The digital inputs are checked against their previous value over 15ms. Hence a change in the state of one of the inputs must be maintained over at least 15ms before it is registered with the protection and control software. The frequency tracking of the analog input signals is achieved by a recursive Fourier algorithm which is applied to one of the input signals, and works by detecting a change in the measured signals phase angle. The calculated value of the frequency is used to modify the sample rate being used by the AC modules so as to achieve a constant sample rate of 24 samples per cycle of the power waveform. The value of the frequency is also stored for use by the protection and control task. 6.3.4.3 Fourier filtering When the protection and control task is re-started by the sampling function, it calculates the Fourier components for the analog signals. With the exception of the RMS measurements all other measurements and protection functions are based on the Fourier derived fundamental component. The Fourier components are calculated using a one-cycle, 24-sample Discrete Fourier Transform (DFT). The DFT is always calculated using the last cycle of samples from the 2-cycle buffer, i.e.
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the most recent data is used. The DFT used in this way extracts the power frequency fundamental component from the signal and produces the magnitude and phase angle of the fundamental in rectangular component format. This gives good harmonic rejection for frequencies up to the 11th harmonic. The 13th is the first predominant harmonic that is not attenuated by the Fourier filter and this is known as Alias. However, the Alias is attenuated by approximately 85% by an additional, analog, anti-aliasing filter (low pass filter). The combined affect of the anti-aliasing and Fourier filters is shown below:

Figure 6-3 Frequency response

The Fourier components of the input current and voltage signals are stored in memory so that they can be accessed by all of the protection elements algorithms. The samples from the AC modules are also used in an unprocessed form by the disturbance recorder for waveform recording and to calculate true rms. values of current, voltage and power for metering purposes. 6.3.4.4 RCS-985A Convention For Measuring Phase Angles All phases calculated by RCS-985 series relays and used for protection, control and metering functions are rotating phases that maintain the correct phase angle relationships with each other at all times. For display and oscillography purposes, all phase angles in a given relay are referred to an AC input channel. The phase angles are assigned as positive in the leading direction, and are presented as negative in the lagging direction, to more closely align with power system metering conventions. This is illustrated below.

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Figure 6-4 RCS-985A Phase Angle Measurement Convention

6.3.4.5 Event and fault recording A change in any digital input signal, protection element output signal, operation flags of fault detectors, tripping flags causes an event record to be created. When this happens, the protection and control task sends a message to the supervisor task to indicate that an event is available to be processed and writes the event data to a fast buffer in SRAM which is controlled by the supervisor task. When the supervisor task receives either an event or fault record message, it instructs the platform software to create the appropriate log in battery backed-up SRAM. The operation of the record logging to battery backed-up SRAM is slower than the supervisors buffer. This means that the protection software is not delayed waiting for the records to be logged by the platform software. 6.3.4.6 Disturbance recorder The disturbance recorder operates as a separate task from the protection and control task. It can record the waveforms for up to 32 analog channels and the values of up to all digital signals of the RCS-985A. The recording time is user selectable up to a maximum of 8 seconds. The disturbance recorder is supplied with data by the protection and control task once per sampling period. The disturbance recorder collates the data that it receives into the required length disturbance record. The disturbance records can be extracted byDBG-2000 that can also store the data in COMTRADE format, thus allowing the use of other packages to view the recorded data.

6.4 Software downloading


The relay supports software downloading for the purpose of debugging or updating on site. Hardware requirement Basic requirement of computer:
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CPU: Pentium II 300 or higher level CPU, OS: Win98, Win98SE, WinMe, WinNT4.0(service pack 4 or higher), Win2000, WinXP; RAM: at least 128M, 256M is recommended; Space requirement: at least 200M free space on system hard disk; Displayer: support 800*600 or higher resolution at the 16bit color model; RS232 communication port; Software requirement: Special software DBG2000. Downloading method Note: Ensure that the board is not a naked one before downloading software to it, i.e., a certain version software exists on the board. Warning: If some unexpected cases occur, please do inform the factory firstly instead of dealing with it by yourself.

Figure 6-5 Software downloading communication port

Steps 1. Connect RS-232 communication port of the computer and that mounted on front panel of RCS-985A protection equipment by a cable with DB-9 connectors on both ends, see Figure 6-5. 2. Run the program DBG2000.If the connection and settings are correct, the screen will display RCS-985A connected, such as Figure 6-6. But if it doesnt be connected, please check the
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parameter setting of DBG2000 whether corresponds with the relay, such as COM port and Baud rate, see Figure 6-7.

Figure 6-6 Succeed connecting of DBG2000

Figure 6-7 Parameter setting of DBG2000

3. Download CPU program. At first, make sure it is at CUP mode as CPU>, then press the button and select the correct program file, such as CPU.s19, to download it into the CPU module. Make sure the file FLASHCPU.s19 is at the same folder with program file.

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4. Download MON program. Change it to MON mode by typing MON, then MON> will appearances. Then repeat step 3 to down load MON.s19 to MON module. Make sure the file FLASHMON.s19 is at the same folder with program file. See Figure 6-8.

Figure 6-8 Change to MON mode and download program

5 After downloading CPU and MON programs, reset the equipment and download default settings. Then the HEALTHY LED on the front panel of the relay shall be illuminate. 6. Reset the equipment and download the default settings. 7. Download FACE program. Change it to FACE mode by typing FACE or PNL, then PNL> will appearances. Press the button and select the 985xx_FACE.hex file to download it into

the panel module. Make sure the file FLASH_FACE.hex is at the same folder with program file. 8. After that course, user should check and ensure the software version, CRC code and generating time of software are as same as recorded in relevant documentation. Enter the menu Version, then new version of protection will displayed on LCD, see Figure 6-9.

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VERSION CPUBrd: RCS-985A3YD 2007 - 2 - 28 MONBrd: RCS-985A3YD 2007 - 2 - 28 HMI: RCS-985A3YD 2007 - 2 - 28 SUBQ_ID: 00024882 3.12 10:39 3.12 10:44 3.12 10:30 7247 T_060707 15A045C6 E17F8231

Figure 6-9 Version of protection

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Chapter 7 Settings

Chapter 7 Settings
The relay must be configured to the system and application by means of appropriate settings. The settings of this relay include system parameters, protection element settings and scheme logic settings.

7.1 Equipment parameters


7.1.1 Setting list
Table 7-1 List of equipment settings

No. 1 2 3 4 5 6 7 8 9 10 11

Symbol Setting_Group Equip_ID Comm_Addr COM1_Baud COM2_Baud Printer_Baud Protocol En_Auto_Print En_Net_Print En_Remote_Cfg GPS_Pulse

Range 01 6 characters maximum 0255 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 1.2/2.4/4.8 / 9.6 /19.2 kbit/s 0000-FFFF logic setting 1 - enable, 0 - disable 0/1 0/1 0/1 0/1

Step 1 1

Default 0 FDJ001 1 19.2 kbit/s 19.2 kbit/s 9.6k bit/s 0041 0 0 0 0

Note: Symbols of the parameter listed in above table are used for communication, printing and displaying on LCD.

7.1.2 Setting instruction of the parameters


1 No.1-- [Setting_Group]

Two setting groups can be configured for the equipment, and only one is active at a time. However, equipment parameters and system parameters are common for all protection setting groups. 2 No.2-- [Equip_ID]

The setting consists of ASCII codes, which is as identification for report printing only. It can be configured according to the name or number of generator. 3 No.3-- [Comm_Addr]

The address used for the host computer to identify the equipment, usually provided by substation system. If the equipment is not connected to automation system, equipment address may be random.
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No.4-- [Com1_Baud]

The baud rate of serial port 1 shall be selected from specified range. 5 No.5-- [Com2_Baud]

The baud rate of serial port 2 shall be selected from specified range. 6 No.6--[Printer_Baud]

The baud rate used for printer port shall be selected from specified range. 7 No.7-- [Protocol]

The logic setting consists of sixteen binary digits but four hexadecimal digits can be viewed through device LCD screen. Every digit has a dedicated meaning and some digits have no definition. Following will be seen on PC through DBG2000 software. 15 14 13 12 11 10 9 8 7 6 B: MODBUS 5 4 3 2 A: MODBUS 1 0

B: LFP

A: LFP

The definitions of digits are:


Table 7-2 Definition of logic setting of communication protocol Definition

Bit 0 1 2 3 4 5 6 7-15

communication port A using protocol IEC 60870-5-103 communication port A using proprietary protocol LFP communication port A using MODBUS protocol No definition No definition communication port B using proprietary protocol LFP communication port B using MODBUS protocol No definitions

For example, if logic setting [Protocol] is set as 0041, it means communication port A uses IEC 60870-5-103 protocol and communication port B uses MODBUS protocol. 8 No.8-- [En_Auto_Print]

This setting shall be set as 1 if automatic report printing is expected after the relay operates when a fault occurs. Otherwise it shall be set as 0. It is suggested that the user may set this parameter of the equipment as 1 (i.e. automatic printing), if the equipment is always connected directly with a printer, or set as 0 (i.e. not automatic printing) if the equipment is connected with a printer by a switch on panel. 9
184

No.9-- [En_Net_Print]
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Set it as 1 if shared network printer is used for printing. Set it as 0 if dedicated printer is used. Network printer means several protection equipments share one printer through a printer management unit and RS-485 port. Dedicated printer means the protection equipment connected with a printer through RS232 port directly. 10 No.10--[En_Remote_Cfg] Set it as 0 if only local configuration is permitted. Set it as 1 if local and remote configurations are both permitted. 11 No.11-- [GPS_Pulse] Set it as 1 for minute pulse and 0 for second pulse.

7.1.3 Setting path


Access path in menu is: Main Menu -> SETTINGS -> EQUIP SETTINGS -> [setting symbol]

7.2 System Settings


7.2.1 Logic settings of configuring functions
7.2.1.1 Settings list
Table 7-3 List of protection configuration setting

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 En_Diff_GTU En_Diff_Tr En_PPF_Tr En_EF_Tr En_OvExc_Tr En_Diff_Gen En_SPTDiff_Gen En_IntTurn_Gen En_PPF_Gen En_EF_Sta En_EF_RotWdg En_OvLd_Sta En_NegOC_Sta En_LossExc_Gen En_OOS_Gen En_VoltProt_Gen En_OvExc_Gen En_PwrProt_Gen En_FreqProt_Gen

Symbol

Range 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

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No. 20 21 22 23 24 25 26 27 28 29 30 31 32 33 En_StShut_Gen En_AccEnerg_Gen En_Diff_Exc En_Bak_Exc En_OvLd_RotWdg En_Diff_ST En_Bak_HVS_ST En_Bak_LVS_ST En_REF_ST En_MechRly

Symbol

Range 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0

En_PoleDisagr_CB En_VTComp_Term_Gen Reserved() En_TestMode() Note:

Symbols of the parameter listed in above table are used for communication, printing and displaying on LCD. Setting marked with means that it is can not be seen on LCD or by printing and only can be seen through DBG 2000 software. 7.2.1.2 Explanation of the parameters for setting 1 No.1-- [En_Diff_GTU]

This logic setting is used for configuration of protection functions. Setting it as 1 means the generator-transformer unit differential protection is enabled and setting as 0 means the protection is disabled. 2 No.2-- [En_Diff_Tr]

This logic setting is used to enable/disable differential protection of main transformer. 3 N0.3-- [En_PPF_Tr]

This logic setting is used to enable/disable phase to phase fault protection of main transformer. 4 No.4-- [En_EF_Tr]

This logic setting is used to enable/disable earth fault protection of main transformer. 5 No.5-- [En_OvExc_Tr]

This logic setting is used to enable/disable over excitation protection of main transformer. 6 No.6-- [En_Diff_Gen]

This logic setting is used to enable/disable differential protection of generator. 7


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No.7-- [En_SPTDiff_Gen]
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This logic setting is used to enable/disable spilt phase differential protection of generator. 8 No.8-- [En_IntTurn_Gen]

This logic setting is used to enable/disable interturn fault protection of generator. 9 No.9-- [En_PPF_Gen]

This logic setting is used to enable/disable phase to phase fault protection of generator 10 No.10[En_EF_Sta] This logic setting is used to enable/disable earth fault protection of stator of generator. 11 No.11[En_EF_RotWdg] This logic setting is used to enable/disable earth fault protection of rotor winding. 12 No.12[En_OvLd_Sta] This logic setting is used to enable/disable overload protection of stator. 13 No.13[En_NegOC_Sta] This logic setting is used to enable/disable negative sequence overcurrent of stator. 14 No.14[En_LossExc_Gen] This logic setting is used to enable/disable loss of excitation protection of rotor winding. 15 No.15[En_OOS_Gen] This logic setting is used to enable/disable out-of-step protection of generator. 16 No.16-- [En_VoltProt_Gen] This logic setting is used to enable/disable overvoltage and undervoltage protection of generator. 17 No.17-- [En_OvExc_Gen] This logic setting is used to enable/disable overexcitation protection of generator. 18 No.18-- [En_PowerProt_Gen] This logic setting is used to enable/disable overpower and underpower protection of generator. 19 No.19-- [En_FreqProt_Gen] This logic setting is used to enable/disable overfrequency and underfrequency protection of generator. 20 No.20-- [En_StShut_Gen] This logic setting is used to enable/disable all relative protections in Startup/shutdown conditions of generator. 21 No.21-- [En_AccEnerg_Gen] This logic setting is used to enable/disable relevant protection in case of accident energization of
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generator. 22 No.22-- [En_Diff_Exc] This logic setting is used to enable/disable differential protection of exciting transformer or exciter. 23 No.23-- [En_Bak_Exc] This logic setting is used to enable/disable backup protection of exciting transformer or exciter. 24 No.24-- [En_OvLd_RotWdg] This logic setting is used to enable/disable overload function of rotor winding. 25 No.25-- [En_Diff_ST] This logic setting is used to enable/disable differential protection of stepdown transformer. 26 No.26-- [En_Bak_HVS_ST] This logic setting is used to enable/disable backup protection at HV side of stepdown transformer. 27 No.27-- [En_Bak_LVS_ST] This logic setting is used to enable/disable backup protection at LV side of stepdown transformer. 28 No.28-- [En_REF_ST] This logic setting is used to enable/disable restrict earth fault protection of stepdown transformer. 29 No.29-- [En_MechRly] This logic setting is used to enable/disable mechanical protection. 30 No.30-- [En_PoleDisagr_CB] This logic setting is used to enable/disable pole disagreement protection of circuit breaker. 31 No.31-- [En_VTComp_Term_Gen] This logic setting is used to enable/disable voltage balance function of VTs at the generator terminal. 32 No.32-- [Reserved] (#) This logic setting is reserved. 33 No.33-- [En_TestMode] (#) This logic setting is configured especially for equipment debugging status. It is only seen by DBG-2000, which is used for generating messages of alarm or operation element for remote PC. Enable: enable sending all tripping contacts signals, protection tripping signals, alarm signals and monitoring signals through DBU2000 software. Disable: disable the function mentioned above.

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Chapter 7 Settings

7.2.1.3 Setting path All logic settings of configuring functions are accessible in the following path: Main Menu -> SETTINGS -> SYSTEM SETTINGS -> PROT CONFIG -> [setting symbol]

7.2.2 Transformer system parameters


7.2.2.1 Setting list
Table 7-4 List of transformer system settings

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Sn_Tr

Symbol U1n_HVS_Tr U1n_LVS_Tr U1n_VT_HVS_Tr U2n_VT_HVS_Tr U2n_DeltVT_HVS_Tr I1n_CT_HVS1_Tr I2n_CT_HVS1_Tr I1n_CT_HVS2_Tr I2n_CT_HVS2_Tr I1n_CT_HVS_Tr I2n_CT_HVS_Tr I1n_CT_LVS_Tr I2n_CT_LVS_Tr I1n_CT_NP_Tr I2n_CT_NP_Tr I1n_CT_Gap_Tr I2n_CT_Gap_Tr Yd11_Conn_Tr Yyd11_Conn_Tr Opt_GCB

Range 0-6000 MVA 0-600 kV 0-600 kV 0-600 kV 57.74-110 V 33.33-330 V 0-60000 A 1, 5 A 0-60000 A 1, 5 A 0-60000 1, 5A 0-60000A 1,5A 0-60000A 1,5A 0-60000A 1,5A Logic setting 1 - enable, 0 disable 0/1 0/1 0/1

Step 0.1 MVA 0.01 kV 0.01 kV 0.01 kV 0.01 V 0.01 V 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1 1 1

Default 370 220 20 127.02 57.74 57.74 1200 1 1200 1 1200 1 12000 1 600 1 200 1 1 0 0

7.2.2.2 Setting instruction of the parameters 1 No.1-- [Sn_Tr]

Transformer capacity shall be configured as its name plate stated. 2 No.2-- [U1n_HVS_Tr]

System rated voltage at HV side of transformer. This setting is used for calculating the rated current of main transformer. It should be set according to the real operating voltage of the power system.
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Chapter 7 Settings

No.3-- [U1n_LVS_Tr]

System rated voltage at LV side of transformer. 4 No.4-- [U1n_VT_HVS_Tr]

Rated primary voltage of VT at HV side of transformer. 5 No.5-- [U2n_VT_HVS_Tr]

Rated secondary voltage of VT at HV side of transformer. 6 No.6-- [U2n_DeltVT_HVS_Tr]

Rated secondary voltage of delta VT at HV side of transformer. 7 No.7-- [I1n_CT_HVS1_Tr]

Rated primary current of CT at branch 1 of HV side of transformer. 8 No.8-- [I2n_CT_HVS1_Tr]

Rated secondary current of CT at branch 1 of HV side of transformer. 9 No.9-- [I1n_CT_HVS2_Tr]

Rated primary current of CT at branch 2 of HV side of transformer. 10 No.10-- [I2n_CT_HVS2_Tr] Rated secondary current of CT at branch 2 of HV side of transformer. 11 No.11-- [I1n_CT_HVS_Tr] Rated primary current of bushing CT at HV side of transformer. 12 No.12-- [I2n_CT_HVS_Tr] Rated secondary current of bushing CT at HV side of transformer. 13 No.13-- [I1n_CT_LVS_Tr] Rated primary current of CT at LV side of transformer. 14 No.14-- [I2n_CT_LVS_Tr] Rated secondary current of CT at LV side of transformer. 15 No.15-- [I1n_CT_NP_Tr] Rated primary current of CT at neutral point of transformer. 16 No.16-- [I2n_CT_ NP_Tr] Rated secondary current of CT at neutral point of transformer. 17 No.17-- [I1n_CT_Gap_Tr] Rated primary current of gap CT at HV side of transformer.
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Chapter 7 Settings

18 No.18-- [I2n_CT_Gap_Tr] Rated secondary current of gap CT at HV side of transformer. 19 No.19-- [Yd11_Conn_Tr] The connection mode of main transformer is Yd-11 mode. The current input for HV side is only one. 20 No.20-- [Yyd11_Conn_Tr] The connection mode of main transformer is Yd-11 mode. The currents input for HV side are two CTs, such as 3/2 breakers of HV bus. 21 No.21-- [Opt_GCB] Logic setting of circuit breaker at terminal of generator. 1 means there is a circuit breaker at terminal of generator. 0 means there isnt a circuit breaker at terminal of generator. 7.2.2.3 Setting path All settings of transformer system parameters are accessible in the following path: Main Menu -> SETTINGS -> SYSTEM SETTINGS -> TR SYS SETTINGS -> [setting symbol]

7.2.3 Generator system parameters


7.2.3.1 Setting list
Table 7-5 List of generator system settings

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 fn_Gen Pn_Gen PF_Gen U1n_Gen

Symbol

Range 50/60 Hz 0-6000.0 MW 0.00-1.00 0-600.00 kV 0-600.00 kV 57.74-110.00 V 33.33-110.00 V 0-600.00 kV 0-300.00 V 0-60000 A 1A/5A 0-100.00 % 0-100.00 % 0-60000 A 1A/5A 0-60000 A 1A/5A 0-60000 A

Step 0.1 MW 0.01 0.01 kV 0.01 V 0.01 V 0.01 V 0.01 kV 0.01 V 1A 1A 0.01 % 0.01 % 1A 1A 1A 1A 1A

Default 50 300 0.85 20 11.55 57.74 33.33 11.55 57.74 12000 5 50 50 12000 5 12000 5 600
191

U1n_VT_Term_Gen U2n_VT_Term_Gen U2n_DeltVT_Term_Gen U1n_VT_NP_Gen U2n_VT_NP_Gen I1n_CT_Term_Gen I2n_CT_Term_Gen k_SP1_Gen k_SP2_Gen I1n_CT_SP1_Gen I2n_CT_SP1_Gen I1n_CT_SP2_Gen I2n_CT_SP2_Gen I1n_CT_TrvDiff_Gen

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Chapter 7 Settings

No. 19 20 21 22

Symbol I2n_CT_TrvDiff_Gen I1n_RotWdg U2n_Shunt_RotWdg U1n_Exc 1A,5A

Range 1A 1A 0-60000 A 0-75.00 mV 0-600 V

Step

Default 5 1000 75 200

0.01 mV 0.01 V

7.2.3.2 Setting instruction of the parameters 1 No.1-- [fn_Gen]

This setting indicates the nominal frequency of power system in which the generator protection equipment is used. 2 No.2-- [Pn_Gen]

Capacity of active power of the generator shall be configured as its name plate stated. 3 No.3-- [PF_Gen]

Rated power factor of generator. 4 No.4-- [U1n_Gen]

System rated voltage at the terminal of generator. This setting is used for calculating the rated current of generator. It should be set according to the real operating voltage of the power system. 5 No.5-- [U1n_VT_Term_Gen]

Rated primary voltage of VT at the terminal of generator. This parameter can be configured as either phase voltage or phase-to-phase voltage value. For example, if the terminal VT ratio is

20kV 3

100V 3

100V , this parameter and the following two (NO.6 and NO.7) can be set as 3

11.55kV, 57.74V and 33.33V or can be set as 20kV, 100V and 57.74V. This is used for substation automation system. From this setting and the next two ones, VT ratio can be got. Secondary voltage and current recorded by the equipment will be transferred to primary value by multiplying VT ratio when fault oscillogram is sent to the host. 6 No.6-- [U2n_VT_Term_Gen]

Rated secondary voltage of VT at the terminal of generator. 7 No.7-- [U2n_DeltVT_Term_Gen]

Rated secondary open-delta voltage at the terminal of generator. 8 No.8-- [U1n_VT_NP_Gen]

Rated primary voltage of VT at the neutral point of generator. 9 No.9-- [U2n_VT_NP_Gen]

Rated secondary voltage of VT at the neutral point of generator.


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Chapter 7 Settings

10 No.10-- [I1n_CT_Term_Gen] Rated primary current of CT at the terminal of the generator. 11 No.11-- [I2n_CT_Term_Gen] Rated secondary current of CT at the terminal of the generator. 12 No.12-- [k_SP1_Gen] Branching coefficient of the first group of windings to the whole one of stator. At the generator neutral point, two channels of TA input are reserved which can satisfy the requirement both differential protection and phase-splitting transverse differential protection. The branching coefficient can be set according to the proportion of per branch occupying in the whole winding. For the case that only one branch can be drawn out from the neutral point of generator, the branching coefficient of the first one group branch must be set as 100% and the other branching coefficient must be set as 0%. 13 No.13-- [k_SP2_Gen] Branching coefficient of the second group of windings to the whole of stator. 14 No.14-- [I1n_CT_SP1_Gen] Rated primary current of CT of the first splitting branch of stator. 15 No.15-- [I2n_CT_SP1_Gen] Rated secondary current of CT of the first splitting branch of stator. 16 No.16-- [I1n_CT_SP2_Gen] Rated primary current of CT of the second splitting branch of stator. 17 No.17-- [I2n_CT_SP2_Gen] Rated secondary current of CT of the second splitting branch of stator. 18 No.18-- [I1n_CT_TrvDiff_Gen] Rated primary current of CT used for transverse differential protection. 19 No.19-- [I2n_CT_TrvDiff_Gen] Rated secondary current of CT used for transverse differential protection. 20 No.20-- [I1n_RotWdg] Primary rated current of rotor. This setting and the next one can be set conveniently by inputting the rated primary and secondary parameters of the shunt. 21 No.21-- [U2n_Shunt_RotWdg]
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Chapter 7 Settings

Secondary rated voltage of rotor shunt. 22 No.22-- [U1n_Exc] Rated primary voltage of exciter or excitation transformer. 7.2.3.3 Setting path All settings of generator system parameters are accessible in the following path: Main Menu -> SETTINGS -> SYSTEM SETTINGS -> GEN SYS SETTINGS -> [setting symbol] Note: These parameters are as important as the settings. They have to be configured according to actual application on site.

7.2.4 Stepdown transformer system parameters


7.2.4.1 Setting list
Table 7-6 List of stepdown transformer settings

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Symbol Sn_ST U1n_HVS_ST U1n_LVS_ST U1n_VT_LVS_ST U2n_VT_LVS_ST U2n_DeltVT_LVS_ST I1n_CT2_HVS_ST I2n_CT2_HVS_ST I1n_CT1_HVS_ST I2n_CT1_HVS_ST I1n_CT_LVS_ST I2n_CT_LVS_ST I1n_CT_NP_LVS_ST I2n_CT_NP_LVS_ST Yyy12_Conn_ST Ddd12_Conn_ST Dyy11_Conn_ST Ydd11_Conn_ST Dyy1_Conn_ST

Range 0-100 MVA 0-600 kV 0-600 kV 0-600 kV 57.74-110 V 33.33-110 V 0-60000 A 1,5 A 0-60000 A 1,5 A 0-60000 A 1,5 A 0-60000 A 1,5 A 0/1 0/1 0/1 0/1 0/1

Step 0.01 MVA 0.01 kV 0.01 kV 0.01 kV 0.01 V 0.01 V 1A 1A 1A 1A 1A 1A 1A 1A

Default 30 20 6.3 6.3 3.46 57.74 12000 1 1000 1 3000 1 3000 1 0 1 0 0 0

Logic setting 1 - enable, 0 disable

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Chapter 7 Settings

7.2.4.2 Setting instruction of the parameters 1 No.1-- [Sn_ST]

Capacity of the exciter or excitation transformer shall be configured as its name plate stated. 2 No.2-- [U1n_HVS_ST]

Rated primary voltage of HV side of stepdown transformer. 3 No.3-- [U1n_LVS_ST]

Rated primary voltage of LV side of stepdown transformer. 4 No.4-- [U1n_VT_LVS_ST]

Rated primary voltage of VT at LV side of stepdown transformer. 5 No.5-- [U2n_VT_LVS_ST]

Rated secondary voltage of VT at LV side of stepdown transformer. 6 No.6-- [U2n_DeltVT_LVS_ST]

Rated secondary voltage of delta VT at LV side of stepdown transformer. 7 No.7-- [I1n_CT2_HVS_ST]

Rated primary current of CT2 with big ratio at HV side of stepdown transformer. 8 No.8-- [I2n_CT2_HVS_ST]

Rated secondary current of CT2 with big ratio at HV side of stepdown transformer. 9 No.9-- [I1n_CT1_HVS_ST]

Rated primary current of CT1 with small ratio at HV side of stepdown transformer. 10 No.10-- [I2n_CT1_HVS_ST] Rated secondary current of CT1 with small ratio at HV side of stepdown transformer. 11 No.11-- [I1n_CT_LVS_ST] Rated primary current of CT at LV side of stepdown transformer. 12 No.12-- [I2n_CT_LVS_ST] Rated secondary current of CT at LV side of stepdown transformer. 13 No.13-- [I1n_CT_NP_LVS_ST] Rated primary current of CT at neutral point of LV side of stepdown transformer. 14 No.14-- [I2n_CT_NP_LVS_ST] Rated secondary current of CT at neutral point of LV side of stepdown transformer. 15 No.15-- [Yyy12_Conn_ST]
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Chapter 7 Settings

The connection mode of stepdown transformer is Yyy-12 mode. 16 No.16-- [Ddd12_Conn_ST] The connection mode of stepdown transformer is Ddd-12 mode. 17 No.17-- [Dyy11_Conn_ST] The connection mode of stepdown transformer is Dyy-11 mode. 18 No.18-- [Ydd11_Conn_ST] The connection mode of stepdown transformer is Ydd-11 mode. 19 No.19-- [Dyy1_Conn_ST] The connection mode of stepdown transformer is Dyy-1 mode. 7.2.4.3 Setting path All settings of stepdown transformer system parameters are accessible in the following path: Main Menu -> SETTING -> SYSTEM SETTINGS -> ST SYS Settings -> [setting symbol]

7.2.5 System parameters of excitation transformer or exciter


7.2.5.1 Setting list
Table 7-7 List of excitation transformer of exciter settings

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Symbol fn_Exciter Sn_Exc U1n_S1_Exc U1n_S2_Exc U1n_VT_Exc U2n_VT_Exc U2n_DeltVT_Exc I1n_CT_S1_Exc I2n_CT_S1_Exc I1n_CT_S2_Exc I2n_CT_S2_Exc Opt_Exc Yy12_Conn_ET Dd12_Conn_ET Dy11_Conn_ET Yd11_Conn_ET Dy1_Conn_ET

Range 50,100, 150Hz 0-100.00 MVA 0-600.00 kV 0-600.00 kV 0-600.00 kV 57.74-110 V 33.33-110 V 0-60000 A 1A,5A 0-60000 A 1A,5A Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1

Step 1Hz 0.01 MVA 0.01 kV 0.01 kV 0.01 kV 0.01 V 0.01 V 1A 1A 1A 1A

Default 50 0.5 20 6.3 3.46 57.74 33.33 20 5 60 5 0 0 0 0 1 0

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Chapter 7 Settings

7.2.5.2 Setting instruction of the parameters 1 No.1-- [fn_Exc]

This setting indicates the nominal frequency of exciter. If excitation transformer is used, this setting can be set as 50Hz and the other settings in this table should be set according to relevant parameters of excitation transformer. 2 No.2-- [Sn_Exc]

Capacity of the exciter or excitation transformer shall be configured as its name plate stated. 3 No.3-- [U1n_S1_Exc]

The system rated voltage on HV side of the excitation transformer. This setting is used to calculate the correction coefficient of differential protection of excitation transformer. If exciter is used, this setting and NO.4 setting are all set as the rated voltage of exciter. 4 No.4-- [U1n_S2_Exc]

System rated voltage on LV side of the excitation transformer. This setting is used to calculate the correction coefficient of differential protection of excitation transformer. 5 No.5-- [U1n_VT_Exc]

Primary rated voltage of VT of the excitation transformer. 6 No.6-- [U2n_VT_Exc]

Secondary rated voltage of VT of the excitation transformer. 7 No.7-- [U2n_DeltaVT_Exc]

Secondary rated voltage of delta VT of the excitation transformer. 8 No.8-- [I1n_CT_S1_Exc]

Primary rated current of the CT on HV side of the excitation transformer or CT at the terminal of the exciter. 9 No.9-- [I2n_CT_S1_Exc]

Secondary rated current of the CT on HV side of the excitation transformer or CT at the terminal of the exciter. 10 No.10-- [I1n_CT_S2_Exc] Primary rated current of the CT on LV side of the excitation transformer or CT at the neutral point of the exciter. 11 No.11-- [I2n_CT_S2_Exc] Secondary rated current of the CT on LV side of the excitation transformer or CT at the neutral point of the exciter. 12 No.12-- [Opt_Exc]
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Chapter 7 Settings

Exciter is used in the system. If this setting is set as 1, that means exciter is used in the generator system instead of excitation transformer. Otherwise means the contrary. 13 No.13-- [Yy12_Conn_ET] The connection mode of excitation transformer is Yy-12 mode. Note: In the symbol of Yy-12, the first letter Y represents the connection mode of windings on HV side, and the other y represents the connection mode of windings on LV side, 12 represents connection group between HV and LV windings. The following four settings are similar to this one. 14 No.14-- [Dd12_Conn_ET] The connection mode of excitation transformer is Dd-12 mode. 15 No.15-- [Dy11_Conn_ET] The connection mode of excitation transformer is Dy-11 mode. 16 No.16-- [Yd11_Conn_ET] The connection mode of excitation transformer is Yd-11 mode. 17 No.17-- [Dy1_Conn_ET] The connection mode of excitation transformer is Dy-1 mode. 7.2.5.3 Setting path All settings of excitation system parameters are accessible in the following path: Main Menu -> SETTING -> SYSTEM SETTINGS -> EXC SYS Settings -> [setting symbol]

7.2.6 Implicit configuration settings


The settings in the following list are associated with application-specific primary layout of generator and exciter, tripping logics. These settings can not be seen on LCD of equipment and only be viewed and configured on PC through DBG2000 software in the submenu CONFIG SETTINGS. These settings are usually configured in factory or configured by field commission engineer according to the design drawing and project requirement. 7.2.6.1 Setting list
Table 7-8 List of implicit configuration settings

No. 1 2 3 4 5
198

Symbol Cfg_CT_Diff_GTU() Cfg_CT_Diff_Tr() Cfg_CT_Diff_Exc() Opt_Polar_CT() Cfg_CT_Bak_Tr()

Range 0000-FFFF 0000-FFFF 0000-FFFF 0000-FFFF 0000-FFFF

Default 000E 001B 0001 1FFF 0002

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Chapter 7 Settings

No. 6 7 8 9 10 11 12 13 14 15 16 17 18 19 GTU, 2W_ST()

Symbol Cfg_CT_PwrProt_Gen() 3/2Bus, GTU, 2W_ST() GTU, 3W_ST() 3/2Bus, GTU, 3W_ST() Tr, Gen, 2W_ST() 3/2Bus, Tr, Gen, 2W_ST() Tr, Gen, 3W_ST() 3/2Bus, Tr, Gen, 3W_ST() Gen_Only() Opt_WaveRec_MON() Opt_Debug_MON() Opt_Dur_WaveRec_MON() En_Displ_Pickup() Note:

Range 0000-FFFF 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 Pickup/Trip DSP2/DSP1 4S/8S Yes/No

Default 0001 0 0 1 0 0 0 0 0 0 Pickup DSP2 4S No

Setting marked with means that it is can not be seen on LCD or by printing and only can be seen through DBG 2000 software. 7.2.6.2 Explanation of the parameters and notice for setting 1 No.1-- [Cfg_CT_Diff_GTU]()

Logic setting of selecting three-phase current channels for differential protection of generator transformer unit. If the bit is set as 1, it means this group is used in the differential protection. Following will be seen on PC through DBG2000 software.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

The definitions of digits are: Bit 0 1 2 3 4


Table 7-9 Definition of logic setting of CT groups Definition

CT group 1 (11B1-6) and 2 (11B7-12) at HV side of main transformer. Bushing CT group (9C1-6) of HV side of main transformer. CT group (11C7-12) at neutral point of generator. CT group 1 (12B1-6) of HV side of stepdown transformer. CT group 2 (11B13-18) of HV side of stepdown transformer.
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CT_HVS1&2_Tr

CT2_HVS_ST

CT1_HVS_ST

CT_NP_Gen

CT_LVS_ST

CT_HVS_Tr

Chapter 7 Settings

5 6-15 2

CT group (12B7-12) of LV side of stepdown transformer. No definition

No.2-- [Cfg_CT_Diff_Tr]()

Logic setting of selecting three-phase current channels for differential protection of main transformer. If the bit is set as 1, it means this group is used in the differential protection. Following will be seen on PC through DBG2000 software.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_Term_Gen

CT2_HVS_ST

CT1_HVS_ST

CT_LVS_Gen

CT_HVS2_Tr 1 CT_S1_Exc&CT_LVS_ST

The definitions of digits are: Bit 0 1 2 3 4 5 6-15


Table 7-10 Definition of logic setting of CT groups Definition

CT group 1 (11B1-6) at HV side of main transformer. CT group 2 (11B7-12) at HV side of main transformer. CT group (11C13-18) at LV side of main transformer. This group is a reserved current input channel. CT group (11C1-6) at terminal of generator. CT group 1 (12B1-6) of HV side of stepdown transformer. CT group 2 (11B13-18) of HV side of stepdown transformer. No definition

No.2-- [Cfg_CT_Diff_Exc]()

Logic setting of selecting three-phase current channels for differential protection of exciter or excitation transformer. Following will be seen on PC through DBG2000 software.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 CT_S2_Exc&CT_Br2_ST 0

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CT_S1&S2_Exc

CT_HVS1_Tr

Chapter 7 Settings

The definitions of digits are:


Table 7-11 Definition of logic setting of CT groups Definition

Bit 0 1 2 3-15

CT group 1 (12C1-6) and 2 (12C7-12) of exciter. CT group 1 (12C1-6) of exciter and CT group (12B7-12) at LV side of stepdown transformer. CT group 2 (12C7-12) of exciter and CT group (12B13-18) at LV side of stepdown transformer. No definition

No.4-- [Opt_Polar_CT]()

Generally, CT polarity definition is as Figure 1-1and Figure 1-2 show. However if some CT polarity direction is reversed by incorrect wiring connecting, there is still chance to correct it by configuring this logic setting easily. Please set the corresponding digit of the logic setting. Following will be seen on PC through DBG2000 software.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_Term_Gen

SpareCT_Gen

SpareCT_Exc

CT1_HVS_ST

CT2_HVS_ST

CT_NP_Gen

CT_LVS_ST

CT_S2_Exc

CT_S1_Exc

CT_Br2_ST

Reserved

CT2_Tr

The definitions of digits are: Bit 0 1 2 3 4 5 6 7 8 9 10 11


Table 7-12 Definition of logic setting of CT polarity Definition

CTs polarity of current channel (11B1-6) at HVS of transformer reversed CTs polarity of current channel (11B7-12) at HVS of transformer reversed CTs polarity of current channel (11B13-18) at HVS of stepdown transformer
reversed

CTs polarity of current channel (11C1-6) at terminal of generator reversed CTs polarity of current channel (11C7-12) at neutral of generator reversed CTs polarity of current spare channel (11C13-18) reversed CTs polarity of current channel (12B1-6) at HVS of stepdown transformer reversed CTs polarity of current channel (12B7-12) at LVS of stepdown transformer reversed CTs polarity of current channel (12B13-18) reversed CTs polarity of current channel (12C1-6) of exciter reversed CTs polarity of current channel (12C7-12) of exciter reversed CTs polarity of current channel (9C1-6) reversed

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CT1_Tr 201

Chapter 7 Settings

12-15

No definition

No.5-- [Cfg_CT_Bak_Tr]()

Logic setting of selecting three-phase current channel for backup protection of transformer. Following will be seen on PC through DBG2000 software.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

The definitions of digits are: Bit 0 1 2 3-15


Table 7-13 Definition of logic setting of CT polarity Definition

CT group 1(11B1-6) and 2 (11B7-12) at HVS of transformer. CT group 1(11B1-6) at HVS of transformer. Bushing CT group (9C1-6) at HVS of transformer. No definition

No.6-- [Cfg_CT_Power_Gen]()

Logic setting of selecting three-phase current channel for reverse power protection of generator. Following will be seen on PC through DBG2000 software.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

CT_S(11B13-11B18)

CT_S(11C13-11C18)

The definitions of digits are: Bit 0


202

Table 7-14 Definition of logic setting of CT polarity Definition

Protecting CT group (11C1-6) at terminal of generator.


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CT_P(11C1-11C6)

CT_Sum_Curr_Tr

CT_HVS_Tr

CT_CB_Tr

Chapter 7 Settings

Bit 1 2 3-15

Definition Measuring CT group (11C13-11C18). Measuring CT group (11B13-18) at HVS of transformer. No definition

Note: Only one of the follow settings from No.7- No.15 can be set as 1. 7 No.7-- [GTU, 2W_ST] ()

The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there is only one group CT input at HV side, no CB between main transformer and generator, two windings in stepdown transformer. 8 No.8-- [3/2Bus, GTU, 2W_ST] ()

The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there are two group CT inputs at HV side (3/2 bus), no CB between main transformer and generator, two windings in stepdown transformer. 9 No.9-- [GTU, 3W_ST] ()

The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there is only one group CT input at HV side, no CB between main transformer and generator, three windings in stepdown transformer. 10 No.10-- [3/2Bus, GTU, 3W_ST] () The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there are two group CT inputs at HV side (3/2 bus), no CB between main transformer and generator, three windings in stepdown transformer. 11 No.11-- [Tr, Gen, 2W_ST] () The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there is only one group CT input at HV side, a CB between main transformer and generator, two windings in stepdown transformer. 12 No.12-- [3/2Bus, Tr, Gen, 2W_ST] () The logic setting of connection type between bus, generator, main transformer, and stepdown transformer.
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1 means there are two group CT inputs at HV side, a CB between main transformer and generator, two windings in stepdown transformer. 13 No.13-- [Tr, Gen, 3W_ST] () The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there is only one group CT input at HV side, a CB between main transformer and generator, three windings in stepdown transformer. 14 No.14-- [3/2Bus, Tr, Gen, 3W_ST] () The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there are two group CT inputs at HV side, a CB between main transformer and generator, three windings in stepdown transformer. 15 No.15-- [Gen_Only] () The logic setting of connection type between bus, generator, main transformer, and stepdown transformer. 1 means there is only a generator protected. 16 No.16--[Opt_WaveRec_MON] () Logic setting of selecting recording triggering mode of MON module. 0: recording is triggered when any fault detector picks up. 1: recording is triggered when any protection element trips. 17 No.17--[Opt_Debug_MON]() This logic setting is provided especially for software developing, not for ordinary users. 18 No.18--[Opt_Dur_WaveRec_MON]() Logic setting of selecting recording time of MON module. 0: recording persisting time is 4 s with 24 samples per cycle. 1: recording persisting time is 8 s with 12 samples per cycle. 19 No.19--[En_Displ_Pickup]() This logic setting is provided especially for software developing, not for ordinary users. Note: It is suggested to configure settings No.16-No.19 as default settings.

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7.3 Protection Settings


7.3.1 Settings of differential protection of generator-transformer unit
7.3.1.1 Settings list
Table 7-15 List of generator-transformer unit differential protection settings

No. 1 2 3 4 5 6 7 8 9 10

Symbol I_Pkp_PcntDiff_GTU I_InstDiff_ GTU Slope1_PcntDiff_ GTU Slope2_PcntDiff_ GTU k_Harm_PcntDiff_GTU TrpLog_Diff_ GTU En_InstDiff_ GTU En_PcntDiff_ GTU Opt_Inrush_Ident_ GTU Opt_CTS_Blk_PcntDiff_ GTU

Range 0.101.50 (Ie) 2.0014.00 (Ie) 0.000.50 0.500.80 0.10-0.35 0000FFFF

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1

Default 0.3 6 0.1 0.7 0.15 7FFF

Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 1 1 1 1

7.3.1.2 Explanation of the settings 1 No.1-- [I_Pkp_PcntDiff_GTU]

This is pickup setting of percentage current differential protection, which is also the setting of fault detector of percentage differential protection. It shall be higher than maximum unbalance current when the generator-transformer operate on normal rated load. 2 No.2-- [I_InstDiff_GTU]

Setting of unrestrained differential protection. 3 No.3-- [Slope1_PcntDiff_GTU]

Setting of the first slope of percentage differential protection. 4 No.4-- [Slope2_PcntDiff_GTU]

Maximum value of restraint coefficient of the differential characteristic curve. 5 No.5-- [k_Harm_PcntDiff_GTU]

The ratio setting of 2nd harmonic component in differential current. 0.15 is recommended. 6 No.6-- [TrpLog_PcntDiff_GTU]

Tripping output logic setting of differential protection is used to specify which breaker or breakers will be tripped by this protection. This word comprises 16 binary bits as follows and is displayed as a hexadecimal number of 4 digits from 0000H to FFFFH on LCD of equipment. The tripping output logic settings is specified as follows:

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bit

15

14

13

12

11

10

TJ14: TrpOutput14

TJ13: TrpOutp13

TJ12: TrpOutp12

TJ11: TrpOutp11

TJ10: TrpOutp10

TJ9: TrpOutp9

TJ8: TrpOutp8

TJ7: TrpOutp7

TJ6: TrpOutp6

TJ5: TrpOutp5

TJ4: TrpOutp4

TJ3: TrpOutp3

TJ2: TrpOutp2

TJ1: TrpOutp1

No definition

Function

Note: TrpOutp 1 just means to drive tripping output channel 1 and please refer to section 5.3. Set bit 0 as 1 means this protection element will trip breaker or breakers. The bit corresponding to the breaker to be tripped shall be set as1 and other bits shall be 0. For example, if differential protection is defined to trip breaker 5 (tripping output channel 5), the bit 0 and 5 bit shall be set as 1 and other bits 0. Then a hexadecimal number 0021H is formed as the tripping output logic setting. Please note that tripping output logic settings of the equipment have to be set on basis of application-specific drawings. All the tripping logic settings mentioned below is defined as same as this one. 7 No.7-- [En_InstDiff_GTU]

Unrestrained instantaneous differential protection enabled. If this setting is set as 1, it means this protection is enabled. Otherwise it means the protection is disabled. 8 No.8-- [En_PcntDiff_GTU]

Percentage differential protection enabled. 9 No.9-- [Opt_Inrush_Ident_GTU]

The logic setting to select the method to identify inrush current of transformer. 1 means to use the second harmonic restraint principle. 0 means to use waveform distortion discrimination principle. 10 No.10-- [Opt_CTS_Blk_PcntDiff_Gen] If this logic setting is set as 1, it means percentage differential protection will be blocked when CT circuit failure happens. Otherwise it means the function is disabled. 7.3.1.3 Setting path All settings of differential protection settings are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GTU DIFF PROT --> [setting symbol]

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En_Trp

Chapter 7 Settings

7.3.2 Settings of differential protection of main transformer


7.3.2.1 Settings list
Table 7-16 List of main transformer differential protection settings

No. 1 2 3 4 5 6 7 8 9 10 11 I_InstDiff_ Tr

Symbol I_Pkp_PcntDiff_Tr Slope1_PcntDiff_ Tr Slope2_PcntDiff_ Tr k_Harm_PcntDiff_Tr TrpLog_Diff_ Tr En_InstDiff_ Tr En_PcntDiff_ Tr En_DPFC_Diff_Tr Opt_Inrush_Ident_ Tr Opt_CTS_Blk_PcntDiff_Tr

Range 0.101.50 (Ie) 2.0014.00 (Ie) 0.000.50 0.500.80 0.10-0.35 0000FFFF

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1

Default 0.3 6 0.1 0.7 0.15 7FFF

Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 0, 1 1 1 1 1 1

7.3.2.2 Explanation of the settings 1 No.1-- [I_Pkp_PcntDiff_Tr]

This is pickup setting of percentage current differential protection, which is also the setting of fault detector of percentage differential protection. It shall be higher than maximum unbalanced current of the transformer during normal rated load, i.e.

I cdqd = K rel ( K er + U + m) I e
Where:

I cdqd represents the setting [I_Pkp_PcntDiff_Tr]. I e is secondary calculated rated current of transformer (please see details in section 3.3.1); K rel is reliability coefficient (generally K rel = 1.3 - 1.5); K er is the ratio error of CT (=0.03X2, for class 10P; =0.01X2, for class 5P and class TP); U is the maximum deviation (in percentage of rated voltage) due to tap changing. m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.
For practical engineering application, I cdqd =0.3 - 0.5 I e is reasonable and unbalanced current in differential scheme during maximum load of transformer shall be measured.

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No.2-- [I_InstDiff_Tr]

Setting of unrestrained instantaneous differential protection, which is used to clear serious internal fault quickly and prevent operation delay caused by CT saturation. The setting I cdsd (i.e. [I_InstDiff]) shall be greater than inrush current and maximum unbalanced current due to external fault or asynchronous closing, generally

I cdsd = K I e
Where: K is a multiple depending on capacity of transformer and the system reactance, 6 8 is recommended.

I e is secondary calculated rated current of transformer.


Sensitivity coefficient of unrestrained instantaneous differential protection K sen shall be calculated according to the phase-to-phase solid short circuit fault in normal operation condition at installed point of the relay. 3

K sen 1.2 is required.

No.3-- [Slope1_PcntDiff_Tr]

Setting of the first slope of percentage differential protection, it shall be:

K bl 1 K er
Where:

K er is the error of current ratio of CT, no more than 0.1. K bl1 is 0.10-0.20 generally.
Sensitivity check for percentage differential protection The sensitivity coefficient K sen shall be calculated according to phase-to-phase short circuit on outlet of transformer protected by the differential relay in minimum operation mode. From the calculated minimum short circuit current I k . min and relevant restraint current I res , corresponding pickup current I op will be found in the operation characteristic curve of percentage differential relay, and then the sensitivity coefficient is:

K sen = I k . min / I op K sen 1.2 is required.


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No.4-- [Slope2_PcntDiff_Tr]

Setting of second slope of percentage differential protection. Calculation of secondary unbalanced current: --- For two winding transformer

I unb. max = ( K ap K cc K er + U + m) I k . max


Where: Definition of K er , U and m have been mentioned above;

K cc is the same type coefficient of CT, 0.1 is considered. I k . max is the maximum value of fundamental component of external short circuit fault current
(secondary).

K ap is the coefficient of DC component. K ap = 1.0 if CT at both sides are class TP, or K ap = 1.5 2.0 if CT at both sides are class P. --- For three winding transformer Take external short circuit fault at LV side as example:

I unb. max = K ap K cc K er I k . max + U h I k .h . max + m I I k . I . max + m II I k . II . max


Where: Definition of K er , K cc and K ap have been mentioned above;

U h are maximum deviations (in percentage of rated voltage) on HV side due to tap changing. I k . max is the maximum value of fundamental component of short circuit secondary current flowing
through CT at the fault side during external fault at LV side.

I k .h. max is the maximum value of fundamental component of short circuit secondary current flowing
through CT on tap changing sides during external fault at LV side.

I k . I . max and I k . II . max are the fundamental components of secondary currents flowing through CT at
other sides during external fault at LV side.
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m I and mII are errors caused by difference between ratios of CT (auxiliary CT included if any)
at relevant sides. Second slope of percentage differential protection is:

k bl 2 =

I unb. max* I cdqd * 3k bl1 I k . max* 3

Where: Definition of

I unb. max* ,

I cdqd *

and

I k . max* are almost same to

I unb. max ,

I cdqd

and

I k . max mentioned above, and the only difference is they are per unit values. I e (secondary
calculated rated current of transformer) is the base value of per unit.

kbl 2 =0.70 is recommended.


5 No.5-- [k_Harm_PcntDiff_Tr]

Restraint coefficient of second harmonic. This parameter is the blocking threshold of second harmonics involving in differential current to against inrush current when the transformer is energized. The differential protection will be blocked when the percentage of second harmonics reaches the threshold because the percentage of second harmonics is high in inrush current but low in fault current. It is recommended that the parameter is set to be 15% -20%. 6 No.6-- [TrpLog_DIff_Tr]

Tripping output logic setting of differential protection is used to specify which breaker or breakers will be tripped by this protection. 7 No.7-- [En_InstDiff_Tr]

Unrestrained instantaneous differential protection enabled. If this setting is set as 1, it means this protection is enabled. Otherwise, it means the protection is disabled. 8 No.8-- [En_PcntDiff_Tr]

Percentage differential protection enabled. If this setting is set as 1, it means this protection is enabled. Otherwise, it means the protection is disabled. 9 No.9-- [En_DPFC_Diff_Tr]

DPFC percentage differential protection enabled. If this setting is set as 1, it means this protection is enabled. Otherwise, it means the protection is disabled. 10 No.10-- [Opt_Inrush_Ident_Tr] Inrush current blocking principle selection:

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0, discrimination by harmonics. 1, waveform distortion criteria is used. 11 No.11-- [Opt_CTS_Blk_PcntDiff_Tr] If this logic setting is set as 1, it means percentage differential protection will be blocked when CT circuit failure happens. Otherwise, it means the function is disabled. 7.3.2.3 Setting path All settings of differential protection settings are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> TR DIFF PROT --> [setting symbol]

7.3.3 Settings of phase to phase fault protection of main transformer


7.3.3.1 Setting list
Table 7-17 Definition of phase to phase fault protection settings

No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25.

Symbol V_NegOV_VCE_Tr Vpp_VCE_Tr I_OC1_Tr t_OC11_Tr TrpLog_OC11_Tr t_OC12_Tr TrpLog_OC12_Tr I_OC2_Tr t_OC21_Tr TrpLog_OC21_Tr t_OC22_Tr TrpLog_OC22_Tr Z1_Fwd_Tr Z1_Rev_Tr t_Z11_Tr TrpLog_Z11_Tr t_Z12_Tr TrpLog_Z12_Tr Z2_Fwd_Tr Z2_Rev_Tr t_Z21_Tr TrpLog_Z21_Tr I_Alm_OvLd_Tr t_Alm_OvLd_Tr I_InitCool1_OvLd_Tr

Range 1.00 V 20.00 V 2.00V-100.00V 0.10 A 100.00 A 0.00 s 10.00 s 0000-FFFF 0.00 s 10.00 s 0000-FFFF 0.10 A 100.00 A 0.00 s 10.00 s 0000-FFFF 0.00 s 10.00 s 0000-FFFF 0.00 100.00 Ohm 0.00 100.00 Ohm 0.00 10.00 s 0000-FFFF 0.00 10.00 s 0000-FFFF 0.00 100.00 Ohm 0.00 100.00 Ohm 0.00 10.00 s 0000-FFFF 0.10 100.00 A 0.00 10.00 s 0.10 100.00 A

Step 0.01 V 0.01 V 0.01 A 0.01 s 1 0.01 s 1 0.01 A 0.01 s 1 0.01 s 1 0.01Ohm 0.01Ohm 0.01 s 1 0.01 s 1 0.01Ohm 0.01Ohm 0.01 s 1 0.01 A 0.01 s 0.01 A

Default 4 60 15 1 000F 1.5 00F1 10 2 0F01 2.2 7001 20 20 1 0FFF 1 0FFF 20 20 1 0FFF 6 8 5.5
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No. 26. 27. 28.

Symbol t_InitCool1_OvLd_Tr I_InitCool2_OvLd_Tr t_InitCool2_OvLd_Tr En_VCE_Ctrl_OC1_Tr En_VCE_Ctrl_OC2_Tr En_LVS.VCE_Ctrl_OC_Tr En_Mem_Curr_Tr Opt_VTS_Ctrl_OC_Tr En_OvLd_Tr En_InitCool_OvLd_Tr

Range 0.00 10.00 s 0.10 100.00 A 0.00 10.00 s logic setting 1 - enable, 0 disable

Step 0.01 s 0.01 A 0.01 s

Default 9 5.5 9 1 1 1 0 1 1 1

29. 30. 31. 32. 33. 34. 35.

0/1 0/1 0/1 0/1 0/1 0/1 0/1

7.3.3.2 Explanation of the settings 1 No.1-- [V_NegOV_VCE_Tr]

This is setting of negative sequence voltage control element of main transformer. Setting and displayed value of negative sequence voltage are U2. Setting of this relay shall be higher than measured imbalance voltage during normal operation condition, generally

U op.2 = (0.06 0.08)U n


Where U n is secondary rated phase-to-phase voltage. Sensitivity factor of negative sequence voltage relay shall be checked by

K sen =

U k .2. min U op.2

Where U k .2. min is minimum secondary negative sequence voltage at location of the relay during phase-to-phase metallic short circuit fault at end of backup protected zone. K sen 2.0 is required for near backup protection and K sen 1.5 for remote backup protection.

Note: When sensitivity factor is checked for current relay and voltage relay, unfavorable normal system operation condition and unfavorable type of short circuit fault shall be adopted. If sensitivity factor of under voltage relay is not high enough, function of composite voltage on LV side initiation can
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be enabled. Voltage is taken from LV side by configure logic setting [En_LVS.VCE_Ctrl_OC_Tr]. 2 No.2-- [Vpp_VCE_Tr]

Voltage of voltage control element is taken from LV side usually (logic setting [En_LVS.VCE_Ctrl_OC_TR] is set as 1.). Undervoltage setting shall be higher than the lowest voltage during starting process of the largest motor connected with the LV busbar. Setting of phase-to-phase under voltage of composite voltage control element. It shall coordinate with generator starting condition. Setting shall be higher than possible minimum voltage during normal operation, namely

U op =

U min K rel K r

Where K rel is reliability factor, 1.10 1.20; K r is release factor, 1.05 1.25; U min is possible minimum voltage during normal operation, 0.9 times of secondary rated line voltage generally. When VT on HV side of the transformer is used for the under voltage relay

U op = 0.7U n
Where U n is secondary rated line voltage. When step-up transformer is used in a power plant and VT on generator side is used for under voltage relay, its setting shall be higher than under voltage during operation of generator without excitation,

U op = (0.5 0.6)U n
Where U n is secondary rated line voltage. Sensitivity factor of under voltage relay shall be checked by

K sen =

U op U c. max
is maximum secondary residual voltage at location of the relay when

Where U c. max

phase-to-phase metallic short circuit fault occurs at the check point during operation condition for calculation. protection.

K sen 1.5 is required for near backup protection and K sen 1.2 for remote backup

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No.3-- [I_OC1_Tr]

Setting of overcurrent protection stage 1. Setting of overcurrent relay shall be higher than rated current of transformer,

I op =

K rel Ie Kr

where K rel is reliability factor, 1.2 generally; K r is release factor, 0.85 0.95; I e is secondary rated current. Sensitivity factor of overcurrent relay shall be checked by following:

K sen =

) I k( 2 . min I op

( 2) where I k . min is minimum fault current through location of the relay during phase-to-phase metallic

short circuit at end of backup protected section.

K sen 1.3 is required for near backup

protection and K sen 1.2 for remote backup protection. 4 No.4-- [t_OC11_Tr]

The first time delay of overcurrent protection stage 1. It shall coordinate with main protection only and oscillation period is not needed to be considered. It is set as 0.5 s generally. 5 No.5 [TrpLog_OC11_Tr]

Tripping output logic setting of the first time delay of over current protection stage 1, please refer to section 7.3.1 6 No.6-- [t_OC12_Tr]

The second time delay of overcurrent protection stage 1. It shall coordinate with main protection only and oscillation period is not needed to be considered. 7 No.7 [TrpLog_OC12_Tr]

Tripping output logic setting of the second time delay of over current protection stage 1, please refer to section 7.3.1 8 No.8-- [I_OC2_Tr]

Setting of overcurrent protection stage 2. 9 No.9-- [t_OC21_Tr]

The first time delay of overcurrent protection stage 2.


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10 No.10 [TrpLog_OC21_Tr] Tripping output logic setting of the first time delay of over current protection stage 2, please refer to section 7.3.1 11 No.11-- [t_OC22_Tr] The second time delay of overcurrent protection stage 2. 12 No.12 [TrpLog_OC22_Tr] Tripping output logic setting of the second time delay of over current protection stage 2, please refer to section 7.3.1 13 No.13 [Z1_Fwd_Tr] Stage 1 of positive direction impedance setting of phase-to-phase impedance protection. Here positive direction means the direction is pointing to the transformer instead of generator itself. If the value of this setting is greater than the next one, then the characteristic of distance protection is set as excursive impedance circle; if it is equal to the next one, the characteristic is whole impedance circle; if the next one is set as 0, the characteristic becomes directional impedance. Generally, low impedance protection is considered as the backup protection of transformer in case that voltage-controlled overcurrent protection cannot satisfy the sensitivity requirement of transformer. Setting of this impedance relay shall coordinate with that of HV side outlet, namely

Z op = K rel K inf Z
Where K rel is reliability factor, 0.8 generally; Kinf is enhanced factor, taking minimum value of various operation conditions; Z is setting of impedance protection of coordinating HV side outlet; Sensitivity shall be checked by phase-to-phase short circuit on end of designated protected zone, namely

K sen =

Z op Z

Where Z is equivalent secondary impedance value of designated protected section. K sen 1.3 Is required. When this direction of impedance relay points to transformer. The forward setting can be based on enough sensitivity for fault on terminal of generator and referred to equation hereinabove. Reverse impedance equals to 5% - 10% of forward impedance. Reverse setting shall be lower than setting of the shortest zone 1 of impedance protection of outlet from this side busbar.
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14 NO.14[Z1_Rev_Tr] Stage 1 of negative direction impedance setting of distance protection. In general, this setting is set as 5-10% of the positive direction impedance setting. 15 NO.15[t_Z11_Tr] The first time delay of distance protection stage 1. 16 NO.16[TrpLog_Z11_Tr] Tripping output logic setting of distance protection stage 1 with time delay 1. 17 NO.17[t_Z12_Tr] The second time delay of distance protection stage 1. 18 NO.18[TrpLog_Z12_Tr] Tripping output logic setting of distance protection with time delay 2. 19 No.19 [Z2_Fwd_Tr] Stage 2 of ppositive direction impedance setting of phase-to-phase impedance protection. 20 NO.20[Z2_Rev_Tr] Stage 2 of negative direction impedance setting of distance protection. 21 NO.21[t_Z21_Tr] The time delay of distance protection stage 2. 22 NO.22[TrpLog_Z21_Tr] Tripping output logic setting of stage 2 of distance protection. 23 No.23-- [I_Alm_OvLd_Tr] Current setting of overload alarm. 24 No.24-- [t_Alm_OvLd_Tr] Time delay of overload alarm. 25 No.25-- [I_InitCool1_OvLd_Tr] Current setting of stage 1 of air cooling initiation of main transformer. 26 No.26-- [t_InitCool1_OvLd_Tr] Time delay of stage 1 of cooling initiation of main transformer. 27 No.27-- [I_InitCool2_OvLd_Tr] Current setting of stage 2 of air cooling initiation of main transformer. 28 No.28-- [t_InitCool2_OvLd_Tr]
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Time delay of stage 2 of cooling initiation of main transformer. 29 No.29-- [En_VCE_Ctrl_OC1_Tr] Logic setting of overcurrent protection stage 1 controlled by voltage element. 1: the overcurrent protection stage 1 is controlled by voltage element. 0: the protection is not controlled by voltage element. 30 No.30-- [En_VCE_Ctrl_OC2_Tr] Logic setting of overcurrent protection stage2 controlled by voltage element. 31 No.31 -- [En_LVS.VCE_Ctrl_OC_Tr] Logic setting of overcurrent protection controlled by LV side VCE. 32 No.32 -- [En_Mem_Curr_Tr] Logic setting of memory function of current. Note: For generator with self parallel excitation system, the memory function is usually disabled for phase to phase backup protection. But if it is enabled, the overcurrent protection must be configured as voltage controlled overcurrent protection. 33 No.33-- [Opt_VTS_Ctrl_OC_Tr] Protection performance during VT circuit failure. 1: when VT circuit failure at one side is detected, voltage control element at the same side will be disabled but overcurrent relay on the same side can still be controlled by voltage control elements of other side if corresponding logic setting is set as 1. 0: when VT circuit failure at one side is detected, the overcurrent relay will become an overcurrent relay without voltage element control. 34 No.34-- [En_OvLd_Tr] Logic setting of enabling overload alarm of main transformer. 35 No.45-- [En_InitCool_OvLd_Tr] Logic setting of enabling cooling initiation of main transformer. 7.3.3.3 Setting path Settings of HV side voltage phase to phase fault protection are accessible in the following path: Main Menu -> Setting -> PROT SETTINGS -> TR PPF BAK PROT

7.3.4 Settings of earth fault protection of main transformer


7.3.4.1 Setting list
Table 7-18 Definition of earth fault protection settings of main transformer

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No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. I_ROC1_Tr t_ROC11_Tr

Symbol V_ROV_VCE_Tr

Range 2.00 100.00V 0.10 100.00A 0.0010.00s 0000-FFFF 0.0010.00s 0000-FFFF 0.10100.00A 0.00 10.00s 0000-FFFF 0.00 10.00s 0000-FFFF 0.10100.00A 0.00 10.00s 0000-FFFF 0.00 10.00s 0000-FFFF 2.00 200.00 V 0.00 10.00s 0000-FFFF 0.00 10.00s 0000 FFFF 0.10 10.00 In 0.10 10.00 In 2.00 50.00 In 0.30 0.70 0000-FFFF 10.00 100.00V 0.00 10.00s

Step 0.01V 0.01A 0.01s 1 0.01s 1 0.01A 0.01 s 1 0.01s 1 0.01A 0.01 s 1 0.01s 1 0.01 V 0.01s 1 0.01s 1 0.01 In 0.01 In 0.01 In 0.01 1 0.01 V 0.01s

Default 10 10 1 0021 1.5 0003 10 2 0003 2.5 001F 10 2 0003 2.5 001F 150 0.5 0003 1 001F 0.1 0.3 6 0.3 7FFF 100 0.5 0 0 0 0 0 0 1 1

TrpLog_ROC11_Tr t_ROC12_Tr TrpLog_ROC12_Tr I_ROC2_Tr t_ROC21_Tr TrpLog_ROC21_Tr t_ROC22_Tr TrpLog_ROC22_Tr I_ROC3_Tr t_ROC31_Tr TrpLog_ROC31_Tr t_ROC32_Tr TrpLog_ROC32_Tr V_ROV_Gap_Tr t_ROV1_Gap_Tr TrpLog_ROV1_Gap_Tr t_ROV2_Gap_Tr TrpLog_ROV2_Gap_Tr I_Alm_REF_Tr I_Pkp_PcntREF_Tr I_InstREF_Tr Slope_PcntREF_Tr TrpLog_REF_Tr V_Alm_ROV_LVS_Tr t_Alm_ROV_LVS_Tr En_VCE.ROV_Ctrl_ROC1_Tr En_VCE.ROV_Ctrl_ROC2_Tr En_Dir_Ctrl_ROC1_Tr En_Dir_Ctrl_ROC2_Tr En_Alm_ROV_LVS_Tr En_BI_Ctrl_ROC_Gap_Tr En_InstREF_Tr En_PcntREF_Tr

logic setting 1 - enable, 0 disable 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

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7.3.4.2 Explanation of the parameters and notice for setting 1 No.1 --[ V_ROV_VCE_Tr]

Setting (3U0) of zero-sequence voltage control element for zero-sequence overcurrent protection. 2 No.2-- [I_ROC1_Tr]

Setting of stage 1 of zero-sequence overcurrent protection. This setting shall coordinate with unrestraint main protection or stage 1 or 2 of zero sequence overcurrent relay of adjacent power line.

I op.o. I = K rel K brI I op.o.1 I


Where:

I op.o.I is setting of stage 1 of zero sequence overcurrent relay, K brI is branch factor of zero sequence current which is ratio of zero sequence current passing
through the relay and passing through the faulty line during ground fault at end of protected zone of stage 1 of power line zero sequence overcurrent protection, maximum value for various operation conditions being Taken;

K rel is reliability factor, 1.1 generally; I op.o.1I is setting of relevant stage of coordinating line protection.
Sensitivity factor of zero sequence overcurrent relay shall be checked by

K sen =

3I k .o. min I op.o

Where:

3I k .o. min is minimum secondary zero sequence current passing through location of the relay
during ground fault at end of protected zone; I op.o is this setting. 3 No.3-- [t_ROC11_Tr]

K sen 1.5 Is required.

Time delay 1 of stage 1 of zero-sequence overcurrent protection. When earth fault occurs on near end of HV side outlet of startup/standby transformer, it is protected by both this protection and zero-sequence overcurrent protection stage 2 on remote end, so the time delay setting of this protection is
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t = t II t
Where:

t is time delay [t_ROC11_Tr]. t II is time delay of zero-sequence overcurrent protection stage2 on remote end. t is the step difference of delay.
4 No.4-- [TrpLog_ROC11_Tr]

Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 1. 5 No.5-- [t_ROC12_Tr]

Time delay 2 of stage 1 of zero-sequence overcurrent protection. 6 No.6-- [TrpLog_ROC12_Tr]

Tripping output logic setting of zero-sequence overcurrent protection stage 1 with time delay 2. 7 No.7-- [I_ROC2_Tr]

Setting of stage 2 of zero-sequence overcurrent protection. The setting shall coordinate with operating current of zero-sequence overcurrent protection of HV side feeders for remote end earth fault:
' I op.o . II = K c 0 C 0

(3I 0 ) op nTA

Where:

K c 0 is coordination coefficient, (generally K co = 1.1); (3I o ) op is the primary operating current of backup zone of zero-sequence overcurrent protection
of HV side feeders to be coordinated.
' C0 is the distribution coefficient of zero sequence current that is equal to the ratio of zero

sequence current passing through this end protection and that passing through the power line, takes the maximum value in various operation modes; and nTA is current ratio of CT. 8 No.8-- [t_ROC21_Tr]

Delay 1 of stage 2 of zero-sequence overcurrent protection. 9 No.9-- [TrpLog_ROC21_Tr]

Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 1.
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10 No.10-- [t_ROC22_Tr] Time delay 2 of stage 2 of zero-sequence overcurrent protection. 11 No.11-- [TrpLog_ROC22_Tr] Tripping output logic setting of zero-sequence overcurrent protection stage 2 with time delay 2. 12 No.12-- [I_ROC3_Tr] Setting of stage 3 of zero-sequence overcurrent protection. 13 No.13-- [t_ROC31_Tr] Delay 1 of stage 3 of zero-sequence overcurrent protection. 14 No.14-- [TrpLog_ROC31_Tr] Tripping output logic setting of zero-sequence overcurrent protection stage 3 with time delay 1. 15 No.15-- [t_ROC32_Tr] Time delay 2 of stage 3 of zero-sequence overcurrent protection. 16 No.16-- [TrpLog_ROC32_Tr] Tripping output logic setting of zero-sequence overcurrent protection stage 3 with time delay 2. 17 No.17-- [V_ROV_Gap_Tr] Voltage setting of zero sequence overvoltage protection for gap. Setting of zero sequence voltage relay

U o. max < U op.o U sat


Where:

U op .o is setting of this relay; U o. max is possible maximum zero sequence voltage at location of the relay during single phase
ground fault in power system with part of neutral points grounded, or during two phases operation of transformer with ungrounded neutral point;

U sat is possible minimum open-delta voltage of VT in directly grounded system during single
phase ground fault and missing grounded neutral point condition. Rated phase voltage of open delta VT is 100 V. Considering that X 0 / X 1 3 in a directly grounded system, U op .o is 180 V generally. 18 No.18-- [t_ROV1_Gap_Tr]
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Time delay 1 of zero sequence overvoltage protection for gap. 19 No.19-- [TrpLog_ROV1_Gap_Tr] Tripping output logic setting of zero sequence overvoltage protection with time delay 1. 20 No.20-- [t_ROV2_Gap_Tr] Time delay 2 of zero sequence overvoltage protection for gap. 21 No.21-- [TrpLog_ROV2_Gap_Tr] Tripping output logic setting of zero sequence overvoltage protection with time delay 2. 22 No.22-- [I_Alm_REF_Tr] Setting of zero sequence differential current alarm. This setting shall be greater than the maximum zero sequence unbalance differential current in normal operation condition meanwhile smaller than REF pickup value. 23 No.23-- [I_Pkp_PcntREF_Tr] Pickup setting of zero sequence differential current. Calculation of this setting is based on secondary rated current of CT. The pick up current of zero sequence differential protection shall be higher than the maximum unbalance current while transformer operates on normal rated load, i.e.

I 0cdqd = K rel ( K er + m) I n
Where:

I 0cdqd represents for [I_Pkp_PcntREF_Tr];


I n is rated secondary current of CT;

K rel is reliability coefficient (generally K rel = 1.3 - 1.5); K er is the ratio errors of CT (for type 10P, K er = 0.032; for class 5P and class TP, K er =0.01X2); m is the error caused by the difference between ratios of CT at all side, 0.05 is recommended.
For practical engineering calculation, I ocdqd =0.2 - 0.5 I n is reasonable and imbalance current in differential scheme during maximum load of transformer shall be measured. Please note that calculation of zero sequence differential current settings is based on the secondary rated current of CT. If a setting value got from calculation is together with its unit Ampere, this setting shall be divided by secondary rated current of this side of CT, to get per unit value. Sensitivity check for zero sequence percentage differential protection
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Sensitivity of zero sequence percentage differential protection shall be checked with the solid earthed short circuit in its protected zone.

K sen 2 is required. In solid earthed system,

distribution of zero sequence current for single phase to ground fault depends on the configuration of zero sequence network of power system. Magnitude of the single-phase ground fault current depends on not only zero sequence distance of system but also positive and negative sequence distance or power system operation mode. When power system is in maintenance status, in order to remain the zero sequence network unchanged and increase sensitivity for earth fault protection, the 220 kV power system is generally compensated by properly changing earth mode of the transformer. Neutral point of transformer of 400 kV power system is now generally earthed with small reactance. Therefore, sensitivity of zero sequence differential protection shall be checked in minimum operation mode for 220 kV power system and minimum operation mode or small maintenance mode for 400 kV power system. Note: Positive polarity of CT is at busbar side on HV side and at neutral point for serial-winding. 24 No.24-- [I_InstREF_Tr] Setting of unrestrained instantaneous zero sequence differential protection. 25 No.25-- [Slope_PcntREF_Tr] Restraint coefficient of percentage zero sequence differential current. 26 No.26-- [TrpLog_REF_Tr] Tripping output logic setting of zero sequence differential protection. 27 No.27-- [V_Alm_ROV_LVS_Tr] Voltage setting of zero sequence overvoltage alarm at LV side. 28 No.28-- [t_Alm_ROV_LVS_Tr] Delay of zero sequence overvoltage alarm at LV side. 29 No.29-- [En_VCE.ROC_Ctrl_ROC1_Tr] Stage 1 of zero-sequence overcurrent protection controlled by zero-sequence voltage element. 30 No.30-- [En_VCE.ROC_Ctrl_ROC2_Tr] Stage 2 of zero-sequence overcurrent protection controlled by zero-sequence voltage element. 31 No.31-- [En_Dir_Ctrl_ROC1_Tr] Stage 1 of zero-sequence overcurrent protection is controlled by direction element. 32 No.32-- [En_Dir_Ctrl_ROC2_Tr] Stage 2 of zero-sequence overcurrent protection is controlled by direction element.
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33 No.33-- [En_Alm_ROV_LVS_Tr] Enable zero sequence overvoltage alarm on LV side. 34 No.34-- [En_BI_Ctrl_ROC_Gap_Tr] Gap zero sequence overcurrent protection controlled by the state of external contact (6B22). 35 No.35-- [En_InstREF_Tr] Enable unrestrained instantaneous zero sequence differential current protection. 36 No.36-- [En_PcntREF_Tr] Enable percentage zero sequence differential current protection. 7.3.4.3 Settings path Settings of earth fault protection of main transformer are accessible in the following path: Main Menu -> SETTING -> PROT SETTINGS -> TR EF BAK PROT

7.3.5 Settings of over excitation protection of main transformer


7.3.5.1 Setting list
Table 7-19 List of over excitation protection settings of main transformer

No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. k_OvExc1_Tr t_OvExc1_Tr

Symbol

Range 1.00 2.00 0.00 3000.00 s 0000 FFFF 1.00 2.00 0.00 3000.00 s 0000 FFFF 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s

Step 0.01 0.01s 1 0.01 0.01s 1 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s

Default 1.4 1 000F 1.2 20 0F01 1.1 10 1.5 1 1.45 2 1.4 5 1.3 15 1.25 30 1.2 100

TrpLog_OvExc1_Tr K_OvExc2_Tr t_OvExc2_Tr TrpLog_OvExc2_Tr k_Alm_OvExc_Tr t_Alm_OvExc_Tr k0_InvOvExc_Tr t0_InvOvExc_Tr k1_InvOvExc_Tr t1_InvOvExc_Tr k2_InvOvExc_Tr t2_InvOvExc_Tr k3_InvOvExc_Tr t3_InvOvExc_Tr k4_InvOvExc_Tr t4_InvOvExc_Tr k5_InvOvExc_Tr t5_InvOvExc_Tr

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21. 22. 23. 24. 25.

k6_InvOvExc_Tr t6_InvOvExc_Tr k7_InvOvExc_Tr t7_InvOvExc_Tr TrpLog_InvOvExc_Tr

1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 0000 FFFF

0.01 0.01s 0.01 0.01s 1

1.15 300 1.1 1000 7FFF

7.3.5.2 Explanation of the settings 1 No.1-- [k_OvExc1_Tr]

Setting of stage 1 of definite time over excitation protection of main transformer.

U U gn B = = U / f = 1.3 or data provided by the factory N = f Bn f gn


2 NO.2[t_OvExc1_Tr]

Delay of stage 1 of definite time over excitation protection of main transformer. 3 NO.3[TrpLog_OvExc1_Tr]

Tripping output logic setting of stage 1 of definite time over excitation protection of main transformer. The function of this protection is used for islanding, excitation shutting or programming, excitation reducing etc. 4 NO.4[k_OvExc2_Tr]

Setting of stage 2 of definite time over excitation protection of main transformer. 5 NO.5[t_OvExc2_Tr]

Delay of stage 2 of definite time over excitation protection of main transformer. 6 NO.6[TrpLog_OvExc2_Tr]

Tripping output logic setting of stage 2 of definite time over excitation protection of main transformer. 7 NO.7[k_Alm_OvExc_Tr]

Setting of over excitation alarm of main transformer. Setting of alarm shall be lower than that of over excitation protection. 1.1 is recommended. 8 NO.8[t_Alm_OvExc_Tr]

Delay of over excitation alarm of main transformer. 9 NO.9[k0_InvOvExc_Tr]

Upper limit of inverse time over excitation protection of main transformern0 10 NO.10[t0_InvOvExc_Tr] Delay of upper limit of inverse time over excitation protection of main transformer. 11 NO.11[k1_InvOvExc_Tr] Inverse time over excitation factor1n1. Setting range of various inverse time over excitation
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coefficient s is 1.1 2.0. However setting of upper limit (NO.9) of over excitation factor n0 shall be higher than that of over excitation factor1 n1, that of factor1 n1 shall be higher than that of factor2 n2, etc.. Finally, setting of over excitation factor6 n6 (NO.23) shall be higher than that of lower limit. 12 NO.12[t1_InvOvExc_Tr] Delay at the point n1 on inverse time over excitation curvet1 The range of delay of various inverse time over excitation protection stage is 0s to 6000 s, ie.,0--50 min. Delay of upper limit (NO.10) of over excitation factor shall be shorter than that of over excitation factor1, that of factor1 shall be shorter than that of factor2, etc.. Finally, delay of over excitation factor6 (NO.22) shall be shorter than that of lower limit (NO.24). 13 NO.13[k2_InvOvExc_Tr] Inverse time over excitation factor n2. 14 NO.14[t2_InvOvExc_Tr] Delay at the point n2 on inverse time over excitation curvet2 15 NO.15[k3_InvOvExc_Tr] Inverse time over excitation Ratio n3. 16 NO.16[t3_InvOvExc_Tr] Delay at the point n3 on inverse time over excitation curvet3. 17 NO.17[k4_InvOvExc_Tr] Inverse time over excitation Ratio n4. 18 NO.18[t4_InvOvExc_Tr] Delay at the point n4 on inverse time over excitation curvet4. 19 NO.19[k5_InvOvExc_Tr] Inverse time over excitation Ratio n5. 20 NO.20[t5_InvOvExc_Tr] Delay at the point n5 on inverse time over excitation curvet5. 21 NO.21[k6_InvOvExc_Tr] Inverse time over excitation Ratio n6. 22 NO.22[t6_InvOvExc_Tr] Delay at the point n6 on inverse time over excitation curvet6. 23 NO.23[k7_InvOvExc_Tr] Inverse time over excitation Ratio n7. 24 NO.24[t7_InvOvExc_Tr] Delay at the point n7 on inverse time over excitation curvet7. 25 NO.25[TrpLog_InvOvExc_Tr] Tripping output logic setting of inverse time over excitation protection of main transformer.

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7.3.5.3 Setting path Settings of main transformer overexcitation protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> TR OVEXC PROT --> [setting symbol] Note: The over excitation protection of generator-transformer unit comprises two over excitation protection: generator over excitation protection and transformer over excitation protection. Configuration of the generator over excitation protection shall be higher than over excitation capability of generator, while that of transformer shall be higher than over excitation capability of transformer. If only one set of over excitation protection is used, configuration of the lower one shall be adopted.

7.3.6 Settings of differential protection of generator


7.3.6.1 Settings list
Table 7-20 List of generator differential protection settings

No. 1 2 3 4 5 6 7 8 9

Symbol I_Pkp_PcntDiff_Gen I_InstDiff_Gen Slope1_PcntDiff_Gen Slope2_PcntDiff_Gen TrpLog_Diff_Gen En_InstDiff_Gen En_PcntDiff_Gen En_DPFC_Diff_Gen Opt_CTS_Blk_PcntDiff_Gen

Range 0.101.50 (Ie) 2.0014.00 (Ie) 0.000.50 0.300.80 0000FFFF

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 1

Default 0.1 6 0.05 0.5 7FFF

Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 1 1 1 1

7.3.6.2 Explanation of the settings 1 No.1-- [I_Pkp_PcntDiff_Gen]

This is pickup setting of percentage current differential protection, which is also the setting of fault detector of percentage differential protection. It shall be higher than maximum unbalance current when the generator operates on normal rated load, i.e.

I cdqd = K rel 2 0.03I f 2 n or I cdqd = K rel Iunb.0


Where:

(Equation 7-1)

I f 2 n is secondary rated current of generator,


I f 2n = I f 1n n fLH
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Where:

I f 1n is primary rated current of generator and n fLH is ratio of generator CT.


I f 1n = Pn / cos 3U f 1n

Where:

Pn is rated capacity of generator; cos is power factor of generator and U f 1n is rated voltage of generator terminal. K rel is reliability factor, 1.5 in general; I unb.0 is the measured actual unbalance current during rated load of generator, 0.2 I f 2 n -0.3 I f 2 n is recommended for reference.
Where:

I cdqd represents the setting [I_Pkp_PcntDiff_Gen].


2 No.2-- [I_InstDiff_Gen]

Setting of unrestrained differential protection. Unrestraint differential protection is a complementary part of differential protection. Its current setting shall be higher than maximum unbalance current due to breakers asynchronous closure. For large unit, it can be set as 3 or 4 times of rated current. 4 times of rated current is recommended. 3 No.3-- [Slope1_PcntDiff_Gen]

Setting of the first slope of percentage differential protection, it shall be:

K bl1 = K rel K cc K er
Where:

(Equation 7-2)

K rel is reliability factor which is considered to be 1.0~2.0 in general; K cc is the type factor of CT, 0.5 in general; K er is error factor of CT ratio, no more than 0.1. K bl 1 represents [Slope1_PcntDiff_Gen] which is set as 0.05~0.1 in general.
4
228

No.4-- [Slope2_PcntDiff_Gen]
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Chapter 7 Settings

Maximum value of restraint coefficient of the differential characteristic curve. With type factor of CT not considered, the maximum unbalance current is, ,

K unb. max = K ap K er K k . max


Where:

(Equation 7-3)

K ap

is non periodic component factor, usually no less than 2.0;

K er is error factor of CT ratio, no more than 0.1; I k . max is periodic component of secondary value of external three phase short circuit current and it
can be taken as 4 times of rated current if it is less than 4 times of rated current. Maximum slope of percentage differential protection is:

k bl 2 =

I unb. max* I cdqd * 2k bl1 I k . max* 2

where:

I unb. max* I cdqd * and I k . max* are all per unit value of rated current of generator; kbl 2 ([Slope2_PcntDiff_Gen] ) is taken as 0.50 generally.
If the percentage differential protection is configured based on rules mentioned above, when phase-to-phase metallic short circuit fault occurs at the terminal of generator, sensitivity factor will meet requirement 5

K sen 2 surely.

No.5-- [TrpLog_Diff_Gen]

Tripping output logic setting of differential protection of generator. 6 No.6-- [En_InstDiff_Gen]

Unrestrained instantaneous differential protection enabled. If this setting is set as 1, it means this protection is enabled. Otherwise it means the protection is disabled. 7 No.7-- [En_PcntDiff_Gen]

Percentage differential protection enabled. 8 No.8-- [En_DPFC_Diff_Gen]

DPFC percentage differential protection enabled.

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No.9-- [Opt_CTS_Blk_PcntDiff_Gen]

If this logic setting is set as 1, it means percentage differential protection will be blocked when CT circuit failure happens. Otherwise it means the function is disabled. 7.3.6.3 Setting path All settings of differential protection settings are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN DIFF PROT --> [setting symbol]

7.3.7 Settings of splitting-phase transverse differential protection of generator


7.3.7.1 Setting list
Table 7-21 List of splitting-phase transverse differential protection settings

No. 1. 2. 3. 4. 5. 6. 7. 8.

Symbol I_Pkp_PcntSPTDiff_Gen I_InstSPTDiff_Gen Slope1_PcntSPTDiff_Gen Slope2_PcntSPTDiff_Gen TrpLog_SPTDiff_Gen En_InstSPTDiff_Gen En_PcntSPTDiff_Gen Opt_CTS_Blk_PcntSPTDiff_Gen

Range 0.10 1.50 (Ie) 2.00 14.00 (Ie) 0.00 -- 0.50 0.30 0.80 0000 -- FFFF 01 01 01

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 1

Default 0.1 6 0.05 0.5 1FFF 1 1 1

Logic setting 1 - enable, 0 disable

7.3.7.2 Explanation of the settings 1 No.1-- [I_Pkp_PcntSPTDiff_Gen]

This is pickup setting of splitting-phase transverse percentage current differential protection, which is also the setting of fault detector of this protection. It shall be higher than maximum unbalance current when the generator operates on normal rated load, i.e.
' I ' op.0 = K rel ( I ' unb.1 + I unb.2 )

Where:

I ' op.0 : represents the setting [I_Pkp_PcntSPTDiff_Gen], K rel : is reliability coefficient. In general, Krel = 1.3 1.5, I ' unb.1 : is unbalance current due to amplitude error between the CTs used in this protection in
load condition. In practical application, I ' unb.1 = 0.06 I ' 2n . Here, I ' 2n is the secondary rated current of CT.
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I ' unb.2 : the second type unbalance current. Because each shunt branch of every phase is
distributed in different groove on the surface of rotor for hydro generator and the air gap field of each groove is different, therefore this second type unbalance current appears. User can also get the maximum unbalance current value by metering the real transverse unbalance current in full load condition of the generator. Generally speaking, the value is a little greater than the one of differential protection of generator. For reference, it can be set as I ' op.0 = 0.5 I ' e . Here, I e' is secondary rated current of generator. 2 No.2-- [I_InstSPTDiff_Gen]

Setting of unrestrained splitting-phase transverse differential protection. 3 No.3-- [Slope1_PcntSPTDiff_Gen]

Setting of the first slope of percentage differential protection 4 No.4-- [Slope2_PcntSPTDiff_Gen]

Maximum value of restraint coefficient of the differential characteristic curve. 5 No.5-- [TrpLog_SPTDiff_Gen]

Tripping output logic setting of splitting-phase transverse differential protection. 6 No.6-- [En_InstSPTDiff_Gen]

Instantaneous splitting-phase transverse differential protection enabled. 7 No.7-- [En_PcntSPTDiff_Gen]

Percentage splitting-phase transverse differential protection enabled. 8 No.8-- [Opt_CTS_Blk_PcntSPTDiff_Gen]

If this logic setting is set as 1, it means percentage splitting-phase transverse differential protection will be blocked when CT circuit failure happens. Otherwise it means the function is disabled. 7.3.7.3 Setting path Settings of generator phase-splitting transverse protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN SPTDIFF PROT-> [setting symbol]

7.3.8 Settings of turn-to-turn fault protection of generator


7.3.8.1 Setting list
Table 7-22 List of turn-to-turn fault protection settings

No. 1 2 3

Symbol I_SensTrvDiff_Gen I_UnsensTrvDiff_Gen t_TrvDiff_Gen

Range 0.10 50.00 A 0.10 50.00 A 0.00 10.00 S

Step 0.01 A 0.01 A 0.01 S

Default 2.0 10 0.2


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4 5 6 7 8 9 10 11 12

V_SensROV_Longl_Gen V_UnsensROV_Longl_Gen t_ROV_Longl_Gen TrpLog_IntTurn_Gen

1 10.00 V 2 20.00 V 0.10 10.00 S 0000 FFFF

0.01 V 0.01 V 0.01 S 1

1 6 0.1 7FFF 1 1 0 0 0

Logic setting 1 - enable, 0 disable 01 En_SensTrvDiff_Gen En_UnsensTrvDiff_Gen En_SensROV_Longl_Gen En_UnsensROV_Longl_Gen En_DPFC_IntTurn_Gen 01 01 01 01

7.3.8.2 Explanation of the parameters and notice for setting 1 NO.1[I_SensTrvDiff_Gen]

Current setting of high sensitive transverse differential protection. Setting of this protection shall be higher than maximum unbalance current during normal operation condition. Reliability factor can be more than 2. The setting value is usually:

I op = 0.05 I f ln / na
Where:

I OP represents the setting [I_SensTrvDiff_Gen]. I f ln


is primary rated current of generator and

na is ratio of zero sequence CT of transverse differential protection.


Phase current restraint factor is a fixed coefficient in the program. 2 NO.2[I_UnsensTrvDiff_Gen]

Current setting of high-setting transverse differential protection. It is equivalent to traditional transverse differential protection. Setting of this protection is as follows which shall be higher than maximum unbalance current during external short circuit fault.

I op = 0.20 ~ 0.30I f ln / n a
Where:

I OP represents the setting [I_SensTrvDiff_Gen]. I f ln


232

is primary rated current of generator and


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Chapter 7 Settings

na is ratio of zero sequence CT of transverse differential protection.


3 NO.3[t_TrvDiff_Gen]

Delay of transverse differential protection (act on only after the occurrence of one-point ground of rotor). When one point earth fault occurs within rotor of generator and one point earth fault protection operates, in order to prevent unwanted operation of transverse protection due to instantaneous two points earth fault within the rotor, operation of this protection shall be delayed for 0.5 s 1 s. Note: When a turn-to-turn fault occurs, the equipment will trip relevant breakers without delay according to the tripping output logic setting, but a time delay decided by user will act on after occurrence of one-point ground of rotor. 4 NO.4[V_SensROV_Longl_Gen]

Voltage setting of high sensitive longitudinal zero sequence overvoltage protection . Setting of this protection shall be higher than maximum unbalance voltage during normal operation condition, usually:

U op = 0.5 - 3 V
At beginning of configuration, 2 3 V is preferred. After fault waveform analysis, the setting can be reduced properly and sensitivity of the protection can be improved than. Phase current restraint factor is a fixed coefficient in the program. 5 NO.5[V_UnsensROV_Longl_Gen]

Setting of this protection shall be higher than maximum unbalance voltage during external fault, usually:

U op = 8 - 12 V
6 NO.6[t_ROV_Longl_Gen]

Delay of longitudinal zero sequence overvoltage. Short delay 0.10 s 0.20 s is recommended for operation and output of this protection. 7 NO.7[TrpLog_IntTurn_Gen]

Tripping output logic setting of turn-to-turn fault protection of generator. 8 NO.8[En_SensTrvDiff_Gen]

Enable high sensitive transverse differential protection of generator.

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NO.9[En_UnsensTrvDiff_Gen]

Enable high-setting transverse differential protection of generator. 10 NO.10[En_SensROV_Longl_Gen] Enable high sensitive longitude zero sequence overvoltage protection of generator. 11 NO.11[En_UnsensROV_Longl_Gen] Enable high-setting longitude zero sequence overvoltage protection of generator. 12 NO.12[En_DPFC_IntTurn_Gen] Enable directional DPFC turn-to-turn fault protection of generator. 7.3.8.3 Setting path Settings of generator interturn protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN INTTURN PROT --> [setting symbol].

7.3.9 Settings of phase to phase fault backup protection of generator


7.3.9.1 Setting list
Table 7-23 List of phase to phase fault protection settings

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
234

Symbol V_NegOV_VCE_Gen Vpp_VCE_Gen I_OC1_Gen t_OC1_Gen TrpLog_OC1_Gen I_OC2_Gen t_OC2_Gen TrpLog_OC2_Gen Z1_Fwd_Gen Z1_Rev_Gen t_Z1_Gen TrpLog_Z1_Gen Z2_Fwd_Gen Z2_Rev_Gen t_Z2_Gen TrpLog_Z2_Gen

Range 1.00 20.00 V 10.00 100.00 V 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.00 100.00 0.00 100.00 0.00 10.00 S 0000 FFFF 0.00 100.00 0.00 100.00 0.00 10.00 S 0000 FFFF

Step 0.01 V 0.01 V 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 0.01 0.01 S 1 0.01 0.01 0.01 S 1

Default 4 60 20 1 000F 17 2 0F01 20 20 1 0FFF 20 20 1 0FFF 1 1 0 1 1

Logic setting 1 - enable, 0 disable 01 En_VCE_Ctrl_OC1_Gen En_VCE_Ctrl_OC2_Gen En_HVS.VCE_Ctrl_OC_Gen Opt_VTS_Ctrl_OC_Gen Opt_ExcMode_Gen 01 01 01 01

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No. 22

Symbol En_BO_OC2_Gen

Range 01

Step

Default 1

7.3.9.2 Explanation of the settings 1 No.1-- [V_NegOV_VCE_Gen]

Negative sequence voltage setting of composite voltage control element. Setting and displayed value of negative sequence voltage are U2. Setting of negative sequence voltage relay shall be higher than unbalance voltage during normal operation, generally

U op.2 = (0.06 - -0.08 ) U n


Where: U n is secondary rated voltage. Sensitivity factor shall be checked by phase-to-phase short circuit fault on HV side bus of main transformer:

K sen =

U 2. min U op 2

Where:

U 2. min is minimum negative sequence voltage at location of the equipment during phase-to-phase
short circuit fault on HV side bus of main transformer. K sen 1.5 is required. 2 NO.2[Vpp_VCE_Gen]

Setting of phase-to-phase under voltage of composite voltage control element. Its operating voltage U op can be set as following: For turbine generator, U op = 0.6U gn and for hydro-generator, U op = 0.7U gn

Where U gn is rated phase-to-phase voltage of generator. Sensitivity factor shall be checked by three-phase short circuit fault on HV side bus of main transformer:

K sen =

U op
) X t I k( 3 . max

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(3) Where I k . max is maximum secondary fault current during three-phase short circuit on HV side bus

of main transformer; X t is reactance of main transformer, X t = Z t . K sen 1.2 is required. 3 NO.3[I_OC1_Gen]

Setting of overcurrent protection stage 1. Setting of overcurrent relay shall be higher than rated current of generator.

I op =
Where:

K rel I gn Kr

K rel is reliability factor, 1.3 1.5; K r is release factor, 0.85 0.95; I gn is secondary rated current of generator.
Sensitivity factor of overcurrent relay shall be checked by following:

K sen =

) I k( 2 . min I op

( 2) Where I k . min is minimum fault current through location of the relay during phase-to-phase

metallic short circuit on HV side of main transformer. 4 NO.4[t_OC1_Gen]

K sen 1.2 is required.

Time delay of overcurrent protection stage 1. Delay of this protection shall be higher than that of operation of backup protection of step-up transformer. This protection is used for islanding and generator shutting off. 5 NO.5[TrpLog_OC1_Gen]

Tripping output logic setting of overcurrent protection stage 1. 6 NO.6[I_OC2_Gen]

Setting of overcurrent protection stage 2. Setting of overcurrent relay shall be higher than rated current of transformer. 7 NO.7[t_OC2_Gen]

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Time delay of overcurrent protection stage2. 8 NO.8[TrpLog_OC2_Gen]

Tripping output logic setting of overcurrent protection stage2. 9 NO.9[Z1_Fwd_Gen]

Positive direction impedance setting of distance protection stage1. Here positive direction means the direction is pointing to the transformer instead of generator itself. If the value of this setting is greater than the next one, then the characteristic of distance protection is set as excursive impedance circle; if it is equal to the next one, the characteristic is whole impedance circle; if the next one is set as 0, the characteristic becomes directional impedance. Generally, low impedance protection is considered as the backup protection of generator in case that voltage-controlled overcurrent protection cant satisfy the sensitivity requirement of generator. 10 NO.10[Z1_Rev_Gen] Negative direction impedance setting of distance protection stage1. In general, this setting is set as 5-10% of the positive direction impedance setting. 11 NO.11[t_Z1_Gen] Delay of distance protection stage1. 12 NO.12[TrpLog_Z1_Gen] Tripping output logic setting of distance protection stage 1. 13 NO.13[Z2_Fwd_Gen] Positive direction impedance setting of distance protection stage2. 14 NO.14[Z2_Rev_Gen] Negative direction impedance setting of distance protection stage2 15 NO.15[t_Z2_Gen] Delay of distance protection stage2 16 NO.16[TrpLog_Z2_Gen] Tripping output logic setting of distance protection stage1. Please refer to the tripping output logic setting of differential protection of main transformer for details. 17 NO.17[En_VCE_Ctrl_OC1_Gen] Enable controlling function to stage 1 of overcurrent protection by Composite Voltage Element. 18 NO.18[En_VCE_Ctrl_OC2_Gen] Enable controlling function to stage 2 of overcurrent protection by Composite Voltage Element. 19 NO.19[En_HVS.VCE_Ctrl_OC_Gen]
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Enable Composite Voltage Element of HV side to control overcurrent protection of generator. 20 NO.19[Opt_VTS_Ctrl_OC_Gen] Protection performance during VT circuit failure. 1: when VT circuit failure at one side is detected, composite voltage element will be disabled if corresponding logic setting is set as 1. 0: when VT circuit failure at one side is detected, the voltage-controlled overcurrent element will become an pure overcurrent relay without composite voltage element controlling. 21 NO.21[Opt_ExcMode_Gen] That the setting is set as 1 indicates the excitation mode of generator is self shunt excitation mode. In that case, the protection will remember the current value at the initiation of fault, and operates based on it, no matter whether the current will decrease due to the descending excitation voltage result from terminal voltages getting down when external fault occurs. Once this setting is set as 1, the backup overcurrent protection of generator is always controlled by composite voltage element. 22 NO.22[Opt_BO_OC2_Gen] Enable blocking function of overcurrent element stage 2 by outputting a set of contact. Note: In the above Tablecurrent used in impedance protection of generator comes from the phase to phase current input channels at neutral point of generator. 7.3.9.3 Setting path Settings of generator phase-to-phase backup protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN PPF BAK PROT --> [setting symbol].

7.3.10 Settings of earth fault protection of stator windings


7.3.10.1 Setting list
Table 7-24 List of earth fault protection settings of stator windings

No. 1 2 3 4 5 6 7 8

Symbol V_SensROV_Sta V_UnsensROV_Sta t_ROV_Sta k_V3rdHRatio_PreSync_Sta k_V3rdHRatio_PostSync_Sta k_V3rdHDiff_Sta t_V3rdH_Sta TrpLog_EF_Sta

Range 0.10 50.00 V 0.10 50.00 V 0.00 10.00 S 0.50 10.00 0.50 10.00 0.10 2.00 0.00 10.00S 0000 FFFF

Step 0.01 V 0.01 V 0.01 S 0.01 0.01 0.01 0.01 S 1

Default 2.0 10 2 1 1 1 3 7FFF

Logic setting 1 - enable, 0 disable


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9 10 11 12 13 14

En_Alm_ROV_Sta En_Trp_ROV_Sta En_Alm_V3rdHRatio_Sta En_Alm_V3rdHDiff_Sta En_Trp_V3rdHRatio_Sta En_Trp_UnsensRov_Sta

01 01 01 01 01 01

1 1 1 1 0 1

7.3.10.2 Explanation of the settings 1 No.1-- [V_SensROV_Sta]

Setting of fundamental zero sequence overvoltage protection. Setting of this protection U op shall be higher than maximum unbalance voltage U unb. max of single phase VT at neutral point during normal operation.

U op = K relU unb. max


Where Krel is reliability factor, 1.2 1.3 generally; Uunb .max is the maximum measured fundamental unbalance zero sequence voltage derived from single VT at the neutral point of generator. To assure its security, user should check the transferred zero sequence voltage through coupling capacitance between HV side and LV side of transformer when external earth fault occurs on the HV side of the transformer. Meanwhile, settings, including time delay and operation setting, should be considered to cooperate with that of earth fault protection of the system. Note: The zero sequence voltage used in this protection comes from VT at the neutral point of generator. 2 NO.2[V_UnsensROV_Sta]

Setting of high-setting fundamental zero sequence overvoltage protection. Only zero sequence voltage at neutral point is taken for high setting zone of fundamental zero sequence voltage protection. Its setting is usually 20 V 25 V. Zero sequence voltage transferred by coupling capacitance per phase between HV and LV side windings of step-up transformer shall be checked when external fault occurs at HV side of the transformer. Coordination both on setting and delay between this protection and system earth fault protection could be achieved then. 3 NO.3[t_ROV_Sta]

Delay of fundamental zero sequence overvoltage protection.

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NO.4[k_V3rdHRatio_PreSync_Sta]

Ratio setting of 3rd harmonics before incorporation of generator in power network.


Let third harmonic voltage at the end and neutral point of generator be Ut and Un , ratio setting of third harmonic voltage percentage earth fault protection shall be

Ut

Un > 3 nTVN during pre-configuration, nTV 0

and = K rel

Where:

Krel is reliability factor, 1.3 1.5 in general; nTV0 is ratio of open-delta zero sequence voltage at the terminal of generator; nTVN is ratio of zero sequence VT on neutral point.
During incorporation of generator to power system, the ratio U 3T / U 3N changes considerably

owing to variation of equivalent capacitive reactance at generator terminal. So two different settings are designed for protection before and after connection of generator with system, and these two settings can be switched over with alternation of contacts position of the terminal breaker. The setting shall be (1.3 1.5) 1 before incorporation and (1.3 1.5) 2 after that. Where 1 and 2 are the maximum real-measured third harmonic voltage ratio before and after incorporation respectively. 5 NO.5[k_V3rdHRatio_PostSync_Sta]

Ratio setting of 3rd harmonics after incorporation in power network. 6 NO.6[k_V3rdHDiff_Sta]

Restraint coefficient of percentage third harmonic voltage earth fault protection.

U t k p U n > k zd U n
Where:

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& is vectorial automatic tracing regulation factor; k p kzd is restraint factor [k_V3rdHDiff_Sta], 0.3 is recommended. U t is 3rd harmonics derived from the terminal of generator. U n is 3rd harmonics derived from the neutral point of generator.
7 NO.7[t_V3rdH_Sta]

Delay of percentage third harmonic voltage earth fault protection. It shall be longer than that of backup protection against external fault . 8 NO.8[TrpLog_EF_Sta]

Tripping output logic setting of stator earth fault protection. 9 NO.9[En_Alm_ROV_Sta]

Enable alarm function of zero sequence overvoltage. 10 NO.10[En_Trp_ROV_Sta] Enable zero sequence overvoltage protection. 11 NO.11[En_Alm_V3rdHRatio_Sta] Enable alarm function of third harmonic voltage ratio element . 12 NO.12[En_Alm_V3rdHDiff_Sta] Enable alarm function of third harmonics differential voltage. 13 NO.13[En_Trp_V3rdHRatio_Sta] Enable tripping function of third harmonic voltage ratio element. 14 NO.14[En_Trp_UnsensRov_Sta] Enable tripping function of high-setting zero sequence overvoltage protection 7.3.10.3 Setting path Settings of stator earth fault protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> STA EF PROT --> [setting symbol].

7.3.11 Settings of earth fault protection of rotor


7.3.11.1 Setting list
Table 7-25 List of earth fault protection settings of rotor

No.

Symbol

Range

Step

Default
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1 2 3 4 5 6 7 8 9 10 11

R_Sens_1PEF_RotWdg R_1PEF_RotWdg t_1PEF_RotWdg V2ndH_VCE_2PEF_RotWdg t_2PEF_RotWdg TrpLog_EF_RotWdg

0.10 100.00 k 0.10 100.00 k 0.00 10.00 S 0.10 10.00 V 0.00 - 10.00 S 0000 FFFF

0.01 k 0.01 k 0.01 S 0.01 V 0.01 S 1

20 20 1 2 1 0FFF 1 1 1 1 0

Logic setting 1 - enable, 0 disable 01 En_Alm_Sens_1PEF_RotWdg En_Alm_1PEF_RotWdg En_Trp_1PEF_RotWdg En_2PEF_RotWdg En_VCE_2PEF_RotWdg 01 01 01 01

7.3.11.2 Explanation of setting 1 NO.1[R_Sens_1PEF_RotWdg]

Impedance setting of sensitive stage of one-point earth fault protection of rotor. General specification of generator specifies that insulation resistance of its excitation winding shall be higher than 1 M for air cooled and hydrogen-cooled turbine generator during cooling state, and 2 k for water cooled excitation winding. General specification of hydro-generator specifies that insulation resistance of its excitation winding shall be higher than 0.5 k in any case. Sensitive stage of this protection is used for alarm. Its setting could be 20 k 80 k generally. 2 NO.2[R_1PEF_RotWdg]

Impedance setting of one-point earth fault protection of rotor. Setting of one point earth fault protection can be 20 k for air cooled and hydrogen-cooled turbine generator and 2.5 k for water cooled excitation winding. This protection can be used for alarm or generator shutting with delay. Actual measured insulation resistance is used for this protection. 3 NO.3[t_1PEF_RotWdg]

Delay of one-point earth fault protection of rotor. 4 NO.4--[V2ndH_VCE_2PEF_RotWdg]

Second harmonics voltage setting of two-point earth fault protection of rotor. 5 NO.5[t_2PEF_RotWdg]

Delay of two-point earth fault protection of rotor. 6 NO.6[TrpLog_EF_RotWdg]

Tripping output logic setting of earth fault protection of rotor.


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NO.7[En_Alm_Sens_1PEF_RotWdg]

Enable alarm function of sensitive stage of one-point earth fault protection of rotor. 8 NO.8[En_Alm_1PEF_RotWdg]

Enable alarm function of one-point earth fault protection of rotor. 9 NO.9[En_Trp_1PEF_RotWdg]

Enable tripping function of one-point earth fault protection of rotor. 10 NO.10[En_2PEF_RotWdg] Enable two-point earth fault protection of rotor. 11 NO.11[En_VCE_2PEF_RotWdg] Enable second harmonics used in two-point earth fault protection of rotor. 7.3.11.3 Setting path Settings of rotor earth fault protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> ROTWDG EF PROT --> [setting symbol].

7.3.12 Settings of thermal overload protection of stator


7.3.12.1 Setting list
Table 7-26 List of thermal overload protection settings of stator

No. 1 2 3 4 5 6 7 8 9 10

Symbol I_OvLd_Sta t_OvLd_Sta TrpLog_OvLd_Sta I_Alm_OvLd_Sta t_Alm_OvLd_Sta I_InvOvLd_Sta tmin_InvOvLd_Sta A_Therm_Sta Kb_Therm_Sta TrpLog_InvOvLd_Sta

Range 0.10 50.00 A 0.00 10.00 S 0000 FFFF 0.10 50.00 A 0.00 10.00 S 0.10 100.00 A 0.10 10.00 S 1.00 100.00 0.00 10.00 0000 FFFF

Step 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 A 0.01 S 0.01 0.01 1

Default 10 1 000F 7 2 6 1 40 1 7FFF

7.3.12.2 Explanation of setting 1 NO.1[I_OvLd_Sta]

Setting of definite time overcurrent protection. Setting of this protection is determined by the requirement of reliable release during permissive continuous load current of generator.

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IOP = Krel
Where:

Ign Kr

Krel is reliability factor, 1.05 generally; Kr is release factor, 0.85 0.95; Ign is secondary rated current of generator.
Delay of this protection shall be longer than maximum delay of backup protection. Alarm will be issued or load will be reduced when it operates. 2 NO.2[t_OvLd_Sta]

Delay of definite time overcurrent protection. 3 NO.3[TrpLog_OvLd_Sta]

Tripping output logic setting of definite time overcurrent protection. 4 NO.4-- [I_Alm_OvLd_Sta]

Setting of definite time overcurrent alarm. 5 NO.5[t_Alm_OvLd_Sta]

Delay of alarm issued by definite time overcurrent element. 6 NO.6[I_InvOvLd_Sta]

Pickup current of inverse time overcurrent protection. Characteristic of this protection is indefinite time relationship between multiple of load current and corresponding permissive duration which is determined by permissive overload capability of stator provided by the factory.

t=
Where:

Ktc 2 I Ksr
2 *

Ktc is heat capacity factor of stator winding; I* is per unit value of load current referred to rated current of stator;

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Ksr is heat dissipation factor, 1.0 1.05 generally.


Minimum delay for upper limit of this protection shall coordinate with unrestraint protection. Current setting of lower limit of this protection shall coordinate with definite time overload protection mentioned above, namely

IOP.min = KC0 Krel

Ign Ksr

Where: KC0 is coordination factor, 1.05 in general. 7 NO.7[tmin_InvOvLd_Sta]

Delay of upper limit of inverse time overcurrent protection. 8 NO.8[A_Therm_Sta]

Thermal capacity parameter of stator winding. 9 NO.9[Kb_Therm_Sta]

Heat dissipation factor for inverse time overcurrent. 10 NO.10[TrpLog_InvOvLd_Sta] Tripping output logic setting of inverse time overcurrent protection. 7.3.12.3 Setting path Settings of stator overload protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> STA OVLD PROT --> [setting symbol].

7.3.13 Settings of negative sequence overload protection of stator


7.3.13.1 Setting list
Table 7-27 List of negative sequence overload protection

No. 1 2 3 4 5 6 7 8 9 10

Symbol I_NegOC_Sta t_NegOC_Sta TrpLog_NegOC_Sta I_Alm_NegOC_Sta t_Alm_NegOC_Sta I_InvNegOC_Sta I2 _Perm_Sta tmin_InvNegOC_Sta A_Therm_RotBody TrpLog_InvNegOC_Sta

Range 0.10 20.00 A 0.00 10.00 S 0000 - FFFF 0.10 20.00 A 0.00 10.00 S 0.05 5.00 A 0.05 5.00 A 0.00 10.00 S 1 100.00 0000 - FFFF

Step 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 A 0.01 A 0.01 S 0.01 1

Default 10 1 000F 1.0 2 0.5 0.4 1 40 7FFF

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7.3.13.2 Explanation of setting 1 NO.1[I_NegOC_Sta]

Setting of definite time negative sequence overcurrent protection. Setting of this protection is determined by the threshold under which this protection can release reliably, that threshold value is continuously permissive negative sequence current I2 . So,

I OP = K rel
Where:

I 2 I gn Kr

I OP is the setting [I_NegOC_Sta]. Krel is reliability factor, 1.05; Kr is release factor, 0.85 0.95; I2 is per unit value of continuously permissive negative sequence current, Ign is secondary rated current of generator.
2 NO.2[t_NegOC_Sta]

Delay of definite time negative sequence overcurrent protection. Delay of this protection shall be longer than maximum delay of backup protection. Alarm will be issued when it operates. 3 NO.3[TrpLog_NegOC_Sta]

Tripping output logic setting of definite time negative sequence overcurrent protection. 4 NO.4[I_Alm_NegOC_Sta]

Setting of alarm issued by negative sequence overcurrent element. 5 NO.5[t_Alm_NegOC_Sta]

Delay of alarm issued by negative sequence overcurrent element. 6 NO.6[I_InvNegOC_Sta]

Pickup current of inverse time negative sequence overcurrent protection.

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Characteristic of this protection is determined by permissive negative sequence overload capability of rotor surface provided by the manufacturer.

t=

2 I2 *

A 2 I2

Where:

A is permissive negative sequence current factor of rotor surface; I2* is per unit value of negative sequence current of generator; I2 is per unit value of permissive continues negative sequence current.
Minimum delay for upper limit of this protection shall coordinate with unrestraint protection. 7 NO.7[I2_Perm_Sta]

Permitted continuous currents of inverse time negative sequence overcurrent protection for lasting operation. Current setting of lower limit of this protection shall be the operating current corresponding to delay 1000 s, namely

I OP. min =

A 2 + I2 1000

This protection is used for Islanding or program tripping. 8 NO.8[tmin_InvNegOC_Sta]

Delay of upper limit of inverse negative sequence overcurrent protection. Minimum delay for upper limit of this protection shall coordinate with unrestraint protection. 9 NO.9[A_Therm_RotBody]

Heat dissipation factor for inverse time negative sequence overcurrent. 10 NO.10[TrpLog_InvNegOC_Sta] Tripping output logic setting of inverse time overcurrent protection. 7.3.13.3 Setting path Settings of stator negative sequence overcurrent protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> STA NEGOC PROT --> [setting symbol].

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7.3.14 Settings of Loss-of-Excitation protection of generator


7.3.14.1 Setting list
Table 7-28 List of loss-of-excitation protection of generator

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Symbol X1_LossExc_Gen X2_LossExc_Gen Q_RevQ_LossExc_Gen V_RotUV_LossExc_Gen V_RotNoLoad_LossExc_Gen k_RotUV_LossExc_Gen V_BusUV_LossExc_Gen P_UP_LossExc_Gen t_LossExc1_Gen t_LossExc2_Gen t_LossExc3_Gen TrpLog_LossExc1_Gen TrpLog_LossExc2_Gen TrpLog_LossExc3_Gen

Range 0.00 -100.00 0.00 -100.00 0.01 50.00 % 1.0 500.00 V 1.0 500.00 V 0.10 10.00 (pu) 10.00 100.00 V 10 100.00 % 0.10 10.00 S 0.10 10.00 S 0.10 3000.00 S 0000 0000 0000 FFFF FFFF FFFF

Step 0.01 0.01 0.01 % 0.01 V 0.01 V 0.01 (pu) 0.01 V 0.01 % 0.01 S 0.01 S 0.01 S 1 1 1

Default 5 20 10 30 50 2 85 50.0 0.5 1.0 3.0 7FFF 7FFF 7FFF 1 1 0 1 1 1 1 1 0 1 0 0

Logic setting 1 - enable, 0 disable 01 En_Z_LossExc1_Gen En_RotUV_LossExc1_Gen En_P_LossExc1_Gen En_BusUV_LossExc2_Gen En_Z_LossExc2_Gen En_RotUV_LossExc2_Gen En_Z_LossExc3_Gen En_RotUV_LossExc3_Gen En_Alm_LossExc1_Gen Opt_Z_LossExc_Gen En_RevQ_LossExc_Gen Opt_UV_LossExc_Gen 01 01 01 01 01 01 01 01 01 01 01

7.3.14.2 Explanation of setting 1 NO.1[X1_LossExc_Gen]

Impedance setting1 of loss-of-excitation protection. In the following figure,

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Xc

jx R

Xa

Xb

Figure 7.3.1 Impedance circle of loss of excitation protection For asynchronous impedance cycle, this setting represents for X a , and the next setting (NO.2) is

X b . Here
' U2 n Xd gn a 2 S gn nv

Xa =

U n X' X b = ( X d + d ) gn a 2 S gn nv
2

Where:

Xd and Xd are unsaturated per unit value of transient reactance and synchronous reactance of
generator,

'

Ugn and Sgn are rated voltage and rated apparent power of generator; na and nv are CT ratio and VT ratio.
For steady state stability limit circle, this setting represents for X C , and the next setting (NO.2) is

X b , here
2 U gn na

Xc = Xs

S gn nv

2 ' U gn na Xd X b = ( X d + ) 2 S gn nv

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Where:

Xs is equivalent reactance on system side (including step-up transformer) connected with the
generator (per unit value, reference capacity is apparent power of the generator). Asynchronous impedance circle and steady state stability limit circle can be selected by logic setting [Opt_Z_LossExc_Gen] (No. 24). For practical project, impedance between asynchronous impedance circle and steady state stability limit circle can be selected for optimal combination of reliability and speed. 2 NO.2[X2_LossExc_Gen]

Impedance setting2 of loss-of-excitation protection 3 NO.3[Q_RevQ_LossExc_Gen]

Reverse power setting of reactive power Reverse reactive power criterion:

Q zd = K rel

Q jx Pgn

Where:

Krel is reliability factor, 1 - 1.3; Qjx is permissive incoming reactive power to the generator; P gn is rated active power of the generator.
Reverse reactive power criterion can be selected by logic setting [En_RevQ_LossExc_Gen] (NO. 26). 4 NO.4[V_RotUV_LossExc_Gen]

Low voltage setting of rotor. There are two low voltage setting of rotor, they are a) Excitation undervoltage criterion

U fd .op = K rel U fd 0
Where:

U fd .op is this setting.

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Krel is reliability factor, 0.20 0.50; U fd0 is rated excitation voltage of the generator without load, i.e. NO.5 setting.
b) Variable excitation voltage criterion For a generator connecting with power system, there is a necessary excitation voltage U fd0 for keeping steady state stability. Variable excitation voltage criterion is

U fd .op K xs U fd 0

P Pt Sn

K xs = K rel ( X d + X S )
Where:

Kxs is rotor voltage criterion coefficient, i.e. NO. 6 setting. Krel is reliability factor, 0.70 0.85; Xd and XS are per unit value of synchronous reactance of generator and equivalent reactance of
system connecting with the generator (referred to rated capacity of the generator);

P is current active power of the generator;


Pt is the salient pole power of generator, i.e. NO. 8 setting.

U fd0 is rated excitation voltage of generator without load;


5 NO.5[V_RotNoLoad_LossExc_Gen]

Rated excitation voltage of the generator without load. 6 NO.6[k_RotUV_LossExc_Gen]

Restrained coefficient of low voltage criterion of rotor. 7 NO.7[V_BusUV_LossExc_Gen]

Low voltage setting for busbar undervoltage criterion. This criterion is used mainly to prevent voltage collapse due to loss of excitation of generator for a system without enough spare reactive power. Voltage on bus of system side is adopted for this
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criterion. Under voltage criterion for three phase simultaneously:

U op.3 ph = K rel U h. min


Where:

Krel is reliability factor, 0.85 0.90; Uh.min is minimum normal operation voltage of HV side of the system.
This criterion can also be configured as 0.85 0.90 times of terminal voltage of generator. 8 NO.8[P_UP_LossExc_Gen]

Power setting for reducing power output. This criterion is configured as 40% - 50% of rated capacity of the generator. 9 NO.9[t_LossExc1_Gen]

Delay of loss-of-excitation protection stage 1 10 NO.10[t_LossExc2_Gen] Delay of loss-of-excitation protection stage 2 11 NO.11[t_LossExc3_Gen] Delay of loss-of-excitation protection stage 3 12 NO.12[TrpLog_LossExc1_Gen] Tripping output logic setting of loss-of-excitation protection stage1 13 NO.13[TrpLog_LossExc2_Gen] Tripping output logic setting of loss-of-excitation protection stage2 14 NO.14[TrpLog_LossExc3_Gen] Tripping output logic setting of loss-of-excitation protection stage3 15 NO.15[En_Z_LossExc1_Gen] Enable impedance criterion in loss-of-excitation protection stage1 16 NO.16[En_RotUV_LossExc1_Gen] Enable the criterion of rotor voltage in loss-of-excitation protection stage1 17 NO.17[En_P_LossExc1_Gen] Enable power-reducing criterion in loss-of-excitation protection stage1
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18 NO.18[En_BusUV_LossExc2_Gen] Enable the low voltage criterion of busbar in loss-of-excitation protection stage2 19 NO.19[En_Z_LossExc2_Gen] Enable impedance criterion in loss-of-excitation protection stage2 20 NO.20[En_RotUV_LossExc2_Gen] Enable the criterion of rotor voltage in loss-of-excitation protection stage2 21 NO.21[En_Z_LossExc3_Gen] Enable impedance criterion in loss-of-excitation protection stage3. 22 NO.22[En_RotUV_LossExc3_Gen] Enable the criterion of rotor voltage in loss-of-excitation protection stage3 23 NO.23[En_Alm_LossExc1_Gen] Enable alarm function of loss-of-excitation protection stage1 24 NO.24[Opt_Z_LossExc_Gen] Impedance circle option. 0, choose steady state stability circle. 1, choose asynchronous impedance cycle. 25 NO.25[En_RevQ_LossExc_Gen] Enable reverse power criterion 26 NO.26[Opt_UV_LossExc_Gen] Enable low voltage criterion. Note: Following criterion are recommended for various stages of this protection: Criterion Stator side impedance Under voltage criterion of system Rotor voltage Reducing power output Delay ( s ) 7.3.14.3 Setting path Settings of generator loss-of-excitation protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN LOSSEXC PROT --> [setting symbol].
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Stage 1 0.5 1.0

Stage 2 0.5 1.0

Stage 3 Long delay

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7.3.15 Settings of out-of-step protection of generator


7.3.15.1 Setting list
Table 7-29 List of out-of-step protection of generator

No. 1 2 3 4 5 6 7 8 9 10 11 12 13

Symbol Za_OOS_Gen Zb_OOS_Gen Zc_OOS_Gen _Reach_OOS_Gen _Inner_OOS_Gen n_Slip_Ext_OOS_Gen n_Slip_Int_OOS_Gen Ibrk_TCB TrpLog_OOS_Gen

Range 0.00 100.00 0.00 100.00 0.00 100.00 60.00 90.00 60.00 150.00 1-1000 1-1000 1.00 100.00 A 0000 - FFFF

Step 0.01 0.01 0.01 0.1 0.1 1 1 0.01 A 0.01

Default 10 5 5 85 120 5 2 10 1FFF 1 1 1 1

Logic setting 1 - enable, 0 disable 01 En_Alm_Ext_OOS_Gen En_Trp_Ext_OOS_Gen En_Alm_Int_OOS_Gen En_Trp_Int_OOS_Gen 01 01 01

7.3.15.2 Explanation of setting Out-of-step protection operates only when out-of-step occurs in power system. Then, based on situation at that time, the dispatching center will adopt islanding, generator shutting or restraint and other necessary measures. Only if center of oscillation situates within the generator or near the generator, or the oscillation lasts too long, and phase difference of electro-motive force between two sides of the breaker less than 90, this protection will trip. Characteristic of this protection comprises three parts: lens part , boundary part and reactance line part . See the following figure.

jx
U D OL Za Zc

IL

IR OR

Zb L R

Figure 7-1 Impedance of out-of-step protection

1
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NO.1[Za_OOS_Gen]
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Impedance setting A of out-of-step protection. Refer to Figure 7-1, this setting can be set by means of the following formula.

Za = (X S + XC )
Where:

2 U gn na S gn nv

X C is per unit value of equivalent reactance of transformer connecting to the generator; X S is equivalent reactance of power system network; Ugn and Sgn are rated voltage and rated apparent power of generator;

na and nv are CT ratio and VT ratio.


2 NO.2[Zb_OOS_Gen]

Impedance setting B of out-of-step protection. Refer to Figure 7-1, this setting can be set by means of the following formula.

Zb = X
' d

2 U gn na

S gn nv

Where:
' Xd is transient reactance of generator;

NO.3[Zc_OOS_Gen]

Impedance setting C of out-of-step protection. Reactance line is the dividing line of oscillation center. Refer to Figure 7-1, this setting can be set by means of the following formula. In practice, 0.9 times of transformer impedance is recommended.

Z c = 0.9 X c
4

2 U gn na

S gn nv

NO.4[_Reach_OOS_Gen]

Reach angle of system impedance.

= 80- 85according to the real angle of system.


5 NO.5[_Inner_OOS_Gen]

Internal angle of lens characteristic . The following formula is for reference,

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= 180 2 arctan

2Z r Za + Zb

Zr

1 RL. min 1.3

Where RL. min is minimum load impedance of generator. 6 NO.6[n_Slip_Ext_OOS_Gen]

Pole sliding number setting for external fault of generator. When the oscillation center situates outside the protected section, times of pole sliding shall be set as 2 15 for alarm and more than 15 for tripping. 7 NO.7[n_Slip_Int_OOS_Gen]

Pole sliding number setting for internal fault of generator. When the oscillation center situates within the protected section, time of pole sliding shall be set as 1-2 in general. 8 NO.8[Ibrk_TCB]

Tolerating current of breaker in tripping. This is an auxiliary criterion and is determined by interruption capacity of the circuit breaker. 9 NO.9[TrpLog_OOS_Gen]

Tripping output logic setting of out-of-step protection. 10 NO.10[En_Alm_Ext_OOS_Gen] Enable alarm in out-of-step case outside the generator. 11 NO.11[En_Trp_Ext_OOS_Gen] Enable tripping in out-of-step case outside the generator. 12 NO.12[En_Alm_Int_OOS_Gen] Enable alarm in out-of-step case inside the generator. 13 NO.13[En_Trp_Int_OOS_Gen] Enable tripping in out-of-step case inside the generator. 7.3.15.3 Setting path Settings of generator out-of-step protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN OOS PROT --> [setting symbol].

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7.3.16 Settings of voltage protection


7.3.16.1 Setting list
Table 7-30 List of voltage protection settings

No. 1 2 3 4 5 6 7 8 9

Symbol V_OV1_Gen t_OV1_Gen TrpLog_OV1_Gen V_OV2_Gen t_OV2_Gen TrpLog_OV2_Gen V_UV_Gen t_UV_Gen TrpLog_UV_Gen

Range 10.0 170.00 V 0.10 10.00 S 0000 FFFF 10.0 170.00 V 0.10 10.00 S 0000 FFFF 10.0 100.00 V 0.10 10.00 S 0000 FFFF

Step 0.01V 0.01S 1 0.01V 0.01S 1 0.01V 0.01S 1

Default 150 0.3 7FFF 130 0.5 7FFF 80 1.5 7FFF

7.3.16.2 Explanation of setting 1 NO.1[V_OV1_Gen]

Voltage setting of overvoltage protection stage 1. Setting of overvoltage protection of stator shall base on permissive overvoltage capability provided by the factory or insulation condition of the stator. For turbo-generator with capacity more than 200 MW,

U op = 1.3U gn
Where:

U gn

is the secondary rated phase-to-phase voltage.

This is used for islanding and excitation shutting with delay 0.5 s. For hydro-generator,

U op = 1.5U gn
This is used for islanding and excitation shutting with delay 0.5 s. For hydro-generator with SCR excitation,

U op = 1.3U gn
This is used for islanding and excitation shutting with delay 0.3 s. 2 NO.2[t_OV1_Gen]

Delay of overvoltage protection stage1. 3 NO.3[TrpLog_OV1_Gen]

Tripping output logic setting of overvoltage protection stage1.


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NO.4[V_OV2_Gen]

Voltage setting of overvoltage protection stage 2. 5 NO.5[t_OV2_Gen]

Delay of overvoltage protection stage2. 6 NO.6[TrpLog_OV2_Gen]

Tripping output logic setting of overvoltage protection stage2. 7 NO.7[V_UV_Gen]

Voltage setting of under voltage protection 8 NO.8[t_UV_Gen]

Delay of under voltage protection 9 NO.9[TrpLog_UV_Gen]

Tripping output logic setting of under voltage protection. 7.3.16.3 Setting path Settings of generator voltage protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN VOLT PROT --> [setting symbol].

7.3.17 Settings of overexcitation protection of generator


7.3.17.1 Setting list
Table 7-31 List of over excitation protection settings of generator

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
258

Symbol k_OvExc1_Gen t_OvExc1_Gen TrpLog_OvExc1_Gen k_OvExc2_Gen t_OvExc2_Gen TrpLog_OvExc2_Gen k_Alm_OvExc_Gen t_Alm_OvExc_Gen k0_InvOvExc_Gen t0_InvOvExc_Gen k1_InvOvExc_Gen t1_InvOvExc_Gen k2_InvOvExc_Gen t2_InvOvExc_Gen k3_InvOvExc_Gen t3_InvOvExc_Gen

Range 1.00 2.00 0.1 3000.0 S 0000 FFFF 0.10 2.00 0.1 3000.0 S 0000 FFFF 1.00 2.00 0.1 10.00 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S

Step 0.01 0.1 S 1 0.01 0.1 S 1 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S

Default 1.4 1 000F 1.2 20 0F01 1.1 10 1.5 1 1.45 2 1.4 5 1.3 15

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No. 17 18 19 20 21 22 23 24 25

Symbol k4_InvOvExc_Gen t4_InvOvExc_Gen k5_InvOvExc_Gen t5_InvOvExc_Gen k6_InvOvExc_Gen t6_InvOvExc_Gen k7_InvOvExc_Gen t7_InvOvExc_Gen TrpLog_InvOvExc_Gen

Range 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 0000 FFFF

Step 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 1

Default 1.25 30 1.2 100 1.15 300 1.1 1000 7FFF

7.3.17.2 Explanation of setting 1 NO.1[k_OvExc1_Gen]

Setting of stage 1 of definite time over excitation protection.

U U gn B N = = = U / f = 1.3 or data provided by the factory f Bn f gn


2 NO.2[t_OvExc1_Gen]

Delay of stage 1 of definite time over excitation protection . 3 NO.3[TrpLog_OvExc1_Gen]

Tripping output logic setting of stage 1 of definite time over excitation protection. The function of this protection is used for islanding, excitation shutting or programming, excitation reducing etc. 4 NO.4[k_OvExc2_Gen]

Setting of stage 2 of definite time over excitation protection. 5 NO.5[t_OvExc2_Gen]

Delay of stage 2 of definite time over excitation protection . 6 NO.6[TrpLog_OvExc2_Gen]

Tripping output logic setting of stage 2 of definite time over excitation protection. 7 NO.7[k_Alm_OvExc_Gen]

Setting of over excitation alarm. Setting of alarm shall be lower than that of over excitation protection. 1.1 is recommended. 8 NO.8[t_Alm_OvExc_Gen]

Delay of over excitation alarm. 9 NO.9[k0_InvOvExc_Gen]

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Upper limit of inverse time over excitation protectionn0 10 NO.10[t0_InvOvExc_Gen] Delay of upper limit of inverse time over excitation protection. 11 NO.11[k1_InvOvExc_Gen] Inverse time over excitation factor1n1. Setting range of various inverse time over excitation coefficient s is 1.1 2.0. However setting of upper limit (NO.9) of over excitation factor n0 shall be higher than that of over excitation factor1 n1, that of factor1 n1 shall be higher than that of factor2 n2, etc.. Finally, setting of over excitation factor6 n6 (NO.23) shall be higher than that of lower limit. 12 NO.12[t1_InvOvExc_Gen] Delay at the point n1 on inverse time over excitation curvet1 The range of delay of various inverse time over excitation protection stage is 0s to 6000 s, ie.,0--50 min. Delay of upper limit (NO.10) of over excitation factor shall be shorter than that of over excitation factor1, that of factor1 shall be shorter than that of factor2, etc.. Finally, delay of over excitation factor6 (NO.22) shall be shorter than that of lower limit (NO.24). 13 NO.13[k2_InvOvExc_Gen] Inverse time over excitation factor n2. 14 NO.14[t2_InvOvExc_Gen] Delay at the point n2 on inverse time over excitation curvet2 15 NO.15[k3_InvOvExc_Gen] Inverse time over excitation Ratio n3. 16 NO.16[t3_InvOvExc_Gen] Delay at the point n3 on inverse time over excitation curvet3. 17 NO.17[k4_InvOvExc_Gen] Inverse time over excitation Ratio n4. 18 NO.18[t4_InvOvExc_Gen] Delay at the point n4 on inverse time over excitation curvet4. 19 NO.19[k5_InvOvExc_Gen] Inverse time over excitation Ratio n5. 20 NO.20[t5_InvOvExc_Gen] Delay at the point n5 on inverse time over excitation curvet5. 21 NO.21[k6_InvOvExc_Gen] Inverse time over excitation Ratio n6. 22 NO.22[t6_InvOvExc_Gen] Delay at the point n6 on inverse time over excitation curvet6.
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23 NO.23[k7_InvOvExc_Gen] Inverse time over excitation Ratio n7. 24 NO.24[t7_InvOvExc_Gen] Delay at the point n7 on inverse time over excitation curvet7. 25 NO.25[TrpLog_InvOvExc_Gen] Tripping output logic setting of inverse time over excitation protection. 7.3.17.3 Setting path Settings of generator overexcitation protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN OVEXC PROT --> [setting symbol]

7.3.18 Settings of power protection of generator


7.3.18.1 Setting list
Table 7-32 List of power protection settings of generator

No. 1 2 3 4 5 6 7 8 9 10

Symbol P_RevP_Gen t_Alm_RevP_Gen t_Trp_RevP_Gen TrpLog_RevP_Gen P_UP_Gen t_UP_Gen TrpLog_UP_Gen P_SeqTrp_RevP_Gen t_SeqTrp_RevP_Gen TrpLog_SeqTrp_RevP_Gen

Range 0.50 10.00 % 0.10 25.00 S 0.10 600.0 S 0000 FFFF 1.00 200.00 % 0.00 300.00 M 0000 FFFF 0.50 10.00 % 0.10 10.00 S 0000 FFFF

Step 0.01% 0.1 S 0.1 S 1 0.01 % 0.01 M 1 0.01 % 0.01 S 1

Default 2 10 10 7FFF 20 10 7FFF 2 1 7FFF

7.3.18.2 Explanation of setting 1 NO.1[P_RevP_Gen]

Power setting of reverse power protection.

Pop = K rel ( P 1 + P 2)
Where:

K rel is reliability coefficient, 0.5 0.8 generally;

P 1 is minimum loss of turbine during reverse power operation, 2% - 4% of rated power generally; P2 is minimum loss of generator during reverse power operation, P2 = (1 ) Pgn generally,

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is efficiency factor of generator, 98.6% - 98.7%;

Pgn is rated power of generator.

Pop is set as 1% - 2% of rated active power generally, and 1% is recommended.


2 NO.2[t_Alm_RevP_Gen]

Delay of reverse power alarm. For reverse power protection without steam valve contact blocking, delay 15 s for alarm. 3 NO.3[t_Trp_RevP_Gen]

Delay of reverse power protection. For reverse power protection without steam valve contact blocking, according to permissive operation time of reverse power, delay 1 min 3 min is set for islanding in general. For program reverse power protection with steam valve contact blocking, delay 0.5 s 1.00 s is set for islanding. 4 NO.4[TrpLog_RevP_Gen]

Tripping output logic setting of reverse power protection. 5 NO.5[P_UP_Gen]

Power setting of low power protection. 6 NO.6[t_UP_Gen]

Power setting of low power protection. 7 NO.7[TrpLog_UP_Gen]

Tripping output logic setting of low power protection. 8 NO.8[P_SeqTrp_RevP_Gen]

Power setting of sequent-tripping reverse power protection. 9 NO.9[t_SeqTrp_RevP_Gen]

Delay of sequent-tripping reverse power protection. For sequent-tripping reverse power protection with steam valve contact blocking, delay 0.5 s 1.00 s for islanding. 10 NO.10[TrpLog_SeqTrp_RevP_Gen] Tripping output logic setting of sequent-tripping reverse power protection. 7.3.18.3 Setting path Settings of generator power protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN PWR PROT --> [setting symbol].
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7.3.19 Settings of underfrequency and overfrequency protection of generator


7.3.19.1 Setting list
Table 7-33 List of frequency protection settings

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

Symbol f_UF1_Gen t_UF1_Gen f_UF2_Gen t_UF2_Gen f_UF3_Gen t_UF3_Gen f_UF4_Gen t_UF4_Gen TrpLog_UF_Gen f_OF1_Gen t_OF1_Gen f_OF2_Gen t_OF2_Gen TrpLog_OF_Gen

Range 45.00 51.00 Hz 0.00 300.00 min 45.00 51.00 Hz 0.00 300.00 min 45.00 51.00 Hz 0.00 100.00 min 45.00 51.00 Hz 0.00 100.00 min 0000 FFFF 50.00 60.00 Hz 0.10 100.00 min 50.00 60.00 Hz 0.10 100.00 S 0000 FFFF

Step 0.01 Hz 0.01min 0.01 Hz 0.01min 0.01 Hz 0.01 min 0.01 Hz 0.01 min 1 0.01 Hz 0.01min 0.01 Hz 0.01 S 1

Default 48.5 10 48 10 47.5 10 46 10 7FFF 51.5 10 55 10 7FFF 1 0 1 0 1 0 1 0 1 0 1 1 0

Logic setting 1 - enable, 0 disable 01 En_Alm_UF1_Gen En_Trp_UF1_Gen En_Alm_UF2_Gen En_Trp_UF2_Gen En_Alm_UF3_Gen En_Trp_UF3_Gen En_Alm_UF4_Gen En_Trp_UF4_Gen En_Alm_OF1_Gen En_Trp_OF1_Gen En_Alm_OF2_Gen En_Trp_OF2_Gen En_BO_UC_OvSp_Gen 01 01 01 01 01 01 01 01 01 01 01 01

7.3.19.2 Explanation of setting 1 NO.1[f_UF1_Gen]

Frequency setting of under frequency protection stage1. Permissive range of frequency during operation for large turbo-generator with capacity more than 300 MW is 48.5 Hz 50.5 Hz.
Recommended permissive operation time of abnormal frequency for large generator is as follows. Table 7-34 Operating time under differential frequency
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Freq. Hz 51.5 51.0 48.5-50.5

Permissive operating time accumulated, min 30 180 continuous once, s 30 180

Freq. Hz 48.0 47.5 47.0

Permissive operating time accumulated, min 300 60 10 once, s 300 60 10

Three stages of under frequency protection are provided in which function of accumulated operating time is equipped for stage 1(NO.2 setting). Two zones of over frequency protection are provided, in which no function of accumulated operating time is equipped. Each zone can be used for alarm or tripping by configuration of logic setting. 2 NO.2[t_UF1_Gen]

The sum of delay setting of under frequency protection stage1. 3 NO.3[f_UF2_Gen]

Frequency setting of under frequency protection stage2. 4 NO.4-- [t_UF2_Gen]

Delay of under frequency protection stage2. 5 NO.5[f_UF3_Gen]

Frequency setting of under frequency protection stage3. 6 NO.6[t_UF3_Gen]

Delay of under frequency protection stage3. 7 NO.7[f_UF4_Gen]

Frequency setting of under frequency protection stage4. 8 NO.8[t_UF4_Gen]

Delay of under frequency protection stage4. 9 NO.9[TrpLog_UF_Gen]

Tripping output logic setting of under frequency protection. 10 NO.10[f_OF1_Gen] Frequency setting of over frequency protection stage1. 11 NO.11[t_OF1_Gen] Delay of over frequency protection stage1. 12 NO.12[f_OF2_Gen]
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Frequency setting of over frequency protection stage2. 13 NO.13[t_OF2_Gen] Delay of over frequency protection stage2. 14 NO.14[TrpLog_OF_Gen] Tripping output logic setting of over frequency protection. 15 NO.15[En_Alm_UF1_Gen] Enable alarm function of under frequency protection stage1. 16 NO.16[En_Trp_UF1_Gen] Enable tripping function of under frequency protection stage1. 17 NO.17[En_Alm_UF2_Gen] Enable alarm function of under frequency protection stage2. 18 NO.18[En_Trp_UF2_Gen] Enable tripping function of under frequency protection stage2. 19 NO.19[En_Alm_UF3_Gen] Enable alarm function of under frequency protection stage3. 20 NO.20[En_Trp_UF3_Gen] Enable tripping function of under frequency protection stage3. 21 NO.21[En_Alm_UF4_Gen] Enable alarm function of under frequency protection stage4. 22 NO.22[En_Trp_UF4_Gen] Enable tripping function of under frequency protection stage4. 23 NO.23[En_Alm_OF1_Gen] Enable alarm function of over frequency protection stage1. 24 NO.24[En_Trp_OF1_Gen] Enable tripping function of over frequency protection stage1. 25 NO.25[En_Alm_OF2_Gen] Enable alarm function of over frequency protection stage2. 26 NO.26[En_Trp_OF2_Gen] Enable tripping function of over frequency protection stage2. 27 NO.27[En_BO_UC_OvSp_Gen]
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Enable binary output function of over speed of generator. When the current is higher than a internal setting, the equipment will output a pair of contacts (4B1-3 and 4B5-7) 7.3.19.3 Setting path Settings of generator frequency protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN FREQ PROT --> [setting symbol].

7.3.20 Settings of startup and shutdown protection of generator


7.3.20.1 Setting list
Table 7-35 List of startup and shutdown protection settings of generator

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Symbol f_UF_StShut_Gen I_TrDiff_StShut_Gen I_STDiff_StShut_Gen I_GenDiff_StShut_Gen I_SPTDiff_StShut_Gen I_ExcDiff_StShut_Gen TrpLog_Diff_StShut_Gen V_StaROV_StShut_Gen t_StaROV_StShut_Gen TrpLog_StaROV_StShut_Gen

Range 40.0 50.0Hz 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0000 FFFF 5 25.0 V 0.10 10.0 S 0000 FFFF

Step 0.01 Hz 0.01 (Ie) 0.01 (Ie) 0.01 (Ie) 0.01 (Ie) 0.01 (Ie) 1 0.01 V 0.01 S 1

Default 45 1 1 1 1 1 7FFF 10 10 7FFF 1 0 1 0 0 1 1

Logic setting 1 - enable, 0 disable 01 En_TrDiff_StShut_Gen En_STDiff_StShut_Gen En_GenDiff_StShut_Gen En_SPTDiff_StShut_Gen En_ExcDiff_StShut_Gen En_StaROV_StShut_Gen En_UF_Ctrl_StShut_Gen 01 01 01 01 01 01

7.3.20.2 Explanation of the settings 1 NO.1[f_UF_Ctrl_StShut_Gen]

Frequency setting for blocking startup and shutdown protection of generator. Startup and shutdown protection is used for earth fault and phase-to-phase fault of stator during low speed operation of the generator. Its algorithm is insensitive to variation of frequency. This protection is auxiliary protection of generator during low frequency operation. setting of this protection is 0.8 0.9 times of rated frequency. 2 NO.2[I_TrDiff_StShut_Gen] Blocking

Differential current setting for the differential protection of main transformer in start-stop condition. For phase-to-phase fault, differential current protection is used. The equipment comprises
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differential current protection of generator, main transformer and stepdown transformer. Setting of this protection during rated frequency shall be higher than imbalance current in differential circuit during full load operation,

I op = K rel I unb
Where:

Krel is reliability factor, 1.30 1.50 generally; Iunb is imbalance current in differential circuit during full load operation during rated frequency.
3 NO.3[I_STDiff_StShut_Gen]

Differential current setting for the differential protection of stepdown transformer in startup and shutdown condition. The setting principle is as same as No.2. 4 NO.4[I_GenDiff_StShut_Gen]

Differential current setting for the differential protection of generator in startup and shutdown condition. 5 NO.5[I_SPTDiff_StShut_Gen]

Differential current setting for the split phase differential protection of generator in startup and shutdown condition. 6 NO.6[I_ExcDiff_StShut_Gen]

Differential current setting for the differential protection of exciter in startup and shutdown condition. 7 NO.7[TrpLog_Diff_StShut_Gen]

Tripping output logic setting of low frequency overcurrent protection. 8 NO.8[V_StaROV_StShut_Gen]

Zero sequence voltage setting of stator earth fault protection in startup and shutdown condition. For earth fault, zero sequence voltage derived from neutral point is adopted as criterion with setting 10 V in general and delay not shorter than that of fundamental zero sequence voltage earth fault protection for stator in normal condition. 9 NO.9[t_StaROV_StShut_Gen]

Delay of stator earth fault protection in startup and shutdown condition. 10 NO.10[TrpLog_StaROV_StShut_Gen] Tripping output logic setting of stator earth fault protection in startup and shutdown condition. 11 NO.11[En_TrDiff_StShut_Gen]

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Enable differential current protective element of main transformer. 12 NO.12[En_STDiff_StShut_Gen] Enable differential current protective element of stepdown transformer. 13 NO.13[En_GenDiff_StShut_Gen] Enable differential current protective element of generator. 14 NO.14[En_SPTDiff_StShut_Gen] Enable spilt phase differential current protective element of generator. 15 NO.15[En_ExcDiff_StShut_Gen] Enable differential current protective element of exciter. 16 NO.16[En_StaROV_StShut_Gen] Enable zero sequence voltage criterion. 17 NO.17[En_UF_Ctrl__StShut_Gen] Enable blocking function in under frequency condition. 7.3.20.3 Setting path Settings of generator startup and shutdown protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN STSHUT PROT --> [setting symbol].

7.3.21 Settings of accidental energization protection of generator


7.3.21.1 Setting list
Table 7-36 List of accidental energization protection settings of generator

No. 1 2 3 4 5 6 7 8 9 10 11 12 13

Symbol f_UF_AccEnerg_Gen I_OC_AccEnerg_Gen Ibrk_TCB t_AccEnerg_Gen TrpLog_AccEnerg_Gen I_NegOC_Flash_TCB t_Flash1_TCB TrpLog_Flash1_TCB t_Flash2_TCB TrpLog_Flash2_TCB

Range 40 50.00 Hz 0.10 - 100.00 A 1.00 100.00 A 0.0 1.00 S 0000- FFFF 0.1 20.0 A 0.1 - 1.0 S 0000 FFFF 0.1 - 1.0 S 0000 FFFF

Step 0.01 Hz 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A

Default 45 3 10 0.1 7FFF 3 3 7FFF 3 7FFF 1 1 0

Logic setting 1 - enable, 0 disable 01 En_UF_Ctrl_AccEnerg_Gen En_CB_Ctrl_AccEnerg_Gen En_Ibrk_Ctrl_Trp_TCB 01 01

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7.3.21.2 Explanation of setting 1 NO.1[f_UF_AccEnerg_Gen]

Frequency setting for blocking accident energization protection of generator. Frequency blocking setting shall be 80% - 90% of the rated frequency, i.e., 40 Hz 45 Hz. 2 NO.2[I_OC_AccEnerg_Gen]

Current setting of accident energization overcurrent protection. Current setting shall be 50% of minimum accidental closing current (generator side) during process of generator starting up but having not been excited. If accidental closing current of circuit breaker on stepdown transformer side shall be considered, current setting shall base on minimum accidental closing current during this condition. The current used for this setting is derived from the CT at the terminal of generator. In general, this setting shall be in excess of 1.3 times of rated current of generator. 3 NO.3[Ibrk_TCB]

Current setting of CB capacity of HV side of main transformer. 4 NO.4[t_AccEnerg_Gen]

Delay of accident energization overcurrent protection. 5 NO.5[TrpLog_AccEnerg_Gen]

Tripping output logic setting of accident energization overcurrent protection. 6 NO.6[I_NegOC_Flash_TCB]

Negative sequence current setting of breaker flashover protection of CB at HV side of main transformer. This setting shall be higher than possible unbalance current during normal operation. It must be set according to the secondary current of the CT at the terminal of generator. 7 NO.7[t_Flash1_TCB]

Delay 1 of breaker flashover protection. This setting shall be longer than operation time of circuit breaker. 8 NO.8[TrpLog_Flash1_TCB]

Tripping output logic setting stage 1 of breaker flashover protection. If impulse current may be higher than capacity of circuit breaker during asynchronous closing, the protection shall shut off the excitation firstly. If current passing through circuit breaker is lower than permissive value, the protection can trip the circuit breaker on outlet. Permissive tripping current of circuit breaker shall be configured as that provided by factory. 9 NO.9[t_Flash2_TCB]

Delay 2 of breaker flashover protection. 10 NO.10[TrpLog_Flash2_TCB]


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Tripping output logic setting stage 2 of breaker flashover protection. 11 NO.11[En_UF_Ctrl_AccEnerg_Gen] Enable blocking function in under frequency condition. 12 NO.12[En_CB_Ctrl_AccEnerg_Gen] Enable breaker position auxiliary contact blocking function. If asynchronous unwanted closing is considered, breaker position contact blocking shall be selected. 13 NO.13[En_Ibrk_Ctrl_Trp_TCB] Enable breaker capacity blocking function. 7.3.21.3 Setting path Settings of generator accidental energization protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> GEN ACCENERG PROT --> [setting symbol].

7.3.22 Settings of differential protection of excitation transformer or exciter


7.3.22.1 Setting list

Table 7-37 List of differential protection settings of excitation transformer or exciter

No. 1 2 3 4 5 6 7 8 9 10

Symbol I_Pkp_PcntDiff_Exc I_InstDiff_Exc Slope1_PcntDiff_Exc Slope2_PcntDiff_Exc k_Harm_PcntDiff_Exc TrpLog_Diff_Exc En_InstDiff_Exc En_PcntDiff_Exc Opt_Inrush_Ident_Exc Opt_CTS_Blk_PcntDiff_Exc

Range 0.10 1.50 (Ie) 2.0 14.0 (Ie) 0.00 0.50 0.50 0.80 0.10 0.35 0000 FFFF

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1

Default 0.3 6 0.1 0.7 0.15 7FFF 1 1 1 1

Logic setting 1 enable, 0 disable 01 01 01 01

7.3.22.2 Explanation of setting 1 NO.1[I_Pkp_PcntDiff_Exc]

Setting of pickup value of percentage differential current of excitation transformer or exciter. In practice, for excitation transformer, characteristic of CT on two sides may differ significantly and the unbalance differential current may be larger than that of main transformer. So for pickup setting, 0.5 Ie is recommended.
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NO.2[I_InstDiff_Exc]

Setting of unrestrained instantaneous differential protection. 3 NO.3[Slope1_PcntDiff_Exc]

Restraint coefficient of the first slope of the differential characteristic curve. 4 NO.4[Slope2_PcntDiff_Exc]

Maximum value of restraint coefficient of the differential characteristic curve. 5 NO.5[k_Harm_PcntDiff_Exc]

Restraint coefficient of second harmonics. 6 NO.6[TrpLog_Diff_Exc]

Tripping output logic setting of differential protection of excitation transformer of exciter. 7 NO.7[En_InstDiff_Exc]

Enable unrestrained instantaneous differential protection of excitation transformer or exciter. 8 NO.8[En_PcntDiff_Exc]

Enable percentage differential protection of excitation transformer or exciter. 9 NO.9[Opt_Inrush_Ident_Exc]

Inrush current blocking mode. Select criterion of Inrush current detection. 0, discrimination by harmonics; 1, waveform distortion criterion is used. 10 NO.10[Opt_CTS_Blk_PcntDiff_Exc] Enable differential protection blocked by CT circuit failure. Setting 0: Setting 1: Differential protection is not blocked by CT circuit failure. Differential protection is blocked by CT circuit failure

7.3.22.3 Setting path Settings of excitation differential protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> EXC DIFF PROT --> [setting symbol].

7.3.23 Settings of backup protection of excitation transformer or exciter


7.3.23.1 Setting list
Table 7-38 List of backup protection settings of excitation transformer or exciter

No. 1 2 3

Symbol V_NegOV_VCE_Exc Vpp_VCE_Exc I_OC1_Exc

Range 1.00 20.00 V 2.00 100.00 V 0.10 100.00 A

Step 0.01 V 0.01 V 0.01 A

Default 4 60 20
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4 5 6 7 8 9 10 11 12 13 14

t_OC1_Exc TrpLog_OC1_Exc I_OC2_Exc t_OC2_Exc TrpLog_OC2_Exc

0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 25.00 S 0000 FFFF

0.01 S 1 0.01 A 0.01 S 1

1 0081 20 1.5 0081 1 1 0 1 0 0

Logic setting 1 enable, 0 disable 01 En_VCE_Ctrl_OC1_Exc En_VCE_Ctrl_OC2_Exc En_Mem_Curr_Exc Opt_VTS_Ctrl_OC_Exc Opt_AC_Input_S1_Exc Opt_AC_Input_S2_Exc 01 01 01 01 01

7.3.23.2 Explanation of setting 1 NO.1[V_NegOV_VCE_Exc]

Negative sequence voltage setting of composite voltage control element. Setting and displayed value of negative sequence voltage are U2. Note: Please refer to the setting explanation of backup protection of main transformer for reference. 2 NO.2[Vpp_VCE_Exc]

Setting of phase-to-phase under voltage of composite voltage control element. 3 NO.3[I_OC1_Exc]

Setting of definite time overcurrent protection stage1. 4 NO.4[t_OC1_Exc]

Delay of definite time overcurrent protection stage1. 5 NO.5[TrpLog_OC1_Exc]

Tripping output logic setting of definite time overcurrent protection. 6 NO.6[I_OC2_Exc]

Setting of definitive time overcurrent protection stage2. 7 NO.7[t_OC2_Exc]

Delay of definite time overcurrent protection stage2. 8 NO.8[TrpLog_OC2_Exc]

Tripping output logic setting of definite time overcurrent protection stage2.


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NO.9[En_VCE_Ctrl_OC1_Exc]

Logic setting of overcurrent protection stage1 controlled by voltage element. 10 NO.10[En_VCE_Ctrl_OC2_Exc] Logic setting of overcurrent protection stage2 controlled by voltage element. 11 NO.11[En_Mem_Curr_Exc] Logic setting of memory function of current of exciter. 12 NO.12[Opt_VTS_Ctrl_OC__Exc] Protection performance during VT circuit failure. 1: when VT circuit failure at one side is detected, voltage control element at the same side will be disabled but overcurrent relay on the same side can still be controlled by voltage control elements of other side if corresponding logic setting is set as 1. 0: when VT circuit failure at one side is detected, the overcurrent relay will become an overcurrent relay without voltage element control. 13 NO.13[Opt_AC_Input_S1_Exc] Type selection configuration logic setting of current input. 1 is the AC current input for overcurrent protection is derived from S1 side of exciter. 14 NO.14[Opt_AC_Input_S2_Exc] Type selection configuration logic setting of current input. 1 is the AC current input for overcurrent protection is derived from S2 side of exciter. Note: The current used in the overcurrent protection is derived from the CT at the HV side of excitation transformer or the CT at the neutral point of exciter. 7.3.23.3 Setting path Settings of excitation backup protection are accessible in the following path: Main Menu -> SETTINGS -> GEN PROT SETTINGS -> EXC BAK PROT --> [setting symbol].

7.3.24 Settings of overload protection of excitation


7.3.24.1 Setting list

Table 7-39 List of overload protection settings of exciter

No. 1 2 3 4

Symbol I_OvLd_RotWdg t_OvLd_RotWdg TrpLog_OvLd_RotWdg I_Alm_OvLd_RotWdg

Range 0.10 100.00 AkA 0.00 25.00 S 0000 FFFF 0.10 100.00 AkA

Step 0.01AkA 0.01S 1 0.01AkA

Default 10 1 000F 7
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5 6 7 8 9 10 11 12 13 14

t_Alm_OvLd_RotWdg I_InvOvLd_RotWdg tmin_InvOvLd_RotWdg A_Therm_RotWdg Ib_InvOvLd_RotWdg TrpLog_InvOvLd_RotWdg

0.10 25.00 S 0.10 50.00 AkA 0.10 10.00 S 1.00 100.00 0.1 50.00AkA 0000 FFFF

0.01S 0.01AkA 0.01S 0.01 0.01AkA 1

2 6 1 40 1 7FFF 1 0 0 0

Logic setting 1 - enable, 0 disable 01 Opt_AC_Input_RotWdg Opt_DC_Input_RotWdg Opt_AC_Input_S1_RotWdg Opt_AC_Input_S2_RotWdg 01 01 01

7.3.24.2 Explanation of setting 1 NO.1[I_OvLd_RotWdg]

Setting of overload protection of rotor winding. If the measured current is input by DC type, the unit of the setting is kA. Otherwise, A is the unit of AC type current. 2 NO.2[t_OvLd_RotWdg]

Delay setting of overload protection of rotor winding. 3 NO.3[TrpLog_OvLd_RotWdg]

Tripping output logic setting of overload protection of rotor winding. 4 NO.4[I_Alm_OvLd_RotWdg]

Current setting of overload alarm. 5 NO.5[t_Alm_OvLd_RotWdg]

Delay of overload alarm. 6 NO.6[I_InvOvLd_RotWdg]

Pickup current of inverse time overload protection. 7 NO.7[tmin_InvOvLd_RotWdg]

Delay of upper limit of inverse time overload protection. 8 NO.8[A_Therm_RotWdg]

Thermal capacity parameter of excitation winding. 9 NO.9[Ib_InvOvLd_RotWdg]

Reference current setting of inverse time overload. 10 NO.10[TrpLog_InvOvLd_RotWdg]

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Tripping output logic setting of inverse time overload protection. 11 NO.11[Opt_AC_Input_RotWdg] Type selection configuration logic setting of current input. 1 is AC current input for overload protection of rotor winding. 12 NO.12[Opt_DC_Input_RotWdg]

Type selection configuration logic setting of current input. 1 is DC current input for overload protection of rotor winding. 13 NO.13[Opt_AC_Input_S1_RotWdg]

Type selection configuration logic setting of current input. 1 is the AC current input for overload protection of rotor winding is derived from HV side of excitation transformer. 14 NO.14[Opt_AC_Input_S2_RotWdg]

Type selection configuration logic setting of current input. 1 is the AC current input for overload protection of rotor winding is derived from LV side of excitation transformer. 7.3.24.3 Setting path Settings of excitation overload protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> EXC OVLD PROT --> [setting symbol].

7.3.25 Settings of differential protection of stepdown transformer


7.3.25.1 Setting list
Table 7-40 List of differential protection settings of stepdown transformer

No. 1 2 3 4 5 6 7 8 9 10

Symbol I_Pkp_PcntDiff_ST I_InstDiff_ST Slope1_PcntDiff_ST Slope2_PcntDiff_ST k_Harm_PcntDiff_ST TrpLog_Diff_ST En_InstDiff_ST En_PcntDiff_ST Opt_Inrush_Ident_ST Opt_CTS_Blk_PcntDiff_ST

Range 0.10 1.50 (Ie) 2.0 14.0 (Ie) 0.00 0.50 0.50 0.80 0.10 0.35 0000 FFFF

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1

Default 0.3 6 0.1 0.7 0.15 7FFF 1 1 1 1

Logic setting 1 enable, 0 disable 01 01 01 01

7.3.25.2 Explanation of setting 1 NO.1[I_Pkp_PcntDiff_ST]

Setting of pickup value of percentage differential current of stepdown transformer.


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NO.2[I_InstDiff_ST]

Setting of unrestrained instantaneous differential protection of stepdown transformer. 3 NO.3[Slope1_PcntDiff_ST]

Restraint coefficient of the first slope of the differential characteristic curve. 4 NO.4[Slope2_PcntDiff_ST]

Maximum value of restraint coefficient of the differential characteristic curve. 5 NO.5[k_Harm_PcntDiff_ST]

Restraint coefficient of second harmonics. 6 NO.6[TrpLog_Diff_ST]

Tripping output logic setting of differential protection of stepdown transformer. 7 NO.7[En_InstDiff_ST]

Enable unrestrained instantaneous differential protection of stepdown transformer. 8 NO.8[En_PcntDiff_ST]

Enable percentage differential protection of stepdown transformer. 9 NO.9[Opt_Inrush_Ident_ST]

Inrush current blocking mode. Select criterion of Inrush current detection. 0, discrimination by harmonics; 1, waveform distortion criterion is used. 10 NO.10[Opt_CTS_Blk_PcntDiff_ST] Enable differential protection blocked by CT circuit failure. Setting 0: Setting 1: Differential protection is not blocked by CT circuit failure. Differential protection is blocked by CT circuit failure

7.3.25.3 Setting path Settings of stepdown transformer differential protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> ST DIFF PROT --> [setting symbol].

7.3.26 Settings of backup protection at HVS of stepdown transformer


7.3.26.1 Setting list
Table 7-41 List of HVS backup protection settings of stepdown transformer

No. 1 2 3
276

Symbol V_NegOV_VCE_HVS_ST Vpp_VCE_ HVS_ST I_OC1_HVS_ST

Range 1.00 20.00 V 2.00 100.00 V 0.10 100.00 A

Step 0.01 V 0.01 V 0.01 A

Default 4 60 20

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4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

t_OC1_HVS_ST TrpLog_OC1_HVS_ST I_OC2_HVS_ST t_OC2_HVS_ST TrpLog_OC2_HVS_ST I_Alm_OvLd_HVS_ST t_Alm_OvLd_HVS_ST I_InitCool1_OvLd_HVS_ST t_InitCool1_OvLd_HVS_ST I_InitCool2_OvLd_HVS_ST t_InitCool2_OvLd_HVS_ST

0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 50.00 A 0.00 10.00 S 0.10 50.00 A 0.00 10.00 S 0.10 50.00 A 0.00 10.00 S

0.01 S 1 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 A 0.01 S 0.01 A 0.01 S

1 0021 17 2 0003 6 8 5.5 9 5.5 9 1 1 0 1 1 1 0

Logic setting 1 enable, 0 disable 01 En_VCE_Ctrl_OC1_HVS_ST En_VCE_Ctrl_OC2_HVS_ST En_Mem_Curr_HVS_ST Opt_VTS_Ctrl_OC_HVS_ST En_Alm_OvLd_HVS_ST En_InitCool_OvLd_HVS_ST En_LVSProt_Blk_OC1_HVS_ST 01 01 01 01 01 01

7.3.26.2 Explanation of setting 1 NO.1[V_NegOV_VCE_HVS_ST]

Negative sequence voltage setting of composite voltage control element at HVS of stepdown transformer. 2 NO.2[Vpp_VCE_HVS_ST]

Setting of phase-to-phase under voltage of composite voltage control element. 3 NO.3[I_OC1_HVS_ST]

Setting of definite time overcurrent protection stage1. 4 NO.4[t_OC1_HVS_ST]

Delay of definite time overcurrent protection stage1. 5 NO.5[TrpLog_OC1_HVS_ST]

Tripping output logic setting of definite time overcurrent protection. 6 NO.6[I_OC2_HVS_ST]

Setting of definitive time overcurrent protection stage2. 7 NO.7[t_OC2_HVS_ST]

Delay of definite time overcurrent protection stage2.


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NO.8[TrpLog_OC2_HVS_ST]

Tripping output logic setting of definite time overcurrent protection stage2. 9 NO.9[I_Alm_OvLd_HVS_ST]

Current setting of overload protection at HVS of stepdown transformer. 10 NO.10[t_Alm_OvLd_HVS_ST] Time setting of overload protection at HVS of stepdown transformer. 11 NO.11[I_InitCool1_OvLd_HVS_ST] Current setting of stage 1 of overload to initial cooling system at HVS of stepdown transformer. 12 NO.12[t_InitCool1_OvLd_HVS_ST] Time setting of stage 1 of overload to initial cooling system at HVS of stepdown transformer. 13 NO.13[I_InitCool2_OvLd_HVS_ST] Current setting of stage 2 of overload to initial cooling system at HVS of stepdown transformer. 14 NO.14[t_InitCool2_OvLd_HVS_ST] Time setting of stage 2 of overload to initial cooling system at HVS of stepdown transformer. 15 NO.15[En_VCE_Ctrl_OC1_ HVS_ST] Logic setting of overcurrent protection stage1 controlled by voltage element. 16 NO.16[En_VCE_Ctrl_OC2_ HVS_ST] Logic setting of overcurrent protection stage2 controlled by voltage element. 17 NO.17[En_Mem_Curr_ HVS_ST] Logic setting of memory function of current of exciter. 18 NO.18[Opt_VTS_Ctrl_OC_HVS_ST] Protection performance during VT circuit failure. 1: when VT circuit failure at one side is detected, voltage control element at the same side will be disabled but overcurrent relay on the same side can still be controlled by voltage control elements of other side if corresponding logic setting is set as 1. 0: when VT circuit failure at one side is detected, the overcurrent relay will become an overcurrent relay without voltage element control. 19 NO.19[En_Alm_OvLd_HVS_ST] Enable alarm for overload protection at HVS of stepdown transformer. 20 NO.20[En_InitCool_OvLd_HVS_ST] Enable overload to initial cooling system at HVS of stepdown transformer.

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21 NO.21[En_LVSProt_Blk_OC1_HVS_ST] Enable protection at LVS to block overcurrent stage 1 at HVS of stepdown transformer. 7.3.26.3 Setting path Settings of HVS backup protection of stepdown transformer are accessible in the following path: Main Menu -> SETTINGS -> GEN PROT SETTINGS -> ST HVS BAK PROT --> [setting symbol].

7.3.27 Settings of backup protection at LVS of stepdown transformer


7.3.27.1 Setting list
Table 7-42 List of LVS backup protection settings of stepdown transformer

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Symbol V_NegOV_VCE_LVS_ST Vpp_VCE_LVS_ST I_OC1_LVS_ST t_OC1_LVS_ST TrpLog_OC1_LVS_ST I_OC2_LVS_ST t_OC2_LVS_ST TrpLog_OC2_LVS_ST I_ROC1_LVS_ST t_ROC1_LVS_ST TrpLog_ROC1_LVS_ST I_ROC2_LVS_ST t_ROC2_LVS_ST TrpLog_ROC2_LVS_ST I_OvLd_LVS_ST t_OvLd_LVS_ST V_ROV_LVS_ST t_ROV_LVS_ST

Range 1.00 20.00 V 2.00 100.00 V 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0.10 100.00 V 0.00 10.00 S

Step 0.01 V 0.01 V 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 V 0.01 S

Default 4 60 20 1 0021 17 2 0003 20 1 0021 17 2 0003 15 2 15 2 1 1 1 0 0

Logic setting 1 enable, 0 disable 01 En_VCE_Ctrl_OC1_LVS_ST En_VCE_Ctrl_OC2_LVS_ST Opt_VTS_Ctrl_OC_LVS_ST En_Alm_OvLd_LVS_ST En_Alm_ROV_LVS_ST 01 01 01 01

7.3.27.2 Explanation of setting 1 NO.1[V_NegOV_VCE_LVS_ST]

Negative sequence voltage setting of composite voltage control element at LVS of stepdown
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transformer. 2 NO.2[Vpp_VCE_LVS_ST]

Setting of phase-to-phase under voltage of composite voltage control element. 3 NO.3[I_OC1_LVS_ST]

Setting of definite time overcurrent protection stage1. 4 NO.4[t_OC1_LVS_ST]

Delay of definite time overcurrent protection stage1. 5 NO.5[TrpLog_OC1_LVS_ST]

Tripping output logic setting of definite time overcurrent protection. 6 NO.6[I_OC2_LVS_ST]

Setting of definitive time overcurrent protection stage2. 7 NO.7[t_OC2_LVS_ST]

Delay of definite time overcurrent protection stage2. 8 NO.8[TrpLog_OC2_LVS_ST]

Tripping output logic setting of definite time overcurrent protection stage2. 9 NO.9[I_ROC1_LVS_ST]

Setting of definitive time zero sequence overcurrent protection stage1. 10 NO.10[t_ROC1_LVS_ST] Delay of definite time zero sequence overcurrent protection stage1. 11 NO.11[TrpLog_ROC1_LVS_ST] Tripping output logic setting of definite time zero sequence overcurrent protection stage1. 12 NO.12[I_ROC2_LVS_ST] Setting of definitive time zero sequence overcurrent protection stage2. 13 NO.13[t_ROC2_LVS_ST] Delay of definite time zero sequence overcurrent protection stage2. 14 NO.14[TrpLog_ROC2_LVS_ST] Tripping output logic setting of definite time zero sequence overcurrent protection stage2. 15 NO.15[I_OvLd_LVS_ST] Current setting of overload protection at LVS of stepdown transformer. 16 NO.16[t_OvLd_LVS_ST]
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Time setting of overload protection at LVS of stepdown transformer. 17 NO.17[V_ROV_LVS_ST] Voltage setting of zero sequence overvoltage protection at LVS of stepdown transformer. 18 NO.18[t_ROV_LVS_ST] Time setting of zero sequence overvoltage protection at LVS of stepdown transformer. 19 NO.19[En_VCE_Ctrl_OC1_ LVS_ST] Logic setting of overcurrent protection stage1 controlled by voltage element. 20 NO.20[En_VCE_Ctrl_OC2_ LVS_ST] Logic setting of overcurrent protection stage2 controlled by voltage element. 21 NO.21[Opt_VTS_Ctrl_OC_LVS_ST] Protection performance during VT circuit failure. 1: when VT circuit failure at one side is detected, voltage control element at the same side will be disabled but overcurrent relay on the same side can still be controlled by voltage control elements of other side if corresponding logic setting is set as 1. 0: when VT circuit failure at one side is detected, the overcurrent relay will become an overcurrent relay without voltage element control. 22 NO.22[En_Alm_OvLd_LVS_ST] Enable alarm for overload protection at LVS of stepdown transformer. 23 NO.20[En_Alm_ROV_LVS_ST] Enable zero sequence overvoltage protection at LVS of stepdown transformer. 7.3.27.3 Setting path Settings of LVS backup protection of stepdown transformer are accessible in the following path: Main Menu -> SETTINGS -> GEN PROT SETTINGS -> ST LVS BAK PROT --> [setting symbol].

7.3.28 Settings of restrict earth fault protection of stepdown transformer


7.3.28.1 Setting list
Table 7-43 List of restrict earth fault protection settings of stepdown transformer

No. 1 2 3 4 5

Symbol I_Alm_REF_ST I_Pkp_PcntREF_ST I_InstREF_ST Slope_PcntREF_ST TrpLog_REF_ST

Range 0.10 10.00 In 0.10 10.00 In 2.00 50.00 In 0.30 0.70 0000 FFFF Logic setting 1 - enable, 0 disable

Step 0.01In 0.01In 0.01In 0.01 1

Default 0.1 0.3 6 0.3 7FFF

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No. 6 7

Symbol En_InstREF_ST En_PcntREF_ST

Range 01 01

Step

Default 1 0

7.3.28.2 Explanation of setting 1 NO.1[I_Alm_REF_ST]

Setting of zero sequence differential current alarm. This setting shall be greater than the maximum zero sequence unbalance differential current in normal operation condition meanwhile smaller than REF pickup value. 2 No.2-- [I_Pkp_PcntREF_ST]

Pickup setting of zero sequence differential current. 3 No.3-- [I_InstREF_ST]

Setting of unrestrained instantaneous zero sequence differential protection. 4 No.4-- [Slope_PcntREF_ST]

Restraint coefficient of percentage zero sequence differential current. 5 No.5-- [TrpLog_REF_ST]

Tripping output logic setting of zero sequence differential protection. 6 NO.6[En_InstREF_ST]

Logic setting to enable/disable instantaneous restrict earth fault protection of stepdown transformer. 7 NO.7[En_PcntREF_ST]

Logic setting to enable/disable percentage restrict earth fault protection of stepdown transformer. 7.3.28.3 Setting path Settings of restrict earth fault protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> ST REF PROT --> [setting symbol].

7.3.29 Settings of mechanical protection


7.3.29.1 Setting list
Table 7-44 List of mechanical protection settings

No. 1 2 3 4

Symbol t_MechRly1 TrpLog_MechRly1 t_MechRly2 TrpLog_MechRly2

Range 0.00 6000.0 S 0000 0000 FFFF FFFF 0.00 6000.0 S

Step 0.1S 1 0.1S 1

Default 1 0011 1 0011

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No. 5 6 7 8 9

Symbol t_MechRly3 TrpLog_MechRly3 t_MechRly4 TrpLog_MechRly4

Range 0.00 6000.0 S 0000 0000 FFFF FFFF 0.00 6000.0 S

Step 0.1S 1 0.1S 1

Default 1 0011 1 0011 1

Logic setting 1 - enable, 0 disable 01 En_Supv_MechRly

7.3.29.2 Explanation of setting 1 NO.1[t_MechRly1]

Time delay of output contact of external mechanical contact input1 repeater. 2 NO.2[TrpLog_MechRly1]

Tripping output logic setting of output contact of mechanical contact input1. 3 NO.3[t_MechRly2]

Time delay of output contact of external mechanical contact input1 repeater. 4 NO.4[TrpLog_MechRly2]

Tripping output logic setting of output contact of mechanical contact input2. 5 NO.5[t_MechRly3]

Time delay of output contact of external mechanical contact input1 repeater. 6 NO.6[TrpLog_MechRly3]

Tripping output logic setting of output contact of mechanical contact input3. 7 NO.7[t_MechRly4]

Time delay of output contact of external mechanical contact input1 repeater. 8 NO.8[TrpLog_MechRly4]

Tripping output logic setting of output contact of mechanical contact input4. 9 NO.9[En_Supv_MechRly]

Logic setting to enable/disable mechanical circuit supervision. 7.3.29.3 Setting path Settings of mechanical protection are accessible in the following path: Main Menu -> SETTINGS -> PROT SETTINGS -> MECH RLY PROT --> [setting symbol].

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7.3.30 Settings of pole disagreement protection of circuit breaker


7.3.30.1 Setting list
Table 7-45 Definition of pole disagreement protection settings

No 1 2 3 4 5 6 7 I_OC_PD

Symbol I_NegOC_PD I_ROC_PD T_PD1 TrpLog_PD1 t_PD2 TrpLog_PD2

Range 0.10 20.00 A 0.10 20.00 A 0.10 20.00 A 0.00 10.00 s 0000 FFFF 0.00 10.00 s

Step 0.01A 0.01A 0.01A 0.01s 1 0.01s 1

Default 1 1 3 0.5 000F 1 00FF

0000 FFFF logic setting 1 - enable, 0 disable 0/1 0/1 0/1 0/1

8 9 10 11

En_NegOC_PD En_ROC_PD En_ExTrp_Ctrl_PD2 En_OC_PD2

1 1 1 0

7.3.30.2 Explanation of the settings 1 No.1--[I_OC_PD]

Setting of pole-disagreement phase current element. 2 No.2--[I_NegOC_PD]

Setting of pole-disagreement negative-sequence current element. 3 No.3--[I_ROC_PD]

Setting of pole-disagreement zero-sequence current element. 4 No.4--[t_PD1]

Delay of stage 1 of pole disagreement protection. 5 No.5--[TrpLog_PD1]

Tripping output logic setting of pole disagreement protection stage 1. 6 No.6--[t_PD2]

Delay of stage 2 of pole disagreement protection. 7 No.7--[TrpLog_PD2]

Tripping output logic setting of pole disagreement protection stage 2. 8 No.8--[En_NegOC_PD]

Logic setting of enabling pole disagreement protection controlled by negative-sequence current


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element. 9 No.9--[En_ROC_PD]

Logic setting of enabling pole disagreement protection controlled by zero-sequence current element. 10 No.10--[En_ExTrp_Ctrl_PD2] Logic setting of enabling pole disagreement protection stage 2 initiated by binary input of protection tripping contact. 11 No.11--[En_OC_PD2] Logic setting of enabling pole disagreement protection stage 2 controlled by phase current element. 7.3.30.3 Setting path The calculated parameters are accessible in the following path: Main Menu -> SETTING -> PROT SETTINGS -> PD PROT

7.4 Calculated parameters


The settings listed in the following tables calculated by the RCS-985A itself automatically, they need not to be set by user. The settings are calculated according to the system parameters that user input, include primary rated currents, secondary rated currents, secondary rated voltages and correction coefficients used in all kinds of differential protection relays. Listing of the calculated settings is only for reference of setting check or commission.

7.4.1 Calculated parameters of primary rated current


7.4.1.1 Parameters list
Table 7-46 List of calculated parameters of primary rated current

NO. 1 2 3 4 5 6 7 8 9 10

Symbol I1b_SnTr_CT_HVS_Tr I1b_SnTr_CT_LVS_Tr I1b_SnGen_CT_Gen I1b_SnGen_CT_SP1_Gen I1b_SnGen_CT_SP2_Gen I1b_SnST_CT_HVS_ST I1b_SnST_CT_LVS_ST I1b_SnST_CT_Br2_ST I1b_SnExc_CT_S1_Exc I1b_SnExc_CT_S2_Exc

Range 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A

Note

7.4.1.2 Explanation of the parameters 1 No.1-- [I1b_SnTr_CT_HVS_Tr]


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Primary rated current at HV side of main transformer. The equation is I b1n = refer to section 3.3.1 to see more details. 2 No.2-- [I1b_SnTr_CT_LVS_Tr]

Sn . Please 3U b1n

Primary rated current at LV side of main transformer. 3 No.3-- [I1b_SnGen_CT_Gen]

Primary rated current of generator. The equation is I f 1n = to see more details. 4 No.4-- [I1b_SnGen_CT_SP1_Gen]

Pn / cos . Please refer to section 3.3.2 3U f 1n

Primary rated current of the first splitting branch at the neutral point of generator. 5 No.5-- [I1b_SnGen_CT_SP2_Gen]

Primary rated current of the second splitting branch at the neutral point of generator. 6 No.6-- [I1b_SnST_CT_HVS_ST]

Primary rated current at HV side of stepdown transformer. 7 No.7-- [I1b_SnST_CT_LVS_ST]

Primary rated current at LV side of stepdown transformer. 8 No.8-- [I1b_SnST_CT_Br2_ST]

Primary rated current at branch 2 of stepdown transformer. 9 No.9-- [I1b_SnExc_CT_S1_Exc]

Primary rated current at HV side of excitation transformer or terminal side of exciter. 10 No.10-- [I1b_SnExc_CT_S2_Exc] Primary rated current at LV side of excitation transformer or neutral point side of exciter. 7.4.1.3 Setting path All settings of calculated primary rated current are accessible in the following path: Main Menu -> SETTINGS -> CALC SETTINGS -> PRI RATED CURR -> [setting symbol]

7.4.2 Calculated parameters of secondary rated current


7.4.2.1 Parameters list
Table 7-47 List of calculated parameters of secondary rated current

NO.
286

Symbol

Range

Note

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

I2b_SnTr_CT_HVS1_Tr I2b_SnTr_CT_HVS2_Tr I2b_SnTr_CT_LVS_Tr I2b_SnTr_CT_HVS_ST I2b_SnTr_CT_HVS_GTU I2b_SnTr_CT_LVS_GTU I2b_SnTr_CT_ST_GTU I2b_SnGen_CT_Term_Gen I2b_SnGen_CT_SP1_Gen I2b_SnGen_CT_SP2_Gen I2b_SnST_CT2_HVS_ST I2b_SnST_CT1_HVS_ST I2b_SnST_CT_LVS_ST I2b_SnST_CT_Br2_ST I2b_SnExc_CT_S1_Exc I2b_SnExc_CT_S2_Exc

0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A

7.4.2.2 Explanation of the parameters 1 No.1-- [I2b_SnTr_CT_HVS1_Tr]

Secondary rated current at HVS 1 of main transformer. The equation is I b 2 n = to section 3.3.1 to see more details. 2 No.2-- [I2b_SnTr_CT_HVS2_Tr]

I b1n . Please refer nbLH

Secondary rated current at HVS 2 of main transformer. 3 No.3-- [I2b_SnTr_CT_LVS_Tr]

Secondary rated current at LVS of main transformer. 4 No.4-- [I2b_SnTr_CT_HVS_ST]

Secondary rated current at HVS of stepdown transformer. 5 No.5-- [I2b_SnTr_CT_HVS_GTU]

Secondary rated current at HVS of transformer. It is used for differential protection of generator-transformer unit. 6 No.6-- [I2b_SnTr_CT_LVS_GTU]

Secondary rated current at LVS of transformer. It is used for differential protection of generator-transformer unit. 7 No.7-- [I2b_SnTr_CT_ST_GTU]

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Secondary rated current at HVS of stepdown transformer. It is used for differential protection of generator-transformer unit. 8 No.8-- [I2b_SnGen_CT_Term_Gen]

Secondary rated current at terminal of generator. 9 No.9-- [I2b_SnGen_CT_SP1_Gen]

Secondary rated current of the first splitting branch at the neutral point of generator. 10 No.10-- [I2b_SnGen_CT_SP2_Gen] Secondary rated current of the second splitting branch at the neutral point of generator. 11 No.11-- [I2b_SnST_CT2_HVS_ST] Secondary rated current at HV side CT2 of stepdown transformer which with big ratio. 12 No.12-- [I2b_SnST_CT1_HVS_ST] Secondary rated current at HV side CT1 of stepdown transformer which with small ratio. 13 No.12-- [I2b_SnST_CT_LVS_ST] Secondary rated current at LV side of stepdown transformer. 14 No.14-- [I2b_SnST_CT_Br2_ST] Secondary rated current at branch 2 of stepdown transformer. 15 No.15-- [I2b_SnExc_CT_S1_Exc] Secondary rated current at HV side of excitation transformer or terminal side of exciter. 16 No.16-- [I2b_SnExc_CT_S2_Exc] Secondary rated current at LV side of excitation transformer or neutral point side of exciter. 7.4.2.3 Setting path All settings of calculated primary rated current are accessible in the following path: Main Menu -> SETTINGS -> CALC SETTINGS -> SEC RATED CURR -> [setting symbol]

7.4.3 Calculated parameters of secondary rated voltage


7.4.3.1 Parameters list
Table 7-48 List of calculated parameters of secondary rated current

NO. 1 2 3 4 5
288

Symbol U2b_VT_HVS_Tr U2b_DeltVT_HVS_Tr U2b_VT_Term_Gen U2b_DeltVT_Term_Gen U2b_NP_Gen

Range 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V

Note

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6 7 8 9 10 11 12

k_DeltVT_Gen U2b_VT_LVS_ST U2b_DeltVT_LVS_ST U2b_VT_Br2_ST U2b_DeltVT_Br2_ST U2b_VT_Exc U2b_DeltVT_LVS_Tr

0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V

7.4.3.2 Explanation of the parameters 1 No.1-- [V2b_VT_HVS_Tr]

Secondary rated voltage at HVS of main transformer. 2 No.2-- [U2b_DeltVT _HVS_Tr]

Secondary rated voltage of delta VT at HVS of main transformer. 3 No.3-- [U2b_VT_Term_Gen]

Secondary rated voltage at terminal VT of generator. 4 No.4-- [U2b_DeltaVT_Term_Gen]

Secondary rated voltage of delta VT at terminal of generator. 5 No.5-- [U2b_NP_Gen]

Secondary rated voltage at neutral point VT of generator. 6 No.6-- [k_DeltVT_Gen]

The ratio of zero sequence voltage between terminal and neutral point of generator. That is the ratio between [U2b_DeltVT_Term_Gen] to [U2b_NP_Gen]. 7 No.7-- [U2b_VT_LVS_ST]

Secondary rated voltage at LVS of stepdown transformer. 8 No.8-- [U2b_DeltVT_LVS_ST]

Secondary rated voltage of delta VT at LVS of stepdown transformer. 9 No.9-- [U2b_VT_Br2_ST]

Secondary rated voltage at branch 2 of stepdown transformer. 10 No.10-- [U2b_DeltVT_Br2_ST] Secondary rated voltage of delta VT at branch 2 of stepdown transformer. 11 No.11-- [U2b_VT_Exc] Secondary rated voltage of excitation transformer or exciter.

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12 No.12-- [U2b_DeltVT_LVS_Tr] Secondary rated voltage of delta VT at LVS of main transformer. 7.4.3.3 Setting path All settings of calculated primary rated voltage are accessible in the following path: Main Menu -> SETTINGS -> CALC SETTINGS -> SEC RATED VOLT -> [setting symbol]

7.4.4 Calculated parameters of differential coefficient


7.4.4.1 Parameters list
Table 7-49 List of calculated parameters of differential coefficient Symbol Range Note

NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

k_TrHVS1_Diff_Tr k_TrHVS2_Diff_Tr k_TrLVS_Diff_Tr k_ST_Diff_Tr k_TrHVS_Diff_GTU k_NP_Diff_GTU k_ST_Diff_GTU k_Term_Diff_Gen k_SP1_Diff_Gen k_SP2_Diff_Gen k_HVS_Diff_ST k_LVS_Diff_ST k_Br2_Diff_ST k_S1_Diff_Exc k_S2_Diff_Exc k_NP_REF_Tr k_REF_Tr k_NP_REF_ST k_REF_ST

0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60

7.4.4.2 Explanation of the parameters 1 No.1-- [k_TrHVS1_Diff _Tr]

Differential coefficient at side 1 of HVS of main transformer for differential protection of main transformer. 2 No.2-- [k_TrHVS2_Diff _Tr]

Differential coefficient at side 2 of HVS of main transformer for differential protection of main transformer. 3
290

No.3-- [k_TrLVS_Diff _Tr]


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Differential coefficient of LVS of main transformer. For differential protection of main transformer, the base side is LV side. 4 No.4-- [k_ST_Diff_Tr]

Differential coefficient of HVS of stepdown transformer for differential protection of main transformer. 5 No.5-- [k_TrHVS_Diff_GTU]

Differential coefficient of HVS of main transformer for differential protection of generator and transformer unit. 6 No.6-- [k_NP_Diff_GTU]

Differential coefficient of neutral point of generator for differential protection of generator and transformer unit. 7 No.7-- [k_ST_Diff_GTU]

Differential coefficient of HVS of stepdown transformer for differential protection of generator and transformer unit. 8 No.8-- [k_Term_Diff_Gen]

Differential coefficient of terminal of generator for differential protection of generator. 9 No.9-- [k_SP1_Diff_Gen]

Differential coefficient of split phase 1 of generator for differential protection of generator. 10 No.10-- [k_SP2_Diff_Gen] Differential coefficient of split phase 2 of generator for differential protection of generator. 11 No.11-- [k_HVS_Diff_ST] Differential coefficient of HVS of stepdown transformer for differential protection of stepdown transformer. 12 No.12-- [k_LVS_Diff_ST] Differential coefficient of LVS of stepdown transformer for differential protection of stepdown transformer. 13 No.13-- [k_Br2_Diff_ST] Differential coefficient of branch 2 of stepdown transformer for differential protection of stepdown transformer. 14 No.14-- [k_S1_Diff_Exc] Differential coefficient of side 1 of exciter for differential protection of exciter. 15 No.15-- [k_S2_Diff_Exc]

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Differential coefficient of side 2 of exciter for differential protection of exciter. 16 No.16-- [k_NP_REF_Tr] Differential coefficient of neutral point of main transformer for restrict earth fault protection of main transformer. 17 No.17-- [k_REF_Tr] Differential coefficient of HVS of main transformer for restrict earth fault protection of main transformer. 18 No.18-- [k_NP_REF_ST] Differential coefficient of neutral point of stepdown transformer for restrict earth fault protection of stepdown transformer. 19 No.19-- [k_REF_ST] Differential coefficient of HVS of stepdown transformer for restrict earth fault protection of stepdown transformer. 7.4.4.3 Setting path All settings of calculated differential coefficient are accessible in the following path: Main Menu -> SETTINGS -> CALC SETTINGS -> DIFF CORR COEF -> [setting symbol]

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Chapter 8 Human Machine Interface

Chapter 8 Human Machine Interface


User can access the relay from the front panel of the device. Local communication with the relay is possible using a computer (PC) with the DBG-2000 software via an RS232 port on the front panel. Furthermore, remote communication is also possible switched-in substation automatic system via a RS485 port. This chapter describes human machine interface (HMI), menu tree and LCD display. At the same time how to input settings using keypad is described in detail. Finally, this chapter introduces the DBG2000 software and wave analysis software.

8.1 User interfaces and menu structure


The settings and functions of the RCS-985A protection relay can be accessed both from the front panel keypad and LCD, and via the front and rear communication ports. Information on each of these methods is given in this section to describe how to start using the relay.

8.2 Introduction to the relay


8.2.1 Front panel
The front panel of the relay is shown in Figure 8-1. The human-machine interface consists of a human-machine interface (HMI) module which allows a communication as simple as possible for the user.

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Figure 8-1 Front view of the protection

The front panel of the relay includes the following, as indicated in Figure 8-1:
Table 8-1 Description of each part

No. 1 2

Brief description A 320*240 dots liquid crystal display (LCD) The relay front panel features control pushbutton switches with LEDs that facilitate local control. Factory default settings associate specific relay functions with these 9 direct-action pushbuttons and LEDs e.g. A 9-key keypad comprising 4 arrow keys ( , , and ), an plus key (+), a minus key (-), a escape key ( ESC) and a active group setting key (GRP) A 9-pin female D-type front port for communication with a PC locally to the relay (up to 15m distance) via an EIA(RS)232 serial data connection, which providing internal signal monitoring and high speed local downloading of software.

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No. 5 6

Brief description Name of protection Name of manufacture

8.2.2 LCD
A 320*240 dots liquid crystal display (LCD) with LED backlight. The backlight can be switched on automatically whenever the keypad is operated or operation or alarm issued. Backlight will be turned off after a while. 8.2.2.1 Default Display The front panel menu has a default display under normal state after powered-up. If there is no keypad activity for the 5 minutes timeout period, the default will return again and the LCD backlight will turn off. When the equipment is switched on or during normal operation condition, based on actual connection of the generator-transformer unit, the LCD will display different connection diagrams and related information. If the unit comprises a 3/2 bus at HV side of main transformer and an stepdown transformer with two windings, the LCD will display:

Figure 8-2 Default display 1 of RCS-985A

If the unit comprises a main transformer with single outlet and an stepdown transformer with three windings, the LCD will display:

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Figure 8-3 Default display 2 of RCS-985A

If the unit comprises a breaker between main transformer and generator, the LCD will display:

Figure 8-4 Default display 3 of RCS-985A

8.2.2.2 Fault report Whenever there is an un-eliminated fault record in the relay, the default display will be replaced by fault report.

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Figure 8-5 Fault display of RCS-985A

All the protection elements listed below may be displayed.


Table 8-2 List of operation elements

NO. 1 2 3

Protection Element Op_InstDiff_Gen Op_PcntDiff_Gen Op_DPFC_Diff_Gen

Note Operation of instantaneous protection of generator unrestraint differential

Operation of percentage differential protection of generator Operation of DPFC (Deviation of Power Frequency Component) differential protection of generator Operation of instantaneous phase-splitting transverse differential protection of generator Operation of percentage phase-splitting differential protection of generator transverse

Op_InstSPTDiff_Gen

5 6 7 8

Op_PcntSPTDiff_Gen Op_InstDiff_Exciter Op_PcntDiff_Exciter Op_InstDiff_ET

Operation of instantaneous differential protection of exciter Operation of percentage differential protection of exciter Operation of instantaneous differential protection of excitation transformer Operation of percentage differential protection of excitation transformer Operation of DPFC interturn protection of generator Operation of transverse differential protection of generator Operation of unsensitive stage of transverse differential protection of generator Operation of any of the interturn protection of generator

9 10 11 12 13

Op_PcntDiff_ET Op_DPFC_IntTurn_Gen Op_SensTrvDiff_Gen Op_UnsensTrvDiff_Gen Op_SensIntTurn_Gen

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NO. 14

Protection Element Op_UnsensIntTurn_Gen

Note Operation of any of the unsensitive stage of interturn protection of generator Operation of sensitive stage zero sequence over voltage element of earth fault protection of stator Operation of unsensitive stage zero sequence over voltage element of earth fault protection of stator Operation of 3rd harmonics ratio earth fault protection of stator Operation of 3rd protection of stator harmonics differential earth fault

15

Op_SensROV_Sta

16

Op_UnsensROV_Sta

17

Op_V3rdHRatio_Sta

18 19 20 21 22 23

Op_V3rdHDiff_Sta Op_1PEF_RotWdg Op_2PEF_RotWdg Op_OvLd_Sta Op_InvOvLd_Sta Op_NegOC_Sta

Operation of 1 point earth fault protection of rotor Operation of 2 point earth fault protection of rotor Operation of definitive time overload protection of stator Operation of inverse time overload protection of stator Operation of negative sequence overcurrent protection of rotor Operation of inverse time negative sequence overcurrent protection of rotor Operation of definitive time overload protection of rotor winding Operation of inverse time overload protection of rotor winding Operation of stage 1 of overcurrent protection of generator Operation of stage 2 of overcurrent protection of generator Operation of stage 1 of overvoltage protection of generator Operation of stage 2 of overvoltage protection of generator Operation of undervoltage protection of generator Operation of stage 1 of overexcitation protection of generator Operation of stage 2 of overexcitation protection of generator Operation of inverse time stage of protection of generator overexcitation

24

Op_InvNegOC_Sta

25

Op_OvLd_RotWdg

26 27 28 29 30 31 32

Op_InvOvLd_RotWdg Op_OC1_Gen Op_OC2_Gen Op_OV1_Gen Op_OV2_Gen Op_UV_Gen Op_OvExc1_Gen

33

Op_OvExc2_Gen

34

Op_InvOvExc_Gen

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NO. 35

Protection Element Op_UF1_Gen

Note Operation of stage 1 of underfrequency protection of generator Operation of stage 2 of underfrequency protection of generator Operation of stage 3 of underfrequency protection of generator Operation of stage 4 of underfrequency protection of generator Operation of stage 1 of overfrequency protection of generator Operation of stage 2 of overfrequency protection of generator Operation of stage 1 of distance protection of generator Operation of stage 2 of distance protection of generator Operation of stage 1 of loss-of-excitation protection of generator Operation of stage 2 of loss-of-excitation protection of generator Operation of stage 3 of loss-of-excitation protection of generator Operation of out-of-step protection outside zone of generator Operation of out-of-step protection inside zone of generator Operation of reverse power protection of generator Operation of under power protection of generator Operation of under power protection of generator Operation of stage 1 of accidental energization protection of generator Operation of stage 2 of accidental energization protection of generator Operation of stage 1 of flashover protection of circuit breaker Operation of stage 2 of flashover protection of circuit breaker
299

36

Op_UF2_Gen

37

Op_UF3_Gen

38

Op_UF4_Gen

39

Op_OF1_Gen

40 41 42 43

Op_OF2_Gen Op_Z1_Gen Op_Z2_Gen Op_LossExc1_Gen

44

Op_LossExc2_Gen

45

Op_LossExc3_Gen

46

Op_Ext_OOS_Gen

47 48 49 50 51

Op_Int_OOS_Gen Op_RevP_Gen Op_UP_Gen Op_SeqTrpRevP_Gen Op_AccEnerg1_Gen

52

Op_AccEnerg2_Gen

53

Op_Flash1_TCB

54

Op_Flash2_TCB

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NO. 55

Protection Element Op_GenDiff_StShut_Gen

Note Operation of differential current element of startup and shut off protection of generator Operation of spilt phase transverse differential current element of startup and shut off protection of generator Operation of differential current element of excitation transformer during startup and shutoff of generator Operation of residual over voltage element of startup and shut off protection of generator Operation of stage 1 of overcurrent protection of excitation transformer Operation of stage 2 of overcurrent protection of excitation transformer Operation element of instantaneous differential protection of main transformer unrestrained

56

Op_SPTDiff_StShut_Gen

57

Op_ETDiff_StShut_Gen

58

Op_StaROV_StShut_Gen

59

Op_OC1_ET

60

Op_OC2_ET

61

Op_InstDiff_Tr

62

Op_PcntDiff_Tr

Operation element of percentage differential protection of main transformer Operation element of DPFC percentage differential protection of main transformer Operation element of stage 1 with time delay 1 of overcurrent protection at HV side of main transformer Operation element of stage 1 with time delay 2 of overcurrent protection at HV side of main transformer Operation element of stage 2 with time delay 1 of overcurrent protection at HV side of main transformer Operation element of stage 2 with time delay 2 of overcurrent protection at HV side of main transformer Operation element of stage 1 with time delay 1 of zero sequence overcurrent protection at HV side of main transformer Operation element of stage 1 with time delay 2 of zero sequence overcurrent protection at HV side of main transformer Operation element of stage 2 with time delay 1 of zero sequence overcurrent protection at HV side of main transformer

63

Op_DPFC_Diff_Tr

64

Op_OC11_Tr

65

Op_OC12_Tr

66

Op_OC21_Tr

67

Op_OC22_Tr

68

Op_ROC11_Tr

69

Op_ROC12_Tr

70

Op_ROC21_Tr

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NO. 71

Protection Element Op_ROC22_Tr

Note Operation element of stage 2 with time delay 2 of zero sequence overcurrent protection at HV side of main transformer Operation element of stage 3 with time delay 1 of zero sequence overcurrent protection at HV side of main transformer Operation element of stage 3 with time delay 2 of zero sequence overcurrent protection at HV side of main transformer Operation of differential current element of transformer during startup and shut off of generator main

72

Op_ROC31_Tr

73

Op_ROC32_Tr

74

Op_TrDiff_StShut_Gen

75

Op_STDiff_StShut_Gen

Operation of differential current element of auxiliary transformer during startup and shut off of generator Operation element of instantaneous unrestrained differential protection of generator-transformer unit Operation element of percentage differential protection of generator-transformer unit Operation element of instantaneous restrict earth fault protection of main transformer Operation element of percentage restrict earth fault protection of main transformer Operation element of stage 1 with time delay 1 of phase-to-phase impedance protection at HV side of main transformer Operation element of stage 1 with time delay 2 of phase-to-phase impedance protection at HV side of main transformer Operation element of stage 2 with time delay 1 of phase-to-phase impedance protection at HV side of main transformer Operation element of stage 2 with time delay 2 of phase-to-phase impedance protection at HV side of main transformer Operation element of stage 1 of residual over voltage protection of air gap of main transformer Operation element of stage 2 of residual over voltage protection of air gap of main transformer
301

76

Op_InstDiff_GTU

77

Op_PcntDiff_GTU

78

Op_InstREF_Tr

79

Op_PcntREF_Tr

80

Op_Z11_Tr

81

Op_Z12_Tr

82

Op_Z21_Tr

83

Op_Z22_Tr

84

Op_ROV1_Gap_Tr

85

Op_ROV2_Gap_Tr

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NO. 86

Protection Element Op_ROC1_Gap_Tr

Note Operation element of stage 1 of residual over current protection of air gap of main transformer Operation element of stage 2 of residual over current protection of air gap of main transformer Operation element of stage 1 of pole disagreement protection at HV side of main transformer Operation element of stage 2 of pole disagreement protection at HV side of main transformer Operation element of instantaneous restrict earth fault protection of stepdown transformer Operation element of percentage restrict earth fault protection of stepdown transformer Operation element of instantaneous unrestrained differential protection of stepdown transformer Operation element of percentage differential protection of stepdown transformer Operation element of stage 1 of overcurrent protection at HV side of stepdown transformer Operation element of stage 2 of overcurrent protection at HV side of stepdown transformer Operation element of stage 1 of overcurrent protection at LV side of stepdown transformer Operation element of stage 2 of overcurrent protection at LV side of stepdown transformer Operation element of stage 1 of residual overcurrent protection at LV side of stepdown transformer Operation element of stage 2 of residual overcurrent protection at LV side of stepdown transformer Operation element of stage 1 of over excitation protection of main transformer Operation element of stage 2 of over excitation protection of main transformer Operation element of reverse time over excitation protection of main transformer Operation of repeater of external mechanical input 1

87

Op_ROC2_Gap_Tr

88

Op_PD1

89

Op_PD2

90

Op_InstREF_ST

91

Op_PcntREF_ST

92

Op_InstDiff_ST

93

Op_PcntDiff_ST

94

Op_OC1_HVS_ST

95

Op_OC2_HVS_ST

96

Op_OC1_LVS_ST

97

Op_OC2_LVS_ST

98

Op_ROC1_LVS_ST

99

Op_ROC2_LVS_ST

100

Op_OvExc1_Tr

101

Op_OvExc2_Tr

102 103

Op_InvOvExc_Tr Op_MechRly1

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NO. 104 105 106 107

Protection Element Op_MechRly2 Op_MechRly3 Op_MechRly4 Op_UrgBrake

Note Operation of repeater of external mechanical input 2 Operation of repeater of external mechanical input 3 Operation of repeater of external mechanical input 4 Operation of urgency brake of generator

8.2.2.3 Alarm report Whenever there is an un-eliminated internal failure record in the relay, the default display will be replaced by alarm report.

Figure 8-6 Alarm display of RCS-985A

All the alarm elements listed below may be displayed. Table 8-3 List of alarm elements NO. Alarm Element Brief description 1. 2. 3. 4. 5. 6. 7. Alm_SwOv_VTS1_Gen Alm_SwOv_VTS2_Gen Alm_BlkV3rdHDiff_VTS1 Alm_BlkIntTurn_VTS2 Alm_VTS_HVS_Tr Alm_VTS1_Term_Gen Alm_VTS2_Term_Gen Alarm indicating VT1 circuit failure and start to switch over voltage circuit. Alarm indicating VT2 circuit failure and start to switch over voltage circuit. Alarm indicating VT1 circuit failure and blocking 3rd harmonics voltage differential protection. Alarm indicating VT2 circuit failure and blocking interturn protection. Alarm indicating secondary circuit failure of VT at HV side of main transformer. Alarm indicating secondary circuit failure of VT1 at generator terminal. Alarm indicating secondary circuit failure of VT2 at generator terminal.

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NO. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20.

Alarm Element Alm_VTS_NP_Gen Alm_DeltVTS1_Term_Gen Alm_DeltVTS2_Term_Gen Alm_VTS_RotWdg Alm_Pos_CB_HVS1_Tr Alm_Pos_CB_HVS2_Tr Alm_VTS_LossExc_RotWd g Alm_VTS_ET Alm_PM_DSP1_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_Term_Gen Alm_CTS_NP_Gen

Brief description Alarm indicating secondary circuit failure of VT at the neutral point of generator. Alarm indicating secondary circuit failure at open-delta side of VT1 at generator terminal. Alarm indicating secondary circuit failure at open-delta side of VT2 at generator terminal. Alarm indicating secondary circuit failure of VT for rotor earth fault protection. Alarm indicating the position of circuit breaker of branch 1 at HV side is abnormal. Alarm indicating the position of circuit breaker of branch 2 at HV side is abnormal. Alarm indicating rotor voltage circuit failure which used by loss-of-excitation protection. Alarm indicating secondary circuit failure of VT of excitation transformer. The DSP chip in CPU board damaged. Alarm indicating secondary circuit abnormality of CT at branch 1 of HV side of transformer. Alarm indicating secondary circuit abnormality of CT at branch 2 of HV side of transformer. Alarm indicating secondary circuit abnormality of CT at generator terminal. Alarm indicating secondary circuit abnormality of CT at the neutral point of generator. Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch1 at the neutral point of generator . Alarm indicating secondary circuit abnormality of CT installed in splitting-phase branch2 at the neutral point of generator. Alarm indicating secondary circuit failure of CT at side1 of excitation set used in differential protection of excitation. Alarm indicating secondary circuit failure of CT at side2 of excitation set used in differential protection of excitation. Alarm indicating the secondary circuit failure of CT for transverse differential protection of generator. Alarm indicating differential current of generator is in excess of normally endurable level. Alarm indicating splitting-phase transverse differential current of generator is in excess of normally endurable level.

21.

Alm_CTS_SP1_Gen

22.

Alm_CTS_SP2_Gen

23. 24. 25. 26.

Alm_CTS_S1_Exc Alm_CTS_S2_Exc Alm_CTS_TrvDiff_Gen Alm_Diff_Gen

27.

Alm_SPTDiff_Gen

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NO. 28. 29. 30. 31. 32.

Alarm Element Alm_Diff_ET Alm_Diff_Exciter Alm_DPFC_IntTurn_Gen Alm_Pos_GCB Alm_CTS_Diff_Gen

Brief description Alarm indicating differential current of exciter is in excess of normally endurable level. Alarm indicating differential current of excitation transformer is in excess of normally endurable level. Alarm indicating operation of DPFC interturn protective element. Alarm indicating the position of circuit breaker at terminal of generator is abnormal. Alarm indicating secondary circuit failure of CTs used for differential protection of generator. Alarm indicating secondary circuit failure of CTs used for splitting-phase transverse differential protection of generator. Alarm indicating secondary circuit failure of CT used in excitation transformer differential protection. Alarm indicating secondary circuit failure of CT used in exciter differential protection. Alarm indicating operation of overcurrent element used for driving a set of contact to block other circuit. Alarm indicating 2 points earth fault protection has been put input operation after operation of 1 point earth fault protection of rotor. Alarm indicating out-of-step of system occurs while its oscillation center is outside protective zone. Alarm indicating out-of-step of system occurs and its oscillation center is inside protective zone. Alarm indicating accelerate out-of-step occurs. Alarm indicating decelerate out-of-step occurs. Alarm indicating operation of loss-of-excitation protective element. Alarm indicating operation of over excitation protective element. Alarm indicating operation of overload element of stator. Alarm indicating operation protective element of stator. of negative overcurrent

33.

Alm_CTS_SPTDiff_Gen

34. 35. 36.

Alm_CTS_Diff_ET Alm_CTS_Diff_Exciter Alm_BO_OC2_Gen

37.

Alm_On_2PEF_RotWdg

38. 39. 40. 41. 42. 43. 44. 45. 46. 47. 48.

Alm_Ext_OOS_Gen Alm_Int_OOS_Gen Alm_Accel_OOS_Gen Alm_Decel_OOS_Gen Alm_LossExc_Gen Alm_OvExc_Gen Alm_OvLd_Sta Alm_NegOC_Sta Alm_OvLd_RotWdg Alm_ROV_Sta Alm_V3rdHRatio_Sta

Alarm indicating operation of overload protective element of rotor winding. Alarm indicating operation of sensitive stage of ROV protection of stator earth fault. Alarm indicating operation of 3rd harmonics ratio earth fault protective element of stator.

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NO. 49. 50. 51. 52. 53. 54. 55. 56. 57. 58. 59. 60. 61. 62. 63. 64. 65. 66. 67. 68. 69. 70. 71. 72. 73.

Alarm Element Alm_V3rdHDiff_Sta Alm_Sens_1PEF_RotWdg Alm_1PEF_RotWdg Alm_UF1_Gen Alm_UF2_Gen Alm_UF3_Gen Alm_UF4_Gen Alm_OF1_Gen Alm_OF2_Gen Alm_RevP_Gen Alm_BO_UC_OvSp_Gen Alm_VTS_Term_Gen Alm_VTS_HVS_Tr Alm_VTS_LVS_ST Alm_MechRly1 Alm_MechRly2 Alm_MechRly3 Alm_MechRly4 Alm_OvLd_Tr Alm_InitCool2_OvLd_Tr Alm_InitCool1_OvLd_Tr Alm_InitCool2_OvLd_ST Alm_OvLd_ST Alm_PwrLoss_MechRly Alm_InitCool1_OvLd_ST

Brief description Alarm indicating operation of 3rd harmonics differential earth fault protective element of stator. Alarm indicating operation of sensitive stage of 1 point earth fault protective element of rotor. Alarm indicating operation of normal stage of 1 point earth fault protective element of rotor. Alarm indicating operation of stage 1 of under frequency protective element of generator. Alarm indicating operation of stage 2 of under frequency protective element of generator. Alarm indicating operation of stage 3 of under frequency protective element of generator. Alarm indicating operation of stage 4 of under frequency protective element of generator. Alarm indicating operation of stage 1 of over frequency protective element of generator. Alarm indicating operation of stage 2 of over frequency protective element of generator. Alarm indicating operation of reverse power protection. Alarm indicating operation of electric over speed protection of generator. Alarm indicating secondary circuit failure of VT at generator terminal. Alarm indicating secondary circuit failure of VT at HV side of main transformer. Alarm indicating secondary circuit failure of VT at LV side of stepdown transformer. Alarm indicating operation of mechanical repeater 1. Alarm indicating operation of mechanical repeater 2. Alarm indicating operation of mechanical repeater 3. Alarm indicating operation of mechanical repeater 4. Alarm indicating overload of main transformer. Alarm indicating stage 2 of initial cooling of main transformer. Alarm indicating stage 1 of initial cooling of main transformer. Alarm indicating stage 2 of initial cooling of stepdown transformer. Alarm indicating overload of stepdown transformer. Alarm indicating power loss of mechanical relay. Alarm indicating stage 1 of initial cooling of stepdown transformer.
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NO. 74. 75. 76. 77. 78. 79.

Alarm Element Alm_PM_DSP2_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_LVS_Tr Alm_CTS_HVS_ST Alm_CTS_HVS_Tr

Brief description Alarm indicating DSP2 in CPU module damaged. Alarm indicating secondary circuit failure of CT at branch 1 of HV side of main transformer. Alarm indicating secondary circuit failure of CT at branch 2 of HV side of main transformer. Alarm indicating secondary circuit failure of CT at LV side of main transformer. Alarm indicating secondary circuit failure of HV side of stepdown transformer. Alarm indicating secondary circuit failure of CT at HV side of main transformer. Alarm indicating the zero sequence differential current is abnormal in REF differential protection of main transformer. Alarm indicating secondary circuit failure of CT1 at HV side of stepdown transformer. Alarm indicating secondary circuit failure of CT2 at HV side of stepdown transformer. Alarm indicating secondary circuit failure of CT at LV side of stepdown transformer. Alarm indicating the zero sequence differential current is abnormal in REF differential protection of stepdown transformer. Alarm indicating the differential current is abnormal in differential protection of generator and transformer unit. Alarm indicating the differential current is abnormal in differential protection of main transformer. Alarm indicating the differential current is abnormal in differential protection of stepdown transformer. Alarm indicating secondary circuit failure of CT in differential protection of generator and transformer unit. Alarm indicating secondary circuit failure of CT in differential protection of main transformer. Alarm indicating secondary circuit failure of CT in differential protection of stepdown transformer. Alarm indicating overload at LV side of stepdown transformer. Alarm indicating over excitation of main transformer. Alarm indicating emergency brake of generator. Alarm indicating circuit of mechanical is abnormal. Alarm indicating the binary input of pole disagreement is in excess of 10s.

80.

Alm_REF_Tr

81. 82. 83.

Alm_CTS2_HVS_ST Alm_CTS1_HVS_ST Alm_CTS_LVS_ST

84.

Alm_REF_ST

85. 86. 87. 88. 89. 90. 91. 92. 93. 94. 95.

Alm_Diff_GTU Alm_Diff_Tr Alm_Diff_ST Alm_CTS_Diff_GTU Alm_CTS_Diff_Tr Alm_CTS_Diff_ST Alm_OvLd_LVS_ST Alm_OvExc_Tr Alm_UrgBrake Alm_Inconsist_MechRly Alm_PoleDisagr_CB

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NO. 96. 97. 98. 99.

Alarm Element Alm_ROV_LVS_Tr Alm_ROV_LVS_ST Alm_RAM_CPUBrd Alm_ROM_CPUBrd

Brief description Alarm indicating operation of ROV protection of LV side of main transformer. Alarm indicating operation of ROV protection of LV side of stepdown transformer. CPU module RAM damaged. CPU module flash memory damaged. CPU module EEPROM damaged judged by the mismatch of summation of all the settings with the CRC code . Without modifying protection setting after modification of rated secondary current of CT. In the proceeding of setting parameters. Loss of power supply of the optical couplers for binary inputs. Driving transistor of binary output damaged. Alarm indicating that the communication between MON and CPU interrupts. The DSP chip in CPU board damaged. Duration of pickup of any fault detector in CPU board is in excess of 10s. Mismatch of pickup of same type fault detectors in CPU and MON. Failure of sampled data in CPU board. Any one of binary input sampled directly doesnt match with that of recognition of protection itself. MON module RAM damaged. MON module flash memory damaged. MON module EEPROM damaged. The DSP chip in MON board damaged. Duration of pickup of any fault detector in MON board is in excess of 10s. MON module damaged. Failure of sampled data in MON board.

100. Alm_EEPROM_CPUBrd 101. Alm_InvalidSetting 102. Alm_ModifiedSetting 103. Alm_PwrLoss_Opto 104. Alm_TripOutput 105. Alm_InnerComm 106. Alm_DSP_CPUBrd 107. Alm_PersistFD_CPUBrd 108. Alm_InconsistFD 109. Alm_Sample_CPUBrd 110. Alm_BI_CPUBrd 111. Alm_RAM_MONBrd 112. Alm_ROM_MONBrd 113. Alm_EEPROM_MONBrd 114. Alm_DSP_MONBrd 115. Alm_PersistFD_MONBrd 116. Alm_MONBrd 117. Alm_Sample_MONBrd

8.2.2.4 Change of Binary inputs Whenever there is change of state of any binary input, the default display will be replaced by change report of binary input as shown as below.

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Figure 8-7 Binary input state changing display of RCS-985A

All the binary inputs listed below may be displayed.


Table 8-4 List of binary input change elements

NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14

BI_Chg Element EBI_Diff_Gen EBI_IntTurn_Gen EBI_ROV_Sta EBI_V3rdH_Sta EBI_1PEF_RotWdg EBI_2PEF_RotWdg EBI_OvLd_Sta EBI_NegOC_Sta EBI_LossExc_Gen EBI_OOS_Gen EBI_VoltProt_Gen EBI_OvExc_Gen EBI_PwrProt_Gen EBI_FreqProt_Gen

Brief description Enabling binary input of differential protection of generator Enabling binary input of turn-to-turn protection of generator Enabling binary input of residual overvoltage stator earth fault protection of generator Enabling binary input of 3rd harmonics stator earth fault protection of generator Enabling binary input of 1 point rotor earth fault protection of generator Enabling binary input of 2 point rotor earth fault protection of generator Enabling binary input of stator overload protection of generator Enabling binary input of stator negative sequence overcurrent protection of generator Enabling binary input of loss-of-excitation protection of generator Enabling binary input of loss-of-step protection of generator Enabling binary input of overvoltage protection of generator Enabling binary input of overexcitation protection of generator Enabling binary input of reverse power protection of generator Enabling binary input of frequency protection of generator

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NO. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

BI_Chg Element EBI_AccEnerg_Gen EBI_StShut_Gen EBI_Diff_Exc EBI_Bak_Exc EBI_Trp_MechRly3 EBI_Trp_MechRly4 EBI_Trp_MechRly2 EBI_Trp_MechRly1 EBI_PPF_Gen EBI_SPTDiff_Gen BI_UrgBrake BI_SyncCondenser BI_Reserved BI_Guard_MechRly EBI_Diff_Tr EBI_PPF_Tr EBI_EF_Tr EBI_REF_Tr EBI_Diff_GTU EBI_Reserved1 EBI_Diff_ST EBI_Bak_HVS_ST EBI_Bak_LVS_ST

Brief description Enabling binary input of accidental energization protection of generator Enabling binary input of startup and shutdown protection of generator Enabling binary input of differential protection of excitation set Enabling binary input of backup protection of excitation set Enabling binary input of tripping function of repeater of mechanical input 3 Enabling binary input of tripping function of repeater of mechanical input 4 Enabling binary input of tripping function of repeater of mechanical input 2 Enabling binary input of tripping function of repeater of mechanical input 1 Enabling binary input of backup protection of generator Enabling binary input of phase-splitting transverse differential protection of generator Binary input indicating urgent braking of generator Binary input indicating synchronism condenser is put into operation Reserved binary input Binary input indicating working condition of all other binary inputs Enable binary transformer. input of differential protection of

Enabling binary input of phase-to-phase backup protection of transformer. Enabling binary input of earth fault protection of transformer. Enabling binary input of restrict earth fault protection of transformer. Enabling binary input of generator-transformer unit. Reserved binary input 1 Enabling binary input of differential protection of stepdown transformer. Enabling binary input of backup protection of HV side of stepdown transformer. Enabling binary input of backup protection of LV side of stepdown transformer. differential protection of

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NO. 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

BI_Chg Element EBI_REF_ST EBI_Reserved2 EBI_Reserved3 BI_Print BI_Pulse_GPS BI_ResetTarget BI_PS_Opto BI_MechRly2 BI_MechRly4 BI_MechRly3 BI_MechRly1 BI_PS_MechRly BI_52b_GCB BI_52b_CB_HVS1_Tr BI_52b_CB_HVS2_Tr BI_PoleDisagr_CB BI_Valve_Turbine MON.FD_Diff_Tr

Brief description Enabling binary input of restrict earth fault protection of stepdown transformer. Reserved binary input 2 Reserved binary input 3 Binary input represents the print button. Binary input of GPS clock synchronous pulse. Binary input of signal reset button. Binary input indicating the working state of power supply of optical isolators Binary input indicating the position of mechanical input 2 Binary input indicating the position of mechanical input 4 Binary input indicating the position of mechanical input 3 Binary input indicating the position of mechanical input 1 Binary input indicating the working state of power supply of mechanical input circuit Binary input indicating the position of breaker at generator terminal Binary input of auxiliary contact of close position of circuit breaker at branch 1 of HV side of transformer. Binary input of auxiliary contact of close position of circuit breaker at branch 2 of HV side of transformer. Binary input of pole disagreement of circuit breaker. Binary input indicating the valve of steam turbine is in close position. Internally generated binary input indicating operation of fault detector of differential protection of transformer. Internally generated binary input indicating operation of phase to phase fault and earth fault protection of transformer. Internally generated binary input indicating operation of differential protection of stepdown transformer. Internally generated binary input indicating operation of backup protection of stepdown transformer. Internally generated binary input indicating operation of fault detector of differential protection of generator. Internally generated virtual binary input in MON indicating operation of the fault detector of stator earth fault protection Internally generated virtual binary input in MON indicating operation of the fault detector of rotor earth fault protection Internally generated virtual binary input in MON indicating operation of the fault detector of stator overload element

56

MON.FD_PPF&EF_T

57 58 59

MON.FD_Diff_ST MON.FD_Bak_ST MON.FD_Diff_Gen

60

MON.FD_EF_Sta

61 62

MON.FD_EF_RotWdg MON.FD_OvLd_Sta

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NO. 63

BI_Chg Element MON.FD_PPF_Gen

Brief description Internally generated virtual binary input in MON indicating operation of the fault detector of backup protection of generator Internally generated virtual binary input in MON indicating operation of the fault detector of overexcitation protection of generator Internally generated virtual binary input in MON indicating operation of the fault detector of frequency protection of generator Internally generated virtual binary input in MON indicating operation of the fault detector of loss-of-excitation protection of generator Internally generated virtual binary input in MON indicating operation of the fault detector of power protection or accidental energization protection of generator Internally generated virtual binary input in MON indicating operation of the fault detector of startup and shutdown protection of generator Internally generated virtual binary input in MON indicating operation of the fault detector of any protection of excitation Internally generated virtual binary input in MON indicating operation of the fault detector of mechanical protection

64

MON.FD_OvExc_Gen

65

MON.FD_FreqProt_Gen

66

MON.FD_LossExc_&_OOS _Gen MON.FD_Pwr&AccEnerg_ Gen

67

68

MON.FD_StShut_Gen

69

MON.FD_Prot_Exc

70

MON.FD_MechRly

8.2.3 LED indications


LED indicators includeHEALTHY, VT ALARM, CT ALARM, ALARM, TRIP.

Figure 8-8 LEDs on faceplate of RCS-985A

Healthy (Green) indicates that the relay is in correct working order, and should be on at all times. It will be extinguished when some internal error in hardware or software have been detected by self-diagnosing facilities, such as setting error, RAM or ROM error, power source failure, output circuit failure and so on. The state of the healthy LED is reflected by the watchdog contact at the rear terminals of the relay. The healthy cannot light again automatically even if the failure is eliminated except that the relay is reset or powered up by manual. VT Alarm (Yellow) indicates that the relay has found any failure of VT circuit.
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CT Alarm (Yellow) indicates that the relay has found any failure of CT circuit. Alarm (Yellow) indicates that the relay has registered an alarm. This may be triggered by one of the following failures: defective pickup, failure of analog or digital input circuit, optical isolator power loss and so on. The LED will constantly illuminate, and will extinguish, when the alarms have been cleared. Trip (RED) indicates that the relay has issued a trip signal. It is reset when the reset button on the front of panel is pushed down or by remote resetting command.

8.2.4 Keypad
A keypad compromises 4 arrow keys ( , key (ENT) and one cancel key (ESC). , and ), two adjusting keys(+-), one enter

Figure 8-9 Keypad of RCS-985A

The keypad provides full access to the menu options of the relay, with the information displayed on the LCD, such as setting configuration, report display, printing and signal resetting. The , menu. , and keys are used to move the cursor. Push will enter into the main

+- change parameters or setting values. ENT provide Enter/Execute function.

ESC is used to exit the present level in the menu tree. Brief description about keypad is given in the following table. Key , , and arrow buttons +, - ENT GRP ESC Function move between selectable branches of the menu tree change parameters or setting values provide Enter/Execute function setting Group selection exit the present level in the menu tree.

1 2 3 4 5

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8.2.5 Menu
8.2.5.1 Menu tree This part presents the main layout of the menu tree for the local human-machine interface (HMI). The menu tree includes menus of: n n n n n n n VALUES REPORT PRINT SETTINGS CLOCK VERSION DEBUG

VALUES REPORT PRINT SETTINGS CLOCK VERSION DEBUG

CPU METERING CPU BI STATE TR METERING ST METERING GTU METERING GEN METERING EXC METERING

Figure 8-10 View diagram of menu

The default display can be replaced by the menu when press or ESC. The menu of this relay is arranged as a tree-shaped cascade structure. See Figure 8-11. The menu can be browsed using the keypad. Starting at the default display, to enter into main menu, press . To select the required item, use the keys. To enter the lower level menu, select the required item and press ENT. To return to the upper level menu, press ESC or select 0. Exit and push ENT. The menu can be browsed using the four arrow keys, following the structure shown in Figure 8-10. Thus, starting at the default display the key will display the first column heading. To select the required column heading use the and keys. To return to the default display press the clear key ESC from any of the column headings.

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MENU

VALUES REPORT PRINT SETTINGS CLOCK VERSION DEBUG

CPU METERING CPU BI STATE MON METERING MON BI STATE PHASE ANGLE TR PROT EBI GEN PROT EBI ET&ST PROT EBI MECH RLY EBE AUX BI MON FD PS SUPERV BI

TR METERING ST METERING GTU METERING GEN METERING EXC METERING

DIFF CURR TR CURR HVS VOLT

DIFF CURR HVS CURR LVS METERING DIFF CURR

SAME TO CPU METERING SAME TO CPU BI STATE TRIP REPORT ALARM REPORT GTU DIFF PROT TR DIFF PROT TR PPF BAK PROT TR EF BAK PROT TR OVEXC PROT GEN DIFF PROT GEN SPTDIFF PROT GEN INTTURN PROT GEN PPF BAK PROT STA EF PROT ROTWDG EF PROT STA OVLD PROT STA NEGOC PROT GEN LOSSEXC PROT GEN OOS PROT GEN VOLT PROT GEN OVEXC PROT GEN PW R PROT GEN FREQ PROT GEN STSHUT PROT GEN ACCENERG PROT EXC DIFF PROT EXC BAK PROT ROTWDG OVLD PROT ST DIFF PROT ST HVS BAK PROT ST LVS BAK PROT ST REF PROT MECH RLY PROT PD PROT COMM STATUS MEMORY IMAGE EQUIP SETTINGS SYSTEM SETTINGS PROT SETTINGS SETTINGS COPY CALC SETTINGS SETTINGS TRIP RECORD ALARM REPORT BI CHG REPORT PRESENT WAVE TRIGGER BI STATE PHASE ANGLE GTU DIFF W AVE TR DIFF WAVE TR CURR WAVE TR HVS WAVE ST DIFF WAVE ST LVS W AVE ST REF WAVE GEN DIFF WAVE GEN TRVDIFF WAVE GEN VOLT WAVE GEN MISC WAVE EXC CURR W AVE PROT CONFIG TR SYS SETTINGS GEN SYS SETTINGS ST SYS SETTINGS EXC SYS SETTINGS PRI RATED CURR SEC RATED CURR SEC RATED VOLT DIFF CORR COEF TRIP REPORT GTU DIFF W AVE TR DIFF WAVE TR CURR WAVE TR HVS WAVE ST DIFF W AVE ST LVS W AVE ST REF WAVE GEN DIFF WAVE GEN TRVDIFF WAVE GEN MISC WAVE EXC CURR W AVE BI CHG REPORT TR PHASE ANGLE ST PHASE ANGLE GEN PHASE ANGLE EXC PHASE ANGLE ACTIVE SETTINGS EQUIP SETTINGS SYSTEM SETTINGS PROT SETTINGS CALC SETTINGS TRIP LOGIC MODIFIED SETTINGS OTHER GRP SETTINGS

TRVDIFF CURR VOLTAGE MISC METERING

DIFF CURR AC METERING

Figure 8-11 Relay menu map of RCS-985A


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8.2.5.2 Password protection The menu structure contains two levels of access. The level of access is enabled determines what users can do by entry of password. The levels of access are summarized in the following table:
Table 8-5 Password level

Access level Level 0 No password required Level 1 Password required

Operations enabled Read access to all settings, alarms, event records and fault records All settings modified ,

The password is 4 digits. The factory default passwords is sequently pressing of the keys +, , - and ENT.

8.2.6 Operation instruction of Menu


The following contents are to tell user how to make use of each submenu in detail. 8.2.6.1 View CPU and MON metering values Metering data consists of AC sampled data and phase angle in the submenu VALUES. Take viewing data relevant to differential protection of CPU metering as an example. User can view data of MON in the same way by entering MON METERING submenu. Navigate the menu through the following path and you will see the interface of LCD as shown in Figure 8-12. Main menu -> VALUES -> CPU METERING-> TR METERING ->DIFF CURR

DIFF CURR Id_Diff_Tr: Ir_Diff_Tr: Id_2ndH: Id_5thH: Icorr_HVS1_Tr: Icorr_HVS2_Tr: Icorr_LVS_Tr Icorr_HVS_ST: 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie 000.00 000.00 000.00 Ie

Figure 8-12 LCD display of metering data

A scroll bar appears on the right means there are more rows needed to be displayed. Please press key to see the next page and press key ESC to exit to the upper level submenu.

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8.2.6.2 View state of all binary inputs in CPU and MON The status of binary input comprises enabling binary inputs and other binary inputs of auxiliary contacts. For instance, navigate the menu through the following path and you will see the interface of LCD to see binary inputs related to generators protection sampled by CPU. Main menu -> CPU BI STATE-> -> GEN PROT EBI -> [symbols]

GEN PROT EBI EBI_Diff_Gen: EBI_SPTDiff_Gen: EBI_PPF_Gen: EBI_IntTurn_Gen: EBI_ROV_Sta: EBI_V3rd_Sta: EBI_1PEF_RotWdg: EBI_2PEF_RotWdg: 0 0 0 0 0 0 0 0

Figure 8-13 LCD display of status of binary inputs

Press key ESC to exit to the submenu. 8.2.6.3 View phase angle Entering into PHASE ANGLE submenu, the calculated angles between sampled voltages or between sampled voltages and currents by CPU system will be displayed on LCD as shown below, which can be used to check the correctness of secondary circuit wiring. The angles displayed is that the former value leading to the later one, which varies from -180 180, as shown as figure below for example.

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GEN PHASE ANGLE _Term_Gen_&_NP_Gen: _SP1_Gen_&_SP2_Gen: ipp_Term_Gen: ipp_NP_Gen: ipp_SP1_Gen: ipp_SP2_Gen: vpp_VT1_Term_Gen: vpp_VT2_Term_Gen: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000
o o o o o o o o

Figure 8-14 Phase angle displayed on LCD

Push key to show the other information. Push ESC key to return to upper level menu. 8.2.6.4 Operation Instruction of Report menu REPORTTRIP REPORT Scrolling the cursor to this submenu and press ENT key, the LCD will display the latest trip report if exist, otherwise a clew of NO TRIP REPORT will appear. If there are several trip reports stored in memory, user can look up historical record one by one by pushing key. RCS-985A can store up to 24 latest trip reports. When the available space is exhausted, the oldest report is automatically overwritten by the new one . Push either ENT or ESC key to return to upper level menu. REPORTALARM REPORT Scrolling the cursor to this submenu and press ENT key, the LCD will display the latest alarm report if exist, otherwise a clew of NO ALARM REPORT will appear. If there are several alarm reports stored in memory, user can look up historical record one by one by pushing key. RCS-985A can store up to 64 latest alarm reports. When the available space is exhausted, the oldest report is automatically overwritten by the new one. Push either ENT or ESC key to revert to upper level menu. REPORT BI CHG REPORT Scrolling the cursor to this submenu and press ENT key, the LCD will display the last BI CHG report if exist, otherwise a clew of NO BI CHG REPORT will appear. If there are several BI CHG reports stored in memory, user can look up historical record one by one by pushing key. RCS-985A can store up to 64 latest signaling reports at a resolution of 2ms. When the available space is exhausted, the oldest report is automatically overwritten by the new one
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Push either ENT or ESC key to return to upper level menu. Delete fault records and event records If you want to delete the content of fault records or event records, you can follow the operating steps. Note you cannot select which kind of records or which one record to be deleted but delete all records. Operating steps: Press key to enter the main menu at first.

Figure 8-15 LCD display of deleting report step 1

Press keys +, -, +, -, ENT in sequence in the main menu to make LCD display Figure 8-16.

Figure 8-16 LCD display of deleting report step 2

Press key ENT to delete all records or press key ESC to exit to main menu. If key ENT is pressed, LCD will display Figure 8-17 when equipment is deleting all records. If key ESC is pressed, Figure 8-15 will be displayed. LCD will automatically return to Figure 8-15 in 3 seconds without pressing any key.

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Figure 8-17 LCD display of deleting report step 3

8.2.6.5 Operation Instruction of PRINT menu PRINTSETTINGS[submenu] Used for printing of settings. The following figure gives an example of the first submenu [ACTIVE SETTINGS]. Note: If the protection is disabled by configuring the setting in the <PROT CONFIG>, the settings of this protection element will not be printed.

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Figure 8-18 Example of settings printing


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PRINTTRIP REPORT Used for printing of trip report of protection. User can select the report that he wants to print by pushing and keys to select the SOE number. Here is an example.

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Figure 8-19 Example of tripping report printing


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PRINTALARM REPORT Used for printing of alarm. User can select the report that he wants to print by pushing keys. Here is an example. and

Figure 8-20 Example of alarm report printing

PRINTBI CHG REPORT Used for printing of signaling report. User can select the report that he wants to print by pushing and keys. Here is an example.

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Figure 8-21 Example of BI CHG report printing

PRINTPRESENT VALUES Used for printing of present values of relay, including sampled binary inputs, analog qualities and so on. If you want to see the normal recording waveform, please follow the operating steps. Operating steps: First, please go in to the main menu by pressing key . Press key or to select PRINT item by scrolling the cursor upward or downward and then press the ENT to the lower level submenu. Then press key or to select PRESENT WAVE by scrolling the cursor upward or downward. Press key ENT to enter the lower level submenu.

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Press TRIGGER submenu to start recording. The equipment will record 5-cycle waveform after pressing the key. Please select the other items in the submenu GTU DIFF WAVE by scrolling cursor to print the waveform. Here is an example.

Figure 8-22 Example of present values printing

8.2.6.6 Instruction of Settings Manu SettingsEquip Settings To change the value of a equipment settings, first navigate the SETTING menu to display the relevant cell. Press ENT to enter the submenu, then proceed to Equip Settings submenu. Keys and are used to select which kind of the settings to be modified by scrolling the cursor upward or downward. Press key or to move the cursor to the digit to be modified. Press key + and to modify data. Press key ESC to return back without modification. Pressing key ENT the LCD will prompt to input confirm password, then enter password mentioned in section 8.2.5.2 and quit to default display by pressing ESC key. After a period of extinguishing of the HEALTHY LED and blocking of relay itself, RCS-985A is ready for new operation to fault according to new settings, the modification is completed. The following figure shows the path to access this submenu. SettingsProtection settings To change the value of a setting, first navigate the menu to SETTING then corresponding
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submenu to display the relevant cell. Please locate the setting you want to change after entering the right submenu by operating the keypad as described before. Then go on to operate as following steps. Press key or to move the cursor to the digit to be modified. Pressing key + and to change the digit. Press key + once to add 1 to the digit and press key once to subtract 1 from the digit. Press key ESC to cancel the modification and return to upper level submenu. Press key ENT to confirm the modification and the LCD will prompt you to input confirm code.

Figure 8-23 LCD display of inputting password

Press keys +, , and in sequence to complete the modification. If the password input is wrong, prompt for password will appear again. If no operation in 3 seconds, LCD will return to last display. If the password inputted is right, then equipment will check setting and Figure 8-24 will be displayed temporarily. If there is no error in checking setting, Equipment will modify setting with Figure 8-25 displayed temporarily. Then LCD will return to upper level submenu automatically.

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Figure 8-24 LCD display of equipment checking setting

Figure 8-25 LCD display of equipment modifying setting

If errors in settings are detected, the LCD will display wrong setting warning for 3 s.

Figure 8-26 LCD display of wrong setting warning


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Then LCD will display the setting list for the operator to modify the wrong setting. The cursor will stay at the first wrong setting needed to be modified. Note: If the group number or protection system parameter is changed, all protection settings will be invalid and have to be configured again. Attentions should be paid that before modifying the protection settings, the active group number in Equip Settings should modified firstly, otherwise what is modified will be applied to current active group. SettingsSettings Copy The relay stores 2 setting groups from No.0 through No.1. Only present setting group is active, the others are provided for different operating conditions. The equipment settings are shared for the two setting groups, but the protection settings are independent. Generally the equipment is delivered with default settings stored in active setting group 0. The contents of other setting groups may be invalid. Therefore after application-specific settings for group No.0 have been ready, it is necessary to copy settings of group No.0 to No. 1 setting groups, and make some modification afterwards when necessary, so as to avoid entering all settings one by one. Please copy settings as following steps.

Press key to enter the main menu at first.

Figure 8-27 LCD display step 1 of copying setting

Move cursor to SETTINGS item and press key ENT or key to enter submenu.

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N A RI- R E L A Y S

VALUES REPORT EQUP SETTINGS PRINT SYSTEM SETTINGS SETTINGS CLOCK VERSION DEBUG PROT SETTINGS SETTINGS COPY CALC SETTINGS

Figure 8-28 LCD display step 2 of copying setting

Move cursor to SETTINGS COPY item and press ENT to display following interface.

Figure 8-29 LCD display step 3 of copying setting

Press key + and to change digit where the cursor stays. Pressing key + once will add 1 to the digit and pressing key once will subtract 1 from the digit. (For example: input 01) Press ENT the LCD will prompt to input confirm code. Please see the figure below.

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Figure 8-30 Password input interface

Please press keys +, , and in sequence, and then the equipment will copy setting and display following interface.

Figure 8-31 LCD display of equipment copying setting

Then the contents of setting group 0 will be totally copied to setting group 1 and present active setting group will be switched to Group1. Note: Press ENT to confirm, Then settings group 0 will be totally copied to settings group 1 and present active group will be switched to group 01. 8.2.6.7 Clock set Please set the equipment clock as following steps. Navigate the menu: Main menu -> CLOCK
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After you press key ENT, the following will be displayed on the LCD.

Figure 8-32 LCD display of device clock

2007 02 05: shows the date February 5th 2007. 09: 08: 39: shows the time 09:08:39 Press keys , , and to select the digit to be modified. Press key + and to modify data. Pressing key + once will add 1 to the digit and pressing key once will subtract 1 from the digit. Press key ESC to return to main menu without modification. Press key ENT to confirm the modification and return to the main menu. 8.2.6.8 View software version The equipment program has following parts. One is CPU module program, one is MON module program, and another is HMI module program. There are totally independent. Navigate the menu: Main menu -> VERSION After you press key ENT, the follow will be displayed on the LCD.

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VERSION CPUBrd: RCS-985A3YD 2007 - 2 - 28 MONBrd: RCS-985A3YD 2007 - 2 - 28 HMI: RCS-985A3YD 2007 - 2 - 28 SUBQ_ID: 00024882 3.12 10:39 3.12 10:44 3.12 10:30 7247 T_060707 15A045C6 E17F8231

Figure 8-33 LCD display of software information

CPUBrd/MONBrd/HMI : shows CPU/MON/HMI module program information. RCS-985A3YD: shows the program name of CPU/MON/HMI 3.12: shows the software version number of CPU/MON/HMI. E17F8231: shows the CRC (check code) of CPU module program. 15A045C6: shows the CRC (check code) of MON module program. 7247: shows the CRC (check code) of HMI module program. 2007-2-28 10:39: shows that CPU software creating time is 10:39 Feb 28th 2007. 2007-2-28 10:44: shows that MON software creating time is 10:44 Feb 28th 2007. 2007-2-28 10:30: shows that HMI software creating time is 10:30 Feb 28th 2007. T-060707: shows the project number. SUBQ_ID: 00024882: shows management sequential number of the software Note: What Figure 8-33 shows is just an example to introduce the meaning of VERSION, the actual program VERSION is application-specific. Press key ESC to return to upper level submenu. 8.2.6.9 DEBUG menu COMM STATUS This submenu is used to monitor communication condition of the equipment with external system. Display of this submenu is as follows:

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485A data received frame received message received send data N N N N

485 B Y Y Y Y

Figure 8-34 Display of communication status

Columns 485A and 485B display communication condition of RS-485 port1 and RS-485 port2 respectively. If communication condition is normal, Y will flash in the related position. If there is flashing N in the position, it mean there are some problems. Please check the communication.
Table 8-6 Items of DEBUG MENU problem

item Receive Data Valid Frame Valid Address Send Data

status N N N N

Communication circuit is open or no data is sent from external system. Baud rate or protocol is wrong. Communication address is wrong. There is problem in the sent message. If N flashes

Receive Data means the equipment has received data from external system. means the circuit is open or no data is sent from external system.

Valid Frame means the equipment has received complete frame from external system. If N flashes means Configuration of the baud rate or protocol is wrong. Valid Address means the equipment has received related message from external system. If N flashes means Configuration of the address is wrong. Send data means the equipment has sent data to external system. If N flashes means there is problem with the message. Communication condition is normal if Y of all items flashes. MEMPRY DEBUG The LCD displays real time value in memory of CPU, DSP1 and DSP2. These data are used mainly for program debugging.

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Chapter 9 Communications
9.1 Introduction
This section outlines the remote communications interfaces of the RCS-985A. The protection supports a choice of one of three protocols via the rear communication interface, selected via the model number by setting. The rear EIA(RS)485 interface is isolated and is suitable for permanent connection whichever protocol is selected. The advantage of this type of connection is that up to 32 relays can be daisy chained together using a simple twisted pair electrical connection. It should be noted that the descriptions contained within this section do not aim to fully detail the protocol itself. The relevant documentation for the protocol should be referred to for this information. This section serves to describe the specific implementation of the protocol in the relay. The following figure shows typical scheme of communication via RS-485 port of RCS-985A used in substation automation system.

Figure 9-1 Typical scheme in substation automation system

9.2 Rear communication port of EIA(RS)485


9.2.1 Rear communication port EIA(RS)485 interface
The rear EIA(RS)485 communication port is provided by a 3-terminal screw connector located on the back of the relay. See relevant sections for details of the connection terminals. The rear port provides EIA(RS)485 serial data communication and is intended for use with a permanently wired connection to a remote control center.

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Figure 9-2 RS485 port interface

The protocol provided by the relay is indicated in the relay menu in the SETTINGS column. Using the keypad and LCD, check the communication protocol being used by the rear port according to the definition of relevant settings described in section 7.

9.2.2 EIA(RS)485 bus


The EIA(RS)485 two-wire connection provides a half-duplex fully isolated serial connection to the product. The connection is polarized and whilst the products connection diagrams indicate the polarization of the connection terminals it should be borne in mind that there is no agreed definition of which terminal is which. If the master is unable to communicate with the product, and the communication parameters match, then it is possible that the two-wire connection is reversed.

9.2.3 Bus termination


The EIA(RS)485 bus must have 120 (Ohm) Watt terminating resistors fitted at either end across the signal wires see Figure 9-2. Some devices may be able to provide the bus terminating resistors by different connection or configuration arrangements, in which case separate external components will not be required. However, this product does not provide such a facility, so if it is located at the bus terminus then an external termination resistor will be required.

9.2.4 Bus connections & topologies


The EIA(RS)485 standard requires that each device be directly connected to the physical cable that is the communications bus. Stubs and tees are expressly forbidden, as are star topologies. Loop bus topologies are not part of the EIA(RS)485 standard and are forbidden by it. Two-core screened cable is recommended. The specification of the cable will be dependent on the application, although a multi-strand 0.5mm 2 per core is normally adequate. Total cable length must not exceed 1000m. The screen must be continuous and connected to ground at one end, normally at the master connection point; it is important to avoid circulating currents, especially when the cable runs between buildings, for both safety and noise reasons. This product does not provide a signal ground connection. If a signal ground connection is present in the bus cable then it must be ignored, although it must have continuity for the benefit of other devices connected to the bus. At no stage must the signal ground be connected to the cables screen or to the products chassis. This is for both safety and noise reasons.

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Note: It is extremely important that the 120 termination resistors are fitted. Failure to do so will result in an excessive bias voltage that may damage the devices connected to the bus. As the field voltage is much higher than that required, NR cannot assume responsibility for any damage that may occur to a device connected to the network as a result of incorrect application of this voltage.

9.3 IEC60870-5-103 communication


9.3.1 Overview of IEC60870-5-103
The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform communication with protection equipment. The standard configuration for the IEC60870-5-103 protocol is to use a twisted pair EIA(RS)485 connection over distances up to 1000m. The relay operates as a slave in the system, responding to commands from a master station. To use the rear port with IEC60870-5-103 communication, the relays communication settings must be configured. To do this use the keypad and LCD user interface. Please refer to section 8.2.5 for detail instructions. Three settings apply to the rear port using IEC60870-5-103 that are described below. [Protocol] indicates the communication protocol. [Equip_ID] controls the IEC60870-5-103 address of the relay. Up to 32 relays can be connected to one IEC60870-5-103 spur, and therefore it is necessary for each relay to have a unique address so that messages from the master control station are accepted by one relay only. IEC60870-5-103 uses an integer number between 0 and 254 for the relay address. It is important that no two relays have the same IEC60870-5-103 address. The IEC60870-5-103 address is then used by the master station to communicate with the relay. [Com1_Baud (COM2_Baud)]: controls the baud rate to be used. IEC60870-5-103 communication is asynchronous. It is important that whatever baud rate is selected on the relay is the same as that set on the IEC60870-5-103 master station.

9.3.2 Messages description in IEC60870-5-103 protocol type


Messages sent to substation automation system are grouped according to IEC60870-5-103 protocol. Operation elements are sent by ASDU2 (time-tagged message with relative time), and status of Binary Input and Self-Supervision are sent by ASDU1 (time-tagged message). 9.3.2.1 Settings Settings are transferred via Generic Service. Note:

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If the item En_Remote_Cfg in Equipment Settings is set as 0, to modify settings remotely will not be allowed. Moreover, Equipment Settings & System Settings are not allowed to be modified remotely whether the item En_Remote_Cfg is true (=1)or not. 9.3.2.2 Trip Reports Sent by ASDU2 (time-tagged message with relative time). FUN 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 233 233 227 227 227 227
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INF 171 172 173 174 175 176 163 164 165 166 167 168 169 170 183 184 185 186 187 188 177 178 179 180 181 182 201 203 204 205 128 129 208 209 189 190

Item Name Op_PcntDiff_ET Op_DPFC_IntTurn_Gen Op_SensTrvDiff_Gen Op_UnsensTrvDiff_Gen Op_SensIntTurn_Gen Op_UnsensIntTurn_Gen Op_InstDiff_Gen Op_PcntDiff_Gen Op_DPFC_Diff_Gen Op_InstSPTDiff_Gen Op_PcntSPTDiff_Gen Op_InstDiff_Exciter Op_PcntDiff_Exciter Op_InstDiff_ET Op_OvLd_Sta Op_InvOvLd_Sta Op_NegOC_Sta Op_InvNegOC_Sta Op_OvLd_RotWdg Op_InvOvLd_RotWdg Op_SensROV_Sta Op_UnsensROV_Sta Op_V3rdHRatio_Sta Op_V3rdHDiff_Sta Op_1PEF_RotWdg Op_2PEF_RotWdg Op_UF1_Gen Op_UF2_Gen Op_UF3_Gen Op_UF4_Gen Op_OF1_Gen Op_OF2_Gen Op_Z1_Gen Op_Z2_Gen Op_OC1_Gen Op_OC2_Gen

FUN 227 227 227 227 227 227 227 227 227 227 227 227 227 227 229 229 229 229 231 231 235 235 227 227 231 231 227 227 227 227 229 229 229 229 229 229

INF 242 243 244 245 246 247 248 234 235 236 237 238 239 240 216 217 18 19 106 107 69 70 249 250 201 202 251 252 253 254 20 21 22 23 24 25

Item Name Op_ROC12_Tr Op_ROC21_Tr Op_ROC22_Tr Op_ROC31_Tr Op_ROC32_Tr Op_TrDiff_StShut_Gen Op_STDiff_StShut_Gen Op_InstDiff_Tr Op_PcntDiff_Tr Op_DPFC_Diff_Tr Op_OC11_Tr Op_OC12_Tr Op_OC21_Tr Op_OC22_Tr Op_ROV1_Gap_Tr Op_ROV2_Gap_Tr Op_ROC1_Gap_Tr Op_ROC2_Gap_Tr Op_PD1 Op_PD2 Op_InstREF_ST Op_PcntREF_ST Op_InstDiff_GTU Op_PcntDiff_GTU Op_InstREF_Tr Op_PcntREF_Tr Op_Z11_Tr Op_Z12_Tr Op_Z21_Tr Op_Z22_Tr Op_InstDiff_ST Op_PcntDiff_ST Op_OC1_HVS_ST Op_OC2_HVS_ST Op_OC1_LVS_ST Op_OC2_LVS_ST

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FUN 227 227 227 227 227 227 227 227 227 227 227 233 233 227 227 227 227 227 227 227 227 227 227 227 227

INF 191 192 193 197 198 199 221 222 224 225 226 149 150 210 212 213 219 220 228 229 230 231 232 233 241

Item Name Op_OV1_Gen Op_OV2_Gen Op_UV_Gen Op_OvExc1_Gen Op_OvExc2_Gen Op_InvOvExc_Gen Op_RevP_Gen Op_UP_Gen Op_SeqTrpRevP_Gen Op_AccEnerg1_Gen Op_AccEnerg2_Gen Op_Flash1_TCB Op_Flash2_TCB Op_LossExc1_Gen Op_LossExc2_Gen Op_LossExc3_Gen Op_Ext_OOS_Gen Op_Int_OOS_Gen Op_GenDiff_StShut_Gen Op_SPTDiff_StShut_Gen Op_ETDiff_StShut_Gen Op_StaROV_StShut_Gen Op_OC1_ET Op_OC2_ET Op_ROC11_Tr

FUN 229 229 231 231 231 231 229 229 229 229 231 231 231 231 231 231 231 231 231 231 231 231 231 231

INF 26 27 108 109 153 154 218 28 29 30 91 92 93 94 95 96 97 84 85 86 87 88 89 90

Item Name Op_ROC1_LVS_ST Op_ROC2_LVS_ST Op_MechRly1 Op_MechRly2 Op_MechRly3 Op_MechRly4 Op_UrgBrake Op_OvExc1_Tr Op_OvExc2_Tr Op_InvOvExc_Tr TripOutp8 TripOutp9 TripOutp10 TripOutp11 TripOutp12 TripOutp13 TripOutp14 TripOutp1 TripOutp2 TripOutp3 TripOutp4 TripOutp5 TripOutp6 TripOutp7

9.3.2.3 Alarm Reports Sent by ASDU1 (time-tagged message); FUN INF Item Name 227 227 227 227 227 227 227 227 227 227 227 72 73 74 75 76 77 78 79 64 65 66 Alm_DeltVTS1_Term_Gen Alm_DeltVTS2_Term_Gen Alm_VTS_RotWdg Alm_Pos_CB_HVS1_Tr Alm_Pos_CB_HVS2_Tr Alm_VTS_LossExc_RotWdg Alm_VTS_ET Alm_PM_DSP1_CPUBrd Alm_SwOv_VTS1_Gen Alm_SwOv_VTS2_Gen Alm_BlkV3rdHDiff_VTS1 231 231 104 143 Alm_MechRly2 Alm_MechRly4

FUN 235 227 227 227 227 227 227 227

INF 72 134 135 136 137 123 68 125

Item Name Alm_InitCool2_OvLd_ST Alm_OvLd_ST Alm_PwrLoss_MechRly Alm_InitCool1_OvLd_ST Alm_PM_DSP2_CPUBrd Alm_VTS_Term_Gen Alm_VTS_HVS_Tr Alm_VTS_LVS_ST

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FUN 227 227 227 227 227 227 227 227 227 227 227 231 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 229 229 227 227 227 227 233 233 227 227 227 227 227
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INF 67 68 69 70 71 88 89 90 91 92 172 17 80 83 84 85 86 87 100 101 102 103 104 105 106 93 94 95 96 213 123 115 116 117 118 126 127 121 122 107 108 109

Item Name Alm_BlkIntTurn_VTS2 Alm_VTS_HVS_Tr Alm_VTS1_Term_Gen Alm_VTS2_Term_Gen Alm_VTS_NP_Gen Alm_CTS_TrvDiff_Gen Alm_Diff_Gen Alm_SPTDiff_Gen Alm_Diff_ET Alm_Diff_Exciter Alm_DPFC_IntTurn_Gen Alm_Pos_GCB Alm_CTS_Term_Gen Alm_CTS_NP_Gen Alm_CTS_SP1_Gen Alm_CTS_SP2_Gen Alm_CTS_S1_Exc Alm_CTS_S2_Exc Alm_Ext_OOS_Gen Alm_Int_OOS_Gen Alm_Accel_OOS_Gen Alm_Decel_OOS_Gen Alm_RevP_Gen Alm_LossExc_Gen Alm_OvExc_Gen Alm_CTS_Diff_Gen Alm_CTS_SPTDiff_Gen Alm_CTS_Diff_ET Alm_CTS_Diff_Exciter Alm_BO_OC2_Gen Alm_On_2PEF_RotWdg Alm_UF1_Gen Alm_UF2_Gen Alm_UF3_Gen Alm_UF4_Gen Alm_OF1_Gen Alm_OF2_Gen Alm_RevP_Gen Alm_BO_UC_OvSp_Gen Alm_OvLd_Sta Alm_NegOC_Sta Alm_OvLd_RotWdg

FUN 231 231 235 235 227 227 227 227 227 227 227 227 227 227 231 227 227 227 229 229 227 235 227 227 227 235 227 227 227 229 227 229 227 227 227 227 227 227 227 227 229

INF 142 105 81 73 146 147 148 149 150 151 138 139 140 141 193 142 143 158 215 119 160 83 152 153 154 82 157 82 214 250 217 246 194 195 196 223 81 202 200 211 202

Item Name Alm_MechRly3 Alm_MechRly1 Alm_CTS_LVS_ST Alm_REF_ST Alm_Diff_GTU Alm_Diff_Tr Alm_Diff_ST Reserved Reserved Reserved Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_LVS_Tr Alm_CTS_HVS_Tr Alm_REF_Tr Alm_CTS2_HVS_ST Alm_CTS1_HVS_ST Alm_UrgBrake Alm_Inconsist_MechRly Alm_PoleDisagr_CB Alm_ROV_LVS_Tr Alm_ROV_LVS_ST Alm_CTS_Diff_GTU Alm_CTS_Diff_Tr Alm_CTS_Diff_ST Alm_OvLd_LVS_ST Alm_OvExc_Tr Alm_DSP_CPUBrd Alm_PersistFD_CPUBrd Alm_InconsistFD Alm_Sample_CPUBrd Alm_BI_CPUBrd Alm_RAM_CPUBrd Alm_ROM_CPUBrd Alm_EEPROM_CPUBrd Alm_InvalidSetting Alm_ModifiedSetting Alm_PwrLoss_Opto Alm_TripOutput Alm_InnerComm Alm_DSP_MONBrd

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FUN 227 227 227 227 227 227 235 227

INF 110 111 112 113 114 131 71 132

Item Name Alm_ROV_Sta Alm_V3rdHRatio_Sta Alm_V3rdHDiff_Sta Alm_Sens_1PEF_RotWdg Alm_1PEF_RotWdg Alm_OvLd_Tr Alm_InitCool2_OvLd_Tr Alm_InitCool1_OvLd_Tr

FUN 229 227 229 229 229 229

INF 203 216 204 205 206 207

Item Name Alm_PersistFD_MONBrd Alm_MONBrd Alm_Sample_MONBrd Alm_RAM_MONBrd Alm_ROM_MONBrd Alm_EEPROM_MONBrd

9.3.2.4 Disturbance ACC(Actual Channel) No. 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 ID DIFBA DIFBB DIFBC IHA31 IHB31 IHC31 INA31 INB31 INC31 ICA21 ICB21 ICC21 DIBA DIBB DIBC IHA11 IHB11 IHC11 IHA21 IHB21 IHC21 IBA21 IBB21 IBC21 IHA IHB IHC IHA1 IHB1 IHC1 Name Ida_Diff_GTU Idb_Diff_GTU Idc_Diff_GTU Icorra_HVS_GTU Icorrb_HVS_GTU Icorrc_HVS_GTU Icorra_NP_Gen Icorrb_NP_Gen Icorrc_NP_Gen Icorra_HVS_ST Icorrb_HVS_ST Icorrc_HVS_ST Ida_Diff_Tr Idb_Diff_Tr Idc_Diff_Tr Icorra_HVS1_Tr Icorrb_HVS1_Tr Icorrc_HVS1_Tr Icorra_HVS2_Tr Icorrb_HVS2_Tr Icorrc_HVS2_Tr Icorra_LVS_Tr Icorrb_LVS_Tr Icorrc_LVS_Tr Ia_HVS_Tr Ib_HVS_Tr Ic_HVS_Tr Ia_HVS1_Tr Ib_HVS1_Tr Ic_HVS1_Tr No. 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 ICA31 ICB31 ICC31 DIFA DIFB DIFC IFA IFB IFC INA INB INC DILXA DILXB DILXC INA1 INB1 INC1 INA2 INB2 INC2 UD10 UDA1 UDB1 UDC1 ID Reserved Ua_LVS_ST Ub_LVS_ST Uc_LVS_ST Reserved Reserved Reserved U_DeltVT_LVS_ST Reserved Icorra_LVS_ST Icorrb_LVS_ST Icorrc_LVS_ST Ida_Diff_Gen Idb_Diff_Gen Idc_Diff_Gen Ia_Term_Gen Ib_Term_Gen Ic_Term_Gen Ia_NP_Gen Ib_NP_Gen Ic_NP_Gen Ida_SPTDiff_Gen Idb_SPTDiff_Gen Idc_SPTDiff_Gen Ia_SP1_Gen Ib_SP1_Gen Ic_SP1_Gen Ia_SP2_Gen Ib_SP2_Gen Ic_SP2_Gen
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No. 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131

ID IHA2 IHB2 IHC2 IBA IBB IBC IB0 IBJ0 UB0 UBF UHA UHB UHC DICA DICB DICC ICA11 ICB11 ICC11 IDA11 IDB11 IDC11 DIH0 DI0CB IH0 ICA1 ICB1 ICC1 ICA2 ICB2 ICC2 IDA1 IDB1 IDC1 ICB0

Name Ia_HVS2_Tr Ib_HVS2_Tr Ic_HVS2_Tr Ia_LVS_Tr Ib_LVS_Tr Ic_LVS_Tr I0_NP_HVS_Tr I0_Gap_HVS_Tr U0_DeltVT_HVS_Tr U/F_OvExc_Tr Ua_HVS_Tr Ub_HVS_Tr Uc_HVS_Tr Ida_Diff_ST Idb_Diff_ST Idc_Diff_ST Icorra_HVS_ST Icorrb_HVS_ST Icorrc_HVS_ST Icorra_LVS_ST Icorrb_LVS_ST Icorrc_LVS_ST Id_REF_Tr Id_REF_ST I0_HVS_Tr Ia_CT1_HVS_ST Ib_CT1_HVS_ST Ic_CT1_HVS_ST Ia_CT2_HVS_ST Ib_CT2_HVS_ST Ic_CT2_HVS_ST Ia_LVS_ST Ib_LVS_ST Ic_LVS_ST I0_ST Reserved Reserved

No. 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199

ID IHC RP IP UFA1 UFB1 UFC1 UFA2 UFB2 UFC2 U/F U0 UN UZ UF3 UN3 UFN3 UR+ URUR IR DILA DILB DILC ILA11 ILB11 ILC11 ILA21 ILB21 ILC21 ILA1 ILB1 ILC1 ILA2 ILB2 ILC2 F P_Gen Q_Gen

Name Id_TrvDiff_Gen

Ua_VT1_Term_Gen Ub_VT1_Term_Gen Uc_VT1_Term_Gen Ua_VT2_Term_Gen Ub_VT2_Term_Gen Uc_VT2_Term_Gen U/F_OvExc_Gen U0_DeltVT1_Term_Gen U0_NP_Gen U0_Longl_Gen U0_3rdH_VT1_Term_Gen U0_3rdH_NP_Gen Ud_3rdH_Sta U(+)_RotWdg U(-)_RotWdg U_RotWdg I_RotWdg Reserved Ida_Diff_Exc Idb_Diff_Exc Idc_Diff_Exc Icorra_S1_Exc Icorrb_S1_Exc Icorrc_S1_Exc Icorra_S2_Exc Icorrb_S2_Exc Icorrc_S2_Exc Ia_S1_Exc Ib_S1_Exc Ic_S1_Exc Ia_S2_Exc Ib_S2_Exc Ic_S2_Exc f_Gen Reserved

ID10

I0_NP_LVS_ST

9.3.2.5 Metering Sent via Generic Service.


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The metering values were format as IEEE STD754 R32.23. 9.3.2.6 BinaryInput Sent by ASDU1. (time-tagged message). FUN 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 227 229 227 231 231 231 231 231 INF 25 26 27 28 29 30 31 32 16 17 18 19 21 22 23 24 41 42 210 44 98 99 129 130 101 Item Name EBI_LossExc_Gen EBI_OOS_Gen EBI_VoltProt_Gen EBI_OvExc_Gen EBI_PwrProt_Gen EBI_FreqProt_Gen EBI_AccEnerg_Gen EBI_StShut_Gen EBI_Diff_Gen EBI_IntTurn_Gen EBI_ROV_Sta EBI_V3rdH_Sta EBI_1PEF_RotWdg EBI_2PEF_RotWdg EBI_OvLd_Sta EBI_NegOC_Sta BI_UrgBrake BI_SyncCondenser BI_Reserved BI_PS_Superv EBI_Diff_Exc EBI_Bak_Exc EBI_Trp_MechRly3 EBI_Trp_MechRly4 EBI_Trp_MechRly2 FUN 231 227 227 227 227 229 229 227 227 227 227 227 229 227 227 227 227 227 229 227 231 231 231 231 227 INF 100 39 40 52 53 242 252 45 46 47 48 49 241 50 51 59 60 61 243 63 102 134 133 103 58 Item Name EBI_Trp_MechRly1 EBI_PPF_Gen EBI_SPTDiff_Gen EBI_Bak_LVS_ST EBI_REF_ST EBI_Reserved2 EBI_Reserved3 EBI_Diff_Tr EBI_PPF_Tr EBI_EF_Tr EBI_REF_Tr EBI_Diff_GTU EBI_Reserved1 EBI_Diff_ST EBI_Bak_HVS_ST BI_52b_GCB BI_52b_CB_HVS1_Tr BI_52b_CB_HVS2_Tr BI_PoleDisagr_CB BI_Valve_Turbine BI_MechRly2 BI_MechRly4 BI_MechRly3 BI_MechRly1 BI_PS_MechRly

9.3.2.7 Blocking of monitoring direction FUN = 227; INF = 20 9.3.2.8 Generic service Group No. 1 2 3 4 5 6 Setting_Group Equip Settings Protection Config Tr Sys Settings Gen Sys Settings ST Sys Settings
347

Group Name(English)

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Group No. 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 65 66 67 68 69 Exc Sys Settings GTU Diff Prot Settings Tr Diff Prot Settings

Group Name(English)

Tr PPF Bak Prot Settings Tr EF Bak Prot Settings Tr OvExc Prot Settings Gen Diff Prot Settings Gen SPTDiff Prot Settings Gen IntTurn Prot Settings Gen PPF Bak Prot Settings Sta EF Prot Settings RotWdg EF Prot Settings Sta OvLd Prot Settings Sta NegOC Prot Settings Gen LossExc Prot Settings Gen OOS Prot Settings Gen Volt Prot Settings Gen OvExc Prot Settings Gen Pwr Prot Settings Gen Freq Prot Settings Gen StShut Prot Settings Gen AccEnerg Prot Settings Exc Diff Prot Settings Exc Bak Prot Settings RotWdg OvLd Prot Settings ST Diff Prot Settings ST HVS Bak Prot Settings ST LVS Bak Prot Settings ST REF Prot Settings MechRly Prot Settings PoleDisagr Prot Settings Prot Metering of Tr Prot Metering of ST Prot Metering of GTU Prot Metering of Gen Prot Metering of Exc

9.4 MODBUS protocol


9.4.1 Overview
The RCS-985A relay support several communications protocols to allow connection to equipment such as personal computers, RTUs, SCADA masters, and programmable logic controllers. The
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Modicon Modbus RTU protocol is the most basic protocol supported by the RCS-985A. Modbus is available via RS485 serial links or via Ethernet (using the Modbus/TCP specification). The following information is provided intended primarily for users who wish to develop their own master communication drivers and applies to the serial Modbus RTU protocol. The characteristic is listed below: l l l l l l l Standard: Modicon Modbus Protocol Reference Guide, PI-MBUS-300 Rev.E Physical Layer SetupRS485, 1 start bit,8 data bits, no bit for parity,1 stop bit Link Layer SetupOnly RTU Mode Supported Frame Length Up limit256 Bytes Baud Rate: Configurable Device Address: Configurable Parity: no

The following modbus function codes are supported but re-defined by the relay: 02 Read Input Status-Get real-time status (binary) 03 Read Holding Registers- Get Settings 04 Read Input Registers- Get metering values of equipment

9.4.2 Fetch real time status (Binary)


Function Code: 02H Reads the ON/OFF status of discrete inputs in the slave. The status in the response message is packed as one input per bit of the data field. Status is indicated as: 1 = ON; 0 = OFF. The LSB of the first data byte contains the input addressed in the query. The other inputs follow toward the high order end of this byte, and from low order to high order in subsequent bytes. Example 1: If the master want to fetch Trip Information (0000H~0003H), the query frame would be as follows(Suppose the slave address was 1):

01

02

00

00

00

04

79

C9 CRC Hi CRC Lo

Num of Status Lo Num of Status Hi Start Register Addr Lo Start Register Addr Hi Function Code Slave Addr
The response fame would be as follows (Suppose the value of 0000H~0003H equal to 1,1,0,1
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respectively):

01

02

01

0B

E0

4F CRC Hi CRC Lo Status Length

Function Code Slave Addr


Example 2: If the master want to fetch Trip Information(0002H~000DH),the query frame would be as follows(Suppose the slave address was 1):

01

02

00

02

00

0C

D9

CF CRC Hi CRC Lo

Num of Status Lo Num of Status Hi Start Register Addr Lo Start Register Addr Hi Function Code Slave Addr
The response fame would be as follows (Suppose the value of 0002H~000DH equal to 1,1,0,1,0,0,1,0,1,1,1,0 respectively):

01

02

02

07

4B

FB

BF CRC Hi CRC Lo Status Lo Status Hi

Length Function Code Slave Addr


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9.4.2.1 Trip information1 means trip,0 for no trip or draw off. Address 0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000FH 0010H 0011H 0012H 0013H 0014H 0015H 0016H 0017H 0018H 0019H 001AH 001BH 001CH 001DH 001EH 001FH 0020H 0021H 0022H 0023H 0024H 0025H 0026H 0027H Op_InstDiff_Gen Op_PcntDiff_Gen Op_DPFC_Diff_Gen Op_InstSPTDiff_Gen Op_PcntSPTDiff_Gen Op_InstDiff_Exciter Op_PcntDiff_Exciter Op_InstDiff_ET Op_PcntDiff_ET Op_DPFC_IntTurn_Gen Op_SensTrvDiff_Gen Op_UnsensTrvDiff_Gen Op_SensIntTurn_Gen Op_UnsensIntTurn_Gen Op_SensROV_Sta Op_UnsensROV_Sta Op_V3rdHRatio_Sta Op_V3rdHDiff_Sta Op_1PEF_RotWdg Op_2PEF_RotWdg Op_OvLd_Sta Op_InvOvLd_Sta Op_NegOC_Sta Op_InvNegOC_Sta Op_OvLd_RotWdg Op_InvOvLd_RotWdg Op_OC1_Gen Op_OC2_Gen Op_OV1_Gen Op_OV2_Gen Op_UV_Gen Op_OvExc1_Gen Op_OvExc2_Gen Op_InvOvExc_Gen Op_UF1_Gen Op_UF2_Gen Op_UF3_Gen Op_UF4_Gen Op_OF1_Gen Op_OF2_Gen Item Name

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Address 0028H 0029H 002AH 002BH 002CH 002DH 002EH 002FH 0030H 0031H 0032H 0033H 0034H 0035H 0036H 0037H 0038H 0039H 003AH 003BH 003CH 003DH 003EH 003FH 0040H 0041H 0042H 0043H 0044H 0045H 0046H 0047H 0048H 0049H 004AH 004BH 004CH 004DH 004EH 004FH 0050H 0051H
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Item Name Op_Z1_Gen Op_Z2_Gen Op_LossExc1_Gen Op_LossExc2_Gen Op_LossExc3_Gen Op_Ext_OOS_Gen Op_Int_OOS_Gen Op_RevP_Gen Op_UP_Gen Op_SeqTrpRevP_Gen Op_AccEnerg1_Gen Op_AccEnerg2_Gen Op_Flash1_TCB Op_Flash2_TCB Op_GenDiff_StShut_Gen Op_SPTDiff_StShut_Gen Op_ETDiff_StShut_Gen Op_StaROV_StShut_Gen Op_OC1_ET Op_OC2_ET Op_InstDiff_Tr Op_PcntDiff_Tr Op_DPFC_Diff_Tr Op_OC11_Tr Op_OC12_Tr Op_OC21_Tr Op_OC22_Tr Op_ROC11_Tr Op_ROC12_Tr Op_ROC21_Tr Op_ROC22_Tr Op_ROC31_Tr Op_ROC32_Tr Op_TrDiff_StShut_Gen Op_STDiff_StShut_Gen Op_InstDiff_GTU Op_PcntDiff_GTU Op_InstREF_Tr Op_PcntREF_Tr Op_Z11_Tr Op_Z12_Tr Op_Z21_Tr
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Address 0052H 0053H 0054H 0055H 0056H 0057H 0058H 0059H 005AH 005BH 005CH 005DH 005EH 005FH 0060H 0061H 0062H 0063H 0064H 0065H 0066H 0067H 0068H 0069H 006AH 006BH 006CH 006DH 006EH 006FH 0070H 0071H 0072H 0073H 0074H 0075H 0076H 0077H 0078H Op_Z22_Tr Op_ROV1_Gap_Tr Op_ROV2_Gap_Tr Op_ROC1_Gap_Tr Op_ROC2_Gap_Tr Op_PD1 Op_PD2 Op_InstREF_ST Op_PcntREF_ST Op_InstDiff_ST Op_PcntDiff_ST Op_OC1_HVS_ST Op_OC2_HVS_ST Op_OC1_LVS_ST Op_OC2_LVS_ST Op_ROC1_LVS_ST Op_ROC2_LVS_ST Op_OvExc1_Tr Op_OvExc2_Tr Op_InvOvExc_Tr Op_MechRly1 Op_MechRly2 Op_MechRly3 Op_MechRly4 Op_UrgBrake TripOutp1 TripOutp2 TripOutp3 TripOutp4 TripOutp5 TripOutp6 TripOutp7 TripOutp8 TripOutp9 TripOutp10 TripOutp11 TripOutp12 TripOutp13 TripOutp14

Item Name

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9.4.2.2 Alarm information1 means alarm,0 for no alarm or draw off. Address 1000H 1001H 1002H 1003H 1004H 1005H 1006H 1007H 1008H 1009H 100AH 100BH 100CH 100DH 100EH 100FH 1010H 1011H 1012H 1013H 1014H 1015H 1016H 1017H 1018H 1019H 101AH 101BH 101CH 101DH 101EH 101FH 1020H 1021H 1022H 1023H 1024H 1025H 1026H 1027H Alm_SwOv_VTS1_Gen Alm_SwOv_VTS2_Gen Alm_BlkV3rdHDiff_VTS1 Alm_BlkIntTurn_VTS2 Alm_VTS_HVS_Tr Alm_VTS1_Term_Gen Alm_VTS2_Term_Gen Alm_VTS_NP_Gen Alm_DeltVTS1_Term_Gen Alm_DeltVTS2_Term_Gen Alm_VTS_RotWdg Alm_Pos_CB_HVS1_Tr Alm_Pos_CB_HVS2_Tr Alm_VTS_LossExc_RotWdg Alm_VTS_ET Alm_PM_DSP1_CPUBrd Alm_CTS_Term_Gen Alm_CTS_NP_Gen Alm_CTS_SP1_Gen Alm_CTS_SP2_Gen Alm_CTS_S1_Exc Alm_CTS_S2_Exc Alm_CTS_TrvDiff_Gen Alm_Diff_Gen Alm_SPTDiff_Gen Alm_Diff_ET Alm_Diff_Exciter Alm_DPFC_IntTurn_Gen Alm_Pos_GCB Alm_CTS_Diff_Gen Alm_CTS_SPTDiff_Gen Alm_CTS_Diff_ET Alm_CTS_Diff_Exciter Alm_BO_OC2_Gen Alm_On_2PEF_RotWdg Alm_Ext_OOS_Gen Alm_Int_OOS_Gen Alm_Accel_OOS_Gen Alm_Decel_OOS_Gen Alm_RevP_Gen Item Name

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Address 1028H 1029H 102AH 102BH 102CH 102DH 102EH 102FH 1030H 1031H 1032H 1033H 1034H 1035H 1036H 1037H 1038H 1039H 103AH 103BH 103CH 103DH 103EH 103FH 1040H 1041H 1042H 1043H 1044H 1045H 1046H 1047H 1048H 1049H 104AH 104BH 104CH 104DH 104EH 104FH 1050H 1051H Alm_LossExc_Gen Alm_OvExc_Gen Alm_OvLd_Sta Alm_NegOC_Sta Alm_OvLd_RotWdg Alm_ROV_Sta Alm_V3rdHRatio_Sta Alm_V3rdHDiff_Sta Alm_Sens_1PEF_RotWdg Alm_1PEF_RotWdg Alm_UF1_Gen Alm_UF2_Gen Alm_UF3_Gen Alm_UF4_Gen Alm_OF1_Gen Alm_OF2_Gen Alm_RevP_Gen Alm_BO_UC_OvSp_Gen Alm_VTS_Term_Gen Alm_VTS_HVS_Tr Alm_VTS_LVS_ST Alm_MechRly2 Alm_MechRly4 Alm_MechRly3 Alm_MechRly1 Alm_OvLd_Tr Alm_InitCool2_OvLd_Tr Alm_InitCool1_OvLd_Tr Alm_InitCool2_OvLd_ST Alm_OvLd_ST Alm_PwrLoss_MechRly Alm_InitCool1_OvLd_ST Alm_PM_DSP2_CPUBrd Alm_CTS_HVS1_Tr Alm_CTS_HVS2_Tr Alm_CTS_LVS_Tr Alm_CTS_HVS_Tr Alm_REF_Tr Alm_CTS2_HVS_ST Alm_CTS1_HVS_ST Alm_CTS_LVS_ST Alm_REF_ST

Item Name

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Address 1052H 1053H 1054H 1055H 1056H 1057H 1058H 1059H 105AH 105BH 105CH 105DH 105EH 105FH 1060H 1061H 1062H 1063H 1064H 1065H 1066H 1067H 1068H 1069H 106AH 106BH 106CH 106DH 106EH 106FH 1070H 1071H 1072H 1073H 1074H 1075H Alm_Diff_GTU Alm_Diff_Tr Alm_Diff_ST Reserved1 Reserved2 Reserved3 Alm_CTS_Diff_GTU Alm_CTS_Diff_Tr Alm_CTS_Diff_ST Alm_OvLd_LVS_ST Alm_OvExc_Tr Alm_UrgBrake Alm_Inconsist_MechRly Alm_PoleDisagr_CB Alm_ROV_LVS_Tr Alm_ROV_LVS_ST Alm_RAM_CPUBrd Alm_ROM_CPUBrd Alm_EEPROM_CPUBrd Alm_InvalidSetting Alm_ModifiedSetting Alm_PwrLoss_Opto Alm_TripOutput Alm_InnerComm Alm_DSP_CPUBrd Alm_PersistFD_CPUBrd Alm_InconsistFD Alm_Sample_CPUBrd Alm_BI_CPUBrd Alm_RAM_MONBrd Alm_ROM_MONBrd Alm_EEPROM_MONBrd Alm_DSP_MONBrd Alm_PersistFD_MONBrd Alm_MONBrd Alm_Sample_MONBrd

Item Name

9.4.2.3 BinaryInput Change Information. 1 means binary change,0 for no change or draw off. Address Item Name

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Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H 2018H 2019H 201AH 201BH 201CH 201DH 201EH 201FH 2020H 2021H 2022H 2023H 2024H 2025H 2026H 2027H 2028H 2029H EBI_Diff_Gen EBI_IntTurn_Gen EBI_ROV_Sta EBI_V3rdH_Sta EBI_1PEF_RotWdg EBI_2PEF_RotWdg EBI_OvLd_Sta EBI_NegOC_Sta EBI_LossExc_Gen EBI_OOS_Gen EBI_VoltProt_Gen EBI_OvExc_Gen EBI_PwrProt_Gen EBI_FreqProt_Gen EBI_AccEnerg_Gen EBI_StShut_Gen EBI_Diff_Exc EBI_Bak_Exc EBI_Trp_MechRly3 EBI_Trp_MechRly4 EBI_Trp_MechRly2 EBI_Trp_MechRly1 EBI_PPF_Gen EBI_SPTDiff_Gen BI_UrgBrake BI_SyncCondenser BI_Reserved BI_PS_Superv EBI_Diff_Tr EBI_PPF_Tr EBI_EF_Tr EBI_REF_Tr EBI_Diff_GTU EBI_Reserved1 EBI_Diff_ST EBI_Bak_HVS_ST EBI_Bak_LVS_ST EBI_REF_ST EBI_Reserved2 EBI_Reserved3 BI_MechRly2 BI_MechRly4

Item Name

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Address 202AH 202BH 202CH 202DH 202EH 202FH 2030H 2031H BI_MechRly3 BI_MechRly1 BI_PS_MechRly BI_52b_GCB BI_52b_CB_HVS1_Tr BI_52b_CB_HVS2_Tr BI_PoleDisagr_CB BI_Valve_Turbine

Item Name

9.4.3 Fetch metering values of equipment


Function Code: 04H The metering values in the response message are packed as two bytes per register. For each register, the first byte contains the high order bits and the second contains the low order bits. 9.4.3.1 Tr Metering Address 0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H 0009H 000AH 000BH 000CH 000DH 000EH 000FH 0010H 0011H 0012H 0013H 0014H 0015H 0016H 0017H
358

Analog Name Ida_Diff_Tr(decimal digits=2) Idb_Diff_Tr(decimal digits=2) Idc_Diff_Tr(decimal digits=2) Ira_Diff_Tr(decimal digits=2) Irb_Diff_Tr(decimal digits=2) Irc_Diff_Tr(decimal digits=2) Ida_2ndH(decimal digits=2) Idb_2ndH(decimal digits=2) Idc_2ndH(decimal digits=2) Ida_5thH(decimal digits=2) Idb_5thH(decimal digits=2) Idc_5thH(decimal digits=2) Icorra_HVS1_Tr(decimal digits=2) Icorrb_HVS1_Tr(decimal digits=2) Icorrc_HVS1_Tr(decimal digits=2) Icorra_HVS2_Tr(decimal digits=2) Icorrb_HVS2_Tr(decimal digits=2) Icorrc_HVS2_Tr(decimal digits=2) Icorra_LVS_Tr(decimal digits=2) Icorrb_LVS_Tr(decimal digits=2) Icorrc_LVS_Tr(decimal digits=2) Icorra_HVS_ST(decimal digits=2) Icorrb_HVS_ST(decimal digits=2) Icorrc_HVS_ST(decimal digits=2) Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie

Unit

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Address 0018H 0019H 001AH 001BH 001CH 001DH 001EH 001FH 0020H 0021H 0022H 0023H 0024H 0025H 0026H 0027H 0028H 0029H 002AH 002BH 002CH 002DH 002EH 002FH 0030H 0031H 0032H 0033H 0034H 0035H 0036H 0037H 0038H 0039H 003AH 003BH 003CH 003DH 003EH 003FH 0040H 0041H

Analog Name Id_1stH_REF_Tr(decimal digits=2) Ir_REF_Tr(decimal digits=2) I0_Tr(decimal digits=2) I0_NP_Tr(decimal digits=2) Ia_HVS1_Tr(decimal digits=2) Ib_HVS1_Tr(decimal digits=2) Ic_HVS1_Tr(decimal digits=2) I1_HVS1_Tr(decimal digits=2) I2_HVS1_Tr(decimal digits=2) I0_HVS1_Tr(decimal digits=2) Ia_HVS2_Tr(decimal digits=2) Ib_HVS2_Tr(decimal digits=2) Ic_HVS2_Tr(decimal digits=2) I1_HVS2_Tr(decimal digits=2) I2_HVS2_Tr(decimal digits=2) I0_HVS2_Tr(decimal digits=2) Ia_LVS_Tr(decimal digits=2) Ib_LVS_Tr(decimal digits=2) Ic_LVS_Tr(decimal digits=2) I1_LVS_Tr(decimal digits=2) I2_LVS_Tr(decimal digits=2) I0_LVS_Tr(decimal digits=2) Ia_HVS_Tr(decimal digits=2) Ib_HVS_Tr(decimal digits=2) Ic_HVS_Tr(decimal digits=2) Iab_HVS_Tr(decimal digits=2) Ibc_HVS_Tr(decimal digits=2) Ica_HVS_Tr(decimal digits=2) I1_HVS_Tr(decimal digits=2) I2_HVS_Tr(decimal digits=2) I0_HVS_Tr(decimal digits=2) I0_NP_HVS_Tr(decimal digits=2) I0_Gap_HVS_Tr(decimal digits=2) Ua_HVS_Tr(decimal digits=2) Ub_HVS_Tr(decimal digits=2) Uc_HVS_Tr(decimal digits=2) Uab_HVS_Tr(decimal digits=2) Ubc_HVS_Tr(decimal digits=2) Uca_HVS_Tr(decimal digits=2) U1_HVS_Tr(decimal digits=2) U2_HVS_Tr(decimal digits=2) U0_HVS_Tr(decimal digits=2) In In In In A A A A A A A A A A A A A A A A A A A A A A A A A A A A A V V V V V V V V V

Unit

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Address 0042H 0043H 0044H 0045H

Analog Name U0_DeltVT_HVS_Tr(decimal digits=2) U0_DeltVT_LVS_Tr(decimal digits=2) U/F_OvExc_Tr(decimal digits=3) Accu_InvOvExc_Tr(decimal digits=3) % V V

Unit

9.4.3.2 ST Metering Address 1000H 1001H 1002H 1003H 1004H 1005H 1006H 1007H 1008H 1009H 100AH 100BH 100CH 100DH 100EH 100FH 1010H 1011H 1012H 1013H 1014H 1015H 1016H 1017H 1018H 1019H 101AH 101BH 101CH 101DH 101EH 101FH 1020H Analog Name Ida_Diff_ST(decimal digits=2) Idb_Diff_ST(decimal digits=2) Idc_Diff_ST(decimal digits=2) Ira_Diff_ST(decimal digits=2) Irb_Diff_ST(decimal digits=2) Irc_Diff_ST(decimal digits=2) Ida_2ndH(decimal digits=2) Idb_2ndH(decimal digits=2) Idc_2ndH(decimal digits=2) Icorra_HVS_ST(decimal digits=2) Icorrb_HVS_ST(decimal digits=2) Icorrc_HVS_ST(decimal digits=2) Icorra_LVS_ST(decimal digits=2) Icorrb_LVS_ST(decimal digits=2) Icorrc_LVS_ST(decimal digits=2) Reserved Reserved Reserved Id_1stH_REF_ST(decimal digits=2) Ir_REF_ST(decimal digits=2) I0_ST(decimal digits=2) I0_NP_ST(decimal digits=2) Ia_CT1_HVS_ST(decimal digits=2) Ib_CT1_HVS_ST(decimal digits=2) Ic_CT1_HVS_ST(decimal digits=2) I1_CT1_HVS_ST(decimal digits=2) I2_CT1_HVS_ST(decimal digits=2) I0_CT1_HVS_ST(decimal digits=2) Ia_CT2_HVS_ST(decimal digits=2) Ib_CT2_HVS_ST(decimal digits=2) Ic_CT2_HVS_ST(decimal digits=2) I1_CT2_HVS_ST(decimal digits=2) I2_CT2_HVS_ST(decimal digits=2) Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie In In In In A A A A A A A A A A A Unit

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Address 1021H 1022H 1023H 1024H 1025H 1026H 1027H 1028H 1029H 102AH 102BH 102CH 102DH 102EH

Analog Name I0_CT2_HVS_ST(decimal digits=2) Ia_LVS_ST(decimal digits=2) Ib_LVS_ST(decimal digits=2) Ic_LVS_ST(decimal digits=2) I1_LVS_ST(decimal digits=2) I2_LVS_ST(decimal digits=2) I0_LVS_ST(decimal digits=2) I0_NP_LVS_ST(decimal digits=2) Uab_LVS_ST(decimal digits=2) Ubc_LVS_ST(decimal digits=2) Uca_LVS_ST(decimal digits=2) U1_LVS_ST(decimal digits=2) U2_LVS_ST(decimal digits=2) U0_DeltVT_LVS_ST(decimal digits=2) A A A A A A A A V V V V V V

Unit

9.4.3.3 GTU Metering Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H 2007H 2008H 2009H 200AH 200BH 200CH 200DH 200EH 200FH 2010H 2011H 2012H 2013H 2014H 2015H 2016H 2017H Analog Name Ida_Diff_GTU(decimal digits=2) Idb_Diff_GTU(decimal digits=2) Idc_Diff_GTU(decimal digits=2) Ira_Diff_GTU(decimal digits=2) Irb_Diff_GTU(decimal digits=2) Irc_Diff_GTU(decimal digits=2) Ida_2ndH(decimal digits=2) Idb_2ndH(decimal digits=2) Idc_2ndH(decimal digits=2) Ida_5thH(decimal digits=2) Idb_5thH(decimal digits=2) Idc_5thH(decimal digits=2) Icorra_HVS_GTU(decimal digits=2) Icorrb_HVS_GTU(decimal digits=2) Icorrc_HVS_GTU(decimal digits=2) Icorra_NP_Gen(decimal digits=2) Icorrb_NP_Gen(decimal digits=2) Icorrc_NP_Gen(decimal digits=2) Icorra_ST(decimal digits=2) Icorrb_ST(decimal digits=2) Icorrc_ST(decimal digits=2) Ia_HVS_Tr(decimal digits=2) Ib_HVS_Tr(decimal digits=2) Ic_HVS_Tr(decimal digits=2) Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie A A A
361

Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address 2018H 2019H 201AH

Analog Name I1_HVS_Tr(decimal digits=2) I2_HVS_Tr(decimal digits=2) I0_HVS_Tr(decimal digits=2) A A A

Unit

9.4.3.4 Gen Metering Address 3000H 3001H 3002H 3003H 3004H 3005H 3006H 3007H 3008H 3009H 300AH 300BH 300CH 300DH 300EH 300FH 3010H 3011H 3012H 3013H 3014H 3015H 3016H 3017H 3018H 3019H 301AH 301BH 301CH 301DH 301EH 301FH 3020H 3021H 3022H
362

Analog Name Ida_Diff_Gen(decimal digits=2) Idb_Diff_Gen(decimal digits=2) Idc_Diff_Gen(decimal digits=2) Ira_Diff_Gen(decimal digits=2) Irb_Diff_Gen(decimal digits=2) Irc_Diff_Gen(decimal digits=2) Ia_Term_Gen(decimal digits=2) Ib_Term_Gen(decimal digits=2) Ic_Term_Gen(decimal digits=2) I1_Term_Gen(decimal digits=2) I2_Term_Gen(decimal digits=2) I0_Term_Gen(decimal digits=2) Ia_NP_Gen(decimal digits=2) Ib_NP_Gen(decimal digits=2) Ic_NP_Gen(decimal digits=2) I1_NP_Gen(decimal digits=2) I2_NP_Gen(decimal digits=2) I0_NP_Gen(decimal digits=2) Id_TrvDiff_Gen(decimal digits=2) Id_3rdH_TrvDiff_Gen(decimal digits=2) Ida_SPTDiff_Gen(decimal digits=2) Idb_SPTDiff_Gen(decimal digits=2) Idc_SPTDiff_Gen(decimal digits=2) Ira_SPTDiff_Gen(decimal digits=2) Irb_SPTDiff_Gen(decimal digits=2) Irc_SPTDiff_Gen(decimal digits=2) Icorra_SP1_Gen(decimal digits=2) Icorrb_SP1_Gen(decimal digits=2) Icorrc_SP1_Gen(decimal digits=2) Icorra_SP2_Gen(decimal digits=2) Icorrb_SP2_Gen(decimal digits=2) Icorrc_SP2_Gen(decimal digits=2) Ia_SP1_Gen(decimal digits=2) Ib_SP1_Gen(decimal digits=2) Ic_SP1_Gen(decimal digits=2) Ie Ie Ie Ie Ie Ie Ie Ie Ie A A A A A A A A A A A Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie A A A

Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address 3023H 3024H 3025H 3026H 3027H 3028H 3029H 302AH 302BH 302CH 302DH 302EH 302FH 3030H 3031H 3032H 3033H 3034H 3035H 3036H 3037H 3038H 3039H 303AH 303BH 303CH 303DH 303EH 303FH 3040H 3041H 3042H 3043H 3044H 3045H 3046H 3047H 3048H 3049H 304AH 304BH 304CH

Analog Name I1_SP1_Gen(decimal digits=2) I2_SP1_Gen(decimal digits=2) I0_SP1_Gen(decimal digits=2) Ia_SP2_Gen(decimal digits=2) Ib_SP2_Gen(decimal digits=2) Ic_SP2_Gen(decimal digits=2) I1_SP2_Gen(decimal digits=2) I2_SP2_Gen(decimal digits=2) I0_SP2_Gen(decimal digits=2) Ua_VT1_Term_Gen(decimal digits=2) Ub_VT1_Term_Gen(decimal digits=2) Uc_VT1_Term_Gen(decimal digits=2) U1_VT1_Term_Gen(decimal digits=2) U2_VT1_Term_Gen(decimal digits=2) U0_VT1_Term_Gen(decimal digits=2) Ua_VT2_Term_Gen(decimal digits=2) Ub_VT2_Term_Gen(decimal digits=2) Uc_VT2_Term_Gen(decimal digits=2) U1_VT2_Term_Gen(decimal digits=2) U2_VT2_Term_Gen(decimal digits=2) U0_VT2_Term_Gen(decimal digits=2) Uab_VT1_Term_Gen(decimal digits=2) Ubc_VT1_Term_Gen(decimal digits=2) Uca_VT1_Term_Gen(decimal digits=2) Uab_VT2_Term_Gen(decimal digits=2) Ubc_VT2_Term_Gen(decimal digits=2) Uca_VT2_Term_Gen(decimal digits=2) U0_DeltVT1_Term_Gen(decimal digits=2) U0_NP_Gen(decimal digits=2) U0_3rdH_VT1_Term_Gen(decimal digits=2) U0_3rdH_NP_Gen(decimal digits=2) Ud_3rdH_Sta(decimal digits=2) U0_Longl_Gen(decimal digits=2) U0_3rdH_Longl_Gen(decimal digits=2) P_Gen(Signed decimal digits=2) Q_Gen(Signed decimal digits=2) Accu_InvOvLd_Sta(decimal digits=2) Accu_Therm_RotBody(decimal digits=2) U/F_OvExc_Gen(decimal digits=3) Accu_InvOvExc_Gen(decimal digits=2) f_Gen(decimal digits=2) Accu_UF1_Gen(decimal digits=2) % Hz Min A A A A A A A A A V V V V V V V V V V V V V V V V V V V V V V V V V % % % %

Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

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Chapter 9 Communications

Address 304DH 304EH 304FH 3050H 3051H 3052H

Analog Name Accu_UF2_Gen(decimal digits=2) U_RotWdg(Signed decimal digits=1) R_EF_RotWdg(decimal digits=2) Location_EF_RotWdg(decimal digits=2) U1_2ndH_VT1_Term_Gen(decimal digits=2) U2_2ndH_VT1_Term_Gen(decimal digits=2) Min V k % V V

Unit

9.4.3.5 Exc Metering Address 4000H 4001H 4002H 4003H 4004H 4005H 4006H 4007H 4008H 4009H 400AH 400BH 400CH 400DH 400EH 400FH 4010H 4011H 4012H 4013H 4014H 4015H 4016H 4017H 4018H 4019H 401AH 401BH 401CH 401DH 401EH 401FH
364

Analog Name Ida_Diff_Exc(decimal digits=2) Idb_Diff_Exc(decimal digits=2) Idc_Diff_Exc(decimal digits=2) Ira_Diff_Exc(decimal digits=2) Irb_Diff_Exc(decimal digits=2) Irc_Diff_Exc(decimal digits=2) Ida_2ndH(decimal digits=2) Idb_2ndH(decimal digits=2) Idc_2ndH(decimal digits=2) Icorra_S1_Exc(decimal digits=2) Icorrb_S1_Exc(decimal digits=2) Icorrc_S1_Exc(decimal digits=2) Icorra_S2_Exc(decimal digits=2) Icorrb_S2_Exc(decimal digits=2) Icorrc_S2_Exc(decimal digits=2) Ia_S1_Exc(decimal digits=2) Ib_S1_Exc(decimal digits=2) Ic_S1_Exc(decimal digits=2) I1_S1_Exc(decimal digits=2) I2_S1_Exc(decimal digits=2) I0_S1_Exc(decimal digits=2) Ia_S2_Exc(decimal digits=2) Ib_S2_Exc(decimal digits=2) Ic_S2_Exc(decimal digits=2) I1_S2_Exc(decimal digits=2) I2_S2_Exc(decimal digits=2) I0_S2_Exc(decimal digits=2) Uab_ET(decimal digits=2) Ubc_ET(decimal digits=2) Uca_ET(decimal digits=2) U1_ET(decimal digits=2) U2_ET(decimal digits=2) Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie Ie A A A A A A A A A A A A V V V V V

Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address 4020H 4021H 4022H

Analog Name I_RotWdg(Signed integer) I_Exc(decimal digits=2) Accu_Therm_RotWdg(decimal digits=2) A A %

Unit

9.4.4 Fetch settings value of equipment


Function Code: 03H 9.4.4.1 Equipment Settings Address 0000H 0001H 0002H 0003H 0004H 0005H 0006H 0007H 0008H Setting_Group Equip_ID(ASCII Hi Word) Equip_ID(ASCII Mi Word) Equip_ID(ASCII Lo Word) Comm_Addr COM1_Baud COM2_Baud Printer_Baud Protocol Bit0: COM1 870-5-103 Protocal Bit1: COM1 LFP Protocal Bit2: COM1 Modbus Protocal Bit4: COM2 870-5-103 Protocal Bit5: COM2 LFP Protocal Bit6: COM2 Modbus Protocal 0009H Control Word Bit0: En_Auto_Print Bit1: En_Net_Print Bit3: En_Remote_Cfg Bit4: GPS_Pulse 9.4.4.2 System Settings (1) Protection Configuration Address 1000H Protection Word 1 Config Setting Name Bit0:En_Diff_GTU Bit1:En_Diff_Tr Bit2:En_PPF_Tr Bit3:En_EF_Tr Bit4:En_OvExc_Tr Bit5:En_Diff_Gen Bit6:En_SPTDiff_Gen Bit7:En_IntTurn_Gen Bit8:En_PPF_Gen Bit9:En_EF_Sta
NANJING NARI-RELAYS ELECTRIC CO., LTD

Setting Name

Unit

bps bps bps

Unit

365

Chapter 9 Communications

Address

Setting Name Bit10:En_EF_RotWdg Bit11:En_OvLd_Sta Bit12:En_NegOC_Sta Bit13:En_LossExc_Gen Bit14:En_OOS_Gen Bit15:En_VoltProt_Gen

Unit

1001H

Protection Word 2

Config

Bit0:En_OvExc_Gen Bit1:En_PwrProt_Gen Bit2:En_FreqProt_Gen Bit3:En_StShut_Gen Bit4:En_AccEnerg_Gen Bit6:En_Diff_Exc Bit7:En_Bak_Exc Bit8:En_OvLd_RotWdg Bit9:En_Diff_ST Bit10:En_Bak_HVS_ST Bit11:En_Bak_LVS_ST Bit12:En_REF_ST Bit13:En_MechRly Bit14:En_PoleDisagr_CB Bit15:En_VTComp_Term_Gen

1002H

Reserved

(2)

Tr System Settings Address 1003H 1004H 1005H 1006H 1007H 1008H 1009H 100AH 100BH 100CH 100DH 100EH 100FH 1010H 1011H Setting Name Sn_Tr(decimal digits=1) U1n_HVS_Tr(decimal digits=2) U1n_LVS_Tr(decimal digits=2) U1n_VT_HVS_Tr(decimal digits=2) U2n_VT_HVS_Tr U2n_DeltVT_HVS_Tr I1n_CT_HVS1_Tr(integer) I2n_CT_HVS1_Tr I1n_CT_HVS2_Tr(integer) I2n_CT_HVS2_Tr I1n_CT_HVS_Tr(integer) I2n_CT_HVS_Tr I1n_CT_LVS_Tr(integer) I2n_CT_LVS_Tr I1n_CT_NP_Tr(integer) MVA kV kV kV V V A A A A A A A A A Unit

366

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Chapter 9 Communications

Address 1012H 1013H 1014H 1015H I2n_CT_NP_Tr

Setting Name A A A I1n_CT_Gap_Tr(integer) I2n_CT_Gap_Tr Control Word Bit0:Yd11_Conn_Tr Bit1:Yyd11_Conn_Tr Bit2:Opt_GCB

Unit

(3)

Gen System Settings Address 1016H 1017H 1018H 1019H 101AH 101BH 101CH 101DH 101EH 101FH 1020H 1021H 1022H 1023H 1024H 1025H 1026H 1027H 1028H 1029H 102AH 102BH fn_Gen Sn_Gen(decimal digits=1) PF_Gen(decimal digits=2) U1n_Gen(decimal digits=2) U1n_VT_Term_Gen(decimal digits=2) U2n_VT_Term_Gen U2n_DeltVT_Term_Gen U1n_VT_NP_Gen(decimal digits=2) U2n_VT_NP_Gen(decimal digits=2) I1n_CT_Term_Gen(integer) I2n_CT_Term_Gen k_SP1_Gen(decimal digits=2) k_SP2_Gen(decimal digits=2) I1n_CT_SP1_Gen(integer) I2n_CT_SP1_Gen I1n_CT_SP2_Gen(integer) I2n_CT_SP2_Gen I1n_CT_TrvDiff_Gen(integer) I2n_CT_TrvDiff_Gen I1n_RotWdg(integer) U2n_Shunt_RotWdg(decimal digits=2) U1n_Exc(decimal digits=2) kV kV V V kV V A A % % A A A A A A A mV V Setting Name Hz MW Unit

(4)

ST System Settings Address 102CH 102DH 102EH 102FH 1030H Setting Name Sn_ST(decimal digits=2) U1n_HVS_ST(decimal digits=2) U1n_LVS_ST(decimal digits=2) U1n_Br2_ST(decimal digits=2) (Reserved) U1n_VT_LVS_ST(decimal digits=2) MVA kV kV kV kV
367

Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address 1031H 1032H 1033H 1034H 1035H 1036H 1037H 1038H 1039H 103AH 103BH 103CH 103DH 103EH 103FH 1040H 1041H 1042H U2n_VT_LVS_ST

Setting Name V V kV V V A A A A A A A A A A A A U2n_DeltVT_LVS_ST U1n_VT_Br2_ST(decimal digits=2)(Reserved) U2n_VT_Br2_ST(Reserved) U2n_DeltVT_Br2_ST(Reserved) I1n_CT2_HVS_ST(integer) I2n_CT2_HVS_ST I1n_CT1_HVS_ST(integer) I2n_CT1_HVS_ST I1n_CT_LVS_ST(integer) I2n_CT_LVS_ST I1n_CT_Br2_ST(integer) (Reserved) I2n_CT_Br2_ST(Reserved) I1n_CT_NP_LVS_ST(integer) I2n_CT_NP_LVS_ST I1n_CT_NP_Br2_ST(integer) (Reserved) I2n_CT_NP_Br2_ST(Reserved) Control Word Bit0:Yyy12_Conn_ST Bit1:Ddd12_Conn_ST Bit2:Dyy11_Conn_ST Bit3:Ydd11_Conn_ST Bit4:Dyy1_Conn_ST

Unit

(5)

Exc System Settings Address 1043H 1044H 1045H 1046H 1047H 1048H 1049H 104AH 104BH 104CH 104DH 104EH fn_Exciter Sn_Exc(decimal digits=2) U1n_S1_Exc(decimal digits=2) U1n_S2_Exc(decimal digits=2) U1n_VT_Exc(decimal digits=2) U2n_VT_Exc U2n_DeltVT_Exc I1n_CT_S1_Exc(integer) I2n_CT_S1_Exc I1n_CT_S2_Exc(integer) I2n_CT_S2_Exc Control Word Bit0:Opt_Exc Bit1:Yy12_Conn_ET Bit2:Dd12_Conn_ET Bit3:Dy11_Conn_ET Setting Name Hz MVA kV kV kV V V A A A A Unit

368

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address

Setting Name Bit4:Yd11_Conn_ET Bit5:Dy1_Conn_ET

Unit

9.4.4.3 Prot Settings (1) GTU Diff Prot Settings Address 2000H 2001H 2002H 2003H 2004H 2005H 2006H Setting Name I_Pkp_PcntDiff_GTU(decimal digits=2) I_InstDiff_GTU(decimal digits=2) Slope1_PcntDiff_GTU(decimal digits=2) Slope2_PcntDiff_GTU(decimal digits=2) k_Harm_PcntDiff_GTU(decimal digits=2) TrpLog_Diff_GTU Control Word Bit0:En_InstDiff_GTU Bit1:En_PcntDiff_GTU Bit2:Opt_Inrush_Ident_GTU Bit3:Opt_CTS_Blk_PcntDiff_GTU Ie Ie Unit

(2)

Tr Diff Prot Settings Address 2007H 2008H 2009H 200AH 200BH 200CH 200DH Setting Name I_Pkp_PcntDiff_Tr(decimal digits=2) I_InstDiff_Tr(decimal digits=2) Slope1_PcntDiff_Tr(decimal digits=2) Slope2_PcntDiff_Tr(decimal digits=2) k_Harm_PcntDiff_Tr(decimal digits=2) TrpLog_Diff_Tr Control Word Bit0:En_InstDiff_Tr Bit1:En_PcntDiff_Tr Bit2:En_DPFC_Diff_Tr Bit3:Opt_Inrush_Ident_Tr Bit4:Opt_CTS_Blk_PcntDiff_Tr Ie Ie Unit

(3)

Tr PPF Bak Prot Settings Address 200EH 200FH 2010H 2011H Setting Name V_NegOV_VCE_Tr(decimal digits=2) Vpp_VCE_Tr(decimal digits=2) I_OC1_Tr(decimal digits=2) t_OC11_Tr(decimal digits=2) V V A S
369

Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address 2012H 2013H 2014H 2015H 2016H 2017H 2018H 2019H 201AH 201BH 201CH 201DH 201EH 201FH 2020H 2021H 2022H 2023H 2024H 2025H 2026H 2027H 2028H 2029H 202AH TrpLog_OC11_Tr

Setting Name t_OC12_Tr(decimal digits=2) TrpLog_OC12_Tr I_OC2_Tr(decimal digits=2) t_OC21_Tr(decimal digits=2) TrpLog_OC21_Tr t_OC22_Tr(decimal digits=2) TrpLog_OC22_Tr Z1_Fwd_Tr(decimal digits=2) Z1_Rev_Tr(decimal digits=2) t_Z11_Tr(decimal digits=2) TrpLog_Z11_Tr t_Z12_Tr(decimal digits=2) TrpLog_Z12_Tr Z2_Fwd_Tr(decimal digits=2) Z2_Rev_Tr(decimal digits=2) t_Z21_Tr(decimal digits=2) TrpLog_Z21_Tr I_Alm_OvLd_Tr(decimal digits=2) t_Alm_OvLd_Tr(decimal digits=2) I_InitCool1_OvLd_Tr(decimal digits=2) t_InitCool1_OvLd_Tr(decimal digits=2) I_InitCool2_OvLd_Tr(decimal digits=2) t_InitCool2_OvLd_Tr(decimal digits=2) Control Word Bit0:En_VCE_Ctrl_OC1_Tr Bit1:En_VCE_Ctrl_OC2_Tr Bit2:En_LVS.VCE_Ctrl_OC_Tr Bit3:En_Mem_Curr_Tr Bit4:Opt_VTS_Ctrl_OC_Tr Bit5:En_OvLd_Tr Bit6:En_InitCool_OvLd_Tr A S A S A S S S S S A S S

Unit

(4)

Tr EF Bak Prot Settings Address 202BH 202CH 202DH 202EH 202FH 2030H Setting Name V_ROV_VCE_Tr(decimal digits=2) I_ROC1_Tr(decimal digits=2) t_ROC11_Tr(decimal digits=2) TrpLog_ROC11_Tr t_ROC12_Tr(decimal digits=2) TrpLog_ROC12_Tr S V A S Unit

370

NANJING NARI-RELAYS ELECTRIC CO., LTD

Chapter 9 Communications

Address 2031H 2032H 2033H 2034H 2035H 2036H 2037H 2038H 2039H 203AH 203BH 203CH 203DH 203EH 203FH 2040H 2041H 2042H 2043H 2044H 2045H 2046H 2047H

Setting Name I_ROC2_Tr(decimal digits=2) t_ROC21_Tr(decimal digits=2) TrpLog_ROC21_Tr t_ROC22_Tr(decimal digits=2) TrpLog_ROC22_Tr I_ROC3_Tr(decimal digits=2) t_ROC31_Tr(decimal digits=2) TrpLog_ROC31_Tr t_ROC32_Tr(decimal digits=2) TrpLog_ROC32_Tr V_ROV_Gap_Tr(decimal digits=2) t_ROV1_Gap_Tr(decimal digits=2) TrpLog_ROV1_Gap_Tr t_ROV2_Gap_Tr(decimal digits=2) TrpLog_ROV2_Gap_Tr I_Alm_REF_Tr(decimal digits=2) I_Pkp_PcntREF_Tr(decimal digits=2) I_InstREF_Tr(decimal digits=2) Slope_PcntREF_Tr(decimal digits=2) TrpLog_REF_Tr V_Alm_ROV_LVS_Tr(decimal digits=2) t_Alm_ROV_LVS_Tr(decimal digits=2) Control Word Bit0:En_ VCE.ROV _Ctrl_ROC1_Tr Bit1:En_Dir_Ctrl_ROC1_Tr Bit2:En_VCE.ROV_Ctrl_ROC2_Tr Bit3:En_Dir_Ctrl_ROC2_Tr Bit5:En_Alm_ROV_LVS_Tr Bit7:En_BI_Ctrl_ROC_Gap_Tr Bit8:En_InstREF_Tr Bit9:En_PcntREF_Tr V S In In S V S S A S S A S

Unit

(5)

Tr OvExc Prot Settings Address 2048H 2049H 204AH 204BH 204CH 204DH 204EH Setting Name k_OvExc1_Tr(decimal digits=2) t_OvExc1_Tr(decimal digits=1) TrpLog_OvExc1_Tr k_OvExc2_Tr(decimal digits=2) t_OvExc2_Tr(decimal digits=1) TrpLog_OvExc2_Tr k_Alm_OvExc_Tr(decimal digits=2) S S Unit

NANJING NARI-RELAYS ELECTRIC CO., LTD

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Chapter 9 Communications

Address 204FH 2050H 2051H 2052H 2053H 2054H 2055H 2056H 2057H 2058H 2059H 205AH 205BH 205CH 205DH 205EH 205FH 2060H

Setting Name t_Alm_OvExc_Tr(decimal digits=1) k0_InvOvExc_Tr(decimal digits=2) t0_InvOvExc_Tr(decimal digits=1) k1_InvOvExc_Tr(decimal digits=2) t1_InvOvExc_Tr(decimal digits=1) k2_InvOvExc_Tr(decimal digits=2) t2_InvOvExc_Tr(decimal digits=1) k3_InvOvExc_Tr(decimal digits=2) t3_InvOvExc_Tr(decimal digits=1) k4_InvOvExc_Tr(decimal digits=2) t4_InvOvExc_Tr(decimal digits=1) k5_InvOvExc_Tr(decimal digits=2) t5_InvOvExc_Tr(decimal digits=1) k6_InvOvExc_Tr(decimal digits=2) t6_InvOvExc_Tr(decimal digits=1) k7_InvOvExc_Tr(decimal digits=2) t7_InvOvExc_Tr(decimal digits=1) TrpLog_InvOvExc_Tr S S S S S S S S S

Unit

(6)

Gen Diff Prot Settings Address 2061H 2062H 2063H 2064H 2065H 2066H Setting Name I_Pkp_PcntDiff_Gen(decimal digits=2) I_InstDiff_Gen(decimal digits=2) Slope1_PcntDiff_Gen(decimal digits=2) Slope2_PcntDiff_Gen(decimal digits=2) TrpLog_Diff_Gen Control Word Bit0:En_InstDiff_Gen Bit1:En_PcntDiff_Gen Bit2:En_DPFC_Diff_Gen Bit3:Opt_CTS_Blk_PcntDiff_Gen Ie Ie Unit

(7)

Gen SPTDiff Prot Settings Address 2067H 2068H 2069H 206AH 206BH 206CH Setting Name I_Pkp_PcntSPTDiff_Gen(decimal digits=2) I_InstSPTDiff_Gen(decimal digits=2) Slope1_PcntSPTDiff_Gen(decimal digits=2) Slope2_PcntSPTDiff_Gen(decimal digits=2) TrpLog_SPTDiff_Gen Control Bit0:En_InstSPTDiff_Gen
NANJING NARI-RELAYS ELECTRIC CO., LTD

Unit Ie Ie

372

Chapter 9 Communications

Address Word

Setting Name Bit1:En_PcntSPTDiff_Gen Bit2:Opt_CTS_Blk_PcntSPTDiff_Gen

Unit

(8)

Gen IntTurn Prot Settings Address 206DH 206EH 206FH 2070H 2071H 2072H 2073H 2074H Setting Name I_SensTrvDiff_Gen(decimal digits=2) I_UnsensTrvDiff_Gen(decimal digits=2) t_TrvDiff_Gen(decimal digits=2) V_SensROV_Longl_Gen(decimal digits=2) V_UnsensROV_Longl_Gen(decimal digits=2) t_ROV_Longl_Gen(decimal digits=2) TrpLog_IntTurn_Gen Control Word Bit0:En_SensTrvDiff_Gen Bit1:En_UnsensTrvDiff_Gen Bit2:En_SensROV_Longl_Gen Bit3:En_UnsensROV_Longl_Gen Bit4:En_DPFC_IntTurn_Gen A A S V V S Unit

(9)

Gen PPF Bak Prot Settings Address 2075H 2076H 2077H 2078H 2079H 207AH 207BH 207CH 207DH 207EH 207FH 2080H 2081H 2082H 2083H 2084H 2085H Setting Name V_NegOV_VCE_Gen(decimal digits=2) Vpp_VCE_Gen(decimal digits=2) I_OC1_Gen(decimal digits=2) t_OC1_Gen(decimal digits=2) TrpLog_OC1_Gen I_OC2_Gen(decimal digits=2) t_OC2_Gen(decimal digits=2) TrpLog_OC2_Gen Z1_Fwd_Gen(decimal digits=2) Z1_Rev_Gen(decimal digits=2) t_Z1_Gen(decimal digits=2) TrpLog_Z1_Gen Z2_Fwd_Gen(decimal digits=2) Z2_Rev_Gen(decimal digits=2) t_Z2_Gen(decimal digits=2) TrpLog_Z2_Gen Control Word Bit0:En_VCE_Ctrl_OC1_Gen Bit1:En_VCE_Ctrl_OC2_Gen Bit2:En_HVS.VCE_Ctrl_OC_Gen S S A S V V A S Unit

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Address

Setting Name Bit3:Opt_VTS_Ctrl_OC_gen Bit4:Opt_ExcMode_Gen Bit5:En_BO_OC2_Gen

Unit

(10) Sta EF Prot Settings Address 2086H 2087H 2088H 2089H 208AH 208BH 208CH 208DH 208EH Setting Name V_SensROV_Sta(decimal digits=2) V_UnsensROV_Sta(decimal digits=2) t_ROV_Sta(decimal digits=2) k_V3rdHRatio_PreSync_Sta(decimal digits=2) k_V3rdHRatio_PostSync_Sta(decimal digits=2) k_V3rdHDiff_Sta(decimal digits=2) t_V3rdH_Sta(decimal digits=2) TrpLog_EF_Sta Control Word Bit0:En_Alm_ROV_Sta Bit1:En_Trp_ROV_Sta Bit2:En_Alm_V3rdHRatio_Sta Bit3:En_Alm_V3rdHDiff_Sta Bit4:En_Trp_V3rdHRatio_Sta Bit5:En_Trp_UnsensRov_Sta S V V S Unit

(11) RotWdg EF Prot Settings Address 208FH 2090H 2091H 2092H 2093H 2094H 2095H Setting Name R_Sens_1PEF_RotWdg(decimal digits=2) R_1PEF_RotWdg(decimal digits=2) t_1PEF_RotWdg(decimal digits=2) V2ndH_VCE_2PEF_RotWdg(decimal digits=2) t_2PEF_RotWdg(decimal digits=2) TrpLog_EF_RotWdg Control Word Bit0:En_Alm_Sens_1PEF_RotWdg Bit1:En_Alm_1PEF_RotWdg Bit2:En_Trp_1PEF_RotWdg Bit3:En_2PEF_RotWdg Bit4:En_VCE_2PEF_RotWdg k k S v S Unit

(12) Sta OvLd Prot Settings Address 2096H


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Setting Name I_OvLd_Sta(decimal digits=2) A

Unit

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Address 2097H 2098H 2099H 209AH 209BH 209CH 209DH 209EH 209FH TrpLog_OvLd_Sta

Setting Name t_OvLd_Sta(decimal digits=2) I_Alm_OvLd_Sta(decimal digits=2) t_Alm_OvLd_Sta(decimal digits=2) I_InvOvLd_Sta(decimal digits=2) tmin_InvOvLd_Sta(decimal digits=2) A_Therm_Sta(decimal digits=2) Kb_Therm_Sta(decimal digits=2) TrpLog_InvOvLd_Sta S A S A S

Unit

(13) Sta NegOC Prot Settings Address 20A0H 20A1H 20A2H 20A3H 20A4H 20A5H 20A6H 20A7H 20A8H 20A9H Setting Name I_NegOC_Sta(decimal digits=2) t_NegOC_Sta(decimal digits=2) TrpLog_NegOC_Sta I_Alm_NegOC_Sta(decimal digits=2) t_Alm_NegOC_Sta(decimal digits=2) I_InvNegOC_Sta(decimal digits=2) I2_Perm_Sta(decimal digits=2) tmin_InvNegOC_Sta(decimal digits=2) A_Therm_RotBody(decimal digits=2) TrpLog_InvNegOC_Sta A S A A S A S Unit

(14) Gen LossExc Prot Settings Address 20AAH 20ABH 20ACH 20ADH 20AEH 20AFH 20B0H 20B1H 20B2H 20B3H 20B4H 20B5H 20B6H 20B7H Setting Name X1_LossExc_Gen(decimal digits=2) X2_LossExc_Gen(decimal digits=2) Q_RevQ_LossExc_Gen(decimal digits=2) V_RotUV_LossExc_Gen(decimal digits=2) V_RotNoLoad_LossExc_Gen(decimal digits=2) k_RotUV_LossExc_Gen(decimal digits=2) V_BusUV_LossExc_Gen(decimal digits=2) P_UP_LossExc_Gen(decimal digits=2) t_LossExc1_Gen(decimal digits=2) t_LossExc2_Gen(decimal digits=2) t_LossExc3_Gen(decimal digits=1) TrpLog_LossExc1_Gen TrpLog_LossExc2_Gen TrpLog_LossExc3_Gen
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Unit % V V V % S S S

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Address 20B8H Control Word

Setting Name Bit0:En_Z_LossExc1_Gen Bit1:En_RotUV_LossExc1_Gen Bit2:En_P_LossExc1_Gen Bit3:En_BusUV_LossExc2_Gen Bit4:En_Z_LossExc2_Gen Bit5:En_RotUV_LossExc2_Gen Bit6:En_Z_LossExc3_Gen Bit7:En_RotUV_LossExc3_Gen Bit8:En_Alm_LossExc1_Gen Bit9:Opt_Z_LossExc_Gen Bit10:En_RevQ_LossExc_Gen Bit11:Opt_UV_LossExc_Gen

Unit

(15) Gen OOS Prot Settings Address 20B9H 20BAH 20BBH 20BCH 20BDH 20BEH 20BFH 20C0H 20C1H 20C2H Setting Name Za_OOS_Gen(decimal digits=2) Zb_OOS_Gen(decimal digits=2) Zc_OOS_Gen(decimal digits=2) _Reach_OOS_Gen(decimal digits=2) _Inner_OOS_Gen(decimal digits=2) n_Slip_Ext_OOS_Gen(integer) n_Slip_Int_OOS_Gen(integer) Ibrk_TCB(decimal digits=2) TrpLog_OOS_Gen Control Word Bit0:En_Alm_Ext_OOS_Gen Bit1:En_Trp_Ext_OOS_Gen Bit2:En_Alm_Int_OOS_Gen Bit3:En_Trp_Int_OOS_Gen A Unit

(16) Gen Volt Prot Settings Address 20C3H 20C4H 20C5H 20C6H 20C7H 20C8H 20C9H 20CAH
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Setting Name V_OV1_Gen(decimal digits=2) t_OV1_Gen(decimal digits=2) TrpLog_OV1_Gen V_OV2_Gen(decimal digits=2) t_OV2_Gen(decimal digits=2) TrpLog_OV2_Gen V_UV_Gen(decimal digits=2) t_UV_Gen(decimal digits=2) V S V S V S

Unit

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Address 20CBH TrpLog_UV_Gen

Setting Name

Unit

(17) Gen OvExc Prot Settings Address 20CCH 20CDH 20CEH 20CFH 20D0H 20D1H 20D2H 20D3H 20D4H 20D5H 20D6H 20D7H 20D8H 20D9H 20DAH 20DBH 20DCH 20DDH 20DEH 20DFH 20E0H 20E1H 20E2H 20E3H 20E4H Setting Name k_OvExc1_Gen(decimal digits=2) t_OvExc1_Gen(decimal digits=1) TrpLog_OvExc1_Gen k_OvExc2_Gen(decimal digits=2) t_OvExc2_Gen(decimal digits=1) TrpLog_OvExc2_Gen k_Alm_OvExc_Gen(decimal digits=2) t_Alm_OvExc_Gen(decimal digits=1) k0_InvOvExc_Gen(decimal digits=2) t0_InvOvExc_Gen(decimal digits=1) k1_InvOvExc_Gen(decimal digits=2) t1_InvOvExc_Gen(decimal digits=1) k2_InvOvExc_Gen(decimal digits=2) t2_InvOvExc_Gen(decimal digits=1) k3_InvOvExc_Gen(decimal digits=2) t3_InvOvExc_Gen(decimal digits=1) k4_InvOvExc_Gen(decimal digits=2) t4_InvOvExc_Gen(decimal digits=1) k5_InvOvExc_Gen(decimal digits=2) t5_InvOvExc_Gen(decimal digits=1) k6_InvOvExc_Gen(decimal digits=2) t6_InvOvExc_Gen(decimal digits=1) k7_InvOvExc_Gen(decimal digits=2) t7_InvOvExc_Gen(decimal digits=1) TrpLog_InvOvExc_Gen S S S S S S S S S S S Unit

(18) Gen Pwr Prot Settings Address 20E5H 20E6H 20E7H 20E8H 20E9H 20EAH 20EBH Setting Name P_RevP_Gen(decimal digits=2) t_Alm_RevP_Gen(decimal digits=1) t_Trp_RevP_Gen(decimal digits=1) TrpLog_RevP_Gen P_UP_Gen(decimal digits=2) t_UP_Gen(decimal digits=2) TrpLog_UP_Gen
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Unit % S S % M

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Address 20ECH 20EDH 20EEH

Setting Name P_SeqTrp_RevP_Gen(decimal digits=2) t_SeqTrp_RevP_Gen(decimal digits=2) TrpLog_SeqTrp_RevP_Gen % S

Unit

(19) Gen Freq Prot Settings Address 20EFH 20F0H 20F1H 20F2H 20F3H 20F4H 20F5H 20F6H 20F7H 20F8H 20F9H 20FAH 20FBH 20FCH 20FDH Setting Name f_UF1_Gen(decimal digits=2) t_UF1_Gen(decimal digits=2) f_UF2_Gen(decimal digits=2) t_UF2_Gen(decimal digits=2) f_UF3_Gen(decimal digits=2) t_UF3_Gen(decimal digits=2) f_UF4_Gen(decimal digits=2) t_UF4_Gen(decimal digits=2) TrpLog_UF_Gen f_OF1_Gen(decimal digits=2) t_OF1_Gen(decimal digits=2) f_OF2_Gen(decimal digits=2) t_OF2_Gen(decimal digits=2) TrpLog_OF_Gen Control Word Bit0:En_Alm_UF1_Gen Bit1:En_Trp_UF1_Gen Bit2:En_Alm_UF2_Gen Bit3:En_Trp_UF2_Gen Bit4:En_Alm_UF3_Gen Bit5:En_Trp_UF3_Gen Bit6:En_Alm_UF4_Gen Bit7:En_Trp_UF4_Gen Bit8:En_Alm_OF1_Gen Bit9:En_Trp_OF1_Gen Bit10:En_Alm_OF2_Gen Bit11:En_Trp_OF2_Gen Bit12:En_BO_UC_OvSp_Gen Hz M Hz S Hz M Hz M Hz S Hz S Unit

(20) Gen StShut Prot Settings Address 20FEH 20FFH 2100H


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Setting Name f_UF_StShut_Gen(decimal digits=2) I_TrDiff_StShut_Gen(decimal digits=2) I_STDiff_StShut_Gen(decimal digits=2) Hz Ie Ie

Unit

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Address 2101H 2102H 2103H 2104H 2105H 2106H 2107H 2108H

Setting Name I_GenDiff_StShut_Gen(decimal digits=2) I_SPTDiff_StShut_Gen(decimal digits=2) I_ExcDiff_StShut_Gen(decimal digits=2) TrpLog_Diff_StShut_Gen V_StaROV_StShut_Gen(decimal digits=2) t_StaROV_StShut_Gen(decimal digits=2) TrpLog_StaROV_StShut_Gen Control Word Bit0:En_TrDiff_StShut_Gen Bit1:En_STDiff_StShut_Gen Bit2:En_GenDiff_StShut_Gen Bit3:En_SPTDiff_StShut_Gen Bit4:En_ExcDiff_StShut_Gen Bit5:En_StaROV_StShut_Gen Bit6:En_UF_Ctrl_StShut_Gen V S Ie Ie Ie

Unit

(21) Gen AccEnerg Prot Settings Address 2109H 210AH 210BH 210CH 210DH 210EH 210FH 2110H 2111H 2112H 2113H Setting Name f_UF_AccEnerg_Gen(decimal digits=2) I_OC_AccEnerg_Gen(decimal digits=2) Ibrk_TCB(decimal digits=2) t_AccEnerg_Gen(decimal digits=2) TrpLog_AccEnerg_Gen I_NegOC_Flash_TCB(decimal digits=2) t_Flash1_TCB(decimal digits=2) TrpLog_Flash1_TCB t_Flash2_TCB(decimal digits=2) TrpLog_Flash2_TCB Control Word Bit0:En_UF_Ctrl_AccEnerg_Gen Bit1:En_CB_Ctrl_AccEnerg_Gen Bit2:En_Ibrk_Ctrl_Trp_TCB S A S Hz A A S Unit

(22) Exc Diff Prot Settings Address 2114H 2115H 2116H 2117H 2118H 2119H Setting Name I_Pkp_PcntDiff_Exc(decimal digits=2) I_InstDiff_Exc(decimal digits=2) Slope1_PcntDiff_Exc(decimal digits=2) Slope2_PcntDiff_Exc(decimal digits=2) k_Harm_PcntDiff_Exc(decimal digits=2) TrpLog_Diff_Exc
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Address 211AH Control Word

Setting Name Bit0:En_InstDiff_Exc Bit1:En_PcntDiff_Exc Bit2:Opt_Inrush_Ident_Exc Bit3:Opt_CTS_Blk_PcntDiff_Exc

Unit

(23) Exc Bak Prot Settings Address 211BH 211CH 211DH 211EH 211FH 2120H 2121H 2122H 2123H Setting Name V_NegOV_VCE_Exc(decimal digits=2) Vpp_VCE_Exc(decimal digits=2) I_OC1_Exc(decimal digits=2) t_OC1_Exc(decimal digits=2) TrpLog_OC1_Exc I_OC2_Exc(decimal digits=2) t_OC2_Exc(decimal digits=2) TrpLog_OC2_Exc Control Word Bit0:En_VCE_Ctrl_OC1_Exc Bit1:En_VCE_Ctrl_OC2_Exc Bit2:En_Mem_Curr_Exc Bit3:Opt_VTS_Ctrl_OC_Exc Bit4:Opt_AC_Input_S1_Exc Bit5:Opt_AC_Input_S2_Exc A S V V A S Unit

(24) RotWdg OvLd Prot Settings Address 2124H 2125H 2126H 2127H 2128H 2129H 212AH 212BH 212CH 212DH 212EH Setting Name I_OvLd_RotWdg(decimal digits=2) t_OvLd_RotWdg(decimal digits=2) TrpLog_OvLd_RotWdg I_Alm_OvLd_RotWdg(decimal digits=2) t_Alm_OvLd_RotWdg(decimal digits=2) I_InvOvLd_RotWdg(decimal digits=2) tmin_InvOvLd_RotWdg(decimal digits=2) A_Therm_RotWdg(decimal digits=2) Ib_InvOvLd_RotWdg(decimal digits=2) TrpLog_InvOvLd_RotWdg Control Word Bit0:Opt_AC_Input_RotWdg Bit1:Opt_DC_Input_RotWdg Bit2:Opt_AC_Input_S1_RotWdg Bit3:Opt_AC_Input_S2_RotWdg A A S A S A S Unit

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(25) ST Diff Prot Settings Address 212FH 2130H 2131H 2132H 2133H 2134H 2135H Setting Name I_Pkp_PcntDiff_ST(decimal digits=2) I_InstDiff_ST(decimal digits=2) Slope1_PcntDiff_ST(decimal digits=2) Slope2_PcntDiff_ST(decimal digits=2) k_Harm_PcntDiff_ST(decimal digits=2) TrpLog_Diff_ST Control Word Bit0:En_InstDiff_ST Bit1:En_PcntDiff_ST Bit2:Opt_Inrush_Ident_ST Bit3:Opt_CTS_Blk_PcntDiff_ST Ie Ie Unit

(26) ST HVS Bak Prot Settings Address 2136H 2137H 2138H 2139H 213AH 213BH 213CH 213DH 213EH 213FH 2140H 2141H 2142H 2143H 2144H Setting Name V_NegOV_VCE_HVS_ST(decimal digits=2) Vpp_VCE_HVS_ST(decimal digits=2) I_OC1_HVS_ST(decimal digits=2) t_OC1_HVS_ST(decimal digits=2) TrpLog_OC1_HVS_ST I_OC2_HVS_ST(decimal digits=2) t_OC2_HVS_ST(decimal digits=2) TrpLog_OC2_HVS_ST I_Alm_OvLd_HVS_ST(decimal digits=2) t_Alm_OvLd_HVS_ST(decimal digits=2) I_InitCool1_OvLd_HVS_ST(decimal digits=2) t_InitCool1_OvLd_HVS_ST(decimal digits=2) I_InitCool2_OvLd_HVS_ST(decimal digits=2) t_InitCool2_OvLd_HVS_ST(decimal digits=2) Control Word Bit0:En_VCE_Ctrl_OC1_HVS_ST Bit1:En_VCE_Ctrl_OC2_HVS_ST Bit2:En_Mem_Curr_HVS_ST Bit3:Opt_VTS_Ctrl_OC_HVS_ST Bit4:En_Alm_OvLd_HVS_ST Bit5:En_InitCool_OvLd_HVS_ST Bit7:En_LVSProt_Blk_OC1_HVS_ST A S A S A S A S V V A S Unit

(27) ST LVS Bak Prot Settings

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Address 2145H 2146H 2147H 2148H 2149H 214AH 214BH 214CH 214DH 214EH 214FH 2150H 2151H 2152H 2153H 2154H 2155H 2156H 2157H

Setting Name V_NegOV_VCE_LVS_ST(decimal digits=2) Vpp_VCE_LVS_ST(decimal digits=2) I_OC1_LVS_ST(decimal digits=2) t_OC1_LVS_ST(decimal digits=2) TrpLog_OC1_LVS_ST I_OC2_LVS_ST(decimal digits=2) t_OC2_LVS_ST(decimal digits=2) TrpLog_OC2_LVS_ST I_ROC1_LVS_ST(decimal digits=2) t_ROC1_LVS_ST(decimal digits=2) TrpLog_ROC1_LVS_ST I_ROC2_LVS_ST(decimal digits=2) t_ROC2_LVS_ST(decimal digits=2) TrpLog_ROC2_LVS_ST I_OvLd_LVS_ST(decimal digits=2) t_OvLd_LVS_ST(decimal digits=2) V_ROV_LVS_ST(decimal digits=2) t_ROV_LVS_ST(decimal digits=2) Control Word Bit0:En_VCE_Ctrl_OC1_LVS_ST Bit1:En_VCE_Ctrl_OC2_LVS_ST Bit2:Opt_VTS_Ctrl_OC_LVS_ST Bit3:En_Alm_OvLd_LVS_ST Bit4:En_Alm_ROV_LVS_ST A S V S A S A S A S V V A S

Unit

(28) ST REF Prot Settings Address 2158H 2159H 215AH 215BH 215CH 215DH 215EH 215FH 2160H 2161H 2162H 2163H 2164H 2165H Setting Name I_Alm_REF_ST(decimal digits=2) I_Pkp_PcntREF_ST(decimal digits=2) I_InstREF_ST(decimal digits=2) Slope_PcntREF_ST(decimal digits=2) TrpLog_REF_ST Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) In In In Unit

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Address 2166H 2167H 2168H 2169H 216AH

Setting Name Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Reserved(decimal digits=2) Control Word Bit0:En_InstREF_ST Bit1:En_PcntREF_ST

Unit

(29) MechRly REF Prot Settings Address 216BH 216CH 216DH 216EH 216FH 2170H 2171H 2172H 2173H TrpLog_MechRly1 t_MechRly2(decimal digits=1) TrpLog_MechRly2 t_MechRly3(decimal digits=1) TrpLog_MechRly3 t_MechRly4(decimal digits=1) TrpLog_MechRly4 Control Word Bit0:En_Supv_MechRly S S S Setting Name t_MechRly1(decimal digits=1) S Unit

(30) PoleDisagr Prot Settings Address 2174H 2175H 2176H 2177H 2178H 2179H 217AH 217BH Setting Name I_OC_PD(decimal digits=2) I_NegOC_PD(decimal digits=2) I_ROC_PD(decimal digits=2) t_PD1(decimal digits=2) TrpLog_PD1 t_PD2(decimal digits=2) TrpLog_PD2 Control Word Bit0:En_NegOC_PD Bit1:En_ROC_PD Bit2:En_ExTrp_Ctrl_PD2 Bit3:En_OC_PD2 S A A A S Unit

9.4.5 Diagnostics (Function Code: 08H)


Modbus function 08 provides a series of tests for checking the communication system between the master and slave, or for checking various internal error conditions within the slave.

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The function uses a twobyte sub function code field in the query to define the type of test to be performed. The slave echoes both the function code and sub function code in a normal response. The listing below shows the sub function codes supported by the equipment. Code 00H 01H 04H 0BH 0CH 0DH 0EH 0FH Return Query Data Restart Comm Option Force Listen Only Mode Return Bus Message Count Return Bus Comm. Error Count Return Bus Exception Error Cnt Return Slave Message Count Return Slave No Response Cnt Name

9.4.6 Exception Responses


Except for broadcast messages, when a master device sends a query to a slave device it expects a normal response. If the slave receives the query without a communication error, but cannot handle it (for example, if the request is to read a nonexistent coil or register), the slave will return an exception response informing the master of the nature of the error. The listing below shows the exception codes supported by the equipment. Code 01H 02H 03H 07H Illegal Function Illegal Data Address Illegal Data Value Negative Acknowledge Description

9.5 EIA(RS)232 Interface


The front communication port is provided by a DB9 female D-type connector located under the small hinged cover on the front panel. It provides RS232 serial data communication and is intended for use with a PC locally to the relay (up to 15m distance). This port supports the courier communication protocol only. Courier is the communication language developed by NR to allow communication with its range of protection relays. The front port is particularly designed for use with relays settings program DBG2000 which is a Windows-based software package. The pin connections of relays DB9 front port are as follows: Pin No.2 Pin No.3 Pin No.5 Tx Transmit data Rx Receive data common

None of the other pins are connected in the relays. The relays should be connected to the serial port of a PC, usually called as COM1 or COM2. The serial port pin connections, which is DB9 male,
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is as below (if in doubt check you PC manual): Pin No.2 Pin No.3 Pin No.5 Rx Transmit data Tx Receive data common

For successful data communication, the Tx pin on the relays must be connected to the Rx pin on the PC, and Rx pin on the relay must be connected to Tx pin on the PC as shown in Figure 9-3. Note: The baud rate for this port is fixed at 9600 bps.
9 pin front communication port
1 2 3 4 5

serial communication port ( COM1 or COM2) of local PC

Figure 9-3 Rs232 Faceplate Port Connection

9.6 Communication with printer


When communicating locally with a printer using the rear series port, a special connection line is necessary which is provided by manufacture of the equipment. There are two parameters need to be set in RCS-985A for communication with printer, [Printer_Baud] and [En_AutoPrint], the former decides the communication speed and the later decides the printers activating way. Please refer to chapter 7 for details.

9.7 Communication with External GPS pulse Source


The clock function (Calendar clock) is used for time-tagging for the following purposes: ---Event recording ---Fault recording ---Present recording ---Self-supervision When the relays are connected to the GPS clock, all the relay clocks are synchronized with the external time standard. There are two way to adjust the relay clock.
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---Time synchronization via RS-485 serial port ---Time synchronization via binary input

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Chapter 10 Installation
10.1 Receipt of Relays
Upon receipt, relays should be examined immediately to ensure no external damage has been sustained in transit. If damage has been sustained, a claim should be made to the transport contractor and NR should be promptly notified. Relays that are supplied unmounted and not intended for immediate installation should be returned to their protective bags and delivery carton. Section 10.3 of this chapter gives more information about the storage of relays.

10.2 Handling of Electronic Equipment


A persons normal movements can easily generate electrostatic potentials of several thousand volts. Discharge of these voltages into semiconductor devices when handling electronic circuits can cause serious damage that, although not always immediately apparent, will reduce the reliability of the circuit. The relays electronic circuits are protected from electrostatic discharge when housed in the case. Do not expose them to risk by removing the front panel or printed circuit boards unnecessarily. Each printed circuit board incorporates the highest practicable protection for its semiconductor devices. However, if it becomes necessary to remove a printed circuit board, the following precautions should be taken to preserve the high reliability and long life for which the relay has been designed and manufactured. Before removing a printed circuit board, ensure that you are at the same electrostatic potential as the equipment by touching the case. Handle analog input modules by the front panel, frame or edges of the circuit boards. Printed circuit boards should only be handled by their edges. Avoid touching the electronic components, printed circuit tracks or connectors. Do not pass the module to another person without first ensuring you are both at the same electrostatic potential. Shaking hands achieves equipotential. Place the module on an anti-static surface, or on a conducting surface that is at the same potential as you. If it is necessary to store or transport printed circuit boards removed from the case, place them individually in electrically conducting anti-static bags. In the unlikely event that you are making measurements on the internal electronic circuitry of a relay in service, it is preferable that you are earthed to the case with a conductive wrist strap. Wrist straps should have a resistance to ground between 500k to 10M. If a wrist strap is not available you should maintain regular contact with the case to prevent a build-up of electrostatic potential. Instrumentation which may be used for making measurements should also be earthed to the case whenever possible. More information on safe working procedures for all electronic equipment can be found in BS EN
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100015: Part 1:1992. It is strongly recommended that detailed investigations on electronic circuitry or modification work should be carried out in a special handling area such as described in the British Standard document.

10.3 Storage
If relays are not to be installed immediately upon receipt, they should be stored in a place free from dust and moisture in their original cartons. Where de-humidifier bags have been included in the packing they should be retained. To prevent battery drain during transportation and storage a battery isolation strip is fitted during manufacture. With the lower access cover open, presence of the battery isolation strip can be checked by a red tab protruding from the positive polarity side. Care should be taken on subsequent unpacking that any dust, which has collected on the carton, does not fall inside. In locations of high humidity the carton and packing may become impregnated with moisture and the de-humidifier crystals will lose their efficiency. Prior to installation, relays should be stored at a temperature of between 25C to +70C (-13F to +158F).

10.4 Unpacking
Care must be taken when unpacking and installing the relays so that none of the parts are damaged and additional components are not accidentally left in the packing or lost. Ensure that any Users CDROM or technique documentation is NOT discarded this should accompany the relay to its destination substation. Note: With the lower access cover open, the red tab of the battery isolation strip will be seen protruding from the positive (+) side of the battery compartment. Do not remove this strip because it prevents battery drain during transportation and storage and will be removed as part of the commissioning tests. Relays must only be handled by skilled persons. The site should be well lit to facilitate inspection, clean, dry and reasonably free from dust and excessive vibration.

10.5 Relay Mounting


RCS-985A is dispatched either individually or as part of a panel/rack assembly. Individual relays are normally supplied accompanied with this manual showing the dimensions for panel cutouts and whole centers. This information can also be found in the product publication.

10.5.1 Rack Mounting


RCS-985A may be rack mounted using single tier rack frames, as illustrated in Figure 10-1 and Figure 10-2. The frames must have been designed to have dimensions in accordance with IEC60297 and are supplied pre-assembled ready to use. On a standard 483mm rack system this enables combinations of widths of case up to a total equivalent of size 80TE to be mounted side by
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side. Once the tier is complete, the frames are fastened into the racks using mounting angles at each end of the tier.

530.4

457.2

190.5

Figure 10-1 Rack mounting of relaysfront face

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531.5

457.2

190.5

Figure 10-2 Rack mounting of relaysrear face

Relays can be mechanically grouped into single tier (12U) or multi-tier arrangements by means of the rack frame. Where the case size summation is less than 80TE on any tier, or space is to be left for installation of future relays, blanking plates may be used. These plates can also be used to mount ancillary components.

10.5.2 Panel mounting


The relays can be flush mounted into panels using M4 self-tapping screws with captive 3mm thick washers. For applications where relays need to be semi-projection or projection mounted, a range of collars are available. Where several relays are mounted in a single cutout in the panel, it is advised that they are mechanically grouped together horizontally and/or vertically to form rigid assemblies prior to mounting in the panel.
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Note: It is not advised that RCS-985A are fastened using pop rivets as this will not allow the relay to be easily removed from the panel in the future if repair is necessary. If it is required to mount a relay assembly on a panel complying to IEC 60529 IP51 enclosure protection, it will be necessary to fit a metallic sealing strip between adjoining relays and a sealing ring around the complete assembly.

10.6 RELAY WIRING


This section serves as a guide to selecting the appropriate cable and connector type for each terminal on the RCS-985A.

10.6.1 Medium and heavy duty terminal block connections


Heavy duty terminal block: CT and VT circuits. Medium duty: All other terminal blocks. Loose relays are supplied with sufficient M4 screws for making connections to the rear mounted terminal blocks using ring terminals, with a recommended maximum of two ring terminals per relay terminal. If required, NR can supply M4 90 crimp ring terminals in three different sizes depending on wire size (see Table 10-1).
Table 10-1 M4 90 crimp ring terminals

Part Number ZB9124 901 ZB9124 900 ZB9124 904

Wire Size 0.25 -1.65mm2 (22 - 16AWG) 1.04 -2.63mm2 (16 - 14AWG) 2.53 -6.64mm2 (12 - 10AWG)

Insulation Color Red Blue Un-insulated*

*To maintain the terminal block insulation requirements for safety, an insulating sleeve should be fitted over the ring terminal after crimping. The following minimum wire sizes are recommended: Current transformers Auxiliary Supply, Vx EIA(RS)485 Port Other Circuits 2.5mm 2 1.5mm 2 See separate section 1.0mm 2

Due to the limitations of the ring terminal, the maximum wire size that can be used for any of the medium or heavy duty terminals is 6.0mm2 using ring terminals that are not pre-insulated. Where it required to only use pre-insulated ring terminals, the maximum wire size that can be used is reduced to 2.63mm 2 per ring terminal. If a larger wire size is required, two wires should be used in parallel, each terminated in a separate ring terminal at the relay. The wire used for all connections to the medium and heavy duty terminal blocks, except the
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EIA(RS)485 port, should have a minimum voltage rating of 300Vrms. It is recommended that the auxiliary supply wiring should be protected by a 16A high rupture capacity (HRC) fuse of type NIT or TIA. For safety reasons, current transformer circuits must never be fused. Other circuits should be appropriately fused to protect the wire used.

10.6.2 EIA (RS) 485 port


Connections to the EIA (RS) 485 port are made using ring terminals. It is recommended that a 2 core screened cable is used with a maximum total length of 1000m or 200nF total cable capacitance. A typical cable specification would be: Each core: Nominal conductor area: Screen: 16/0.2mm copper conductorsPVC insulated 0.5mm 2 per core Overall braid, PVC sheathed

10.6.3 IRIG-B connections (if applicable)


The IRIG-B input and BNC connector have a characteristic impedance of 50. It is recommended that connections between the IRIG-B equipment and the relay are made using coaxial cable of type RG59LSF with a halogen free, fire retardant sheath.

10.6.4 EIA(RS)232 front port of downloading/monitoring


Short term connections to the EIA(RS)232 port, located at the bottom of face cover, can be made using a screened multi-core communication cable up to 15m long, or a total capacitance of 2500pF. The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug. The pin allocations are detailed in section 5.4 about connectors.

10.6.5 Ethernet port (if applicable)


Fiber Optic Port The relays can have an optional 10 or 100 Mbps Ethernet port. FO connection is recommended for use in permanent connections in a substation environment. The 10Mbit port uses type ST connector and the 100Mbit port uses type SC connector, both compatible with 850nm multi-mode fiber-optic cable. RJ-45 Metallic Port The user can connect to either a 10Base-T or a 100Base-TX Ethernet hub; the port will automatically sense which type of hub is connected. Due to possibility of noise and interference on this part, it is recommended that this connection type be used for short-term connections and over short distance. Ideally where the relays and hubs are located in the same cubicle. The connector for the Ethernet port is a shielded RJ-45. The table shows the signals and pins on the connector.
Table 10-2 Signals on the Ethernet connector Signal Name Signal Definition

Pin 1

TXP

Transmit (positive)

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Pin 2 3 4 5 6 7 8

Signal Name TXN RXP RXN -

Signal Definition Transmit (negative) Receive (positive) Not used Not used Receive (negative) Not used Not used

10.6.6 Test port


Short term connections to the download/monitor port, located on the front access cover, can be made using a screened 9-core communication cable up to 4m long. The cable should be terminated at the relay end with a 9-way, metal shelled, D-type male plug and linked as a serial data connection.

10.6.7 Earth connection


Every relay must be connected to the cubicle earth bar using the M4 earth studs in the rear faceplate of the relay case. The minimum recommended wire size is 2.5mm 2 and should have a ring terminal at the relay end.

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Chapter 11 Commission
11.1 Introduction
This relay is fully numerical in their design, implementing all protection and non-protection functions in software. The relay employ a high degree of self-checking and in the unlikely event of a failure, will give an alarm. As a result of this, the commissioning test does not need to be as extensive as with non-numeric electronic or electro-mechanical relays. To commission numerical relays, it is only necessary to verify that the hardware is functioning correctly and the application-specific software settings have been applied to the relay. It is considered unnecessary to test every function of the relay if the settings have been verified by one of the following methods: -extracting the settings applied to the relay using appropriate setting software (preferred method) -via the operator interface Blank commissioning test and setting records are provided at the end of this manual for completion as required. WARNING! Before carrying out any work on the equipment, the user should be familiar with the contents of the safety and technical data sections and the ratings on the equipments rating label.

11.2 Precautions
WARNING! Hazardous voltages are present in this electrical equipment during operation. Non- observance of the safety rules can result in severe personal injury or property damage. Only qualified personnel shall work on and around this equipment after becoming thoroughly familiar with all warnings and safety notices of this manual as well as with the applicable safety regulations. Particular attention must be drawn to the following: The earthing screw of the device must be connected solidly to the protective earth conductor before any other electrical connection is made. Hazardous voltages can be present on all circuits and components connected to the supply voltage or to the measuring and test quantities. Hazardous voltages can be present in the device even after disconnection of the supply voltage (storage capacitors!). The limit values stated in the technique data (Chapter 2) must not be exceeded at all, not even
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during testing and commissioning. When testing the device with secondary test equipment, make sure that no other measurement quantities are connected. Take also into consideration that the trip circuits and maybe also close commands to the circuit breakers and other primary switches are disconnected from the device unless expressly stated.

DANGER!

Current transformer secondary circuits must have been short-circuited before the current leads to the device are disconnected. WARNING! Primary test may only be carried out by qualified personnel, who are familiar with the commissioning of protection system, the operation of the plant and safety rules and regulations (switching, earthing, etc.)

11.3 Relay commission tools


Minimum equipment required --Multifunctional dynamic current and voltage injection test set with interval timer --Multimeter with suitable AC current range and AC/DC voltage ranges of 0-200V and 0-250V respectively. --Continuity tester (if not included in the multimeter) --Phase angle meter --Phase rotation meter Note: Modern test set may contain many of the above features in one unit. Optional equipment --An electronic or brushless insulation tester with a DC output not exceeding 500 V (for insulation resistance test when required); --A portable PC, with appropriate software (this enables the rear communications port to be tested, if this is to be used, and will also save considerable time during commissioning). --DBG2000 software. --EIA(RS)485 to EIA(RS)232 converter (if EIA(RS)485 IEC60870 port is being tested). -- A printer. - RCS-900 serials dedicated protection tester TEST or HELP-90.

11.4 Setting Familiarization


When commissioning a RCS-985A relay for the first time, sufficient time should be allowed to
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become familiar with the method by which the settings are applied. The Chapter 8 contains a detailed description of the menu structure of RCS-985A relays. With the front cover in place all keys are accessible. All menu cells can be read. LEDs and alarms can be reset. Protection or configuration settings can be changed, or fault and event records cleared. However, menu cells will require the appropriate password to be entered before changes can be made. Alternatively, if a portable PC is available together with suitable setting software (such as DBG2000), the menu can be viewed a page at a time to display a full column of data and text. This PC software also allows settings to be entered more easily, saved to a file on disk for future reference or printed to produce a setting record. Refer to the PC software user manual for details. If the software is being used for the first time, allow sufficient time to become familiar with its operation.

11.5 Product checks


These product checks cover all aspects of the relay which should be checked to ensure that it has not been physically damaged prior to commissioning, is functioning correctly and all input quantity measurements are within the stated tolerances. If the application-specific settings have been applied to the relay prior to commissioning, it is advisable to make a copy of the settings so as to allow them restoration later. This could be done by extracting the settings from the relay itself via printer or manually creating a setting record.

11.5.1 With the relay de-energized


The RCS-985 serial plant transformer protection is fully numerical and the hardware is continuously monitored. Commissioning tests can be kept to a minimum and need only include hardware tests and conjunctive tests. The function tests are carried out according to users correlative regulations. The following tests are necessary to ensure the normal operation of the equipment before it is first put into use.

Hardware tests These tests are performed for the following hardware to ensure that there is no hardware defect. Defects of hardware circuits other than the following can be detected by self-monitoring when the DC power is supplied.

User interfaces test Binary input circuits and output circuits test AC input circuits test Function tests These tests are performed for the following functions that are fully software-based. Tests of the protection schemes and fault locator require a dynamic test set.

Measuring elements test Timers test Metering and recording test Conjunctive tests
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The tests are performed after the relay is connected with the primary equipment and other external equipment. On-load test Phase sequence check and polarity check.

11.5.1.1 Visual inspection. After unpacking the product, check for any damage to the relay case. If there is any damage, the internal module might also have been affected, contact the vendor. Following items listed is necessary. 1. Protection panel Carefully examine the protection panel, protection equipment inside and other parts inside to see that no physical damage has occurred since installation. The rated information of other auxiliary protections should be checked to ensure it is correct for the particular installation. 2. Panel wiring Check the conducting wire used in the panel to assure that their cross section meet the requirement. Carefully examine the wiring to see that they are no connection failure exists. 3. Label Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to make sure that their labels meet the requirements of this project. 4. Equipment plug-in modules Check each plug-in module of the equipments on the panel to make sure that they are well installed into the equipment without any screw loosened.

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5.

Figure 11-1 RCS-985A rear plug-in connector locations(viewed from rear) Earthing cable

Check whether the earthing cable from the panel terminal block is safely screwed to the panel steel sheet. 6. Switch, keypad, isolator binary inputs and push button: Check whether all the switches, equipment keypad, isolator binary inputs and push buttons work normally and smoothly. 11.5.1.2 Insulation Insulation resistances tests are only necessary during commission if it is required for them to be done and they have not been performed during installation. Isolate all wiring from the earth and test the insulation with an electronic or brushless insulation tester at a DC voltage not exceeding 500V, terminals of the same circuits should be temporarily connected together. The main groups of the relay terminals are: -Voltage transformer circuits -Current transformer circuits -Field voltage output and opto-isolated control inputs
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-Relay contacts -EIA(RS)485 communication port -Case earth The insulation resistance should be greater than 100M at 500V. On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the relay. 11.5.1.3 External wiring Check that the external wiring is correct to the relevant relay diagram and scheme diagram. Ensure as far as practical that phasing/phase rotation appears to be as expected. Check the wiring against the schematic diagram for the installation to ensure compliance with the customers normal practice. 11.5.1.4 Auxiliary supply The relay can be operated from either 110/125Vdc or 220/250Vdc auxiliary supply depending on the relays nominal supply rating. The incoming voltage must be within the operating range specified in the following table, before energizing the relay, measure the auxiliary supply to ensure it is within the operating range. Rated Voltage Variation 110/125VDC 88 - 144 VDC 220/250VDC 176 - 288 VDC

It should be noted that the relay can withstand an AC ripple of up to 12% of the upper rated voltage on the DC auxiliary supply. Energize the relay only if the auxiliary supply is within the specified operating ranges.

11.5.2 With the relay energized


The following groups of tests verify that the protection hardware and software is functioning correctly and should be carried out with the auxiliary supply applied to the protection. The current and voltage transformer connections must remain isolated from the protection for these checks. The trip circuit should also remain isolated to prevent accidental operation of the associated circuit breaker. 11.5.2.1 User interface This test ensures that the LCD, LEDs and keys function correctly. LCD display Only apply the rated DC voltage and check whether the LCD displays normal operation status report as mentioned former. If there is a failure, for example VT circuit fail because of not applying voltage, the LCD displays failure report. If the LCD displays failure report, press the ECS key for 1 second and the LCD will return to normal operation status report. LED display Apply the rated DC voltage and check that the "HEALTHY" LED is lighting in green. We need to emphasize that the "HEALTHY" LED is always lighting in operation course except that the equipment find serious problems listed in chapter 4.
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Keypad Press key ESC or and enter the command menu. Do some jobs to ensure that all buttons are in good condition. 11.5.2.2 Watchdog contacts (Equipment being blocked, BSJ) Using a continuity tester, check the watchdog contacts (equipment being blocked, BSJ) are in the states given in Table 11-1 below.
Table 11-1 Watchdog contact status

Terminals 4A1-4A3 4A2-4A4 4B4-4B26

Contacts Relay de-energized Closed Relay energized Open

11.5.2.3 Date and time The method of setting will depend on whether accuracy is being maintained via the RS-485 port (from GPS in the substation) on the rear of the protection or via the front panel user interface manually. Turn on the DC power supply of the equipment and check the software version and time through the LCD Manual.

11.5.2.4 Binary input check This test checks that all the binary inputs on the protection are functioning correctly. The binary inputs should be energized one at a time. Ensuring correct polarity, connect the field supply voltage to the appropriate terminals for the input being tested. There two voltage levels of opto-couple for binary inputs, one is 24V DC and the other is 250/220/125/110V DC. The negative pole of DC 24V and negative pole of DC 250/220/125/110V have been connected with the corresponding negative pole of opto-couplers through the inner rear board in equipment. The positive pole terminals of opto-couplers have been connected to the rear connectors for binary input connecting, and common positive pole has also be connected to the rear connector. Please see the panel diagram carefully and find the right connector terminal numbers of common positive pole of DC 24V and DC 250/220/125/110V.

Note: The binary inputs may be energized from an external DC auxiliary supply (e.g. the station battery) in some installations. Check that this is not the case before connecting the field voltage otherwise damage to the protection may result. The status of each binary input can be viewed using either
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DBG2000 software installed in a portable PC or by checking the front man-machine interface LCD. When each binary input is energized the display will change to indicate the new status of the inputs. Please check binary input both on CPU module and MON module and ensure they are consistent. Please note only the positive pole of opto-coupler for binary inputs are listed in following tables.

1) Main transformer protection contacts (24V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->TR PROT EBI No. 1 2 3 4 5 Signal name EBI_Diff_GTU EBI_Diff_Tr EBI_PPF_Tr EBI_EF_Tr EBI_REF_Tr Equipment terminal number 6B17-6B5 6B17-6B1 6B17-6B2 6B17-6B3 6B17-6B4 Wiring connector number CPU status MON status

2) Generator protection contacts (24V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->GEN PROT EBI No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Signal name EBI_Diff_Gen EBI_SPTDiff_Gen EBI_PPF_Gen EBI_IntTurn_Gen EBI_ROV_Sta EBI_V3rdH_Sta EBI_1PEF_RotWdg EBI_2PEF_RotWdg EBI_OvLd_Sta EBI_NegOC_Gen EBI_LossExc_Gen EBI_OOS_Gen EBI_VoltProt_Gen EBI_OvExc_Gen EBI_PwrProt_Gen EBI_FreqProt_Gen EBI_AccEnerg_Gen EBI_StShut_Gen Equipment terminal number 5B29-5B3 5B29-5B26 5B29-5B25 5B29-5B4 5B29-5B5 5B29-5B6 5B29-5B7 5B29-5B8 5B29-5B9 5B29-5B10 5B29-5B11 5B29-5B12 5B29-5B13 5B29-5B14 5B29-5B15 5B29-5B16 5B29-5B17 5B29-5B18 Wiring connector number CPU status MON status

3) Exciter and stepdown transformer protection contacts (24V opto-couplers)


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Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->ET&ST PROT EBI No. 1 2 3 4 5 6 Signal name EBI_Diff_Exc EBI_Bak_Exc EBI_Diff_ST EBI_Bak_HVS_ST EBI_Bak_LVS_ST EBI_REF_ST Equipment terminal number 5B29-5B19 5B29-5B20 6B17-6B7 6B17-6B8 6B17-6B9 6B17-6B10 Wiring connector number CPU status MON status

3) Mechanical protection contacts (220/110V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE ->MECH RLY EBI No. 1 2 3 4 5 6 7 8 9 Signal name EBI_Trp_MechRly1 EBI_Trp_MechRly2 EBI_Trp_MechRly3 EBI_Trp_MechRly4 BI_MechRly 1 BI_MechRly 2 BI_MechRly 3 BI_MechRly 4 BI_SyncCondenser Equipment terminal number 5B29-5B24 5B29-5B23 5B29-5B21 5B29-5B22 5A27-5A20 5A27-5A19 5A27-5A17 5A27-5A18 6B25-6B20 Wiring connector number CPU status MON status

4) Auxiliary binary inputs (220/110V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE -> AUX BI No. 1 2 3 4 5 6 7 8 Signal name BI_52b_GCB BI_52b_CB_HVS1_Tr BI_52b_CB_HVS1_Tr BI_Valve_Turbine BI_PoleDisagr_CB BI_UrgBrake BI_Reserved BI_PS_Superv Equipment terminal number 5A27-5A22 5A27-5A23 5A27-5A24 5A27-5A26 5A27-5A25 6B25_6B19 6B25_6B22 6B25_6B23 Wiring connector number CPU status MON status

4) Binary inputs for power supply supervise (24V opto-couplers) Path: Main Menu -> VALUES-> CPU(MON) BI STATE -> PS SUPERV BI No. Signal name Equipment terminal number Wiring connector number CPU status MON status
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No. 1 2 3

Signal name BI_Print BI_Pulse_GPS BI_ResetTarget

Equipment terminal number 6B17-6B13 6B17-6B14 6B17-6B15

Wiring connector number

CPU status

MON status

11.5.2.5 Binary output check Check alarm signal contacts When detecting a hardware failure in self-supervise, the relay will block all the output and black the HEALTY LED. All the operation element for alarm operates, the ALARM LED will illuminate. At the same time, the BJJ contact and other alarm contacts will be closed. According to the below table we can check these contacts. No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Signal name BO_FAIL BO_ALM BO_CTS BO_VTS BO_OvLd BO_NegOC BO_OvLd_Exc BO_EF_Sta BO_1PEF_Gen BO_LossExc_Gen BO_OOS_Gen BO_UF_Gen BO_RevPwr_Gen BO_OvExc_Gen Local signal 4A1-4A3 4A1-4A5 4A1-4A7 4A1-4A9 4A1-4A11 4A1-4A13 4A1-4A15 4A1-4A17 4A1-4A19 4A1-4A21 4A1-4A23 4A1-4A25 4A1-4A27 4A1-4A29 Remote signal 4A2-4A4 4A2-4A6 4A2-4A8 4A2-4A10 4A2-4A12 4A2-4A14 4A2-4A16 4A2-4A18 4A2-4A20 4A2-4A22 4A2-4A24 4A2-4A26 4A2-4A28 4A2-4A30 SOE signal 4B4-4B26 4B4-4B28 4B4-4B6 4B4-4B8 4B4-4B10 4B4-4B12 4B4-4B14 4B4-4B16 4B4-4B18 4B4-4B20 4B4-4B22 4B4-4B24 4B4-4B29 4B4-4B30 Yes or NO

Check tripping signal contacts All the operation element for tripping operates, the TRIP LED will illuminate. At the same time, the tripping signal contacts will be closed. According to the below table we can check these contacts. No Signal name Local signal 2A1-2A7 2A1-2A13 2A1-2A19 Remote signal 2A3-2A9 2A3-2A15 2A3-2A21 SOE signal 2A5-2A11 2A5-2A17 2A5-2A23 Yes or NO

The first group: 1 BO_Diff_Gen 2 3 BO_EF_Sta BO_OvLd_Sta

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No 4 5 6 7 8 9

Signal name BO_LossExc_Gen BO_LossExc1_Gen BO_OV_Gen BO_RevPwr_Gen BO_StShut_Gen BO_AccEnerg_Gen

Local signal 2A1-2A25 2A1-2B1 2A1-2B7 2A1-2B13 2A1-2B19 2A1-2B25 2A2-2A8 2A2-2A14 2A2-2A20 2A2-2A26 2A2-2B2 2A2-2B8 2A2-2B14 3A1-3A7 3A1-3A13 3A1-3A19 3A1-3A25 3A1-3B1 3A1-3B7 3A1-3B13 3A1-3B19 3A1-3B25 3A2-3A8 3A2-3A14 3A2-3A20 3A2-3A26 3A2-3B2 3A2-3B8 3A2-3B14

Remote signal 2A3-2A27 2A3-2B3 2A3-2B9 2A3-2B15 2A3-2B21 2A3-2B27 2A4-2A10 2A4-2A16 2A4-2A22 2A4-2A28 2A4-2B4 2A4-2B10 2A4-2B16 3A3-3A9 3A3-3A15 3A3-3A21 3A3-3A27 3A3-3B3 3A3-3B9 3A3-3B15 3A3-3B21 3A3-3B27 3A4-3A10 3A4-3A16 3A4-3A22 3A4-3A28 3A4-3B4 3A4-3B10 3A4-3B16

SOE signal 2A5-2A29 2A5-2B5 2A5-2B11 2A5-2B17 2A5-2B23 2A5-2B29 2A6-2A12 2A6-2A18 2A6-2A24 2A6-2A30 2A6-2B6 2A6-2B12 2A6-2B18 3A5-3A11 3A5-3A17 3A5-3A23 3A5-3A29 3A5-3B5 3A5-3B11 3A5-3B17 3A5-3B23 3A5-3B29 3A6-3A12 3A6-3A18 3A6-3A24 3A6-3A30 3A6-3B6 3A6-3B12 3A6-3B18

Yes or NO

The second group: 1 BO_Diff_GTU 2 3 4 5 6 7 BO_Diff_Tr BO_PPF_Tr BO_EF_Tr BO_REF_Tr BO_MechRly BO_Diff_Exc

The third group: 1 BO_InerTurn_Gen 2 3 4 5 6 7 8 9 BO_EF_RotWdg BO_NegOC_Sta BO_OOS_Gen BO_Reserved1 BO_OvExc_Gen BO_RevP_Gen BO_PPF_Gen BO_FreqProt_Gen

The fourth group: 1 BO_Diff_ST 2 3 4 5 6 7 BO_Bak_HVS_ST BO_Bak_LVS_ST BO_REF_ST BO_Reserved2 BO_Reserved3 BO_OvLd_Exc

Check tripping output contacts Setting the tripping logic settings refer to chapter 7. The output x will be closed only when the correspond bit [Output x] is set as 1. According to the below table we can check these contacts. Equipment terminal number Wiring connector number Yes or No

No

Output name

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No 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Output name Trip output 1 Trip output 2 Trip output 3 Trip output 4 Trip output 5 Trip output 6 Trip output 7 Trip output 8 Trip output 9 Trip output 10 Trip output 11 Trip output 12 Trip output 13 Trip output 14

Equipment terminal number 1A3-1A51A7-1A9 1A11-1A131A15-1A17 1A19-1A211A23-1A25 1A27-1A291B1-1B3 1A2-1A41A6-1A8 1A10-1A121A14-1A16 1A18-1A201A22-1A24 1A26-1A281B2-1B4 1B6-1B81B10-1B12 1B5-1B71B9-1B11 1B13-1B15 1B17-1B19 1B21-1B23 1B25-1B27 1B29-1B30 1B14-1B161B18-1B20 1B22-1B241B26-1B28 2B24-2B262B28-2B30 3B24-3B263B28-3B30

Wiring connector number

Yes or No

Check other output contacts Equipment terminal number 4B9-4B11 4B13-4B15 4B17-4B19 4B21-4B23 2B20-2B22 3B20-3B22 3B1-3B3 3B5-3B7 Wiring connector number Yes or No

No 1 2 3 4 5 6 7 8

Output name ZBFL-1 ZBFL-2 CBFL-1 CBFL-2 BY2 BY3 BSTY-1 BSTY-2

11.5.2.6 Communications port This test should only be performed where the protection is to be accessed from a remote location and will vary depending on the communications standard being adopted. It is not the intention of the test to verify the operation of the complete system from the relay to the remote location, just the protections rear communications port and any protocol converter
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necessary. Courier communications Ensure that the RS-232 wire link the RS-232 port in front of the RCS-985A and the communication baud rate in DBG2000 must be set as 9600. Check that communications can be established with this protection using the portable PC. Remote communication This test is to check the status of communications between RCS-985A and the engineers workstation in SAS(Substation automation system) if it is applicable. Before test, the communication baud rate in RCS-985A must be set as 1200-38400 depends on Substation Automation System, and the protections [Comm_Adrr] must be set to a value between 1 and 254. In the menu of DEBUG->COMM STATUS on the LCD display, 485Aor 485B indicates the communication status of 485A port or 485B port. If Receive Data is N, it means the equipment has not received data from external system. If Valid Frame is N, it indicates the setting error of baud rate or protocol while Valid Address is N, it means the communication address is set wrongly. Send Data is "N means datagram sent from the equipment is wrong. If all those status are Y, it means communication is established successfully.

11.5.2.7 AC Current inputs check This test verifies that the accuracy of current measurement is within the acceptable tolerances. All protections will leave the factory set for operation at a system frequency of 50Hz or 60Hz. All relays will be set for operation at a system frequency of 50Hz. If operation at 60Hz is required then this must be set at menu. Apply current equal to the current transformer secondary winding rating to each current transformer input of the corresponding rating in turn, see the following table or external connection diagram for appropriate terminal numbers, checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu. The measurement accuracy of the relay is 5%. However an additional allowance must be made for the accuracy of the test equipment being used.
Table 11-2 Current linearity and precision check out
Items Input value Phase currents at bushing CT of HVS of main Tr Phase currents at side 1 of HVS of main Tr Phase currents at side 2 of 407 In 4In In 4In In 3 Phase A Displayed on LCD Angle between A Phase B Phase C and B Angle between A and C

No.

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Chapter 11 Commission
Displayed on LCD Angle between A Phase B Phase C and B

No.

Items

Input value Phase A

Angle between A and C

HVS of main Tr 4 Phase currents at side 2 of HVS of ST Phase currents at terminal of Gen Phase currents at NP of Gen Phase currents at HVS of ST Phase currents at LVS of ST Phase currents at side 1 of Exc Phase currents at side 2 of Exc Zero sequence transverse current of Gen Zero sequence current of Tr Gap Zero sequence current of Tr

4In In 4In In 4In In 4In In 4In In 4In In 4In In 4In In 4In In 4In In 4In ******************* ******************* ******************* ******************* ******************* *******************

7 8 9

10

11 12 13

Note: To avoid damage the equipment, we cant inject a high value current (such as 4In or more) to the equipment for long time, we suggest that the time in high current condition should not over 3 second every time. The measurement accuracy of the protection is 5%. However, an additional allowance must be made for the accuracy of the test equipment being used.

11.5.2.8 AC Voltage inputs check This test only needs to be performed on models with voltage transformer inputs as it verifies that the accuracy of voltage measurement is within the acceptable tolerances. Apply rated voltage to voltage transformer input, checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu. The measurement accuracy of the relay is 5%. However an additional allowance must be made for the accuracy of the test equipment being used.

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Chapter 11 Commission Table 11-3 Voltage linearity and precision check out
Displayed in LCD No. Items Input value PhA PhB PhC Angle between A and B 1 Terminal TV1 of generator Terminal TV2 of generator HVS TV of transformer HVS TV of stepdown transformer zero sequence voltage 5 at terminal TV2 of generator zero sequence voltage 6 at terminal TV2 of generator 7 zero sequence voltage at NP of generator zero sequence voltage of transformer zero sequence voltage 9 at LVS of stepdown transformer 20V 100V 20V 100V 20V 100V 20V 20V 100V 58V 20V 58V 20V 58V 20V 58V 20V 100V Angle between A and C

Note: The measurement accuracy of the protection is 5%. However, an additional allowance must be made for the accuracy of the test equipment being used.

11.5.3 Setting Testing


The setting checks ensure that the entire application-specific relay, for the particular installation, has been correctly applied to the relay. Note: The trip circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker. If the application-specific settings are not available, ignore sections 11.5.3. Apply application-specific settings There are two methods of applying the settings to the relay: Transferring them from a pre-prepared setting file to the relay using a portable PC running the
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appropriate software via the relays RS232 port, located on the front plate of the relay. This method is preferred for transferring function settings as it is much faster and there is less margin for error. Enter them manually via the relays operator interface. Demonstrate correct relay operation Tests mentioned above have already demonstrated that the relay is within calibration, thus the purpose of these tests is as follows: To determine that the primary protection functions, such as generator differential protection, overcurrent protection and so on, can trip according to the correct application settings. To verify correct assignment of the trip contacts, by monitoring the response to a selection of fault injections.

11.5.4 Rear communications port EIA(RS) 485


This test should only be performed where the relay is to be accessed from a remote location and will vary depending on the communications standard being adopted. It is not the intension of the test to verify the operation of the complete system from the relay to the remote location, just the relays rear communications port and any protocol converter necessary. Connect a portable PC to the relay via a EIA(RS) 485-232 converter. Ensure that the relay address and the baud rate settings in the application software are set the same as those in relay. If the relay has the optional fiber optic communications port, then an fiber optic-RS232 converter shall be applied.

11.5.5 On-load checks


The objectives of the on-load checks are to: -Confirm the external wiring to the current and voltage inputs is correct. -Check the polarity of the current transformers at each side is consistent. Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has been removed to allow testing. If it has been necessary to disconnect any of the external wiring from the relay in order to perform any the foregoing tests. It should be ensured that all connections are replaced in accordance with the relevant external connection or scheme diagram. Voltage connections Using a multimeter measure the voltage generator secondary voltages to ensure they are correctly rated. Check that the system phase rotation is correct using a phase rotation meter. Comparing the values of the secondary phase voltages with the relays measured values, which can be found in the menu. Current connections Measure the current transformer secondary values for each input using a multimeter connected in series with the corresponding current input. (It is preferable to use a tong-test ammeter instead)
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Check that the current transformer polarities are correct by measuring the phase angle between the current and voltage either against a phase meter already installed on site and known to be correct or by determining the direction of power flow by contacting the networks control center (NCC). Compare the values of the secondary phase currents and phase angle with the relays measured values, which can be found in menu.

11.5.6 Final check


The tests are now complete. Remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any of the external wiring from the relay in order to perform the wiring verification tests, it should be ensured that all connections (wiring, fuses and links) are replaced in accordance with the relevant external connection or scheme diagram. Ensure that all event records, fault records, disturbance records, alarms and LEDs have been reset before leaving the relay.

11.6 Use of assistant test software DBG-2000


11.6.1 Function summary of DBG-2000 communication software
DBG-2000 configuration and testing program (user version) is developed for the user to configure, test and maintain RCS-985A generator protection equipment on site. It comprises four parts: sampled value display, settings reading and modification, report process and test. These four parts correspond to 4 files RCS-985A_status, RCS-985A_set, RCS-985A_rpt and RCS-985A_tst respectively and are described hereinafter. We have to say that the four configuration file is relevant with special version of protection program. That is, when the protection program is upgrade, the above mentioned four configuration files must upgrade at the same time, otherwise it may bring confusion of settings to the equipment at the time of setting. Connect RS-232 communication port of the computer and that of RCS-985A protection equipment by a cable with DB-9 connectors on both ends. Run the program DBG-2000. If the connection is correct, the screen will show RCS-985A connected, see Figure 11.6.1. Even if the computer is off line, this picture will be still shown but the words about connection will disappear.

Figure 11-2 Display of connection status of DBG2000 with RCS-985A

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11.6.2 Connection way of protection equipment and personal computer


A 9-pin RS232C serial port is located on the relays front panel for communication with personal computer. All that is required to use this interface is a personal computer running the DBG-2000 software provided with the equipment. Cabling for the RS232 port is shown in the following figure for 9 pin connectors.

Figure 11-3 Definition of RS-232 wiring cable

11.6.3 Configuration of PC and the software before use


11.6.3.1 PC configuration Set the PC com ports baud rate which is connected with front series port of RCS-985A as 9600bps. 11.6.3.2 Software configuration There are 3 bars on top of the screen, from top to bottom: title bar, menu bar and tool bar, see Figure 11-4.

Figure 11-4 Title bar, menu bar and tool bar

First, click the first button of tool bar

parameter, dialog box of communication parameters is

displayed, see Figure 11-5. Only the parameter of [COM port] shall be configured as the port of computer which is actually connected with the equipment, all other parameters shall be configured as the same as displayed in Figure 11-5.

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Figure 11-5 Dialog box of communication Parameters

11.6.4 Operation instruction of the software


Here is only brief description of usage. Please refer to dedicated manual of DBG2000 for detail. 11.6.4.1 Protection parameters setting Offline protection parameters settingA convenient function of the software The function is used for offline parameter setting. First, input setting parameters and saves it in PC, then connects PC with the protection equipment, executive DOWNLOAD command, and the settings saved in PC will be transferred to the protection equipment, so most part of the setting operation can be finished in office instead of in substation. Here is the procedure to input settings offline. Before connect PC with RCS-985A, run the software of DBG2000click on setting icon, a popup dialog box will appear which asks user whether or not to set parameter offline, click yes and input 985Axxx (xxx represents program version, point ignored) to confirm the relay type and version of the protection program, then parameter setting interface will appear. The settings displayed first are default settings, user can replace them with application-specific settings. After modification, save the settings into a file. When PC is connected with the protection equipment, open the setting file and transfer setting to protection. Online setting by DBG-2000 When PC is connecting with RCS-985A, run DBG-2000, the PC screen will display RCS-985Axxx connected, click on SETTING icon, then parameter setting interface will appear, the settings uploaded from RCS-985A will be displayed, user can modify them to application-specific settings.

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11.6.4.2 Status Click button, user can observe real time sampled data and binary inputs status.

11.6.4.3 Report Click button, entering report view part of the program, choose a report in the table, and click

report record, save report data according to following clue on instruction. The data can be used in the auxiliary analyze software to show us the fault course of power system and the logic calculation course of RCS-985A again. 11.6.4.4 SIG RESET Click button, all magnetic latched output relays and signal relays will be reset.

11.6.4.5 Trip test (if available) Click button, entering trip test part of the program, click contacts to change the status of

relays displayed, a same operation command to breaker circuit will be issued. This function is used to test breaker circuit without apply electric quantities to the protection equipment.

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Chapter 12 Maintenance

Chapter 12 Maintenance
12.1 Maintenance period
It is recommended that products supplied by NR receive periodic monitoring after installation. In view of the critical nature of protective relays and their infrequent operation, it is desirable to confirm that they are operating correctly at regular intervals. NR protective relays are designed for a life in excess of 10 years. RCS series relays are self-supervising and so require less maintenance than earlier designs of relay. Most problems will result in an alarm so that remedial action can be taken. However, some periodic tests should be done to ensure that the relay is functioning correctly and the external wiring is intact.

12.2 Maintenance checks


Although some functionality checks can be performed from a remote location by utilizing the communications ability of the relays, these are predominantly restricted to checking that the relay is measuring the applied currents and voltages accurately. Therefore it is recommended that maintenance checks are performed locally (i.e. at the substation itself). Before carrying out any work on the equipment, the user should be familiar with the contents of the Safety and technique Data sections and the ratings on the equipments rating label.

12.2.1 Alarms
The alarm status LED should first be checked to identify if any alarm conditions exist. If so, try to find the cause to the alarm and eliminate it and clear the alarms to extinguish the LED.

12.2.2 Binary Inputs


The opto-isolated inputs can be checked to ensure that the relay responds to their energization.

12.2.3 Binary output


The output relays can be checked to ensure that they operate by repeating the commissioning test.

12.2.4 Analog inputs


If the power system is energized, the values measured by the relay can be compared with known system values to check that they are in the approximate range that is expected. If they are, then the analog/digital conversion and calculations are being performed correctly by the relay. Alternatively, the values measured by the relay can be checked against known values injected into the relay via the test block, if fitted, or injected directly into the relay terminals. Suitable test methods can be found in relevant manuals. These tests will prove the calibration accuracy is being maintained.

12.3 Method of Repair


If the relay should develop a fault whilst in service, depending on the nature of the fault, the watchdog contacts will change state and an alarm condition will be flagged. Due to the extensive
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use of surface-mount components faulty PCBs should be replaced, as it is not possible to perform repairs on damaged circuits. Thus either the complete relay or just the faulty PCB, identified by the in-built diagnostic software, can be replaced. Advice about identifying the faulty PCB can be found in section 12.3.2. The preferred method is to replace the complete relay as it ensures that the internal circuitry is protected against electrostatic discharge and physical damage at all times and overcomes the possibility of incompatibility between replacement PCBs. Replacing PCBs can reduce transport costs but requires clean, dry conditions on site and higher skills from the person performing the repair. However, if the repair is not performed by an approved service center, the warranty will be invalidated. Before carrying out any work on the equipment, the user should be familiar with the contents of the Safety and technique Data sections and the ratings on the equipments rating label. This should ensure that no damage is caused by incorrect handling of the electronic components.

12.3.1 Replacing the complete relay


The case and rear terminal blocks have been designed to facilitate removal of the complete relay should replacement or repair become necessary without having to disconnect the scheme wiring. Before working at the rear of the relay, isolate all voltage and current supplies to the relay. Note: The RCS serials relays have integral current transformer shorting switches which will close when the connecting terminal is removed. Disconnect the relay earth, IRIG-B and fiber optic connections, as appropriate, from the rear of the relay. Note: The use of a magnetic bladed screwdriver is recommended to minimize the risk of the screws being left in the terminal block or lost. Without exerting excessive force or damaging the scheme wiring, pull the terminal blocks away from their internal connectors. Remove the screws used to fasten the relay to the panel, rack, etc. These are the screws with the larger diameter heads on front of the faceplate of the relay. Withdraw the relay carefully from the panel, rack, etc. because it will be heavy due to the internal transformers. To reinstall the repaired or replacement relay, follow the above instructions in reverse, ensuring that each terminal block is relocated in the correct position and the case earth, and fiber optic connections are replaced. Once reinstallation is complete the relay should be re-commissioned using the instructions in sections 11 of this manual.

12.3.2 Replacing a PCB


Replacing printed circuit boards and other internal components of protective relays must be
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undertaken only by Service Centers approved by NARI RELAYS. Failure to obtain the authorization of NR After Sales Engineers prior to commencing work may invalidate the product warranty. Before replacing a PCB the auxiliary supply must be removed, and wait 5s for capacitors to discharge. It is also strongly recommended that the voltage and current transformer connections and trip circuit are isolated. The relay, being modular in design, allows for the withdrawal and insertion of modules. Modules must only be replaced with like modules in their original factory configured slots.

Figure 12-1 RCS-985A Module Withdrawal/Insertion NR Support teams are available world-wide, and it is strongly recommended that any repairs be entrusted to those trained personnel. For this reason, details on product disassembly and re-assembly are not included here.

12.4 Changing the relay battery


Each relay has a battery to maintain status data and the correct time when the auxiliary supply voltage fails. The data maintained includes event, fault and disturbance records. This battery will periodically need changing. If the battery-backed facilities are not required to be maintained during an interruption of the auxiliary supply, the steps below can be followed to remove the battery. Before carrying out any work on the equipment, the user should be familiar with the contents of the safety and technique data sections and the ratings on the equipments rating label.

12.4.1 Instructions for replacing the battery


Withdraw the CPU board from RCS-985A. Gently extract the battery from its socket. If necessary, use a small, insulated screwdriver to prize the battery free. Ensure that the metal terminals in the battery socket are free from corrosion, grease and dust. The replacement battery should be removed from its packaging and placed into the battery holder, taking care to ensure that the polarity markings on the battery agree with those adjacent to the
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socket as shown as below.

Figure 12-2 Battery replacement

Note: Ensure that the battery is securely held in its socket and that the battery terminals are making good contact with the metal terminals of the socket. Insert the CPU module into RCS-985A.

12.4.2 Battery disposal


The battery that has been removed should be disposed of in accordance with the disposal procedure for Lithium batteries in the country in which the relay is installed.

12.5 Cleaning
Before cleaning the equipment ensure that all AC and DC supplies, current transformer and voltage transformer connections are isolated to prevent any chance of an electric shock whilst cleaning. The equipment may be cleaned using a lint-free cloth moistened with clean water. The use of detergents, solvents or abrasive cleaners is not recommended as they may damage the relays surface and leave a conductive residue.

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Chapter 13 Ordering Form

Chapter 13 Ordering Form


13.1 Loose equipment
Essential information should be provided when user orders loose equipment, such as: Equipment type; Amount of equipment to be ordered; AC rated current and rated voltage input; DC power source supply rated voltage; To be simplified, user can provide such information by finishing the following table and send it to manufacture. Table 13.1.1 Ordering information of RCS-985A

NR
Ordering form Item
Protective Functions Standard Configuration Communication Port EIA-232 and 2 x EIA-485 EIA-232 and 2 x Optical converter EIA-232 and 2 x Ethernet*

RCS-985A

RCS-985A

* * * * * * *

A B

Rated parameters of AC input module 57.7V/Phase; 1 Amp Phase; 50 Hz 57.7V/Phase; 1 Amp Phase; 60 Hz 57.7V/Phase ; 5 Amp Phase; 50 Hz 57.7V/Phase ; 5 Amp Phase; 60 Hz 63.5V/Phase; 1 Amp Phase; 50 Hz 63.5V Phase; 1 Amp Phase; 60 Hz 63.5V Phase ; 5 Amp Phase; 50 Hz 63.5V Phase ; 5 Amp Phase; 60 Hz Auxiliary Voltage rating 110/125 Vdc
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Chapter 13 Ordering Form 220/250 Vdc Binary input power source supply External 24Vdc External 48Vdc* External 110/125Vdc 3 4 1 2

External 220/250Vdc
Communication medium

Shielded twisted pair wires


Optical Fiber
Communication Protocol IEC 60870-5-103 MODBUS IEC 61850* Terminal Type Jointing Terminal Screw terminal Block

T O

S M E

C S

13.2 Panel installed


If user orders panels too, following information in addition to what is mentioned in table 13.1.1 should be provided. Manufacture should be informed as early as possible if special requirement is included. The general information includes but not all: Amount and type of the panels; Dimension of the panel (standard dimension is 800mm(W)*600mm(D)*2200mm(H)); Color of panel (Inter Grey, Apple green and light camel grey are recommended colors).

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Chapter 14 Firmware and service manual version history

Chapter 14 Firmware and service manual version history


Software Version Version 3.12 CRC Hardware Suffix Original Date of Issue Jun 2007 Description of Changes Original Issue Technical Documentation RCS-985A Generator transformer unit protection manual

1 2 3 4

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Chapter 15 ANNEX

Chapter 15 ANNEX
15.1 Appendix A: Settings Sheet
15.1.1 Equipment parameters
No. 1 2 3 4 5 6 7 8 9 10 11 Symbol Setting_Group Equip_ID Comm_Addr COM1_Baud COM2_Baud Printer_Baud Protocol En_Auto_Print En_Net_Print En_Remote_Cfg GPS_Pulse Range 01 6 characters maximum 0255 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 1.2/2.4/4.8 / 9.6 /14.4/ 19.2 / 38.4 kbit/s 1.2/2.4/4.8 / 9.6 /19.2 kbit/s 0000-FFFF logic setting 1 - enable, 0 - disable 0/1 0/1 0/1 0/1 0 0 0 0 1 Step 1 Default 0 FDJ001 1 19.2 kbit/s 19.2 kbit/s 9.6k bit/s 0041

15.1.2 Logic settings of configuring functions


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 En_Diff_GTU En_Diff_Tr En_PPF_Tr En_EF_Tr En_OvExc_Tr En_Diff_Gen En_SPTDiff_Gen En_IntTurn_Gen En_PPF_Gen En_EF_Sta En_EF_RotWdg En_OvLd_Sta En_NegOC_Sta En_LossExc_Gen En_OOS_Gen En_VoltProt_Gen En_OvExc_Gen Symbol Range 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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No. 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 En_PwrProt_Gen En_FreqProt_Gen En_StShut_Gen En_AccEnerg_Gen En_Diff_Exc En_Bak_Exc En_OvLd_RotWdg En_Diff_ST En_Bak_HVS_ST En_Bak_LVS_ST En_REF_ST En_MechRly

Symbol

Range 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

Default 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

En_PoleDisagr_CB En_VTComp_Term_Gen Reserved() En_TestMode()

15.1.3 Transformer system parameters


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Sn_Tr U1n_HVS_Tr U1n_LVS_Tr U1n_VT_HVS_Tr U2n_VT_HVS_Tr U2n_DeltVT_HVS_Tr I1n_CT_HVS1_Tr I2n_CT_HVS1_Tr I1n_CT_HVS2_Tr I2n_CT_HVS2_Tr I1n_CT_HVS_Tr I2n_CT_HVS_Tr I1n_CT_LVS_Tr I2n_CT_LVS_Tr I1n_CT_NP_Tr I2n_CT_NP_Tr I1n_CT_Gap_Tr I2n_CT_Gap_Tr Symbol Range 0-6000 MVA 0-600 kV 0-600 kV 0-600 kV 57.74-110 V 33.33-330 V 0-60000 A 1, 5 A 0-60000 A 1, 5 A 0-60000 1, 5A 0-60000A 1,5A 0-60000A 1,5A 0-60000A 1,5A Logic setting 1 - enable, 0 disable
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Step 0.1 MVA 0.01 kV 0.01 kV 0.01 kV 0.01 V 0.01 V 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A

Default 370 220 20 127.02 57.74 57.74 1200 1 1200 1 1200 1 12000 1 600 1 200 1

Chapter 15 ANNEX

No. 19 20 21

Symbol Yd11_Conn_Tr Yyd11_Conn_Tr Opt_GCB

Range 0/1 0/1 0/1

Step 1 1 1

Default 1 0 0

15.1.4 Generator system parameters


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 fn_Gen Pn_Gen PF_Gen U1n_Gen U1n_VT_Term_Gen U2n_VT_Term_Gen U2n_DeltVT_Term_Gen U1n_VT_NP_Gen U2n_VT_NP_Gen I1n_CT_Term_Gen I2n_CT_Term_Gen k_SP1_Gen k_SP2_Gen I1n_CT_SP1_Gen I2n_CT_SP1_Gen I1n_CT_SP2_Gen I2n_CT_SP2_Gen I1n_CT_TrvDiff_Gen I2n_CT_TrvDiff_Gen I1n_RotWdg U2n_Shunt_RotWdg U1n_Exc Symbol Range 50/60 Hz 0-6000.0 MW 0.00-1.00 0-600.00 kV 0-600.00 kV 57.74-110.00 V 33.33-110.00 V 0-600.00 kV 0-300.00 V 0-60000 A 1A/5A 0-100.00 % 0-100.00 % 0-60000 A 1A/5A 0-60000 A 1A/5A 0-60000 A 1A,5A 0-60000 A 0-75.00 mV 0-600 V Step 0.1 MW 0.01 0.01 kV 0.01 V 0.01 V 0.01 V 0.01 kV 0.01 V 1A 1A 0.01 % 0.01 % 1A 1A 1A 1A 1A 1A 1A 0.01 mV 0.01 V Default 50 300 0.85 20 11.55 57.74 33.33 11.55 57.74 12000 5 50 50 12000 5 12000 5 600 5 1000 75 200

15.1.5 Stepdown transformer system parameters


No. 1 2 3 4 5 6 Symbol Sn_ST U1n_HVS_ST U1n_LVS_ST U1n_VT_LVS_ST U2n_VT_LVS_ST U2n_DeltVT_LVS_ST Range 0-100 MVA 0-600 kV 0-600 kV 0-600 kV 57.74-110 V 33.33-110 V Step 0.01 MVA 0.01 kV 0.01 kV 0.01 kV 0.01 V 0.01 V Default 30 20 6.3 6.3 3.46 57.74
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No. 7 8 9 10 11 12 13 14 15 16 17 18 19

Symbol I1n_CT2_HVS_ST I2n_CT2_HVS_ST I1n_CT1_HVS_ST I2n_CT1_HVS_ST I1n_CT_LVS_ST I2n_CT_LVS_ST I1n_CT_NP_LVS_ST I2n_CT_NP_LVS_ST Yyy12_Conn_ST Ddd12_Conn_ST Dyy11_Conn_ST Ydd11_Conn_ST Dyy1_Conn_ST

Range 0-60000 A 1,5 A 0-60000 A 1,5 A 0-60000 A 1,5 A 0-60000 A 1,5 A 0/1 0/1 0/1 0/1 0/1

Step 1A 1A 1A 1A 1A 1A 1A 1A

Default 12000 1 1000 1 3000 1 3000 1 0 1 0 0 0

Logic setting 1 - enable, 0 disable

15.1.6 System parameters of excitation transformer or exciter


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Symbol fn_Exciter Sn_Exc U1n_S1_Exc U1n_S2_Exc U1n_VT_Exc U2n_VT_Exc U2n_DeltVT_Exc I1n_CT_S1_Exc I2n_CT_S1_Exc I1n_CT_S2_Exc I2n_CT_S2_Exc Opt_Exc Yy12_Conn_ET Dd12_Conn_ET Dy11_Conn_ET Yd11_Conn_ET Dy1_Conn_ET Range 50,100, 150Hz 0-100.00 MVA 0-600.00 kV 0-600.00 kV 0-600.00 kV 57.74-110 V 33.33-110 V 0-60000 A 1A,5A 0-60000 A 1A,5A Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0 0 0 0 1 0 Step 1Hz 0.01 MVA 0.01 kV 0.01 kV 0.01 kV 0.01 V 0.01 V 1A 1A 1A 1A Default 50 0.5 20 6.3 3.46 57.74 33.33 20 5 60 5

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Chapter 15 ANNEX

15.1.7 Implicit configuration settings


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Cfg_CT_Diff_Tr() Cfg_CT_Diff_Exc() Opt_Polar_CT() Cfg_CT_Bak_Tr() Cfg_CT_PwrProt_Gen() GTU, 2W_ST() 3/2Bus, GTU, 2W_ST() GTU, 3W_ST() 3/2Bus, GTU, 3W_ST() Tr, Gen, 2W_ST() 3/2Bus, Tr, Gen, 2W_ST() Tr, Gen, 3W_ST() 3/2Bus, Tr, Gen, 3W_ST() Gen_Only() Opt_WaveRec_MON() Opt_Debug_MON() Opt_Dur_WaveRec_MON() En_Displ_Pickup() Symbol Cfg_CT_Diff_GTU() Range 0000-FFFF 0000-FFFF 0000-FFFF 0000-FFFF 0000-FFFF 0000-FFFF 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 Pickup/Trip DSP2/DSP1 4S/8S Yes/No Default 000E 001B 0001 1FFF 0002 0001 0 0 1 0 0 0 0 0 0 Pickup DSP2 4S No

15.1.8 Settings of differential protection of generato-transformer unit


No. 1 2 3 4 5 6 7 8 9 10 Symbol I_Pkp_PcntDiff_GTU I_InstDiff_ GTU Slope1_PcntDiff_ GTU Slope2_PcntDiff_ GTU k_Harm_PcntDiff_GTU TrpLog_Diff_ GTU En_InstDiff_ GTU En_PcntDiff_ GTU Opt_Inrush_Ident_ GTU Opt_CTS_Blk_PcntDiff_ GTU Range 0.101.50 (Ie) 2.0014.00 (Ie) 0.000.50 0.500.80 0.10-0.35 0000FFFF Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 1 1 1 1 Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1 Default 0.3 6 0.1 0.7 0.15 7FFF

15.1.9 Settings of differential protection of main transformer


No. Symbol Range Step Default
427

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Chapter 15 ANNEX

No. 1 2 3 4 5 6 7 8 9 10 11 I_InstDiff_ Tr

Symbol I_Pkp_PcntDiff_Tr Slope1_PcntDiff_ Tr Slope2_PcntDiff_ Tr k_Harm_PcntDiff_Tr TrpLog_Diff_ Tr En_InstDiff_ Tr En_PcntDiff_ Tr En_DPFC_Diff_Tr Opt_Inrush_Ident_ Tr Opt_CTS_Blk_PcntDiff_Tr

Range 0.101.50 (Ie) 2.0014.00 (Ie) 0.000.50 0.500.80 0.10-0.35 0000FFFF

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1

Default 0.3 6 0.1 0.7 0.15 7FFF

Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 0, 1 1 1 1 1 1

15.1.10 Settings of phase to phase fault protection of main transformer


No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23.
428

Symbol V_NegOV_VCE_Tr Vpp_VCE_Tr I_OC1_Tr t_OC11_Tr TrpLog_OC11_Tr t_OC12_Tr TrpLog_OC12_Tr I_OC2_Tr t_OC21_Tr TrpLog_OC21_Tr t_OC22_Tr TrpLog_OC22_Tr Z1_Fwd_Tr Z1_Rev_Tr t_Z11_Tr TrpLog_Z11_Tr t_Z12_Tr TrpLog_Z12_Tr Z2_Fwd_Tr Z2_Rev_Tr t_Z21_Tr TrpLog_Z21_Tr I_Alm_OvLd_Tr

Range 1.00 V 20.00 V 2.00V-100.00V 0.10 A 100.00 A 0.00 s 10.00 s 0000-FFFF 0.00 s 10.00 s 0000-FFFF 0.10 A 100.00 A 0.00 s 10.00 s 0000-FFFF 0.00 s 10.00 s 0000-FFFF 0.00 100.00 Ohm 0.00 100.00 Ohm 0.00 10.00 s 0000-FFFF 0.00 10.00 s 0000-FFFF 0.00 100.00 Ohm 0.00 100.00 Ohm 0.00 10.00 s 0000-FFFF 0.10 100.00 A

Step 0.01 V 0.01 V 0.01 A 0.01 s 1 0.01 s 1 0.01 A 0.01 s 1 0.01 s 1 0.01Ohm 0.01Ohm 0.01 s 1 0.01 s 1 0.01Ohm 0.01Ohm 0.01 s 1 0.01 A

Default 4 60 15 1 000F 1.5 00F1 10 2 0F01 2.2 7001 20 20 1 0FFF 1 0FFF 20 20 1 0FFF 6

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Chapter 15 ANNEX

No. 24. 25. 26. 27. 28.

Symbol t_Alm_OvLd_Tr I_InitCool1_OvLd_Tr t_InitCool1_OvLd_Tr I_InitCool2_OvLd_Tr t_InitCool2_OvLd_Tr En_VCE_Ctrl_OC1_Tr En_VCE_Ctrl_OC2_Tr En_LVS.VCE_Ctrl_OC_Tr En_Mem_Curr_Tr Opt_VTS_Ctrl_OC_Tr En_OvLd_Tr En_InitCool_OvLd_Tr

Range 0.00 10.00 s 0.10 100.00 A 0.00 10.00 s 0.10 100.00 A 0.00 10.00 s logic setting 1 - enable, 0 disable

Step 0.01 s 0.01 A 0.01 s 0.01 A 0.01 s

Default 8 5.5 9 5.5 9 1 1 1 0 1 1 1

29. 30. 31. 32. 33. 34. 35.

0/1 0/1 0/1 0/1 0/1 0/1 0/1

15.1.11 Settings of earth fault protection of main transformer


No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. I_ROC1_Tr t_ROC11_Tr TrpLog_ROC11_Tr t_ROC12_Tr TrpLog_ROC12_Tr I_ROC2_Tr t_ROC21_Tr TrpLog_ROC21_Tr t_ROC22_Tr TrpLog_ROC22_Tr I_ROC3_Tr t_ROC31_Tr TrpLog_ROC31_Tr t_ROC32_Tr TrpLog_ROC32_Tr V_ROV_Gap_Tr t_ROV1_Gap_Tr TrpLog_ROV1_Gap_Tr t_ROV2_Gap_Tr TrpLog_ROV2_Gap_Tr Symbol V_ROV_VCE_Tr Range 2.00 100.00V 0.10 100.00A 0.0010.00s 0000-FFFF 0.0010.00s 0000-FFFF 0.10100.00A 0.00 10.00s 0000-FFFF 0.00 10.00s 0000-FFFF 0.10100.00A 0.00 10.00s 0000-FFFF 0.00 10.00s 0000-FFFF 2.00 200.00 V 0.00 10.00s 0000-FFFF 0.00 10.00s 0000 FFFF Step 0.01V 0.01A 0.01s 1 0.01s 1 0.01A 0.01 s 1 0.01s 1 0.01A 0.01 s 1 0.01s 1 0.01 V 0.01s 1 0.01s 1 Default 10 10 1 0021 1.5 0003 10 2 0003 2.5 001F 10 2 0003 2.5 001F 150 0.5 0003 1 001F

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Chapter 15 ANNEX

No. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. I_Alm_REF_Tr

Symbol I_Pkp_PcntREF_Tr I_InstREF_Tr Slope_PcntREF_Tr TrpLog_REF_Tr V_Alm_ROV_LVS_Tr t_Alm_ROV_LVS_Tr En_VCE.ROV_Ctrl_ROC1_Tr En_VCE.ROV_Ctrl_ROC2_Tr En_Dir_Ctrl_ROC1_Tr En_Dir_Ctrl_ROC2_Tr En_Alm_ROV_LVS_Tr En_BI_Ctrl_ROC_Gap_Tr En_InstREF_Tr En_PcntREF_Tr

Range 0.10 10.00 In 0.10 10.00 In 2.00 50.00 In 0.30 0.70 0000-FFFF 10.00 100.00V 0.00 10.00s

Step 0.01 In 0.01 In 0.01 In 0.01 1 0.01 V 0.01s

Default 0.1 0.3 6 0.3 7FFF 100 0.5 0 0 0 0 0 0 1 1

logic setting 1 - enable, 0 disable 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1

15.1.12 Settings of over excitation protection of main transformer


No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. k_OvExc1_Tr t_OvExc1_Tr TrpLog_OvExc1_Tr K_OvExc2_Tr t_OvExc2_Tr TrpLog_OvExc2_Tr k_Alm_OvExc_Tr t_Alm_OvExc_Tr k0_InvOvExc_Tr t0_InvOvExc_Tr k1_InvOvExc_Tr t1_InvOvExc_Tr k2_InvOvExc_Tr t2_InvOvExc_Tr k3_InvOvExc_Tr t3_InvOvExc_Tr k4_InvOvExc_Tr t4_InvOvExc_Tr Symbol Range 1.00 2.00 0.00 3000.00 s 0000 FFFF 1.00 2.00 0.00 3000.00 s 0000 FFFF 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s Step 0.01 0.01s 1 0.01 0.01s 1 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s 0.01 0.01s Default 1.4 1 000F 1.2 20 0F01 1.1 10 1.5 1 1.45 2 1.4 5 1.3 15 1.25 30

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19. 20. 21. 22. 23. 24. 25.

k5_InvOvExc_Tr t5_InvOvExc_Tr k6_InvOvExc_Tr t6_InvOvExc_Tr k7_InvOvExc_Tr t7_InvOvExc_Tr TrpLog_InvOvExc_Tr

1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 1.00 2.00 0.00 3000.00 s 0000 FFFF

0.01 0.01s 0.01 0.01s 0.01 0.01s 1

1.2 100 1.15 300 1.1 1000 7FFF

15.1.13 Settings of differential protection of generator


No. 1 2 3 4 5 6 7 8 9 Symbol I_Pkp_PcntDiff_Gen I_InstDiff_Gen Slope1_PcntDiff_Gen Slope2_PcntDiff_Gen TrpLog_Diff_Gen En_InstDiff_Gen En_PcntDiff_Gen En_DPFC_Diff_Gen Opt_CTS_Blk_PcntDiff_Gen Range 0.101.50 (Ie) 2.0014.00 (Ie) 0.000.50 0.300.80 0000FFFF Logic setting 1 - enable, 0 disable 0, 1 0, 1 0, 1 0, 1 1 1 1 1 Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 1 Default 0.1 6 0.05 0.5 7FFF

15.1.14 Settings of generator


No. 1. 2. 3. 4. 5. 6. 7. 8.

splitting-phase

transverse

differential

protection

of

Symbol I_Pkp_PcntSPTDiff_Gen I_InstSPTDiff_Gen Slope1_PcntSPTDiff_Gen Slope2_PcntSPTDiff_Gen TrpLog_SPTDiff_Gen En_InstSPTDiff_Gen En_PcntSPTDiff_Gen Opt_CTS_Blk_PcntSPTDiff_Gen

Range 0.10 1.50 (Ie) 2.00 14.00 (Ie) 0.00 -- 0.50 0.30 0.80 0000 -- FFFF 01 01 01

Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 1

Default 0.1 6 0.05 0.5 1FFF 1 1 1

Logic setting 1 - enable, 0 disable

15.1.15 Settings of turn-to-turn fault protection of generator


No. 1 2 Symbol I_SensTrvDiff_Gen I_UnsensTrvDiff_Gen Range 0.10 50.00 A 0.10 50.00 A Step 0.01 A 0.01 A Default 2.0 10
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Chapter 15 ANNEX

3 4 5 6 7 8 9 10 11 12

t_TrvDiff_Gen V_SensROV_Longl_Gen V_UnsensROV_Longl_Gen t_ROV_Longl_Gen TrpLog_IntTurn_Gen

0.00 10.00 S 1 10.00 V 2 20.00 V 0.10 10.00 S 0000 FFFF

0.01 S 0.01 V 0.01 V 0.01 S 1

0.2 1 6 0.1 7FFF 1 1 0 0 0

Logic setting 1 - enable, 0 disable 01 En_SensTrvDiff_Gen En_UnsensTrvDiff_Gen En_SensROV_Longl_Gen En_UnsensROV_Longl_Gen En_DPFC_IntTurn_Gen 01 01 01 01

15.1.16 Settings of phase to phase fault backup protection of generator


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Symbol V_NegOV_VCE_Gen Vpp_VCE_Gen I_OC1_Gen t_OC1_Gen TrpLog_OC1_Gen I_OC2_Gen t_OC2_Gen TrpLog_OC2_Gen Z1_Fwd_Gen Z1_Rev_Gen t_Z1_Gen TrpLog_Z1_Gen Z2_Fwd_Gen Z2_Rev_Gen t_Z2_Gen TrpLog_Z2_Gen Range 1.00 20.00 V 10.00 100.00 V 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.00 100.00 0.00 100.00 0.00 10.00 S 0000 FFFF 0.00 100.00 0.00 100.00 0.00 10.00 S 0000 FFFF Step 0.01 V 0.01 V 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 0.01 0.01 S 1 0.01 0.01 0.01 S 1 Default 4 60 20 1 000F 17 2 0F01 20 20 1 0FFF 20 20 1 0FFF 1 1 0 1 1 1

Logic setting 1 - enable, 0 disable 01 En_VCE_Ctrl_OC1_Gen En_VCE_Ctrl_OC2_Gen En_HVS.VCE_Ctrl_OC_Gen Opt_VTS_Ctrl_OC_Gen Opt_ExcMode_Gen En_BO_OC2_Gen 01 01 01 01 01

15.1.17 Settings of earth fault protection of stator windings


No. 1
432

Symbol V_SensROV_Sta

Range 0.10 50.00 V

Step 0.01 V

Default 2.0

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Chapter 15 ANNEX

2 3 4 5 6 7 8 9 10 11 12 13 14

V_UnsensROV_Sta t_ROV_Sta k_V3rdHRatio_PreSync_Sta k_V3rdHRatio_PostSync_Sta k_V3rdHDiff_Sta t_V3rdH_Sta TrpLog_EF_Sta

0.10 50.00 V 0.00 10.00 S 0.50 10.00 0.50 10.00 0.10 2.00 0.00 10.00S 0000 FFFF

0.01 V 0.01 S 0.01 0.01 0.01 0.01 S 1

10 2 1 1 1 3 7FFF 1 1 1 1 0 1

Logic setting 1 - enable, 0 disable 01 En_Alm_ROV_Sta 01 En_Trp_ROV_Sta En_Alm_V3rdHRatio_Sta 01 En_Alm_V3rdHDiff_Sta En_Trp_V3rdHRatio_Sta En_Trp_UnsensRov_Sta 01 01 01

15.1.18 Settings of earth fault protection of rotor


No. 1 2 3 4 5 6 7 8 9 10 11 Symbol R_Sens_1PEF_RotWdg R_1PEF_RotWdg t_1PEF_RotWdg V2ndH_VCE_2PEF_RotWdg t_2PEF_RotWdg TrpLog_EF_RotWdg Range 0.10 100.00 k 0.10 100.00 k 0.00 10.00 S 0.10 10.00 V 0.00 - 10.00 S 0000 FFFF Step 0.01 k 0.01 k 0.01 S 0.01 V 0.01 S 1 Default 20 20 1 2 1 0FFF 1 1 1 1 0

Logic setting 1 - enable, 0 disable 01 En_Alm_Sens_1PEF_RotWdg En_Alm_1PEF_RotWdg En_Trp_1PEF_RotWdg En_2PEF_RotWdg En_VCE_2PEF_RotWdg 01 01 01 01

15.1.19 Settings of thermal overload protection of stator


No. 1 2 3 4 5 6 7 8 9 Symbol I_OvLd_Sta t_OvLd_Sta TrpLog_OvLd_Sta I_Alm_OvLd_Sta t_Alm_OvLd_Sta I_InvOvLd_Sta tmin_InvOvLd_Sta A_Therm_Sta Kb_Therm_Sta Range 0.10 50.00 A 0.00 10.00 S 0000 FFFF 0.10 50.00 A 0.00 10.00 S 0.10 100.00 A 0.10 10.00 S 1.00 100.00 0.00 10.00 Step 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 A 0.01 S 0.01 0.01 Default 10 1 000F 7 2 6 1 40 1
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Chapter 15 ANNEX

10

TrpLog_InvOvLd_Sta

0000 FFFF

7FFF

15.1.20 Settings of negative sequence overload protection of stator


No. 1 2 3 4 5 6 7 8 9 10 Symbol I_NegOC_Sta t_NegOC_Sta TrpLog_NegOC_Sta I_Alm_NegOC_Sta t_Alm_NegOC_Sta I_InvNegOC_Sta I2 _Perm_Sta tmin_InvNegOC_Sta A_Therm_RotBody TrpLog_InvNegOC_Sta Range 0.10 20.00 A 0.00 10.00 S 0000 - FFFF 0.10 20.00 A 0.00 10.00 S 0.05 5.00 A 0.05 5.00 A 0.00 10.00 S 1 100.00 0000 - FFFF Step 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 A 0.01 A 0.01 S 0.01 1 Default 10 1 000F 1.0 2 0.5 0.4 1 40 7FFF

15.1.21 Settings of Loss-of-Excitation protection of generator


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
434

Symbol X1_LossExc_Gen X2_LossExc_Gen Q_RevQ_LossExc_Gen V_RotUV_LossExc_Gen V_RotNoLoad_LossExc_Gen k_RotUV_LossExc_Gen V_BusUV_LossExc_Gen P_UP_LossExc_Gen t_LossExc1_Gen t_LossExc2_Gen t_LossExc3_Gen TrpLog_LossExc1_Gen TrpLog_LossExc2_Gen TrpLog_LossExc3_Gen

Range 0.00 -100.00 0.00 -100.00 0.01 50.00 % 1.0 500.00 V 1.0 500.00 V 0.10 10.00 (pu) 10.00 100.00 V 10 100.00 % 0.10 10.00 S 0.10 10.00 S 0.10 3000.00 S 0000 0000 0000 FFFF FFFF FFFF

Step 0.01 0.01 0.01 % 0.01 V 0.01 V 0.01 (pu) 0.01 V 0.01 % 0.01 S 0.01 S 0.01 S 1 1 1

Default 5 20 10 30 50 2 85 50.0 0.5 1.0 3.0 7FFF 7FFF 7FFF 1 1 0 1 1 1 1 1 0

Logic setting 1 - enable, 0 disable 01 En_Z_LossExc1_Gen En_RotUV_LossExc1_Gen En_P_LossExc1_Gen En_BusUV_LossExc2_Gen En_Z_LossExc2_Gen En_RotUV_LossExc2_Gen En_Z_LossExc3_Gen En_RotUV_LossExc3_Gen En_Alm_LossExc1_Gen 01 01 01 01 01 01 01 01

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Chapter 15 ANNEX

No. 24 25 26

Symbol Opt_Z_LossExc_Gen En_RevQ_LossExc_Gen Opt_UV_LossExc_Gen

Range 01 01 01

Step

Default 1 0 0

15.1.22 Settings of out-of-step protection of generator


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Symbol Za_OOS_Gen Zb_OOS_Gen Zc_OOS_Gen _Reach_OOS_Gen _Inner_OOS_Gen n_Slip_Ext_OOS_Gen n_Slip_Int_OOS_Gen Ibrk_TCB TrpLog_OOS_Gen Range 0.00 100.00 0.00 100.00 0.00 100.00 60.00 90.00 60.00 150.00 1-1000 1-1000 1.00 100.00 A 0000 - FFFF Step 0.01 0.01 0.01 0.1 0.1 1 1 0.01 A 0.01 Default 10 5 5 85 120 5 2 10 1FFF 1 1 1 1

Logic setting 1 - enable, 0 disable 01 En_Alm_Ext_OOS_Gen En_Trp_Ext_OOS_Gen En_Alm_Int_OOS_Gen En_Trp_Int_OOS_Gen 01 01 01

15.1.23 Settings of voltage protection


No. 1 2 3 4 5 6 7 8 9 Symbol V_OV1_Gen t_OV1_Gen TrpLog_OV1_Gen V_OV2_Gen t_OV2_Gen TrpLog_OV2_Gen V_UV_Gen t_UV_Gen TrpLog_UV_Gen Range 10.0 170.00 V 0.10 10.00 S 0000 FFFF 10.0 170.00 V 0.10 10.00 S 0000 FFFF 10.0 100.00 V 0.10 10.00 S 0000 FFFF Step 0.01V 0.01S 1 0.01V 0.01S 1 0.01V 0.01S 1 Default 150 0.3 7FFF 130 0.5 7FFF 80 1.5 7FFF

15.1.24 Settings of overexcitation protection of generator


No. 1 2 3 4 Symbol k_OvExc1_Gen t_OvExc1_Gen TrpLog_OvExc1_Gen k_OvExc2_Gen Range 1.00 2.00 0.1 3000.0 S 0000 FFFF 0.10 2.00 Step 0.01 0.1 S 1 0.01 Default 1.4 1 000F 1.2
435

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Chapter 15 ANNEX

No. 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Symbol t_OvExc2_Gen TrpLog_OvExc2_Gen k_Alm_OvExc_Gen t_Alm_OvExc_Gen k0_InvOvExc_Gen t0_InvOvExc_Gen k1_InvOvExc_Gen t1_InvOvExc_Gen k2_InvOvExc_Gen t2_InvOvExc_Gen k3_InvOvExc_Gen t3_InvOvExc_Gen k4_InvOvExc_Gen t4_InvOvExc_Gen k5_InvOvExc_Gen t5_InvOvExc_Gen k6_InvOvExc_Gen t6_InvOvExc_Gen k7_InvOvExc_Gen t7_InvOvExc_Gen TrpLog_InvOvExc_Gen

Range 0.1 3000.0 S 0000 FFFF 1.00 2.00 0.1 10.00 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 1.00 2.00 1.0 3000.0 S 0000 FFFF

Step 0.1 S 1 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 0.01 0.1 S 1

Default 20 0F01 1.1 10 1.5 1 1.45 2 1.4 5 1.3 15 1.25 30 1.2 100 1.15 300 1.1 1000 7FFF

15.1.25 Settings of power protection of generator


No. 1 2 3 4 5 6 7 8 9 10 Symbol P_RevP_Gen t_Alm_RevP_Gen t_Trp_RevP_Gen TrpLog_RevP_Gen P_UP_Gen t_UP_Gen TrpLog_UP_Gen P_SeqTrp_RevP_Gen t_SeqTrp_RevP_Gen TrpLog_SeqTrp_RevP_Gen Range 0.50 10.00 % 0.10 25.00 S 0.10 600.0 S 0000 FFFF 1.00 200.00 % 0.00 300.00 M 0000 FFFF 0.50 10.00 % 0.10 10.00 S 0000 FFFF Step 0.01% 0.1 S 0.1 S 1 0.01 % 0.01 M 1 0.01 % 0.01 S 1 Default 2 10 10 7FFF 20 10 7FFF 2 1 7FFF

15.1.26 Settings of underfrequency and overfrequency protection of generator


No. 1 2 3
436

Symbol f_UF1_Gen t_UF1_Gen f_UF2_Gen

Range 45.00 51.00 Hz 0.00 300.00 min 45.00 51.00 Hz

Step 0.01 Hz 0.01min 0.01 Hz

Default 48.5 10 48

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Chapter 15 ANNEX

No. 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

Symbol t_UF2_Gen f_UF3_Gen t_UF3_Gen f_UF4_Gen t_UF4_Gen TrpLog_UF_Gen f_OF1_Gen t_OF1_Gen f_OF2_Gen t_OF2_Gen TrpLog_OF_Gen

Range 0.00 300.00 min 45.00 51.00 Hz 0.00 100.00 min 45.00 51.00 Hz 0.00 100.00 min 0000 FFFF 50.00 60.00 Hz 0.10 100.00 min 50.00 60.00 Hz 0.10 100.00 S 0000 FFFF

Step 0.01min 0.01 Hz 0.01 min 0.01 Hz 0.01 min 1 0.01 Hz 0.01min 0.01 Hz 0.01 S 1

Default 10 47.5 10 46 10 7FFF 51.5 10 55 10 7FFF 1 0 1 0 1 0 1 0 1 0 1 1 0

Logic setting 1 - enable, 0 disable 01 En_Alm_UF1_Gen En_Trp_UF1_Gen En_Alm_UF2_Gen En_Trp_UF2_Gen En_Alm_UF3_Gen En_Trp_UF3_Gen En_Alm_UF4_Gen En_Trp_UF4_Gen En_Alm_OF1_Gen En_Trp_OF1_Gen En_Alm_OF2_Gen En_Trp_OF2_Gen En_BO_UC_OvSp_Gen 01 01 01 01 01 01 01 01 01 01 01 01

15.1.27 Settings of startup and shutdown protection of generator


No. 1 2 3 4 5 6 7 8 9 10 11 12 Symbol f_UF_StShut_Gen I_TrDiff_StShut_Gen I_STDiff_StShut_Gen I_GenDiff_StShut_Gen I_SPTDiff_StShut_Gen I_ExcDiff_StShut_Gen TrpLog_Diff_StShut_Gen V_StaROV_StShut_Gen t_StaROV_StShut_Gen TrpLog_StaROV_StShut_Gen Range 40.0 50.0Hz 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0.1 - 14.0 (Ie) 0000 FFFF 5 25.0 V 0.10 10.0 S 0000 FFFF Step 0.01 Hz 0.01 (Ie) 0.01 (Ie) 0.01 (Ie) 0.01 (Ie) 0.01 (Ie) 1 0.01 V 0.01 S 1 Default 45 1 1 1 1 1 7FFF 10 10 7FFF 1 0
437

Logic setting 1 - enable, 0 disable 01 En_TrDiff_StShut_Gen En_STDiff_StShut_Gen 01

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En_GenDiff_StShut_Gen En_SPTDiff_StShut_Gen En_ExcDiff_StShut_Gen En_StaROV_StShut_Gen En_UF_Ctrl_StShut_Gen

01 01 01 01 01

1 0 0 1 1

15.1.28 Settings of accidental energization protection of generator


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Symbol f_UF_AccEnerg_Gen I_OC_AccEnerg_Gen Ibrk_TCB t_AccEnerg_Gen TrpLog_AccEnerg_Gen I_NegOC_Flash_TCB t_Flash1_TCB TrpLog_Flash1_TCB t_Flash2_TCB TrpLog_Flash2_TCB Range 40 50.00 Hz 0.10 - 100.00 A 1.00 100.00 A 0.0 1.00 S 0000- FFFF 0.1 20.0 A 0.1 - 1.0 S 0000 FFFF 0.1 - 1.0 S 0000 FFFF Step 0.01 Hz 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A 0.01 A Default 45 3 10 0.1 7FFF 3 3 7FFF 3 7FFF 1 1 0

Logic setting 1 - enable, 0 disable 01 En_UF_Ctrl_AccEnerg_Gen En_CB_Ctrl_AccEnerg_Gen En_Ibrk_Ctrl_Trp_TCB 01 01

15.1.29 Settings of differential protection of excitation transformer or exciter


No. 1 2 3 4 5 6 7 8 9 10 Symbol I_Pkp_PcntDiff_Exc I_InstDiff_Exc Slope1_PcntDiff_Exc Slope2_PcntDiff_Exc k_Harm_PcntDiff_Exc TrpLog_Diff_Exc En_InstDiff_Exc En_PcntDiff_Exc Opt_Inrush_Ident_Exc Opt_CTS_Blk_PcntDiff_Exc Range 0.10 1.50 (Ie) 2.0 14.0 (Ie) 0.00 0.50 0.50 0.80 0.10 0.35 0000 FFFF Logic setting 1 enable, 0 disable 01 01 01 01 Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1 Default 0.3 6 0.1 0.7 0.15 7FFF 1 1 1 1

15.1.30 Settings of backup protection of excitation transformer or exciter


No. 1
438

Symbol V_NegOV_VCE_Exc

Range 1.00 20.00 V

Step 0.01 V

Default 4

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Vpp_VCE_Exc I_OC1_Exc t_OC1_Exc TrpLog_OC1_Exc I_OC2_Exc t_OC2_Exc TrpLog_OC2_Exc

2.00 100.00 V 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 25.00 S 0000 FFFF

0.01 V 0.01 A 0.01 S 1 0.01 A 0.01 S 1

60 20 1 0081 20 1.5 0081 1 1 0 1 0 0

Logic setting 1 enable, 0 disable 01 En_VCE_Ctrl_OC1_Exc En_VCE_Ctrl_OC2_Exc En_Mem_Curr_Exc Opt_VTS_Ctrl_OC_Exc Opt_AC_Input_S1_Exc Opt_AC_Input_S2_Exc 01 01 01 01 01

15.1.31 Settings of overload protection of excitation


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol I_OvLd_RotWdg t_OvLd_RotWdg TrpLog_OvLd_RotWdg I_Alm_OvLd_RotWdg t_Alm_OvLd_RotWdg I_InvOvLd_RotWdg tmin_InvOvLd_RotWdg A_Therm_RotWdg Ib_InvOvLd_RotWdg TrpLog_InvOvLd_RotWdg Range 0.10 100.00 AkA 0.00 25.00 S 0000 FFFF 0.10 100.00 AkA 0.10 25.00 S 0.10 50.00 AkA 0.10 10.00 S 1.00 100.00 0.1 50.00AkA 0000 FFFF Step 0.01AkA 0.01S 1 0.01AkA 0.01S 0.01AkA 0.01S 0.01 0.01AkA 1 Default 10 1 000F 7 2 6 1 40 1 7FFF 1 0 0 0

Logic setting 1 - enable, 0 disable 01 Opt_AC_Input_RotWdg Opt_DC_Input_RotWdg Opt_AC_Input_S1_RotWdg Opt_AC_Input_S2_RotWdg 01 01 01

15.1.32 Settings of differential protection of stepdown transformer


No. 1 2 3 4 5 6 Symbol I_Pkp_PcntDiff_ST I_InstDiff_ST Slope1_PcntDiff_ST Slope2_PcntDiff_ST k_Harm_PcntDiff_ST TrpLog_Diff_ST Range 0.10 1.50 (Ie) 2.0 14.0 (Ie) 0.00 0.50 0.50 0.80 0.10 0.35 0000 FFFF Step 0.01 (Ie) 0.01 (Ie) 0.01 0.01 0.01 1 Default 0.3 6 0.1 0.7 0.15 7FFF
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No. 7 8 9 10

Symbol En_InstDiff_ST En_PcntDiff_ST Opt_Inrush_Ident_ST Opt_CTS_Blk_PcntDiff_ST

Range

Step

Default 1 1 1 1

Logic setting 1 enable, 0 disable 01 01 01 01

15.1.33 Settings of backup protection at HVS of stepdown transformer


No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Symbol V_NegOV_VCE_HVS_ST Vpp_VCE_ HVS_ST I_OC1_HVS_ST t_OC1_HVS_ST TrpLog_OC1_HVS_ST I_OC2_HVS_ST t_OC2_HVS_ST TrpLog_OC2_HVS_ST I_Alm_OvLd_HVS_ST t_Alm_OvLd_HVS_ST I_InitCool1_OvLd_HVS_ST t_InitCool1_OvLd_HVS_ST I_InitCool2_OvLd_HVS_ST t_InitCool2_OvLd_HVS_ST Range 1.00 20.00 V 2.00 100.00 V 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 50.00 A 0.00 10.00 S 0.10 50.00 A 0.00 10.00 S 0.10 50.00 A 0.00 10.00 S Step 0.01 V 0.01 V 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 A 0.01 S 0.01 A 0.01 S Default 4 60 20 1 0021 17 2 0003 6 8 5.5 9 5.5 9 1 1 0 1 1 1 0

Logic setting 1 enable, 0 disable 01 En_VCE_Ctrl_OC1_HVS_ST En_VCE_Ctrl_OC2_HVS_ST En_Mem_Curr_HVS_ST Opt_VTS_Ctrl_OC_HVS_ST En_Alm_OvLd_HVS_ST En_InitCool_OvLd_HVS_ST En_LVSProt_Blk_OC1_HVS_ST 01 01 01 01 01 01

15.1.34 Settings of backup protection at LVS of stepdown transformer


No. 1 2 3 4 5 6 7
440

Symbol V_NegOV_VCE_LVS_ST Vpp_VCE_LVS_ST I_OC1_LVS_ST t_OC1_LVS_ST TrpLog_OC1_LVS_ST I_OC2_LVS_ST t_OC2_LVS_ST

Range 1.00 20.00 V 2.00 100.00 V 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S

Step 0.01 V 0.01 V 0.01 A 0.01 S 1 0.01 A 0.01 S

Default 4 60 20 1 0021 17 2

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TrpLog_OC2_LVS_ST I_ROC1_LVS_ST t_ROC1_LVS_ST TrpLog_ROC1_LVS_ST I_ROC2_LVS_ST t_ROC2_LVS_ST TrpLog_ROC2_LVS_ST I_OvLd_LVS_ST t_OvLd_LVS_ST V_ROV_LVS_ST t_ROV_LVS_ST

0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0000 FFFF 0.10 100.00 A 0.00 10.00 S 0.10 100.00 V 0.00 10.00 S

1 0.01 A 0.01 S 1 0.01 A 0.01 S 1 0.01 A 0.01 S 0.01 V 0.01 S

0003 20 1 0021 17 2 0003 15 2 15 2 1 1 1 0 0

Logic setting 1 enable, 0 disable 01 En_VCE_Ctrl_OC1_LVS_ST En_VCE_Ctrl_OC2_LVS_ST Opt_VTS_Ctrl_OC_LVS_ST En_Alm_OvLd_LVS_ST En_Alm_ROV_LVS_ST 01 01 01 01

15.1.35 Settings of restrict earth fault protection of stepdown transformer


No. 1 2 3 4 5 6 7 Symbol I_Alm_REF_ST I_Pkp_PcntREF_ST I_InstREF_ST Slope_PcntREF_ST TrpLog_REF_ST En_InstREF_ST En_PcntREF_ST Range 0.10 10.00 In 0.10 10.00 In 2.00 50.00 In 0.30 0.70 0000 FFFF Logic setting 1 - enable, 0 disable 01 01 Step 0.01In 0.01In 0.01In 0.01 1 Default 0.1 0.3 6 0.3 7FFF 1 0

15.1.36 Settings of mechnical protection


No. 1 2 3 4 5 6 7 8 9 Symbol t_MechRly1 TrpLog_MechRly1 t_MechRly2 TrpLog_MechRly2 t_MechRly3 TrpLog_MechRly3 t_MechRly4 TrpLog_MechRly4 Range 0.00 6000.0 S 0000 0000 0000 0000 FFFF FFFF FFFF FFFF 0.00 6000.0 S 0.00 6000.0 S 0.00 6000.0 S Step 0.1S 1 0.1S 1 0.1S 1 0.1S 1 Default 1 0011 1 0011 1 0011 1 0011 1
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Logic setting 1 - enable, 0 disable 01 En_Supv_MechRly

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15.1.37 Settings of pole disagreement protection of circuit breaker


No 1 2 3 4 5 6 7 I_OC_PD I_NegOC_PD I_ROC_PD T_PD1 TrpLog_PD1 t_PD2 TrpLog_PD2 Symbol Range 0.10 20.00 A 0.10 20.00 A 0.10 20.00 A 0.00 10.00 s 0000 FFFF 0.00 10.00 s 0000 FFFF logic setting 1 - enable, 0 disable 0/1 0/1 0/1 0/1 Step 0.01A 0.01A 0.01A 0.01s 1 0.01s 1 Default 1 1 3 0.5 000F 1 00FF

8 9 10 11

En_NegOC_PD En_ROC_PD En_ExTrp_Ctrl_PD2 En_OC_PD2

1 1 1 0

15.1.38 Calculated parameters of primary rated current


NO. 1 2 3 4 5 6 7 8 9 10 Symbol I1b_SnTr_CT_HVS_Tr I1b_SnTr_CT_LVS_Tr I1b_SnGen_CT_Gen I1b_SnGen_CT_SP1_Gen I1b_SnGen_CT_SP2_Gen I1b_SnST_CT_HVS_ST I1b_SnST_CT_LVS_ST I1b_SnST_CT_Br2_ST I1b_SnExc_CT_S1_Exc I1b_SnExc_CT_S2_Exc Range 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A 0-60000 A Note

15.1.39 Calculated parameters of secondary rated current


NO. 1 2 3 4 5 6 7 Symbol I2b_SnTr_CT_HVS1_Tr I2b_SnTr_CT_HVS2_Tr I2b_SnTr_CT_LVS_Tr I2b_SnTr_CT_HVS_ST I2b_SnTr_CT_HVS_GTU I2b_SnTr_CT_LVS_GTU I2b_SnTr_CT_ST_GTU Range 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A Note

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8 9 10 11 12 13 14 15 16

I2b_SnGen_CT_Term_Gen I2b_SnGen_CT_SP1_Gen I2b_SnGen_CT_SP2_Gen I2b_SnST_CT2_HVS_ST I2b_SnST_CT1_HVS_ST I2b_SnST_CT_LVS_ST I2b_SnST_CT_Br2_ST I2b_SnExc_CT_S1_Exc I2b_SnExc_CT_S2_Exc

0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A 0-600 A

15.1.40 Calculated parameters of secondary rated voltage


NO. 1 2 3 4 5 6 7 8 9 10 11 12 Symbol U2b_VT_HVS_Tr U2b_DeltVT_HVS_Tr U2b_VT_Term_Gen U2b_DeltVT_Term_Gen U2b_NP_Gen k_DeltVT_Gen U2b_VT_LVS_ST U2b_DeltVT_LVS_ST U2b_VT_Br2_ST U2b_DeltVT_Br2_ST U2b_VT_Exc U2b_DeltVT_LVS_Tr Range 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V 0-600 V Note

15.1.41 Calculated parameters of differential coefficient


NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol k_TrHVS1_Diff_Tr k_TrHVS2_Diff_Tr k_TrLVS_Diff_Tr k_ST_Diff_Tr k_TrHVS_Diff_GTU k_NP_Diff_GTU k_ST_Diff_GTU k_Term_Diff_Gen k_SP1_Diff_Gen k_SP2_Diff_Gen k_HVS_Diff_ST k_LVS_Diff_ST k_Br2_Diff_ST k_S1_Diff_Exc Range 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60 0-60
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Note

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15 16 17 18 19

k_S2_Diff_Exc k_NP_REF_Tr k_REF_Tr k_NP_REF_ST k_REF_ST

0-60 0-60 0-60 0-60 0-60

15.2 Appendix B: DBG2000 for RCS-985 (User Version)


15.2.1 General
DBG2000 Configuration and testing program (user version) is developed for the user to configure, test and maintain RCS-985 series protection equipment on site. It comprises four parts: sampled value display, settings reading and modification, report process and trip test. For RCS-985B, these four parts correspond to 4 files 985B3YD_status, 985B3YD _set, 985B3YD_rpt and 985B3YD_tst respectively and are described hereinafter (X represents the special type the protection program, for example, RCS-985B3YD, here, x represent B3YD). Connect RS-232 communication port of the computer and that mounted on left side of front panel of RCS- 985 protection equipment by a cable with DB-9 connectors on both ends. Run the program DBG2000. If the connection is correct, the screen will display RCS-985B3YD connected, see Figure 15-1 . Even if the computer is off line, this picture will be still displayed but the words about connection will disappear.

Figure 15-1 RCS-985 being connected There are 3 bars on top of the screen, from top to bottom: title bar, menu bar and tool bar, see Figure 15-2.

Figure 15-2 Title bar, menu bar and tool bar

First, click the first button of tool bar

parameter, dialog box of communication parameters is

displayed, see Figure 15-3. Only the parameter of COM port shall be configured as the number of port of computer that is actually connected with the equipment, other parameters shall be configured as the same as displayed values in figure. The title bar shows only title of the program and needs no explanation. Menu bar and tool bar are described as follows:

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15.2.2 Menu bar


There are five menus in the menu bar: File, Execute, View, Set and Help. Click button of each menu, items will be pulled down, see Figure 15-4. The gray items are used not for the user version but others. 1) File

There is only one item in pull-down menu File, i.e., Exit. Click Exit(X), the program will be exited. 2) Execute

There are three items in pull-down menu Execute: Setting(E), Download(D) and Trip_Test(T). Click Setting(E), entering settings reading and modification part of the program, please refer to section 15.2.3 for details. Item Download(D) is not used for this program but others. Click Trip_Test(T), entering trip test part of the program, please refer to section 15.2.5 for details. 3) View

There are five items in pull-down menu View: Toolbar(T), Status(S), Report(L), Status(Z) and Message(M). Item Toolbar specifies whether the tool bar shall be displayed. When the tool bar is displayed, a symbol is put before Toolbar (T). If this item is clicked then, the tool bar will be hidden and the symbol will disappear.

Figure 15-3 Dialog box of communication Parameters

Figure 15-4 Submenu of menu bar Item Status(S) specifies whether status bar in the bottom of the picture shall be displayed. Click Report(L), entering Report treatment part of the program, please refer to section 15.2.4 for details. Click Status(Z), entering Sampled value display part of the program, see section 15.2.2 for details
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Chapter 15 ANNEX Click Message(M), data flow between DBG2000 program and the protection equipment will be displayed. This is used not for the user version but development version of the program.

4)

Set

There are five items in pull-down menu Set: Switch_CPU_MON(P), Parameter(C), Back_color(B), Font-Color(F) and Font(O). If there is a symbol before item Switch_CPU_MON(P), that means data acquired by module CPU are displayed currently, see Figure 15-1. If the item Switch_CPU_MON(P) is clicked then, the data displayed will be changed to those acquired by module MON, see Figure 15-5. will disappear. Meanwhile, symbol

Figure 15-5 Switching on data acquired by module MON Function of item Parameter(C) is the same as the first button of tool bar parameter. dialog box of communication parameters will be displayed, see Figure 15-3. Click Back_Color(B), dialog box of background color is displayed. for background displayed. Click Font_Color(F), dialog box of font color is displayed. displaying. Click Font(O), dialog box of name, style and size of the font is displayed. preferred ones for font displaying. The user can select the The user can select preferred color for font The user can select preferred color Click this item,

5)

Help

There are three items in pull-down menu Help: Help(H), Version(N) and About Dbg2000. Click Help(H), commands used for the program will be displayed. It is not necessary for the user to use these commands, and no further information about them is presented here.
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Chapter 15 ANNEX Click Version(N), historical record about time and description of updating of this program is displayed. Click About Dbg2000, developer of this program and copyright declaration will be displayed.

15.2.3 Tool bar


There are 23 buttons in the tool bar, in which 16 buttons are enabled. from left to right as follows: 1) Parameter Click They are depicted in sequence

Function of this button is the same as that of item Parameter(C) of menu Set of the menu bar. this button, dialog box of communication parameters will be displayed, see Figure 15-3. 2) Data parameter

Click this button, other parameters will be displayed. They are data start address, data block size, single data block number, report data number, etc, 11 items in total. These parameters are configured already in the coefficient y and needs no further Configuration on site. 3) Device type

Click this button, a small dialog box please enter device type is displayed. Type of the protection equipment shall be entered. In the RCS-985 case, the device type is 985B3YD. for the user to make configuration in off line condition. 4) Setting Click this button, This is used mainly

Function of this button is the same as item Setting(E) of menu Execute of menu bar. details. 5) Status

i.e. entering settings reading and modification part of the program; Please refer to section 15.2.3 for

Function of this button is the same as item Status(Z) of menu View of menu bar.

Click this button,

entering Sampled value display part of the program; Please refer to section 15.2.2 for details. 6) Report Click this button,

Function of this button is the same as item Report(L) of menu View of menu bar. entering Report view part of the program; Please refer to section 15.2.2 for details. 7) Trip test

Click this button, entering trip test part of the program; Please refer to section 15.2.2 for details.

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Chapter 15 ANNEX 8) Switch to command

When several dialog boxes are displayed, and the operator wants to enter Command mode but not close dialog box, this button can be used to switch on Command and hide dialog boxes. not needed for the user on site generally. 9) Download program However, it is

This button is used not for this program but others. 10) CPU<>MON

Function of this button is the same as item Switch_CPU_MON(P) of menu Set of menu bar. Click this button, data displayed will be changed between those acquired by module CPU and module MON one after another. 11) Set font

Function of this button is the same as item Font(O) of menu Set of menu bar. 12) Set font color

Function of this button is the same as item Font_Color(F) of menu Set of menu bar. 13) Set background color

Function of this button is the same as item Back_Color(B) of menu Set of menu bar. Six buttons version but others of this program. 14) SIG RESET on right hand of are all gray. They are used not for this

Click this button, all activated output relays and signal relays will be reset. 15) Synchronize time

This function is not used for the program of RCS-985. 16) Help

Function of this button is the same as item Help(H) of menu Help of menu bar. Besides, some shortcut keys on keyboard of the computer have same functions with items of menu of menu bar or buttons of tool bar:
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Chapter 15 ANNEX F1 same as item Help(H) of menu Help and button Help of tool bar; F2 same as item Parameter(C) of menu Set and button Parameter of tool bar; F3 same as item Switch_CPU_MON(P) of menu Set and button CPU<->MON of tool bar; F4 same as item Setting(E) of menu Execute and button Setting of tool bar; F5 same as item Status(S) of menu View and button Status of tool bar; F6 same as item Report(L) of menu View and button Report of tool bar.

15.2.3.1 Sampled Value Displaying Click item Status(S) of menu View or button values will be displayed. Click label , Figure 15-6 a) and b) will be displayed. They can be exchanged on left hand of the bottom or pull down box hand of the bottom Virtual_binary Status of tool bar, real time sampled analog

to each other by clicking two arrows on input/Others_Binary_Input. right

Page 1 shows enabling (1) and disabling (0) of functions:

Figure 15-6 Binary input statuspage 1, module CPU

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Figure 15-7 Binary input statuspage 2, module CPU Page 2 shows mechanical protection inputs as well as others binary input status where 1 is yes and 0 is no.

Figure 15-8 Binary input statuspage 3, module CPU Page 3 shows pickup of protective elements where 1 is activated and 0 is inactivated.

Figure 15-6 a) and b) are pictures of value of module CPU, and can be changed to value of module MON by CPU-MON choose item at the right hand of bottom of this page.

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Figure 15-9 Example1 of phase angle displaying

Figure 15-10 Example2 of phase angle displaying

Pull down box at right hand of the bottom is gray. That means these values exist only in module MON and cannot be read from module CPU. 15.2.3.2 Settings Reading and Modification
This part is used for reading and modification of settings of the equipment. menu Execute or the fourth button Click item Setting(E) of

Setting of tool bar, settings will be displayed. For example,

Figure 15-9 shows the parameters of the equipment.


Click label shown in Figure 15-9. in picture of Setting(E), parameters of the equipment will be displayed as

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Chapter 15 ANNEX

Figure 15-11 Parameter of the equipment In the same way, user can click other labels in picture of Setting(E) to read and modification all the settings of the equipment.

There are 7 buttons in bottom of every picture of the part Settings reading and modification. From left to right, they are: PRINT, DEFAULT, UPLOAD, DOWNLOAD, READ, SAVE and CLOSE and depicted as follows: NO. 1. 2. 3. 4. 5. 6. 7. Button PRINT DEFAULT UPLOAD Function
Print settings displayed in current picture. Read and display default settings of RCS-985 from file of DBG2000. Read and display actual settings of RCS-985 connected with the PC.

DOWNLOAD Send current settings displayed on PC to RCS-985 connected. READ SAVE CLOSE
Read settings from a file saved in computer. Save current settings displayed in the computer as a file. Close current dialog box.

If default settings are displayed and button UPLOAD is pressed, default settings displayed will be replaced by actual settings of the protection equipment, in which, the settings different from default settings will be displayed in red. Vice versa, if actual settings are displayed and button DEFAULT is pressed, actual settings displayed will be replaced by default settings of the protection equipment, in which, the settings different from actual settings will be displayed in red.

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15.2.4 Report
There are 3 kinds of reports in this program: tripping report, self-diagnose report and change of status report. The tripping report is displayed first.

15.2.4.1 Tripping report Click item Report(L) of menu View, or click the sixth button of tool bar, tripping report will be

displayed for a moment. It is the report of operation of protection relays, including number of the report, time of pickup of protection, time interval from pickup to operation, name of the operating protection element and the faulty phase, see Figure 15-12.

Figure 15-12 Tripping report

In order to save time for displaying, report of the latest 3 tripping is displayed firstly. Click the fifth button REFRESH of eight buttons in the bottom of the picture, complete tripping report will be displayed after a longer delay. If oscillogram record of a fault tripping is needed, the record item shall be clicked first, color of this item will be changed to light blue, click the fourth button RECORD at the bottom, then DBG2000 starts to read oscillogram data from the protection equipment. Oscillogram data is massive and more time is needed to read it. A dialog block of saving the data displayed as a file will be displayed when data reading is completed. If these data are saved in a file and then oscillogram recorded can be displayed by oscillogram analysis program Drawing.exe or Wave.exe developed by our Company. The oscillogram can be analyzed also if needed. The sixth button SAVE at the bottom is used for saving the report as a file in the computer. The seventh button PRINT is used to print the report. All reports of this program can be saved as file or printed in this way. The eighth button CLOSE is used to close the picture displayed. 15.2.4.2 Diagnose report After click the second button FAIL at bottom of Figure 15-13, self-diagnose report will be displayed for a moment. It is the report of hardware failures, overload, cooling system initiating or other
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Chapter 15 ANNEX

abnormal events detected by the equipment.

Figure 15-13 Diagnose report

The records are stored in cyclic non-volatile memory and up to 32 events can be recorded. 15.2.4.3 Change of status report After click the third button SW CHG at the bottom of Figure 15-13, change of status input report will be displayed for a moment. It is the report of binary input, starting status of the equipment, including serial number of record, time of the change and brief description about the change. The records are stored in cyclic non-volatile memory and up to 32 events can be recorded.

15.2.5 Trip Tests


The Trip tests comprise two items: protection tripping test and communication with the host computer test. Object of the tripping test is to check activation of the tripping or signal output relays of the equipment during the test not by applying voltages and currents on the equipment but by operation of the program. Object of the communication with the host computer test is to check correctness of the message sent from the equipment during the test not by applying voltages and currents on the equipment but by operation of the program. 15.2.5.1 Protection tripping test (only for special type of equipment) First, parameter [Test_Trip_Option] shall be set as enabled, if available. Then, click item Trip_Test(T) in menu Execute, or click the seventh button of tool bar test, picture of protection tripping test will be displayed as shown in Figure 15-14. There is only one item in the picture, i.e., Test_Differential_Trip, differential protection tripping test, click the test button , related output relays will operate, and correspondent signals will be sent. Correctness of these operations can be checked and this button changes to
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then. Click the red reset button again, all of the operated relays will dropout, test status will be resumed . and the reset button will return to

Figure 15-14 Protection tripping test

15.2.5.2 Communication with the host computer test First, the parameters of [Test_Trip_Option] and [Test_Comm_Option] (if available) shall be set as enabled. Click label in Figure 15-15, picture of communication with the host computer will be

displayed as shown in Figure 15-15.

Figure 15-15 Communication with host computer test (page 1)

Click test button report.

of any item, relevant activation of this item will be recorded in the

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The report will be sent to the host computer, and correctness of the communication can be checked then.

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