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A

Compal Confidential
2

PAV70 Schematics Document


Intel Pineview Processor with Tigerpoint + DDRII

2010-07-01
3

REV: 1.0

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Cover Page
Size
B
Date:

Document Number

Rev
1.0

LA-6221P
Friday, July 02, 2010

Sheet
E

of

39

Clock Generator
CK505
page 8

Compal Confidential
Model Name :
File Name : LA-6221P

CRT Conn
page 10

ZZZ

RGB

PCB PAV70@

DAZ0F300201

LVDS

LCD Conn.

DDRII-SO-DIMM
page 7

1.8V DDRII 667

22x22mm

page 9

Thermal Sensor

Memory BUS(DDRII)

Pineview
FCBGA 559
page 4,5,6

ZZZ

EMC1402
page 5

DMI
X2 mode
GEN1

PCB PAV50@

DAZ0F000300

USB
HDA

Tigerpoint

PCI-Express

USB Port X3

page 15

PCBGA360

BlueTooth

17x17mm

page 23

SATA

page 11,12,13,14

CMOS CAM
page 9

MINI Card x1
3G

MINI Card x1
WLAN

10/100 Ethernet

page 17

page 18

page 16

HDD

AR8152L

3G

page 15

page 17

LPC BUS
Transfermer

WLAN

page 18

Aralia Codec
Power ON/OFF

ALC272

RJ45

DC/DC Interface

Card Reader
ENE6252

page 19

page 27

page 26

ENE KBC
KB926page

3VALW/5VALW
page 27

DC IN

page 27

page 22

SPI
24

0.89VP/1.5VP
BATT IN 0.9VSP/2.5VSP
page 32

page 29

CHARGER

33

Int.KBD

page 30

SPI ROM

page 25

1.8V/VCCP

page 25

Touch Pad

page 32

AMP & INT


Speaker

INT MIC

HeadPhone &
MIC Jack

SD/MMC/MS
CONN

I/O Board

page 25

CPU_CORE

page 34
2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Block Diagrams
Size
B
Date:

Document Number

Rev
1.0

LA-6221P
Thursday, July 01, 2010

Sheet
E

of

39

Voltage Rails
1

External PCI Devices

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

ON

ON

ON

B+

AC or battery power rail for power circuit.

ON

ON

ON

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+0.9VS

0.9V switched power rail for DDR terminator

ON

OFF

OFF

+VCCP

VCCP switched power rail

ON

OFF

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF
OFF

DEVICE

IDSEL #

REQ/GNT #

PIRQ

No PCI Device

+1.8V

1.8V power rail for DDR

ON

ON

+0.89V

Graphic core power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3VS

3.3V switched power rail

ON

OFF

OFF

Device

Address

Device

Address

+5VALW

5V always on power rail

ON

ON

ON*

Smart Battery

0001 011X b

EMC1402

100_1100

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

EC SM Bus1 address

EC SM Bus2 address

Tiger Point SM Bus address

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
2

SIGNAL

STATE
Full ON

SLP_S3# SLP_S4# SLP_S5#


HIGH

S1(Power On Suspend)

HIGH

HIGH

HIGH

S3 (Suspend to RAM)

LOW

S4 (Suspend to Disk)

LOW

S5 (Soft OFF)

LOW

HIGH

+VALW

+V

+VS

Clock

ON

ON

ON

ON

HIGH

ON

ON

ON

LOW

HIGH

HIGH

LOW

HIGH

ON

ON

OFF

OFF

ON

OFF

OFF

OFF

LOW

LOW

ON

OFF

OFF

OFF

Device

Address

Clock Generator
(SLG8SP556VTR)

1101 001Xb

DDR DIMMA

1010 000Xb

UHCI1
EHCI1

UHCI2

BOARD ID Table(Page 17)

UHCI3

Vcc
Ra/Rc/Re

UHCI4

3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

Board ID

0(EVT)
1(DVT)
2(PVT)
3(MP)
4
5
6
7

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

PCIE table

USB table

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

EHCI2

UHCI5
UHCI6

Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11

MB USB Conn1.
MB USB Conn2.
MB USB Conn3.
CMOS
Card Reader
WWAN
BT
WLAN

PCIE port1

LAN

PCIE port2

Wireless Card

PCIE port3

3G

PCIE port4
PCIE port5

SATA table
SATA port0

SATA port2
SATA port3
PCB Revision
0.1
0.2

SATA port4
SATA port5
4

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

HDD

SATA port1

BOARD ID Table
Board ID
0
1
2
3
4
5
6
7

PCIE port6

Title

Notes List
Size
B
Date:

Document Number

Rev
1.0

LA-6221P
Thursday, July 01, 2010

Sheet
E

of

39

(7) DDR_A_DQS#[0..7]
PINEVIEW_M

(7) DDR_A_D[0..63]

PINEVIEW_M
U71A

U71B

REV = 1.1

(7) DDR_A_DM[0..7]
REV = 1.1

F3
F2
H4
G3

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1

N7
N6

EXP_CLKINN
EXP_CLKINP

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1

G2
G1
H3
J2

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

(7) DDR_A_DQS[0..7]

DMI_TX0 (12)
DMI_TX#0 (12)
DMI_TX1 (12)
DMI_TX#1 (12)

(7) DDR_A_MA[0..14]

DMI

DMI_RX0_C
DMI_RX#0_C
DMI_RX1_C
DMI_RX#1_C

(8) CLK_CPU_EXP#
(8) CLK_CPU_EXP

R10
R9
N10
N9

EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS

L10
L9
L8

RSVD_TP
RSVD_TP

N11
P11

EXP_TCLKINN
EXP_TCLKINP
RSVD
RSVD

K2
J1
M4
L3

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD

R162
R203 49.9_0402_1%
750_0402_1%
T38
T39

(5)
(5)

(7) DDR_A_WE#
(7) DDR_A_CAS#
(7) DDR_A_RAS#

K3
L2
M2
N2

XDP_PREQ#
XDP_PRDY#

(5)
(5)
DMI_RX0

(12)

DMI_RX#0

C436

2
0.1U_0402_10V7K

DMI_RX#0_C
2
0.1U_0402_10V7K

DMI_RX1_C
2
0.1U_0402_10V7K

(12)
(12)

DMI_RX1
DMI_RX#1

C437
C438

DMI_RX0_C

(7) DDR_A_BS0
(7) DDR_A_BS1
(7) DDR_A_BS2

(5)
(5)

XDP_BPM#3
XDP_BPM#2

XDP_BPM#1
XDP_BPM#0

XDP_BPM#1
XDP_BPM#0

(8)
(8)
+VCCP
(5,13,16,17,18,24,26)

PLTRST#

Close to CPU

R354 1
R347 1
CPU_ITP
CPU_ITP#

PLTRST# 1 R348

(5)
(5)
(5)
(5)

XDP_PREQ#
XDP_PRDY#

XDP_BPM#3
XDP_BPM#2

(5,13) H_PWRGD
(13)
SLPIOVR#

DMI_RX#1_C
2
0.1U_0402_10V7K

DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

AK22
AJ22
AK21

DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

AJ20
AH20
AK11

DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2

DDR_CS#0
DDR_CS#1

AH22
AK25
AJ21
AJ25

DDR_A_CS#_0
DDR_A_CS#_1
DDR_A_CS#_2
DDR_A_CS#_3

DDR_CKE0
DDR_CKE1

AH10
AH9
AK10
AJ8

DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3

M_ODT0
M_ODT1

AK24
AH26
AH24
AK27

DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3

Must be placed within 500 mils from Pineview-M pins

(7) DDR_CS#0
(7) DDR_CS#1

JP16

(12)

DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS

(5)

XDP_TCK

2 1K_0402_5%
2 1K_0402_5%

2 1K_0402_1%
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCK

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

CONN@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
G1
G2

(7) DDR_CKE0
(7) DDR_CKE1

(7) M_ODT0
(7) M_ODT1

(7)
(7)
(7)
(7)

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

ACES_87151-24051

51 +-1% 0402

R342 1

51 +-1% 0402

XDP_TDO

R343 1

51 +-1% 0402

XDP_PREQ#

R344 1

51 +-1% 0402

+1.8V
1

R341 1

XDP_TMS

DDR_A_CK_0
DDR_A_CK_0#
DDR_A_CK_1
DDR_A_CK_1#

AC15
AD15
AF13
AG13

DDR_A_CK_3
DDR_A_CK_3#
DDR_A_CK_4
DDR_A_CK_4#

AD17
AC17
AB15
AB17

RSVD
RSVD
RSVD
RSVD

AB4
AK8

RSVD
RSVD

R370
10K_0402_5%
@ T40
AB11
AB13
T41

R50
1K_0402_1%
2

DDR_RPD
DDR_RPU

1
XDP_TRST#

R345 1

51 +-1% 0402

XDP_TCK

R346 1

51 +-1% 0402

R142
1K_0402_1%
2

Modify follow KAV60 schematic 06/12


2.2U_0603_10V6K

APL5607KI-TRG_SO8

C1221
0.1U_0402_16V4Z

R242
D38

R256
10K_0402_5%
+VCC_FAN1

(24) FAN_SPEED1
1

C311
100P_0402_50V8J

JP12
1
2
3

1
2
3

40mil

G1
G2

4
5

ACES_85204-03001
CONN@

AL28
AK28
AJ26
AK29

DDR_VREF
DDR_RPD
DDR_RPU
RSVD

DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

AD8
AD10
AE8

DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2

AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

AK5
AK3
AJ3

DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3

AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

AG22
AG21
AD19

DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4

AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

DDR_A_DQS_5
DDR_A_DQS#_5
DDR_A_DM_5

AE26
AG27
AJ27

DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5

DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47

AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

AE30
AF29
AF30

DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6

AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

AB27
AA27
AB26

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7

AA24
AB25
W24
W22
AB24
AB23
AA23
W27

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_DQS_6
DDR_A_DQS#_6
DDR_A_DM_6
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55

DDR_RPU
80.6_0402_1%

DDR_A_DQS_7
DDR_A_DQS#_7
DDR_A_DM_7

R243

DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

DDR_RPD
80.6_0402_1%

2 OF 6
PINEVIEW-M_FCBGA8559

Add 2009-6-17

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6

DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39

C1222
0.01U_0402_16V7K

PJDLC05C_SOT23-3

D40
PJDLC05C_SOT23-3

C1150
1000P_0402_50V7K
1
2

1
A

4.7U_0603_6.3V6K
+3VS

XDP_TRST#
XDP_TDI

PJDLC05C_SOT23-3

4.7U_0603_6.3V6K
C313 1

D39
C1151
0.01U_0402_16V7K

DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1

DDR_A_DQS_4
DDR_A_DQS#_4
DDR_A_DM_4

08/13

XDP_PREQ#
XDP_TDO

2 C314

GND
GND
GND
GND

AB8
AD7
AA9

DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31

EN
VIN
VOUT
VSET

+VCC_FAN1
1
2
R47
330_0402_5%

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

DDR_A_DQS_3
DDR_A_DQS#_3
DDR_A_DM_3

XDP_TMS
XDP_TCK

D19@
DAN217_SC59

8
7
6
5
1

EN_FAN1

Modify D38 D39 D40 Pin define

(24)

AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3

DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23

+1.8V

U12

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7

DDR_A_DQS_2
DDR_A_DQS#_2
DDR_A_DM_2

DDR_A

1
2
3
4

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0

DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15

RSVD_TP
RSVD_TP

+5VS
C312
1

AD3
AD2
AD4

DDR_A_DQS_1
DDR_A_DQS#_1
DDR_A_DM_1

R369
10K_0402_5%

+VCCP

XDP_TDI

+5VS

AG15
AF15
AD13
AC13

+1.8V

XDP Reserve

FAN1 Conn

DDR_A_DQS_0
DDR_A_DQS#_0
DDR_A_DM_0

1 OF 6

PINEVIEW-M_FCBGA8559

C435

AH19
AJ18
AK18
AK16
AJ14
AH14
AK14
AJ12
AH13
AK12
AK20
AH12
AJ11
AJ24
AJ10

Title

Pineview(1/3)
Size Document Number
Custom
Date:

Rev
1.0

LA-6221P

Friday, July 02, 2010

Sheet
1

of

39

CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN

N31
P30
P29
N30

CRT_DDC_DATA
CRT_DDC_CLK

L31
L30

DAC_IREF

P28

2 10_0402_5%
2 10_0402_5%

GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B

REFCLKINP
REFCLKINN
REFSSCLKINP
REFSSCLKINN

LVDS_ACLK#
LVDS_ACLK
LVDS_A0#
LVDS_A0
LVDS_A1#
LVDS_A1
LVDS_A2#
LVDS_A2

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

U25
U26
R23
R24
N26
N27
R26
R27

LA_CLKN
LA_CLKP
LA_DATAN_0
LA_DATAP_0
LA_DATAN_1
LA_DATAP_1
LA_DATAN_2
LA_DATAP_2

R22
J28
N22
N23
L27
L26
L23
K25
K23
K24
H26

LIBG
LVBG
LVREFH
LVREFL
LBKLT_EN
LBKLT_CTL
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN

SMI#
A20M#
FERR#
LINT0
LINT1
IGNNE#
STPCLK#

E7
H7
H6
F10
F11
E5
F8

H_SMI#
H_A20M#
H_FERR#
H_INTR
H_NMI
H_IGNNE#
H_STPCLK#

DPRSTP#
DPSLP#
INIT#
PRDY#
PREQ#

G6
G10
G8
E11
F15

H_DPRSTP#
H_DPSLP#
H_INIT#
XDP_PRDY#
XDP_PREQ#

THERMTRIP#

E13

H_THERMTRIP#

PROCHOT#
CPUPWRGOOD

C18
W1

H_PROCHOT#
H_PW RGD

GTLREF
VSS

A13
H27

H_GTLREF

RSVD
RSVD

L6
E17

BCLKN
BCLKP

H10
J10

BSEL_0
BSEL_1
BSEL_2

K5
H5
K6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6

H30
H29
H28
G30
G29
F29
E29

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

RSVD
RSVD
RSVD
RSVD

L7
D20
H13
D18

RSVD_TP
RSVD_TP
EXTBGREF

K9
D19
K7

R151 be placed U71.R22


R151
2.37K_0402_1%

CPU_DREFCLK (8)
CPU_DREFCLK# (8)
CPU_SSCDREFCLK (8)
CPU_SSCDREFCLK# (8)

GMCH_ENBKL

(24) GMCH_ENBKL
(9) DPST_PW M

(9)
LVDS_SCL
(9)
LVDS_SDA
(9) GMCH_ENVDD

0_0402_5%
R200
PM_DPRSLPVR (13)
PM_EXTTS#0 (7)

H_DPRSTP# (13)
H_DPSLP# (13)
H_INIT# (11)
XDP_PRDY# (4)
XDP_PREQ# (4)
H_THERMTRIP# (11)

H_PW RGD (4,13)

CLK_CPU_HPLCLK# (8)
CLK_CPU_HPLCLK (8)

Modify 08/04

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

H_PW ROK

R305

@
2

VGATE

0_0402_5%
R306
1
2

(4)
(4)
(4)
(4)

(8,13,24,35)

G11
E15
G13
F13

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
T48
T49
T50
T51

EC_PW ROK (13,24)

0_0402_5%

(4)
(4)
(4)
(4)
(4)

To be placed <250 mils to U71 ball


GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B

R307

2
150_0402_1%
1 R308
2
150_0402_1%
1 R309
2
150_0402_1%

GMCH_ENBKL

T55
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRST#

XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRST#

H_THERMDA
H_THERMDC

R34
100K_0402_5%

3 OF 6

H_SMI#

PINEVIEW-M_FCBGA8559

T58

XDP_TCK

T59

XDP_TDI

T60

XDP_TDO

T61

XDP_TMS

T62

XDP_TRST#

T63

H_PW RGD

To be placed <500 mils to U71 ball

C1171
470P_0402_50V7K

BPM_1_0#
BPM_1_1#
BPM_1_2#
BPM_1_3#

B18
B20
C20
B21

BPM_2_0#/RSVD
BPM_2_1#/RSVD
BPM_2_2#/RSVD
BPM_2_3#/RSVD

G5
D14
D13
B14
C14
C16

RSVD
TDI
TDO
TCK
TMS
TRST#

D30
E30

THRMDA_1
THRMDC_1

C30
D31

CLK_CPU_BCLK#
CLK_CPU_BCLK

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

THRMDA_2/RSVD
THRMDC_2/RSVD
4 OF 6
PINEVIEW-M_FCBGA8559

+VCCP

SMCLK

EC_SMB_CK2

DP

SMDATA

EC_SMB_DA2

DN

ALERT#

GND

H_THERMDA

H_THERMDC
2200P_0402_50V7K

3
4

THERM#

EC_SMB_CK2 (24,26)

Close to Processor
pin

EC_SMB_DA2 (24,26)

R58 1
10K_0402_5%

placed within 0.5" of processor


pin and 5 mils spacing.

2006/08/18

Deciphered Date

R156
3.3K_0402_1%

placed within 0.5" of processor


pin and 5 mils spacing.

Compal Electronics, Inc.

Compal Secret Data

Security Classification

C940

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Address:100_1100

R155
2K_0402_1%

+3VS

Issued Date

EMC1402-1-ACZL-TR MSOP 8P SENSOR

C939

PM_EXTTS#0

Close to Processor
pin

1U_0603_10V6K

U2

VDD

H_PROCHOT#

1U_0603_10V6K

C80

0.1U_0402_16V4Z

H_GTLREF
R202
68_0402_5%

R143
10K_0402_5%

C79

H_EXTBGREF

CPU THERMAL SENSOR

R244
976_0402_1%

R144
1K_0402_1%

+VCCP
+3VS

(35)
(35)
(35)
(35)
(35)
(35)
(35)

T26
T27
H_EXTBGREF

+VCCP

CLK_CPU_BCLK# (8)
CLK_CPU_BCLK (8)
CPU_BSEL0 (8)
CPU_BSEL1 (8)
CPU_BSEL2 (8)

Add 470PF on H_SMI# for known issue 07/08

H_THERMDA, H_THERMDC routing together.


Trace width / Spacing = 10 / 10 mil

+3VS

H_SMI# (11)
H_A20M# (11)
H_FERR# (11)
H_INTR (11)
H_NMI
(11)
H_IGNNE# (11)
H_STPCLK# (11)

PLTRST# (4,13,16,17,18,24,26)

CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK

W8
W9

MISC

AA21
W21
T21
V21

(9)
(9)
(9)
(9)
(9)
(9)
(9)
(9)

CPU

PM_EXTTS#1
PM_EXTTS#0
H_PW ROK
PLTRST#

K29
J30
L5
AA3

HPL_CLKINN
HPL_CLKINP

T22
T23
T24
T25

REV = 1.1

GMCH_CRT_R (10)
GMCH_CRT_G (10)
GMCH_CRT_B (10)

CPU_DREFCLK
CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#

Y30
Y29
AA30
AA31

PINEVIEW_M

U71D

RSVD

PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTIN#

AA7
AA6
R5
R6

(10)
(10)

GMCH_CRT_DATA (10)
GMCH_CRT_CLK (10)
R201
665_0402_1%

XDP_RSVD_09

T18
T19
T20
T21

GMCH_CRT_HSYNC
GMCH_CRT_VSYNC

ICH

R249 1
R247 1

M30
M29

R201 be placed <500 mils to U71.P28

R1378
1K_0402_5%

LVDS

L11

T37

CRT_HSYNC
CRT_VSYNC

VGA

REV = 1.1

XDP_RSVD_00
XDP_RSVD_01
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04
XDP_RSVD_05
XDP_RSVD_06
XDP_RSVD_07
XDP_RSVD_08
XDP_RSVD_09
XDP_RSVD_10
XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17

R249 be placed <750 mils to U71.M30


R247 be placed <750 mils to U71.M29

PINEVIEW_M
U71C

D12
T2
A7
T12
D6
T3
C5
T4
C7
T13
C6
T5
D8
T6
B7
T7
A9
T14
XDP_RSVD_09 D9
C8
T8
B8
T15
C10
T9
D10
T16
B11
T10
B10
T17
B12
T11
C11
T28

Title

Pineview(2/3)
Size
B
Date:

Document Number

Rev
1.0

LA-6221P
Thursday, July 01, 2010

Sheet
1

of

39

U71F

+CPU_CORE

U71E

GFX supply current: 1.38A


Sustained GFX supply current: 1.05A

PINEVIEW_M

+0.89V

REV = 1.1

VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX

CPU

T13
T14
T16
T18
T19
V13
V19
W14
W16
W18
W19

GFX/MCH

DDR supply current 2.27A


+1.8V
2.2U_0603_10V6K2.2U_0603_10V6K
2

C188 C187

AK13
AK19
AK9
AL11
AL16
AL21
AL25

C186

C85

1
1
1
1
2.2U_0603_10V6K 2.2U_0603_10V6K

+1.8V

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

AK7
AL7

+VCCP

VCCCK_DDR
VCCCK_DDR

1
C428

1
C429

1
C430

1
C431

2 x 330uF(9mohm/2)
1

+ C275
2

1U_0603_10V6K

1
C236

4.7U_0603_6.3V6K

22UF 6.3V M X5R 0805

C243

AA10
AA11

VCCSENSE
VSSSENSE
VCCA

VCCACK_DDR
VCCACK_DDR

VCCP
VCCP
VCCP
AA19

R20

+RING_EAST

2
1

0_0603_5%

+CPU_CORE

C29
B29
Y2

C242
1U_0603_10V6K

R21
1

C1154

VCCSENSE
VSSSENSE

C1152

+RING_WEST

C1153

0_0603_5%
C64
1U_0603_10V6K

R28
1
2
0_0805_5%

B4
B3

C241
1U_0603_10V6K

+VCC_DMI
1
1
1U_0603_10V6K
C68
C237
1U_0603_10V6K
2
2

1
Core
analog supply current: 0.08A
C391
2 0.01U_0402_16V7K

D4

VCCSENSE (35)
VSSSENSE (35)
+1.5VS

+VCCPProcessor

C243 to closed U71.U10

Display PLL SFR and CRT DAC supply


current: 0.154A

330U 2.5V Y

POWER

1
C55

VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

+VCCP

+ C278

330U 2.5V Y

DDR

U10
U5
U6
U7
U8
U9
V2
V3
V4
W10
W11

Change from SGA20331D20 to SGA20331E10 060810

+CPU_CORE

DDR analog supply current: 1.32A

1U_0402_6.3V6K

1U_0402_6.3V6K

Please closed U71

22UF 6.3V M X5R 0805

1U_0402_6.3V6K

22UF 6.3V M X5R 0805

C267
22UF 6.3V M X5R 0805

1U_0402_6.3V6K

A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21

22UF 6.3V M X5R 0805

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

A11
A16
A19
A29
A3
A30
A4
AA13
AA14
AA16
AA18
AA2
AA22
AA25
AA26
AA29
AA8
AB19
AB21
AB28
AB29
AB30
AC10
AC11
AC19
AC2
AC21
AC28
AC30
AD26
AD5
AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10
AG3
AH18
AH23
AH28
AH4
AH6
AH8
AJ1
AJ16
AJ31
AK1
AK2
AK23
AK30
AK31
AL13
AL19
AL2
AL23
AL29
AL3
AL30
AL9
B13
B16
B19
B22
B30
B31
B5
B9
C1
C12
C21
C22
C25
C31
D22
E1
E10
E19
E21
E25
E8
F17
F19

+CPU_CORE
VCCSENSE

100_0402_1%

Please closed U71.Y2

C1161

R32

VSSSENSE

0.1U_0402_10V6K

R31

2
100_0402_1%

VCCD_AB_DPL

AC31
1

+VCC_CRT_DAC T30

Please closed U71.D4

VCCD_HMPLL

+1.8VS

VCCSFR_AB_DPL

VCCACRTDAC

+3VS

J31
C3
B2
C2
A21

C77

VCCA_DMI
VCCA_DMI
VCCA_DMI

T1
T2
T3

RSVD
VCCSFR_DMIHMPLL

5 OF 6
PINEVIEW-M_FCBGA8559

0.1U_0402_10V6K
C1224

1U_0402_6.3V6K

1U_0402_6.3V6K
C75

1U_0402_6.3V6K
C76

1U_0402_6.3V6K
C70

1U_0402_6.3V6K
C71

C81

2.2U_0603_10V6K
C74

+0.89V

C78

V30
W31

VCCP

1U_0402_6.3V6K

0.1U_0402_10V6K

C1160

DAC, GIO, LVDS, & LGIO, DPLL, HMPLL


supply current: 0.33A

C1223

+VCCP

VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI

1U_0402_6.3V6K

+RING_EAST
+RING_WEST

DMI

GIO supply current: 0.006A T31

VCCALVDS
VCCDLVDS

+VCC_ALVD
+VCC_DLVD
R25
+VCC_CRT_DAC
1
2
MBK1608601YZF_2P 1

LVDS supply current: 0.06A

LVDS

0_0603_5%

V11

EXP\CRT\PLL

R321
2

C189
1U_0402_6.3V6K

C192
1U_0402_6.3V6K

change to 0402 size

P2
AA1

+VCC_DMI

DMI analog supply current: 0.48A

+DMI_HMPLL

1 R18
2
0_0603_5%

+VCCP
1

C1162

2
R26
+VCC_ALVD
1
2
100NH
+-5%
LL1608-FSLR10J
1
1

0.1U_0402_10V6K

C1155
1U_0603_10V6K

R27
1
2
0_0603_5%

C1225
330U_B2_2.5VM_R15M

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4

T29

6 OF 6
PINEVIEW-M_FCBGA8559

C56
22UF 6.3V M X5R 0805 H1.25

+VCC_DLVD

C235
1U_0603_10V6K

2
@

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Close Chipset pin

Modify to 2.2U 05/11

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

REV = 1.1

VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1
+

Change 22uF 0805 061010


+DMI_HMPLL
C69
1U_0603_10V6K

C239
22UF 6.3V M X5R 0805

T56

SFR & DMIHMPLL supply current: 0.104A

E2

10U_0805_10V4Z

+1.8VS

PINEVIEW_M

GND

Title

Pineview(3/3)
Size Document Number
Custom
Date:

Rev
1.0

LA-6221P

Thursday, July 01, 2010

Sheet
1

of

39

CONN@

+DIMM_VREF
+1.8V

(4) DDR_A_D[0..63]

(4) DDR_A_DM[0..7]

Layout Note:
Place near JDIM1

(4) DDR_A_DQS[0..7]

C112

2.2U 6.3V M X5R 0402


2

+DIMM_VREF

Share +DIMM_VREF for


1.DDRII VREF
2.GMCH SM_VREF_0
SM_VREF_1

R62
1K_0402_1%

C130
2.2U_0603_6.3V4Z

C109
2.2U_0603_6.3V4Z

C110
2.2U_0603_6.3V4Z

C129
2.2U_0603_6.3V4Z

C128
2.2U_0603_6.3V4Z

+1.8V

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D8
DDR_A_D9

DDR_A_D0
DDR_A_D1

DDR_A_D2
DDR_A_D3

1K_0402_1%
2

(4) DDR_A_MA[0..14]

C111

0.1U_0402_16V4Z
2

R61

DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11

2
DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

C107
0.1U_0402_16V4Z

C108
0.1U_0402_16V4Z

C105
0.1U_0402_16V4Z

C106
0.1U_0402_16V4Z

C94
220U_B2_2.5VM_R35

DDR_A_D18
DDR_A_D19
1

DDR_A_D24
DDR_A_D25

DDR_A_DM3
2
DDR_A_D26
DDR_A_D27
(4)

DDR_CKE0

(4) DDR_A_BS2

DDR_CKE0
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
(4) DDR_A_BS0
(4) DDR_A_WE#
(4) DDR_A_CAS#
(4)
DDR_CS#1
(4)

M_ODT1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_CS#1
M_ODT1
DDR_A_D32
DDR_A_D33

+0.9VS

C446
0.1U_0402_16V4Z

C445
0.1U_0402_16V4Z

C444
0.1U_0402_16V4Z

C443
0.1U_0402_16V4Z

C442
0.1U_0402_16V4Z

C441
0.1U_0402_16V4Z

C440
0.1U_0402_16V4Z

C439
0.1U_0402_16V4Z

C89
0.1U_0402_16V4Z

C118
0.1U_0402_16V4Z

C120
0.1U_0402_16V4Z

C90
0.1U_0402_16V4Z

C91
0.1U_0402_16V4Z

C115
0.1U_0402_16V4Z

C122
0.1U_0402_16V4Z

C88
0.1U_0402_16V4Z

C87
0.1U_0402_16V4Z

C121
0.1U_0402_16V4Z

C86
0.1U_0402_16V4Z

C117
0.1U_0402_16V4Z

C119
0.1U_0402_16V4Z

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41
2

DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6
+0.9VS
8
7
6
5

1
2
3
4

DDR_A_BS1
DDR_A_MA0
DDR_A_MA2
DDR_A_MA4

DDR_A_BS0
DDR_A_MA10
DDR_A_MA1
DDR_A_MA3

47_0804_8P4R_5%
RP4
DDR_A_MA6
8
1
DDR_A_MA7
7
2
DDR_A_MA11
6
3
DDR_A_MA14
5
4

47_0804_8P4R_5%
RP3
M_ODT1
1
8
DDR_CS#1
2
7
DDR_A_CAS# 3
6
DDR_A_WE# 4
5

47_0804_8P4R_5%
RP1
8
1 DDR_A_MA5
7
2 DDR_A_MA8
6
3 DDR_A_MA9
5
4 DDR_A_MA12

47_0804_8P4R_5%

DDR_CKE1
DDR_A_BS2
DDR_CKE0

1 R163
2
47_0402_5%
1 R60
2
47_0402_5%
1 R59
2
47_0402_5%

DDR_A_D56
DDR_A_D57

Layout Note:
Place these resistor
closely DIMMA,all
trace length<750 mil

DDR_A_DM7
DDR_A_D58
DDR_A_D59
(8,17,18,26) CLK_SMBDATA
(8,17,18,26) CLK_SMBCLK
+3VS
C116

47_0804_8P4R_5%

Layout Note:
Place these resistor
closely DIMMA,all
trace length
Max=1.3"

C141

0.1U_0402_16V4Z

8
7
6
5

47_0804_8P4R_5%
RP2
1
8
2
7
3
6
4
5

DDR_A_D50
DDR_A_D51

RP5

1
2
3
4

0.1U_0402_16V4Z

RP6
DDR_A_MA13
M_ODT0
DDR_CS#0
DDR_A_RAS#

CLK_SMBDATA
CLK_SMBCLK

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

201

Change to SP07F001720

G1

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
G2

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

04/30

DDR_A_D4
DDR_A_D5
DDR_A_DM0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
D

DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0

M_CLK_DDR0 (4)
M_CLK_DDR#0 (4)

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21
R64
DDR_A_DM2

2
0_0402_5%

PM_EXTTS#0 (5)

DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1

DDR_CKE1 (4)
C

DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1
DDR_A_RAS#
DDR_CS#0

DDR_A_BS1 (4)
DDR_A_RAS# (4)
DDR_CS#0 (4)

M_ODT0
DDR_A_MA13

M_ODT0 (4)

DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
B

DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 (4)
M_CLK_DDR#1 (4)

DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R66
R65

1
1

2 10K_0402_5%
2 10K_0402_5%

202

FOX_AS0A426-N4RN-7F

DIMMA

Compal Electronics, Inc.

Compal Secret Data


2006/08/18

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

Follow Intel Layout checklist, add C141 05/12

Security Classification
Issued Date

+1.8V
JDIM1

20mils
(4) DDR_A_DQS#[0..7]

+1.8V

09/03

Title

DDRII-SODIMMA
Size
B
Date:

Document Number

Rev
1.0

LA-6221P
Thursday, July 01, 2010

Sheet
1

of

39

Change C174 C175 to 10U_0603 05/14

FSB

FSA

CLKSEL2

CLKSEL1

CLKSEL0

CPU
MHz

SRC
MHz

266

PCI
MHz

100

REF
MHz

33.3

DOT_96 USB
MHz
MHz

14.318

96.0

1
2
R1370_0603_5%

+3VS

133

100

33.3

14.318

96.0

48.0

200

100

33.3

14.318

96.0

48.0

C174
C172
C1145
10U_0603_6.3V6M 0.1U_0402_16V4Z
2 47P_0402_50V8J 2
2

48.0

+3VS

C138

2 0.1U_0402_16V4Z

C148

R72

0.1U_0402_16V4Z

+1.05VM_CK505

166

100

33.3

14.318

96.0

48.0

333

100

33.3

14.318

96.0

48.0

100

100

33.3

14.318

96.0

48.0

400

100

33.3

14.318

96.0

48.0

(13) PCH_SMBDATA

1
C139
1
C1146
C175
0.1U_0402_16V4Z
47P_0402_50V8J
2
10U_0603_6.3V6M
2

C167
0.1U_0402_16V4Z

C137
0.1U_0402_16V4Z

C146
0.1U_0402_16V4Z

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

R138
1
2
0_0603_5%

+VCCP

R91

2.2K_0402_5%
2N7002DW-T/R7_SOT363-6
Q10A

C165

+3VS

FSC

+3VM_CK505

0.1U_0402_16V4Z

(13) PCH_SMBCLK

Q10B
2N7002DW-T/R7_SOT363-6

Add C1145 C1146 C1147 for EMI 06/12

Low Power (Silego : SA00003H730)


IDT SA00003H610

Reserved

Change co-lay net name to +1.5VM_CK505 07/03


+3VS

1
R1348

+1.5VS

1
R1349

2
0_0603_5%

+3VM_CK505

U4

+3VS

R435

+1.5VM_CK505

2
0_0603_5%

0.1U_0402_16V4Z
1
1
C140
C160

10K_0402_5%

CLK_EN

47P_0402_50V8J

55

1
C1119

6
1
C169

12

C1147

Q31

10U_0603_6.3V6M
2

0.1U_0402_16V4Z
2
2

0.1U_0402_16V4Z
2

72
19

(35) CLK_ENABLE#

27
DTC115EUA_SC70-3

Rename 06/06

+VCCP

R1350
1

0_0402_5%
@
2

+1.5VS

R1351
1

0_0402_5%
2

+1.05VM_CK505

C173
0.1U_0402_16V4Z

Change C1350 C1351 to 0402 type 06/24

R68 @

CPU_BSEL0

1
2
R69
0_0402_5%

470_0402_5%

(12) CLK_PCH_48M

(13) CLK_PCH_14M

1
C390

R73
1K_0402_5%
@

CPU_0

VDD_CPU

CPU_0#

VDD_48

CPU_1

VDD_PLL3

CPU_1#

VDD_PLL3_IO

SRC_0#/DOT_96#

62

VDD_SRC_IO

38

LCDCLK/27M
VDD_SRC_IO
LCDCLK#/27M_SS

FSA

20

FSB

FSC

7
8

1
2
R371
0_0402_5%

VGATE

1
11

VDD_SRC_IO

SRC_2

USB_0/FS_A
SRC_3
FS_B/TEST_MODE
SRC_3#
REF_1

SRC_4
SRC_4#

53

Add 1K follow
Intel check list 05/11

(13)

R113
470_0402_5%

CPU_BSEL1

NC

SRC_6

CLK_XTAL_OUT

13

2 TPM@
22_0402_5%
R86
1
2
33_0402_5%
R80
1
2
33_0402_5%

2
2

470_0402_5%

:
:
:
:

C389

DOT96 / DOT96#
LCDCLK / LCDCLK#
SRC_0 / SRC_0#
27M/27M_SS

15
PCI4_SEL

16

ITP_EN

17

XTAL_IN
SRC_8/CPU_ITP
XTAL_OUT

3
22
26
69
30

R87

34

Follow Intel check list change to 27P

10/16

1
CLK_XTAL_IN

22P 50V J NPO 0402


Y1

2
R71

10K_0402_5%
@

10K_0402_5%
@

10K_0402_5%

ITP_EN

PCI4_SEL

73

70

CLK_CPU_BCLK#

68

CLK_CPU_HPLCLK

67

CLK_CPU_HPLCLK#

24

CPU_DREFCLK

25

CPU_DREFCLK#

28

CPU_SSCDREFCLK

29

CPU_SSCDREFCLK#

SRC PORT LIST

CLK_SMBCLK (7,17,18,26)
CLK_CPU_BCLK

(5)

CLK_CPU_BCLK#

PORT
SRC1
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11

(5)

CLK_CPU_HPLCLK#
CPU_DREFCLK

(5)

(5)

CPU_DREFCLK#

DEVICE

(5)

CLK_CPU_HPLCLK

(5)

CPU_SSCDREFCLK

(5)

CPU_SSCDREFCLK#

(5)

32
33

CPU_SSCDREFCLK
C

PCIE_WLAN
PCIE_SATA
PCIE_PCH
CPU_ITP
CLK_CPU_EXP
PCIE_LAN
PCIE_WWAN

35
36
39

CLK_PCIE_WLAN

40

CLK_PCIE_WLAN#

57

CLK_PCIE_SATA

56

CLK_PCIE_SATA#

61

CLK_PCIE_PCH

60

CLK_PCIE_PCH#

CLK_PCIE_WLAN

(18)

CLK_PCIE_WLAN#

(18)

SRC_9

PCI_2

SRC_9#

PCI_3
SRC_10
PCI_4/SEL_LCDCL
SRC_10#

CLK_PCIE_SATA (11)
CLK_PCIE_SATA#
CLK_PCIE_PCH
CLK_PCIE_PCH#

64

CPU_ITP

63

CPU_ITP# (4)

44

CLK_CPU_EXP

45

CLK_CPU_EXP#

50

CLK_PCIE_LAN

51

CLK_PCIE_LAN#

48

CLK_PCIE_WWAN

47

CLK_PCIE_WWAN#

(11)

Modify CLK SRC Port list 05/12

(12)
(12)

(4)
+3VS

CLK_CPU_EXP (4)
CLK_CPU_EXP# (4)
CLK_PCIE_LAN

(16)

CLK_PCIE_LAN#

(16)

WLAN_CLKREQ#

R121 2

1 10K_0402_5%

LAN_CLKREQ#

R1449 2

1 10K_0402_5%

WWAN_CLKREQ#

R107 2

1 10K_0402_5%

PCIF_5/ITP_EN

VSS_PCI

SRC_11#

CLK_PCIE_WWAN

REQ PORT LIST

(17)

CLK_PCIE_WWAN#

(17)

PORT

VSS_REF
CLKREQ_3#

37

VSS_IO

CLKREQ_4#

41

VSS_CPU

CLKREQ_6#

VSS_PLL3

CLKREQ_7#

VSS_SRC

CLKREQ_9#

VSS_SRC

SLKREQ_10#

VSS_SRC

CLKREQ_11#

VSS_48

VSS

USB_1/CLKREQ_A#

Add WWAN_CLKREQ#
WLAN_CLKREQ#

WLAN_CLKREQ#

(18)

58
65
43
49

LAN_CLKREQ#

46

WWAN_CLKREQ#

LAN_CLKREQ#

(16)

WWAN_CLKREQ#

DEVICE

REQ_3#
REQ_4# PCIE_WLAN
REQ_6#
REQ_7#
REQ_9#
REQ_10# PCIE_LAN
REQ_11# PCIE_WWAN
REQ_A#

05/04

(17)

21

SLG8SP556VTR_QFN72_10X10
PCI2_TME

R89

R90

@
R77

10K_0402_5%

10K_0402_5%

10K_0402_5%

Issued Date

2007/10/15

Deciphered Date

2008/10/15

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Routing the trace at least 10mil


4

Compal Electronics, Inc.

Compal Secret Data

Security Classification

22P 50V J NPO 0402

2
CLK_XTAL_OUT

14.318MHZ_16PF_7A14300083
C164

R95

CLK_CPU_BCLK

C161

42

R85

Follow Vendor check change to 22P

06/05

59

+3VS

+3VS

+3VS

0_0402_5%

PCI_1

SRC_11
18

PCI_STOP#

C388

For PCI2_TME:0=Overclocking of CPU and SRC allowed


(ICS only)
1=Overclocking of CPU and SRC NOT allowed

1
2
R84
0_0402_5%

For PCI4_SEL, 0 = Pin24/25


Pin28/29
1 = Pin24/25
Pin28/29

27P_0402_50V8J

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#


R92 @

R98
10K_0402_5%
2
1

(11) CLK_PCI_PCH

27P_0402_50V8J

TPM@

14

CLK_PCI_TPM 1 R1487

(26) CLK_PCI_TPM

+VCCP

CPU_BSEL2

CLK_XTAL_IN

PCI2_TME

(24) CLK_PCI_LPC

(5)

SRC_7
SRC_7#

R86
R110
@
0_0402_5%

FSC

CPU_STOP#

SRC_8#/CPU_ITP#

1
2
R119
0_0402_5%

(5)

R52 1K_0402_1%
FSB
1
2

54

H_STP_PCI#

71

CLK_SMBDATA (7,17,18,26)

CKPWRGD/PD#

SRC_6#
(13) H_STP_CPU#

CLK_SMBCLK

REF_0/FS_C/TEST_

+VCCP

CLK_SMBDATA

10

VDD_IO

SRC_2#

1 R104
2
33_0402_5%
2
10P_0402_50V8J
CLK_EN

(5,13,24,35)

VDD_PCI

31

23

VDD_REF

SRC_0/DOT_96

52

1 R74
2 @
22_0402_5%
1 R75
2
33_0402_5%

CLK_48M_CR

(22) CLK_48M_CR

(5)

@
C386 10P_0402_50V8J
1
2

SCL

VDD_CPU_IO

+VCCP

R76
2.2K_0402_5%
FSA 2
1

66

SDA
VDD_SRC

Title

Clock Generator CK505


Size

Document Number

Rev
1.0

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

of

39

LCD POWER CIRCUIT


Change R577 to 0402 SIZE 06/16

J1
+LCDVDD
Q3

2
G

1
C1108
0.047U_0402_16V4Z
2

2
G

C1106 1

R578
1

1 +LCDVDD_R

100K_0402_5%

Q4
2N7002W-T/R7_SOT323-3

C1105 1
0.1U_0402_16V4Z

4.7U_0603_6.3V6K

470_0402_5%

+CAM_VCC

1
1

C1107
4.7U_0603_6.3V6K

C1113
0.1U_0402_16V4Z

PJUSB208_SOT23-6

R579 4.7K_0402_5%

JUMP_43X39
@

W=20mils

W=20mils
+3VS

R577
D

+3VS

+3VS

NTR4101PT1G 1P SOT-23-3

+LCDVDD

Change C1106 to 4.7U_0603

USB20_N3_1

05/14

+CAM_VCC

CH3

Vp

CH4

CH2

Vn

CH1

Q5
DTC115EUA_SC70-3

USB20_P3_1

D6
@

Add D6

05/14

(5) GMCH_ENVDD

R174
100K_0402_5%

2
0_0402_5%

Modify 05/11

1
R1182
@

USB20_N3_1

USB20_P3_1

3
1

+3VS

camera

LVDS_ACLK
LVDS_ACLK#

WCM2012F2S-900T04_0805

0_0402_5%

USB20_P3

USB20_N3 (12)
USB20_P3 (12)

1
R1183

LVDS_SDA (5)

LVDS_PWM

LVDS_A1 (5)
LVDS_A1# (5)

LVDS_A0
LVDS_A0#

BKOFF#

LVDS_PWM

C1156
220P_0402_50V7K

BKOFF# (24)
LVDS_PWM

+3VS
1
2
L2
FBMA-L11-201209-221LMA30T_0805

+LEDVDD

R213 1
@

2
0_0402_5%

DPST_PWM

R67

2
0_0402_5%

INVT_PWM

C1109

DPST_PWM (5)
INVT_PWM (24)

1000P 50V K X7R 0402

For RF

+LCDVDD
L1 2

LVDS_SDA
LVDS_SCL
BKOFF#
LVDS_PWM

LVDS_A0 (5)
LVDS_A0# (5)

ACES_88341-3000B001

LVDS_SCL (5)

LVDS_SDA

LVDS_A2 (5)
LVDS_A2# (5)

LVDS_A1
LVDS_A1#

CONN@

USB20_N3

LVDS_ACLK (5)
LVDS_ACLK# (5)

LVDS_A2
LVDS_A2#

+LCDVDD_L

Add for RF 07/02

LVDS_SCL

+CAM_VCC
DMIC_CLK (19)
DMIC_DATA (19)

+3VS

USB20_P3_1
USB20_N3_1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
3119
20
3221
22
3423
24
3525
26
3627
28
3329
30

JLVDS1

R1181
2.2K_0402_5%

R1180
2.2K_0402_5%
1
2

Modify JLVDS1 08/04

C1168

10P_0402_50V8J
@

CMOS & LCD/PANEL BD. Conn.

10P_0402_50V8J
@

C1167

L3

(20 MIL)
1

B+

FBMA-L11-201209-221LMA30T_0805
1
C1111
330P_0402_50V7K

C1112
100P_0402_50V8J

Add JLVDS.31//JLVDS.32/JLVDS.34/JLVDS.35 to GND.042910.

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

LVDS /INVERTER
Size
B
Date:

Document Number

Rev
1.0

LA-6221P
Thursday, July 01, 2010

Sheet
1

of

39

L14
(5) GMCH_CRT_G

(5) GMCH_CRT_B

1
C308

PJDLC05C_SOT23-3

RED

BK1608LL121-T_2P
2

GREEN

BK1608LL121-T_2P
2

BLUE

C307
10P_0402_50V8J
2

C306
10P_0402_50V8J
2

C304
10P_0402_50V8J

JVGA_HS

2
0.1U_0402_16V4Z

P
2

U11
4

OE#

JVGA_VS

(5) GMCH_CRT_HSYNC

BK1608LL121-T_2P
2

C303
2

1
10P_0402_50V8J

+5VS
1
C301

1
10P_0402_50V8J

C310

10P_0402_50V8J

R250

150_0402_1%
2
1

R253

150_0402_1%
2
1

R255

150_0402_1%
2
1

L12

D17
@

0615
1

L15
1

(5) GMCH_CRT_R

Modify C31- C308 C303 C307 C306 C304 BOM Structure

D18
@
PJDLC05C_SOT23-3

Close to CRT CONN for ESD, NU on 0623.

SN74AHCT1G125DCKR_SC70-5

2
0.1U_0402_16V4Z

P
2

(5) GMCH_CRT_VSYNC

U10

OE#

1
C298

+5VS

Place closed to chipset

Add R1283 R1284


Change R247 R249 to 10 ohm
Add @ on U10 U11 C301 C298

SN74AHCT1G125DCKR_SC70-5

CRT PORT

06/08
+3VS

+RCRT_VCC

+3VS

D3

R246

R251

W=40mils
1

RB491D_SC59-3

JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

JVGA_HS
BLUE
JVGA_VS

Q24A
2N7002DW-T/R7_SOT363-6

Change JCRT1 P/N to SP010906182 06/22

1.1A_6VDC_FUSE

VGA_DDC_DAT
GREEN

Q24B
2N7002DW-T/R7_SOT363-6
VGA_DDC_CLK
6

RED
VGA_DDC_DAT

C142

F1
1

2.2K_0402_5%
2

2.2K_0402_5%

(5) GMCH_CRT_DATA

R245

2.2K_0402_5%

(5) GMCH_CRT_CLK

0.1U_0402_16V4Z

2.2K_0402_5%

R248

+CRT_VDD

12/29

+5VS

+CRT_VDD

VGA_DDC_CLK

CONN@

16
17

SUYIN_070546FR015M21RZR

CRT_DET# (13)

CRT_DET#

R1103
100K_0402_5%

+CRT_VDD

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

CRT PORT
Size
B
Date:

Document Number

Rev
0.2

LA-6221P
Thursday, July 01, 2010

Sheet
E

10

of

39

+3VS
R45

CLK_PCI_PCH

SATA_LED#
10K_0402_5%
R336
33_0402_5%

R293

GATEA20

10K_0402_5%

10K_0402_5%
1 R41
2

KB_RST#

For EMI, close to TigerPoint

R312

SERIRQ

C432
22P_0402_50V8J

10K_0402_5%

PCI_DEVSEL#
CLK_PCI_PCH
PCI_IRDY#

8.2K_0402_5%

R235

8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

R236
R229
R207
R231
R230
R237

PCI_SERR#
PCI_STOP#
PCI_PLOCK#
PCI_TRDY#
PCI_PERR#
PCI_FRAME#

8.2K_0402_5%
8.2K_0402_5%

R362
10K_0402_5%
@

8.2K_0402_5%
10K_0402_5%

R291
R292

R363
10K_0402_5%
@
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

R238
R205
R206
R208
R210
R211
R212
R204

8.2K_0402_5%
8.2K_0402_5%
B

R232
R209

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

R364
R365

PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#

A18
E16

GNT1#
GNT2#

PCI

G16
A20

REQ1#
REQ2#

G14
A2
C15
C9

GPIO48/STRAP1#
GPIO17/STRAP2#
GPIO22
GPIO1

B2
D7
B3
H10
E8
D6
H8
F8

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

D11
K9
M13

STRAP0#
RSVD01
RSVD02

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

R366
10K_0402_5%
@

H16
M15
C13
L16

R12
AE20
AD17
AC15
AD18
Y12
AA10
AA12
Y10
AD15
W10
V12
AE21
AE18
AD19
U12

+3VS

TGP

RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18

AC17
AB13
AC13
AB15
Y14

RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

AB16
AE24
AE23

RSVD24
RSVD25
RSVD26

AA14
V14

RSVD27
RSVD28

AD16
AB11
AB10

RSVD29
RSVD30
RSVD31

R294 8.2K_0402_5% AD23

GPIO36

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9

SATA_CLKN
SATA_CLKP

AD4
AC4

SATARBIAS#
SATARBIAS
SATALED#

AD11
AC11
AD25

A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THRMTRIP#

U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21
AA16
AA21
V18
AA20

SATA_ITX_C_DRX_N0_R
SATA_ITX_C_DRX_P0_R

SATA_DTX_C_IRX_N0 (15)
SATA_DTX_C_IRX_P0 (15)
0.01U_0402_16V7K
C32
0.01U_0402_16V7K
C31

SATA_ITX_C_DRX_N0 (15)
SATA_ITX_C_DRX_P0 (15)

Placed within 500 mils of Tiger point chipset pin.


C

R294 be placed <200 mils to U72.AD23

CLK_PCIE_SATA# (8)
CLK_PCIE_SATA (8)
SATARBIAS
R154 24.9_0402_1%
SATA_LED#
SATA_LED# (23)

GATEA20
H_A20M#
H_IGNNE#
H_INIT#
H_INTR
H_FERR#
H_NMI
KB_RST#
SERIRQ
H_SMI#
H_STPCLK#

GATEA20 (24)
H_A20M# (5)
H_IGNNE#

(5)

+VCCP

H_INIT# (5)
H_INTR (5)
H_FERR# (5)
H_NMI
(5)
KB_RST# (24)
SERIRQ (24,26)
H_SMI# (5)
H_STPCLK# (5)

R233

U72C

B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1

R164
56_0402_5%

8.2K_0402_5%
(8) CLK_PCI_PCH

TGP

SATA

U72A

A5
B15
J12
A23
B7
C22
B11
F14
A8
A10
D10
A16

HOST

+3VS

H_THERMTRIP# (5)

R164 has to be within 1" from the


Tiger Point chipset.

TIGERPOINT_ES1_BGA360

3
TIGERPOINT_ES1_BGA360

G SENSOR@
R1472
1
2
0_0402_5%

(26) G_SENSOR_INT#

PCI_PIRQE#

ESD request
+VCCP

STRAP2#
GPIO17

STRAP1#
GPIO48

R198
56_0402_5%

Boot BIOS
H_FERR#

Close to TigerPoint
pin

SPI

PCI

LPC

2 100P_0402_50V8J

H_IGNNE# C451 @
1

2 100P_0402_50V8J

H_INIT#

C452 @
1

2 100P_0402_50V8J

H_INTR

C453 @
1

2 100P_0402_50V8J

H_FERR#

C454 @
1

2 100P_0402_50V8J

H_NMI

C455 @
1

2 100P_0402_50V8J

C456 @
1

2 100P_0402_50V8J

H_STPCLK# C457 @
1

2 100P_0402_50V8J

H_SMI#

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/08/18

Issued Date

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

C450 @
1

H_A20M#

Title

Tigerpoint(1/4)
Size

Document Number

Rev
1.0

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

11

of

39

USB Port List


PCIE
1
2

LAN
WLAN
WWAN

3
4

LAN
WLAN

K21
K22
C565 0.1U_0402_10V7K PCIE_ITX_C_DRX_N1_RJ23
C566 0.1U_0402_10V7K PCIE_ITX_C_DRX_P1_RJ24
M18
M19
C53 0.1U_0402_10V7KPCIE_ITX_C_DRX_N2_RK24
C49 0.1U_0402_10V7K PCIE_ITX_C_DRX_P2_RK25
L23
L24
C52 0.1U_0402_10V7K PCIE_ITX_C_DRX_N3_RL22
C54
0.1U_0402_10V7K PCIE_ITX_C_DRX_P3_RM21
P17
P18
N25
N24

PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

PCI-E

WWAN

(16) PCIE_DTX_C_IRX_N1
(16) PCIE_DTX_C_IRX_P1
(16) PCIE_ITX_C_DRX_N1
(16) PCIE_ITX_C_DRX_P1
(18) PCIE_DTX_C_IRX_N2
(18) PCIE_DTX_C_IRX_P2
(18) PCIE_ITX_C_DRX_N2
(18) PCIE_ITX_C_DRX_P2
(17) PCIE_DTX_C_IRX_N3
(17) PCIE_DTX_C_IRX_P3
(17) PCIE_ITX_C_DRX_N3
(17) PCIE_ITX_C_DRX_P3

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

USB

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

DMI

R23
R24
P21
P20
T21
T20
T24
T25
T19
T18
U23
U24
V21
V20
V24
V23

DMI_TX#0
DMI_TX0
DMI_RX#0
DMI_RX0
DMI_TX#1
DMI_TX1
DMI_RX#1
DMI_RX1

USB Left1
USB Left2
USB Right2
CMOS
CardReader
WWAN
BT
WIMAX

USBRBIAS
USBRBIAS#

H7
H6
H3
H2
J2
J3
K6
K5
K1
K2
L2
L3
M6
M5
N1
N2

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

D4
C5
D3
D2
E5
E6
C2
C3

USB_OC#0_1
USB_OC#0_1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

G2
G3

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

(15)
(15)
(15)
(15)
(15)
(15)
(9)
(9)
(22)
(22)
(17)
(17)
(23)
(23)
(18)
(18)

+3VALW

USB port1
USB port3
CMOS
Card Reader

F4

R153 24.9_0402_1%
1
2

(8) CLK_PCIE_PCH#
(8) CLK_PCIE_PCH

10K_0402_5%
10K_0402_5%
10K_0402_5%

modify 05/14
C

BT
WLAN

USB_OC#0_1 (15)
USB_OC#2 (15)

R152 Please closed U72


PIN within 500 mils

R152
USBRBIAS1

USB20_N6

1 R1474 2 @
0_0402_5%

USB20_N7

1 R1475 2 3G@
0_0402_5%

USB20_P6

1 R1476 2 @
0_0402_5%

USB20_P7

1 R1477 2 3G@
0_0402_5%

USB20_SIM_N (17)

CLK_PCH_48M

USB20_SIM_P (17)

CLK_PCH_48M (8)

R153 Please closed U72


PIN within 500 mils

R46
R49
R48

WWAN

R338
33_0402_5%
@

USB_OC#0_1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

USB port2

22.6_0402_1%

CLK48

+1.5VS

TGP

U72B

(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)

0
1
2
3
4
5
6
7

Port List

H24
J22

DMI_ZCOMP
DMI_IRCOMP

W23
W24

DMI_CLKN
DMI_CLKP

R434
@ 22P_0402_50V8J
2
For EMI, Close to TigerPoint

2
TIGERPOINT_ES1_BGA360

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Tigerpoint(2/4)
Size Document Number
Custom
Date:

Rev
1.0

LA-6221P

Thursday, July 01, 2010

Sheet
1

12

of

39

+3VALW
R40

LINKALERT#

R44

SMLINK0

10K_0402_5% 2
8.2K_0402_5%

R43

SMLINK1

R239

PM_BATT_LOW#

1K_0402_5% 1

R145

2 ICH_PCIE_WAKE#

10K_0402_5% 2
8.2K_0402_5%

R39

R147

PCH_SMBCLK

2.2K_0402_5% 1

R148

PCH_SMBDATA

10K_0402_5% 2
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

R36
R314

GPIO12

8.2K_0402_5%

R315

GPIO14

R316

GPIO15

R301

SMBALERT#

EC_LID_OUT#

PCH_OK

8.2K_0402_5%
8.2K_0402_5%

PCH_RSMRST#

R42

R295
R300

MCH_SYNC#
SLPIOVR#
GPIO39

R368
R302

EC_THERM#

@ R241

PM_CLKRUN#

+RTCVCC
1

1M_0402_5%
R146 2 INTRUDER#

1 R197
2 INTVRMEN
332K_0402_1%

GPIO0

10K_0402_5% 2

R1450 1

follow EC check list change to pull down 060810

(8) PCH_SMBCLK
(8) PCH_SMBDATA

RTCX1
RTCX2
RTCRST#

W4
V5
T5

SMBALERT#
PCH_SMBCLK
PCH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1

E20
H18
E23
H21
F25
F24

R2
T1
M8
P9
R4

SMBALERT#/GPIO11
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB

AB22

THRM#
VRMPWRGD
MCH_SYNC#
PWRBTN#
RI#
SUS_STAT#/LPCPD#
SUSCLK
SYS_RESET#
PLTRST#
WAKE#
INTRUDER#
PWROK
RSMRST#
INTVRMEN
SPKR

AB17
V16
AC18
E21
H23
G22
D22
G18
G23
C25
T8
U10
AC3
AD3
J16

EC_THERM#
VGATE
MCH_SYNC#
PBTN_OUT#
ICH_RI#

BATLOW#
DPRSTP#
DPSLP#
RSVD31

H_PWRGD (4,5)

PCH_OK

ACIN_C
2 R223

PBTN_OUT# (24)

ACIN

1
1
(5,8,24,35)
C

Change CRT_DET# From Page 10 to Page 13


+3VS

PLTRST# (4,5,16,17,18,24,26)
ICH_PCIE_WAKE# (17,18)

R149
10K_0402_5%

High: CRT Plugged


SB_SPKR (19)

H20
E25
F21

CRT_DET

PM_SLP_S3# (24)
PM_SLP_S4# (24)
PM_SLP_S5# (24)

B25
AB23
AA18
F20

VGATE

EC_PWROK (5,24)

EC_CLK (24)

SYS_RST#
PLTRST#
ICH_PCIE_WAKE#
INTRUDER#
PCH_OK
PCH_RSMRST#
INTVRMEN
SB_SPKR

PM_BATT_LOW#
H_DPRSTP#
H_DPSLP#

VGATE

(24,31)

1
@ R222
0_0402_5%
100K_0402_5%

+3VALW

0_0402_5%
1 R310 2
@
1 R311
2
0_0402_5%

D25 RB751V_SOD323
2
1 ACIN

EC_THERM# (24)

CPUPWRGD/GPIO49

H_PWRGD

SLP_S3#
SLP_S4#
SLP_S5#

SPI

Change EC_LID_OUT# From GPIO13 to GPIO11


06/08

RTCX1
RTCX2
RTCRST#

SMB

For EMI, Close to TigerPoint

LAN_CLK
LANR_RSTSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

RTC

T4
P7
B23
AA2
AD1
AC2
W3
T7
U4

C433
22P_0402_50V8J

LAN

EPROM

R1377
10K_0402_5%
80@

EE_CS
EE_DIN
EE_DOUT
EE_SHCLK

R1482
10K_0402_5%
N3G@

U3
AE2
T6
V3

HDA_BIT_CLK
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDOUT
HDA_SYNC
CLK14

GPIO38

CRT_DET#

(10) CRT_DET#

R159 2
R157 2

P6
U2
W2
V2
P8
AA1
Y1
AA3

GPIO34

R1376
10K_0402_5%

70@

1
1

2
2

R337
33_0402_5%

@
C

33_0402_5%
33_0402_5%

R160
R158

(19,21) HDA_SDOUT_AUDIO
(19,21) HDA_SYNC_AUDIO
(8) CLK_PCH_14M

1
1

AUDIO

(19,21) HDA_BITCLK_AUDIO
(19,21) HDA_RST_AUDIO#
(19) HDA_SDIN0

33_0402_5%
33_0402_5%

R1481
10K_0402_5%
MCP@

GPIO0
T15
+3VS
CRT_DET
W16
CRT_DET
W14
SLPIOVR# (4)
EC_SMI#
K18
EC_SMI# (24)
EC_SCI#
H19
EC_SCI# (24)
ACIN_C
R1390
M17
GPIO12
A24
EC_LID_OUT#
10K_0402_5%
C23
EC_LID_OUT# (24)
GPIO14
P5
GPIO15
E24
AB20 R17 2
1 0_0402_5%
PM_DPRSLPVR (5)
Y16 R1391 2
1 0_0402_5% @
H_STP_PCI# (8)
AB19
H_STP_CPU# (8)
R3
C24
1 R367
2
1K_0402_5%
D19
D20
F22
PM_CLKRUN#
AC19
U14
GPIO34
AC1
GPIO38
AC23
GPIO39
AC24
1

(24,26) LPC_FRAME#

BMBUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
DPRSLPVR
STP_PCI#
STP_CPU#
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
CLKRUN#
GPIO33
GPIO34
GPIO38
GPIO39

MISC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LDRQ1#/GPIO23
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LFRAME#/FWH4

LPC

(24,26)
(24,26)
(24,26)
(24,26)

TGP

U72D

AA5
V6
AA6
Y5
W8
Y8
Y4

+3VS
2

+3VS

11/26

R37 1
R38 1

10K_0402_5% 2
10K_0402_5% 2

ICH_RI#

R240

10K_0402_5% 2

8.2K_0402_5%

+3VS

2.2K_0402_5% 1

SYS_RST#

8.2K_0402_5%

8.2K_0402_5%

+3VALW

Q11
2N7002W-T/R7_SOT323-3

2
G

H_DPRSTP# (5)
H_DPSLP# (5)

TIGERPOINT_ES1_BGA360

CMOS to 0603 20100528.


+RTCBATT

2
2
3

3
NC
NC

OSC
OSC

1
4

32.768KHZ_12.5PF_Q13MC14610002
2

R374
@ 2.2K_0402_5%

+CHGRTC

D28B
@
D28A
BAV99DW-7_SOT363

C1148
1

LOTES_AAA-BAT-019-K01
Noncharge@

BAS40-04_SOT23-3
charge@

+RTCVCC

0.1U_0402_16V4Z

@ MMBT3906_SOT23-3
1
2
+3VALW
R373
@ 4.7K_0402_5%

R375

R288
10M_0402_5%
2
1

Y3

Noncharge@
DAN202UT106_SC70-3

RTCX1

Routing the trace at least 10mil

15P 50V J NPO 0402


1

PCH_RSMRST#

BAV99DW-7_SOT363

+RTCVCC

C368

Q30
3

(24) EC_RSMRST#

D48

change small size 052810

R372
0_0402_5%
2

D37

For ESD

RSMRST circuit

R1370
1K_0402_5%
charge@

R1486
1K_0402_5%
Noncharge@
1

220P_0402_50V7K

JBATT1

1 1

1
+

C1158

1 2

+CHGRTC

+NonchargeRTC

+NonchargeRTC
PLTRST#

C230
1U_0603_10V4Z~D
1
2

CMOS @ 0_0603_5%
1
Change

RTCRST#

1 R196
2
20K_0402_5%

+RTCVCC

10K_0402_5% 2
10K_0402_5% 2

@ 2.2K_0402_5%

Reserve non charge circuit 0503.


RTCX2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

12P 50V J NPO 0402


C371

2006/08/18

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Tigerpoint(3/4)
Size

Document Number

Rev
1.0

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

13

of

39

TGP
U72E
D

VCC5REF

F12

+V5REF_RUN

6mA

F5

+V5REF_SUS

10mA

Y6

+SATAPLL

50mA

U72F

+5VS

VCC5REF_SUS

+3VS

AA8
M9
M20
N22

1.3A

VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4

J10
K17
P15
V10

0.98A

H25
AD13
F10
G10
R10
T9

0.29A

F18
N4
K7
F1

0.13A

C461

1U_0603_10V6K

C61
C460

+1.5VS

+VCCP

10U_0805_10V4Z

1U_0603_10V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C45
C63
C38

1U_0603_10V6K

1U_0603_10V6K

C60

1U_0603_10V6K

C48
C39

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4

C463

+3VS

+3VALW

1U_0603_10V6K

C40
0.1U_0402_16V4Z

C37

2
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6

C43

0.1U_0402_16V4Z

+V5REF_SUS

C44

10_0402_5%

C46

R35

0.1U_0402_16V4Z

D10
RB751V-40_SOD323-2

0.1U_0402_16V4Z

POWER

+3VALW

0.1U_0402_16V4Z

1U_0603_10V6K

1U_0603_10V6K

C41
2

10U_0805_10V4Z

VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4

2
1

C47

14mA

V_CPU_IO

C59

0.1U_0402_16V4Z

+RTCVCC

0.01U_0402_16V7K

W18

+VCCP

C459

10mA

1U_0603_10V6K

F6

+V5REF_RUN

1U_0603_10V6K

VCCUSBPLL

C42

+DMIPLL

Y25

0.1U_0402_16V4Z

AE3

VCCDMIPLL

C62

VCCRTC

D12
RB751V-40_SOD323-2

C462

R33
100_0402_5%

+5VALW

VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

VCCSATAPLL

TGP

TIGERPOINT_ES1_BGA360
B

A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25

Place closely pin Y25 within 100mlis.


+1.5VS

VSS57
VSS58
VSS59

R30
0_0805_5%
C58
10U_0805_10V4Z

0.01U_0402_16V7K
1
1
C28

+DMIPLL
1

C464

RSVD32

G24
AE13
F2
AE16

2
4.7U_0603_6.3V6K
TIGERPOINT_ES1_BGA360

Place closely pin Y6 within 100mlis.


+1.5VS
R29
+SATAPLL
0_0805_5%
C57
10U_0805_10V4Z

C27
0.1U_0402_16V4Z

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/04/15

Issued Date

Deciphered Date

2010/04/15

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Tigerpoint(4/4)
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P
Sheet

Thursday, July 01, 2010


1

14

of

39

+5VALW

(24)

W=80mils

U78
1
2
3
4

USB_ON#

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

8
7
6
5

USB_OC#2 (12)
1

APL3510BKI-TRG SOP 8P PWR SWITCH

1
C1
0.1U_0402_16V4Z

+USB_VCCC1

W=80mils

1
2

C2
@ 1000P_0402_50V7K

SATA HDD Conn.

2
JHDD1

@
R1
0_0402_5%
1
2

(11) SATA_DTX_C_IRX_N0
(11) SATA_DTX_C_IRX_P0

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

SATA_DTX_IRX_N0
2 C380
0.01U_0402_16V7K
SATA_DTX_IRX_P0
2

C383
0.01U_0402_16V7K

+USB_VCCC1

1
2
3
4
5
6
7

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

(11) SATA_ITX_C_DRX_P0
(11) SATA_ITX_C_DRX_N0

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+3VS

L31
(12) USB20_N2

(12) USB20_P2

USB20_N2_1

USB20_P2_1

W=80mils

WCM2012F2S-900T04_0805

150U 6.3V M B LESR45M T520 H1.9


2

1
2
R2
0_0402_5%
@

C10

C8

1
2
3
4

USB20_N2_1
USB20_P2_1

D4

+USB_VCCC1

CH3

CH4

C419
10U_0603_6.3V6M

1000P_0402_50V7K

CONN@

Change JUSB1 JUSB2 to NEW P/N SP010906181

USB CONN.2

06/23

USB CONN.1
+USB_VCCC

1
C315

+USB_VCCC

W=40mils

+USB_VCCC
1

+
2

W=40mils

+USB_VCCC
1

C316
C317

150U 6.3V M B LESR45M T520 H1.9


2

470P_0402_50V7K

150U 6.3V M B LESR45M T520 H1.9


2

C318
470P_0402_50V7K

JUSB1

+USB_VCCC

5
6
7
8

U13

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

8
7
6
5

D21

(24)

USB_ON#

USB_ON#

GND1
GND2
GND3
GND4

5
6
7
8

D23

VCC
DD+
GND
GND1
GND2
GND3
GND4
SUYIN_020133GB004M25MZL

PJDLC05C_SOT23-3

CONN@

CONN@

PJDLC05C_SOT23-3
1

1
2
3
4

(12) USB20_N1
(12) USB20_P1

SUYIN_020133GB004M25MZL

USB_OC#0_1 (12)

APL3510BKI-TRG SOP 8P PWR SWITCH


@

JUSB2

VCC
DD+
GND

1
2
3
4

(12) USB20_N0
(12) USB20_P0

+5VALW

R224
100K_0402_5%

SUYIN_127043FR022G263ZR_NR

5/12 Revised USB connector


6/23 Update USB connector

1
2
3
4

23

USB20_P2_1

CM1293-04SO_SOT23-6

C244
0.1U_0402_16V4Z
2
1

24

SUYIN_020133GB004M25MZL
CONN@

CH1

C422
1U_0402_6.3V6K
2

C426

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND GND
V12
V12
GND
V12

GND1
GND2
GND3
GND4

Vn

C423

VCC
DD+
GND

5
6
7
8

CH2

Vp

+5VS
0.1U_0402_16V4Z

470P_0402_50V7K

JUSB3

5/12 Revised net name


USB20_N2_1

+5VS

USB CONN. 3

GND
A+
AGND
BB+
GND

C245
@ 1000P_0402_50V7K

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/08/18

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SATA,CONN. / USB CONN.


Size
B

Document Number

Rev
0.2

LA-6221P

Date:

Thursday, July 01, 2010


G

Sheet

15
H

of

39

+3V_LAN

for NAV70/80 DDR3

2010/01/22
1

U14

TX_P

LED_ACT#

38

LAN_ACTIVITY#

R645
1

R1451 SWR@
5.1K +-5% 0402

5.1K_0402_5%
2

29

TX_N

LED_LINK10_100#

39

LAN_SK_LAN_LINK#

30

35

RX_P

(12) PCIE_ITX_C_DRX_N1

36

RX_N

11
12
14
15

33
32

TRXP0
TRXN0
TRXP1
TRXN1

REFCLK_P
REFCLK_N

RBIAS

10

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1R635 2.37K_0402_1%
2
1

(12) PCIE_ITX_C_DRX_P1

23

CLKREQ#

(4,5,13,17,18,24,26)

PLTRST#

CLK_PCIE_LAN
CLK_PCIE_LAN#
2 R1453 1 4.7K_0402_5%@
LAN_CLKREQ#_R
1
2
R1428
0_0402_5%
PLTRST#

LAN_WAKE#

(24) LAN_WAKE#

LAN_X1
LAN_X2

SMCLK
SMDATA

28
27
41

TEST_RST
TESTMODE
GND

16
17
18
19
20
21
13

Y8
LAN_X1

WAKE#

LAN_X2

C852
27P_0402_50V8J

2
2
2
2

20mil

49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%

2 C838 0.1U_0402_16V4Z

2 C839 0.1U_0402_16V4Z

+3V_LAN

VDDCT
VDDCT_REG

5
4

+1.7V_VDDCT
+1.7V_VDDCT_REG

DVDDL
DVDDL_REG

24
37

+1.1V_DVDDL

W=30mils

AVDDH
AVDDH_REG

22
9

+2.7V_AVDDH

W=30mils

AVDDL
AVDDL
AVDDL_REG

W=40mils
W=40mils

L10 close to Lan pin40


+1.7V_LX

AR8152L

C853
27P_0402_50V8J

1
1
1
1

the GND directly connect to GND layer

+1.1V_AVDDL

31
34
6

1
2 +1.7V_VDDCT
L10
4.7UH_1008HC-472EJFS-A_5%_1008
1
SWR@

W=30mils

AR8152-AL1E
25MHZ_20PF_7A25000012 2

R629
R630
R631
R632

R635 keep away other singal (25mil)

+1.7V_LX

XTLO
XTLI
NC
NC
NC
NC
NC
NC
NC

W=40mils

40

LX

25
26

7
8

del big package

VDD33
PERST#

close to Lan chip

0.1U_0402_16V4Z

(8) CLK_PCIE_LAN
(8) CLK_PCIE_LAN#
+3V_LAN
(8) LAN_CLKREQ#

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-

R1452 LDO@
5.1K +-5% 0402

(12) PCIE_DTX_C_IRX_N1

PCIE_C_RXP1
0.1U_0402_16V7K
PCIE_CRXN1
1
0.1U_0402_16V7K

2
C845
2
C851

(12) PCIE_DTX_C_IRX_P1

PN:SA00003JW10

1
10U_0603_6.3V6M
0.1U_0402_16V4Z
1
1

C881

C399

+1.7V_VDDCT_REG

2
R680
0_0603_5%
LDO@

C860

C876

2
SWR@

1
C877

LDO@

0.1U_0402_16V4Z

Change LAN chip to AR8152-L

+1.7V_LX+VDDCT pin39 need to pull high resister of 5.1k


LDO mode:+1.7V_VDDCT_REG+VDDCT pin39 need to pull low resister of 5.1k

Switch mode:

1U_0402_6.3V4Z

close to Lan pin5

+1.1V_AVDDL

close to L10

+2.7V_AVDDH

close to Lan pin4

+1.1V_DVDDL

close to Lan pin6

JUMP_43X39
@

1000P_0402_50V7K
1
C841
C848

1U_0402_6.3V4Z
1

C847

2
B

2
0.1U_0402_16V4Z

1
C340

1
C1205

close to Lan pin31

close to Lan pin9

C872

close to JRJ45

2
R644

1
511_0402_1%

C1207

RD+
RDCT
NC
NC
CT
TD+
TD-

RX+
RXCT
NC
NC
CT
TX+
TX-

16
15
14
13
12
11
10
9

RJ45_MIDI1+
RJ45_MIDI1RJ45_CT0
RJ45_CT1
RJ45_MIDI0+
RJ45_MIDI0-

R640
1
R639
1

@
2
1
C883
470P_0402_50V7K

75_0402_5%
2
75_0402_5%
2

+3V_LAN

PR4+

PR2-

PR3-

PR3+

RJ45_MIDI1+

PR2+

RJ45_MIDI0-

PR1-

RJ45_MIDI0+

PR1+

Green LED+

1 R643
511_0402_1%

10

Issued Date

2009/7/7

Deciphered Date

15
13

SHLD1

14

Green LED-

CONN@

2010/7/7

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

SHLD1
DETECT PIN1

SANTA_130452-3

Compal Secret Data

Security Classification

close to T1

Yellow LEDPR4-

@
2
1
C884
470P_0402_50V7K

Yellow LED+

12

LAN_SK_LAN_LINK#
C862
1000P_1206_2KV7K

11

For EMI.

350uH_NS0013LF

close to Lan pin24

JRJ45

1
2
3
4
5
6
7
8

0.1U_0402_16V4Z

@
2

1000P_0402_50V7K
C880

C1206

0.1U_0402_16V4Z

@
2

1000P_0402_50V7K
C882

C875

1U_0402_6.3V4Z

close to L2
A

@
2
1
C879
470P_0402_50V7K

T1

LAN_MDI0+
LAN_MDI0-

close to Lan pin37

RJ45_MIDI1-

+1.7V_VDDCT
2
1
MURATA_BLM18AG601SN1D_0603

1
C867

close to Lan pin34

LAN_ACTIVITY#

LAN_MDI1+
LAN_MDI1-

1
C866

close to Lan pin22

close to Pin 1

L32

C865

0.1U_0402_16V4Z

C871

0.1U_0402_16V4Z

C870

1U_0402_6.3V4Z

0.1U_0402_16V4Z

C863

0.1U_0402_16V4Z

C868

1U_0402_6.3V4Z

0.1U_0402_16V4Z

C856

10U_0603_6.3V6M~D

1A

10U_0603_6.3V6M~D

+3VALW

C873

+3V_LAN

J15

0.1U_0402_16V4Z

1U_0402_6.3V4Z

W=40mils

0.1U_0402_16V4Z

LAN Power circuit refer NAU00

Title

Compal Electronics, Inc.


LAN AR8152

Size
Document Number
Custom LA-6221P
Date:

Rev
0.1
Sheet

Thursday, July 01, 2010


1

16

of

39

Add C1163 C1164 C1165 C1166

+1.5VS
1 MCP@

1 MCP@

06/23

1 MCP@

C1165

0.01U_0402_25V7K

1 MCP@

C1164

0.1U_0402_16V4Z

C1163

C1166
2

4.7U_0603_6.3V6K

47P_0402_50V8J

Add C850 06/12

+3VS_WWAN
MCP@
1

Mini-Express Card for WWAN

MCP@
1

C506
2

0.1U_0402_16V4Z

2 MCP@

2
10U_0805_10V4Z

+3VS_WWAN

+3VS

Change JMINI1 to FOX_AS0B246-S50U-7F_52P-T

MCP@

0.1U_0402_16V4Z
1
C507

1 MCP@

C505

06/29

1
R405

0.01U_0402_25V7K

C850
47P_0402_50V8J

+3VS_WWAN

+3VALW
@
1
R504

2
0_1206_5%

1
C508

1
@

2
0_1206_5%

C403

150U_B_6.3VM_R40M

Close to WWAN CONN

JMINI1
ICH_PCIE_WAKE#

(13,18) ICH_PCIE_WAKE#
2

1
3
5
7
9
11
13
15

WWAN_CLKREQ#

(8) WWAN_CLKREQ#

(8) CLK_PCIE_WWAN#
(8) CLK_PCIE_WWAN

(12) PCIE_DTX_C_IRX_N3
(12) PCIE_DTX_C_IRX_P3

Change to PCIE_P3 05/13


(12) PCIE_ITX_C_DRX_N3
(12) PCIE_ITX_C_DRX_P3
10U_0805_10V4Z
1
2
C504 MCP@
WWAN_WAKEUP_R#

+3VS_WWAN

EC_TX_P80_DATA_R
EC_TX_P80_CLK_R

R4020_0402_5%
1
2 EC_TX_P80_DATA_R
1
2 EC_TX_P80_CLK_R
R403
0_0402_5%

EC_TX_P80_DATA
EC_RX_P80_CLK

(18,24) EC_TX_P80_DATA
(18,24) EC_RX_P80_CLK

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55

R1325
10K_0402_5%

UIM_RST

Vn

CH2

GND1
NC

GND2
NC

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

WXMIT_OFF#
R506 1

2 0_0402_5%

R507 0_0402_5%
1
2
1
2
R508 0_0402_5%

WXMIT_OFF# (24)
PLTRST# (4,5,13,16,18,24,26)

CLK_SMBCLK (7,8,18,26)
CLK_SMBDATA (7,8,18,26)
USB20_N5_1
USB20_P5_1

1
R511

2
0_0402_5%

(9~16mA)

WWAN_LED# (18,23)
WLAN_LED# (18,23)

54
56

(12) USB20_N5

WCM2012F2S-900T04_0805
4 4
3 3

USB20_N5_1

(12) USB20_P5

USB20_P5_1

1
L33

Add C1115 C1114 C1116 C1117 C1118


Change C512 to 1U_0402 05/14

3G@ 3G@
1

+3VALW

C513

R509
10K_0402_5%
2

3G@
1

C1115
56P_0402_50V8

3G@
1
C512

C1114
56P_0402_50V8

0.1U_0402_16V4Z

Reserve for SIM card does not meet rise time


and pull-up is needed.

1U_0402_6.3V6K

TAITW_PMPAT2-08GLBS7N14N0
CONN@

10
11

C1116

GND
GND

+UIM_PWR

Modifiy 05/11

3G@
3G@ 1

22P_0402_50V8J

D+
D-

22P_0402_50V8J

VCC
RST
CLK

22P_0402_50V8J
C511

8
9

GND
VPP
I/O
DET

+UIM_PWR
UIM_RST
UIM_CLK

C510

(12) USB20_SIM_P
(12) USB20_SIM_N

1
2
R1479
0_0402_5%
1
2
3

C1117
56P_0402_50V8

R12
10K_0402_5%
2
1

1
C509

C1118
56P_0402_50V8

3G@ 1

22P_0402_50V8J

UIM_VPP
UIM_DATA

UIM_CLK
JP3

4
5
6
7

R1478
0_0402_5%
2

+UIM_PWR

CH3

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+1.5VS

+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

UIM_DATA

Vp

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
4
6
8
10
12
14
16

D15
@ CM1293-04SO_SOT23-6
1 CH1
CH4 4

UIM_VPP

2
4
6
8
10
12
14
16

BELLW_80052-1021
CONN@

2
3

1
3
5
7
9
11
13
15

05/11

WWAN_WAKEUP_R#
2
0_0402_5%

1
R510

(24) WWAN_WAKEUP#

2006/08/05

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Mini-Card
Size

Document Number

Rev
0.2

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
E

17

of

39

Mini-Express Card for WLAN

+3VS_WLAN

+1.5VS

1
C195
4.7U_0603_6.3V6K

1
C1189
0.1U_0402_16V4Z

1
C1043
47P_0402_50V8J

1
C1069
4.7U_0603_6.3V6K

1
C1070
0.1U_0402_16V4Z

C1071
47P_0402_50V8J

J9
JUMP_43X79
@
1 1
2 2

JMINI2
2 @

(8) CLK_PCIE_WLAN#
(8) CLK_PCIE_WLAN

(12) PCIE_DTX_C_IRX_N2
(12) PCIE_DTX_C_IRX_P2
(12) PCIE_ITX_C_DRX_N2
(12) PCIE_ITX_C_DRX_P2
+3VS_WLAN
B

1
C1072
10U_0603_6.3V6M
EC_TX_P80_DATA
EC_RX_P80_CLK

(17,24) EC_TX_P80_DATA
(17,24) EC_RX_P80_CLK

R1488
1
1
R1489

0_0402_5%
EC_TX_P80_DATA_R_
2
EC_TX_P80_CLK_R_
2
0_0402_5%

5/12
6/1
6/12
6/26
7/01

EC_TX_P80_DATA_R_
EC_TX_P80_CLK_R_

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
54

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
G1
G2

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G3
G4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
55
56

+3VS
+1.5VS

WL_OFF# (24)
PLTRST# (4,5,13,16,17,24,26)

R1455
R1456

0_0402_5% @
1
2
1
2
0_0402_5% @

CLK_SMBCLK (7,8,17,26)
CLK_SMBDATA (7,8,17,26)
USB20_N7 (12)
USB20_P7 (12)

0_0402_5%
R1454 1

(23,24) BT_ON#
(8) WLAN_CLKREQ#

1 R1356 2
0_0402_5%

12/09

R1457
0_0402_5%
2

(13,17) ICH_PCIE_WAKE#

+3VS_WLAN

WWAN_LED# (17,23)

(9~16mA)

@
WLAN_LED# (17,23)

BELLW_80052-1021
CONN@

Update WLAN connector(the same as KAV60)


Revised 37 39 41 42 43 to NC
Update connector to DC040006S00
Update JMINI1 footprint
update pin 23,25,31,33

2006/08/05

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

WLAN
Size

Document Number

Rev
0.2

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

18

of

39

HDA_SDIN0_AUDIO
(21) N18123167
(21) MIC1_C_L
(21) MIC1_C_R
(21) N17000410

N18123167

PVDD1_AUDIO

MIC1_C_L

N18123238

MIC1_C_R

N18123244

N17000410

PVDD1_AUDIO (21)
N18123238 (21)

N18123239

SENSE_A
SENSE_B

(21) N16999461
(21) N18122593

SENSE_A
SENSE_B

(24)

BEEP#

C1020
0.1U_0402_6.3V4Z
1
2

N16999452

MONO_IN (21)

47K_0402_5%

CODEC_VREF (21)

N16999452 (21)

N18123239 (21)
(13)

N18123242

R1326

SB_SPKR

N18123242 (21)

R1327

C123
100P_0402_50V8J

47K_0402_5%

N16999461
D

(21)
(21)

(21)

N17000325 (21)

CODEC_VREF

PVDD2_AUDIO (21)

N18123190 (21)

N17000325

N18123244 (21)

PVDD2_AUDIO

HDA_SDIN0_AUDIO

N18123190

N18122593

R1324
10K_0402_5%

J8

C1009
0.1U_0402_6.3V4Z

@ JUMP_43X39

+5VS

40mil

L21 1
2
FBMA-L11-201209-221LMA30T_0805
1
C1179
0.1U_0402_16V4Z

U26
1

C458
0.1U_0402_16V4Z

(output = 300 mA)

IN
OUT

40mil

GND
SHDN

BYP

+VDDA
C1180

G9191-475T1U_SOT23-5

4.75V

+3VS_DVDD

2
+3VS_DVDD

2.2U_0603_6.3V6K
1

HD Audio Codec
2

1
C468
0.1U_0402_16V4Z

L23
MBK1608121YZF_0603
2

+3VS

1
C1181
0.1U_0402_16V4Z

C465
10U 6.3V M X5R 0603 H0.8

+AVDD_HDA
PVDD1_AUDIO

L24
MBK1608121YZF_0603
1
2

20mil

36

20

(21)

@
10P_0402_50V8J
2
1

19

MIC1_C_L 21

2
4.7U_0603_6.3V6K
2
4.7U_0603_6.3V6K

1
C472

7/04 Add C23 C23

1
C471

MIC1_R

MIC1_R

MIC1_C_R 22
12

MONO_IN

11

(13,21) HDA_RST_AUDIO#

10

(13,21) HDA_SYNC_AUDIO

(13,21) HDA_SDOUT_AUDIO
(9)
(20) HP_PLUG#
(20) MIC_PLUG#
(20) HP_PLUG#

39.2K +-1% 0402 2 R1332


20K_0402_1%
2 R376
5.11K_0402_1% 2 R1404
2
1

1 271@
1
1 272@

DMIC_DATA
DMIC_DATA1

C1053 271@
2.2U_0402_6.3VM

(24)

CMIC@
R438 2 FBMA-11-100505-401T 0402
1
MIC@ 1
R439 2 FBMA-11-100505-401T 0402
SENSE_A
SENSE_B
1
R377
1
R1334
1
R1335

EAPD

(20,24) EC_MUTE#

2
0_0402_5%
2
0_0402_5%
2
0_0402_5%

MIC2_L

HP_OUT_L

MIC2_R

HP_OUT_R

LINE1_L

NC

LINE1_R

DMIC_CLK

CD_L

NC

CD_R

NC
BIT_CLK

271@
C1044
0.1U_0402_16V4Z

271@
C1045
10U 6.3V M X5R 0603 H0.8

271@
C1046
0.1U_0402_16V4Z

C
271@
C1047
10U 6.3V M X5R 0603 H0.8

41
45
46
43
44

PVDD1_AUDIO
271@

20mil

1 0_0402_5%
2 R1398

AMP_RIGHT (20,21)
SPKL-

(20)

SPKR+

20mil

R1329 0_0402_5%

2 22_0402_5% 1
@

SPKR-

2 C470 @

+5VS

(20)
1

271@
10_0402_5%2 R1399
DMIC_CLK1
1 MIC@ 2
PVDD2_AUDIO FBMA-11-100505-401T
1 0402
2 R442
DMIC_CLK (9)
FBMA-11-100505-401T 0402 CMIC@R441
271@
0_0402_5%
1
2 R1400

20mil 271@

L30
271@
MBK1608121YZF_0603
1
2

PVDD2_AUDIO

271@
C1051
0.1U_0402_16V4Z

271@
C1048
10U 6.3V M X5R 0603 H0.8

271@
C1049
0.1U_0402_16V4Z

(20)

271@

C1050
10U 6.3V M X5R 0603 H0.8

22P_0402_50V8J

HDA_BITCLK_AUDIO (13,21)

MIC1_L
MIC1_R

SDATA_IN

PCBEEP

MONO_OUT
LINE1_VREFO

RESET#
GPIO1
SYNC
MIC1_VREFO_L
SDATA_OUT
MIC1_VREFO_R
GPIO0
GPIO3
SENSE A
SENSE B

47

EAPD

48

SPDIFO

4
7

39

R1401 1

CD_GND

2
3
13
34

271@
272@

9
35

LINE_OUT_R

18

1 20K_0402_1%

LINE_OUT_L

NC

24

MIC1_L

38

NC

23

20mil (20)
20mil (20)

+5VS

AMP_LEFT (20,21)

15

17

MIC1_L

14

16

271@
R1330 2

DVDD

U27

DVDD_IO

20mil

1
C467
0.1U_0402_16V4Z

25

1
C466
0.1U_0402_16V4Z

AVDD2

1
C1182
10U 6.3V M X5R 0603 H0.8

AVDD1

L29
271@
MBK1608121YZF_0603
2

40mil

HDA_SDIN0_AUDIO

29

10mil

MIC1_VREFO_L

2
HDA_SDIN0 (13)
33_0402_5%
1
2
R1331
0_0402_5% 271@
1

R1352 1

1
271@ C1052 1

28

10mil

32

HP_RIGHT

10mil

27

CODEC_VREF

JDREF

40

NC

33

2 10U 6.3V M X5R 0603 H0.8


C491
2.2U_0402_6.3VM
272@

MIC1_VREFO

20mil

272@
C490 2.2U_0402_6.3VM
2

2 0_0402_5% @

31

30

AVSS1
AVSS2

1
R1402

37

VREF

MIC2_VREFO

DVSS1
DVSS2

HP_RIGHT (20,21)

MIC1_VREFO_R

1
HP_LEFT

2
SPKL+
R1333
0_0402_5% 20mil
271@

HP_LEFT (20,21)

20mil
26
42

(20)

272@

+VDDA

C473
4.7U_0603_6.3V6K

C474
0.1U_0402_16V4Z

ALC272-GR_LQFP48_9X9
20K_0402_1%

Impedance

DGND

Codec Signals

39.2K

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

AGND

Change to SA00002CI20

R378

Sense Pin

change C473 from 10uF to 4.7uF 0701


+3VS

SENSE A

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

JP4
1
2
3
4

8mil

DMIC_CLK1
DMIC_DATA1

1
2
3
4

G1
G2

5
6

MIC@
D20
PJDLC05C_SOT23-3

MIC@
C604

MIC@
C603

2
22P 50V J NPO 0402

2
R382

1
0_0402_5%

R379

2
R384

1
0_0402_5%

R381

GND

GNDA

2
22P 50V J NPO 0402

For ESD 12/22

1
0_0603_5%

1
0_0603_5%

<Title>

GND

GNDA

Title

HD Audio Codec ALC272

Size
Document Number
Custom<Doc>
Date:

Compal Electronics, Inc.

PORT-H (PIN 45, 46)

5.1K

1
0_0603_5%

ACES_88266-04001
CONN@

SENSE B

2
R380

ALC272-VA2-GR

Rev
0.1

NAV50 LS-5652P

Friday, July 02, 2010

Sheet
1

19

of

39

+5VAMP_J

272@
C384
10U 6.3V M X5R 0603 H0.8

J12
2

+5VS

Int. Speaker Conn.

+5VAMP_J

20mil
272@
C385
0.1U_0402_16V4Z

(19)
(19)
(19)
(19)

@ JUMP_43X39

R1336 1
R1338 1
R1337 1
R1339 1

SPKL+
SPKLSPKR+
SPKR-

2
2
2
2

JP20
SPK_L+
SPK_LSPK_R+
SPK_R-

0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%

1
2
3
4

1
2
3
4

G1
G2

5
6

ACES_88266-04001
CONN@

272@
1
2
C397
0.47U_0603_10V7K

ROUTLOUT+

2
R83

AMP_C_LEFT
0_0402_5%

LIN-

SPKL+

LOUT-

SPKL-

SPK_L+
3

@
D44
PJDLC05C_SOT23-3

272@
R319
100K_0402_5%

SPK_L2

SPKR-

14

272@
R1407
100K_0402_5%

LIN+

272@
1

SPKR+

SPK_R+

@
D45
PJDLC05C_SOT23-3

GAIN1

18

SPK_R-

272@
2 0.47U_0603_10V7K

ROUT+

GAIN0

RIN-

GAIN1
2 AMP_C_RIGHT
0_0402_5%

R94

17

GAIN0

RIN+

16
15
6
VDD
PVDD1
PVDD2

272@
1

C1185 1

(19,21) AMP_LEFT

272@
C1183
0.47U_0603_10V7K
2

@ R1406
100K_0402_5%

272@
1
2
C1184
0.47U_0603_10V7K

(19,21) AMP_RIGHT

@ R1405
100K_0402_5%

+5VAMP_J
272@
U79

NU D44 & D45 0623


20081029 Update to 6dB

NC

EC_MUTE#

BYPASS

12

Keep 10 mil width

10

SHUTDOWN

GND5
GND1
GND2
GND3
GND4

(19,24) EC_MUTE#

19

272@
C398
0.47U_0603_10V7K

21
20
13
11
1

TPA6017A2_TSSOP20

Headphone JACK
JHP1

20mil

272@
(19,21) HP_LEFT

HP_LEFT

(19,21) HP_RIGHT

HP_RIGHT

HPOUT_L_1
2
56.2_0402_1%
HPOUT_R_1
2
56.2_0402_1%

1
R1393
1
R1408

2
FBM-11-160808-700T_0603
2
FBM-11-160808-700T_0603

L26
1
L25

HPOUT_L_2

HPOUT_R_2

2
5

20mil

272@

C485
330P_0402_50V7K

(19)

HP_PLUG#

HP_PLUG#

C486
330P_0402_50V7K

6
4 SHLD1

SINGA_2SJ2285-112252
B

CONN@
MIC1_VREFO

6/19 Update Headphone connector

MIC1_VREFO

272@
D27
RB751V-40TE17_SOD323-2
1

272@
D26
RB751V-40TE17_SOD323-2
D46

D47
1

(19)

MIC1_L

(19)

MIC1_R

2
1K_0603_1%
2
1K_0603_1%

MIC1_VREFO_R

MIC JACK

1
2

JMIC1

20mil
1
R1411
1
R404

RB751V-40TE17_SOD323-2
271@
R1410
4.7K_0402_5%

RB751V-40TE17_SOD323-2
271@
R1409
4.7K_0402_5%

MIC1_VREFO_L

MIC2_L_1

MIC2_R_1

20mil

L28
FBM-11-160808-700T_0603
2

3
MIC2_L_2
MIC2_R_2

2
L27
FBM-11-160808-700T_0603

C488
220P_0402_50V8J

2
5
(19) MIC_PLUG#

MIC_PLUG# 6

C489
220P_0402_50V8J

4 SHLD1

SINGA_2SJ2285-112252
CONN@

6/19 Update MIC connector


2006/08/05

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Amplifier & Audio Jack


Size

Document Number

Rev
0.2

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

20

of

39

HD Audio Codec
+3VS_DVDD

+AVDD_HDA
+3VS_DVDD

40mil

14
15
16

17
23
24
18
20
(19) N18123167
(19) MIC1_C_L
(19) MIC1_C_R
(19)

N18123167

19

MIC1_C_L

21

MIC1_C_R

22
12

MONO_IN

(13,19) HDA_RST_AUDIO#

11

(13,19) HDA_SYNC_AUDIO

10
5

(13,19) HDA_SDOUT_AUDIO
(19) N17000410
(19)
(19)

SENSE_A
SENSE_B

2
3
13
34

SENSE_A
SENSE_B
(19) N16999461

N17000410

N16999461

47
48

(19) N18122593

N18122593

4
7

DVDD

20mil

38

271@

AVDD2

AVDD1

U80

25

20mil

DVDD_IO

+AVDD_HDA

NC

LINE_OUT_L

NC

LINE_OUT_R

MIC2_L

HP_OUT_L

MIC2_R

HP_OUT_R

LINE1_L

NC

LINE1_R

DMIC_CLK

CD_L

NC

CD_R

NC

CD_GND
BIT_CLK

35

AMP_LEFT (19,20)

36

AMP_RIGHT (19,20)

39

PVDD1_AUDIO

41

N18123238

45

N18123244

46

PVDD2_AUDIO

20mil

N18123244 (19)

PVDD2_AUDIO (19)
N18123239 (19)

N18123242

20mil

20mil

N18123238 (19)

N18123239

43
44

PVDD1_AUDIO (19)

N18123242 (19)

HDA_BITCLK_AUDIO (13,19)

MIC1_L
MIC1_R

SDATA_IN

PCBEEP

MONO_OUT
LINE1_VREFO

RESET#
GPIO1
SYNC
MIC1_VREFO_L
SDATA_OUT
MIC1_VREFO_R
GPIO0
GPIO3
SENSE A
SENSE B

MIC2_VREFO
VREF

EAPD

JDREF

SPDIFO
DVSS1
DVSS2

HDA_SDIN0_AUDIO

8
37

N18123190

29

N17000325

31

10mil

28

10mil

32

HP_RIGHT

30

10mil

33

AVSS1
AVSS2

26
42

N17000325 (19)

MIC1_VREFO

20mil

HP_RIGHT (19,20)
MIC1_VREFO_R

N16999452

40

NC

(19)

MIC1_VREFO_L

CODEC_VREF

27

HDA_SDIN0_AUDIO
N18123190 (19)

HP_LEFT

20mil

CODEC_VREF (19)
N16999452 (19)

HP_LEFT (19,20)

ALC271X-GR QFN 48P CODEC

DGND

Sense Pin

SENSE A

Impedance

AGND

Codec Signals

39.2K

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

5.1K

PORT-H (PIN 45, 46)

SENSE B

2006/08/05

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Codec ALC271
Size

Document Number

Rev
0.2

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

21

of

39

J14
2

+3VS

R33

08/06 Add R32

U1 close to JREAD1

U28

VCC33

6252@

U28

@ JUMP_43X39
J13
2

+3VALW

+3VS_READER

28
29
30
31
33

+VCC_4IN1
+3VS_READER
VCC33
VCC18

CrdVcc
SysVcc
Vcc33O
Vcc18O
Thermo Pad

@ JUMP_43X39
R1345
12K_0402_1%
1
2

1
C1054
10U 6.3V M X5R 0603 H0.8

C1055
0.1U_0402_25V4K
2 @

(12)
(12)

14
13
REXT 12
8

USB20_P4
USB20_N4
XTLI

Clock from M/B


CARD_D0
CARD_D1
CARD_D2
CARD_D3
CARD_D4
CARD_D5
CARD_D6
CARD_D7

D+
DRref
EClkin

17
18
20
21
19
4
5
6

VddA
VccA

15
10

xDCeZ
xDCle
xDAle
xDBsyZ

7
23
24
22

SMCEZ
SMCLE
SMALE_CLK
SMBSYZ_SDCMD

3
25
32
26
27

SMWE_MSINS_SDWP
SMREZ
SMWPZ
SDCDZ
SMCDZ_MSINSZ

CARD_LED_R#

xDWeZ
xDReZ
xDWpZ
SdCdZ
xDCdZ

xDData0
xDData1
xDData2
xDData3
xDData4
xDData5
xDData6
xDData7

LedZ

ResetZ

SMCEZ_C
6250@

6252@
R1346
100_0402_1%
1
2

SMREZ_C
R1344

VCC33

R1357
4.7K_0402_5%
@

16
11
9

VssA
GndA
NC

6252@
R1344
100_0402_1%
1
2

6250@

6250@

08/06 Add R1347

XTLO

R1346

R1348

UB6252NF A2-110 QFN 32P

HW TRAP JUMPER
If use external crystal(Y4),
U1 will change UB6252

SMCEZ

VCC33

SMREZ

R1395 6252@
470_0402_5%
1
2

VCC33

VCC33
+VCC_4IN1

+3VS

VCC18

20mils

R1348 is NC

@
R1358
0_0402_5%
1
2

@
C1058
0.1U_0402_25V4K

D31
CARD_LED_R#

C1059
4.7U_0603_6.3V6K

1
D

1
C1057
10U 6.3V M X5R 0603 H0.8

@
C1056
10P 50V J NPO 0402

20mils

@
R1361
0_0402_5%

when you use UB6250 ,R1347

R1354
10K_0402_5%

0_0402_5%
R1359

@
R1353
10K_0402_5%

R1360
10K_0402_5%

+VCC_4IN1

C1057 close to U1

C1056

VCC33

0: NC, 1: Short
R1394 6252@
470_0402_5%
1
2

Q37
2N7002W-T/R7_SOT323-3

CARD_LED# (23)

RB751V_SOD323

0_0402_5%
R1355
@
VCC33

20mils

07/02 Update JREADER1


2

@
C1060
0.01U_0402_16V7K

Card Reader Connector

+VCC_4IN1

1
C1061
0.1U_0402_25V4K

C1062
4.7U_0603_6.3V6K
2

JREAD1

07/02 Revised C1053 to 0.01u

ByPass Capacitors

4/30 Add CLK_SD_48M

1
R1397
33_0402_5%

C1065
18P 50V J NPO 0402
6252@

Y9

del big package

30
29
28
27
26
25
24
23

SMWE_MSINS_SDWP
SMWPZ
SMALE_CLK
SMCDZ_MSINSZ
SMBSYZ_SDCMD
SMREZ_C
SMCEZ_C
SMCLE

33
32
34
39
38
37
36
35

XD10-D0
XD11-D1
XD12-D2
XD13-D3
XD14-D4
XD15-D5
XD16-D6
XD17-D7
XD07-WE
XD08-WP
XD06-ALE
XD01-CD
XD02-R/B
XD03-RE
XD04-CE
XD05-CLE

31
40

XTLI

1
R1396

(8) CLK_48M_CR

6250@
2
0_0402_5%

CARD_D0
CARD_D1
CARD_D2
CARD_D3
CARD_D4
CARD_D5
CARD_D6
CARD_D7

XD-VCC

SD CD/WP GND
SD CD/WP GND

C1066
22P_0402_50V8J

EMI

C1068
18P 50V J NPO 0402
6252@

SD5-CLK
SD7-DAT0
SD8-DAT1
SD9-DAT2
SD1-DAT3
SD2-CMD
SD-CD
SD-WP

9
4
3
21
19
16
1
2

MS8-SCLK
MS4-DATA0
MS3-DATA1
MS5-DATA2
MS7-DATA3
MS6-INS
MS2-BS
MS1-VSS
MS10-VSS

@
R1447
100K_0402_5%

+VCC_4IN1
SMALE_CLK
CARD_D0
CARD_D1
CARD_D2
CARD_D3
SMBSYZ_SDCMD
SDCDZ
SMWE_MSINS_SDWP

C1063 1

C1226
4.7U_0603_6.3V6K

JREAD2
1
2
3
4
5
6

SMALE_CLK
CARD_D0
CARD_D1
CARD_D2
SMWE_MSINS_SDWP
SDCDZ

@ C1064
1
2

SMALE_CLK
CARD_D0
CARD_D1
CARD_D2
CARD_D3
SMCDZ_MSINSZ
SMWE_MSINS_SDWP

7
8
9
10
11

10P_0402_25V8K

D3
CMD
VSS1
VDD
CLK
VSS2
D0
D1
D2
WP
CD

SMCDZ_MSINSZ
12
13
1

12MHZ_16PF_X5H012000FG1H-X

GND1
GND2
TAITW_PSDBTC09GLBS1N14N0
A
CONN@

C1067
0.1U_0402_25V4K

co-lay 2 in 1 CONN

6252@
XTLO

Only UB6252
need to use XTLI and XTLO

2009/01/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

CARD_D3
SMBSYZ_SDCMD

6
13

17
10
8
12
15
14
7
5
20

10U_0805_10V4Z
1 C1220 1

10P 50V J NPO 0402

T-SOL_144-1300302600_NR
CONN@

1
A

11
18

SD6-VSS
SD3-VSS

XD GND
XD GND

41
42

SD4-VDD
MS9-VCC

22

+VCC_4IN1

Title

Card reader
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
1

22

of

39

ADD LED PCB CONN 06/12


Change JP18 to NEW P/N

LED PCB CONN

+3VS

06/23

09/03 Change +5VALW , +5VS to +3VALW +3VS


JP18

(24) PWR_LED#
(24) PWR_SUSP_LED#
(24) BATT_GRN_LED#
(24) BATT_AMB_LED#

MEDIA_LED#

+3VS
(17,18) WWAN_LED#
(17,18) WLAN_LED#

C411 BT@
0.1U_0402_16V4Z

R501
(18,24)

BT_ON#

BT MODULE CONN

10K_0402_5%
GND
GND

17
18

BT@
+3VS

BT@
+3VS_BT
Q35
AO3413_SOT23-3
3

BT@

C502
2
1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

+3VALW

ACES_85201-1605N
0.1U_0402_16V4Z
2

+3VS_BT

CONN@

+3VS

SATA_LED#

SATA_LED#

Y
A

USB20_P6
USB20_N6

USB20_P6
USB20_N6

1
2
3 GND
4 GND

5
6

MEDIA_LED#
ACES 88266-04001
CONN@

(11)

(22) CARD_LED#

(12)
(12)

U29
2 B

JBT1
1
2
3
4

NC7SZ08P5X_NL_SC70-5

Add U29 5/14

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/08/18

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

LED CONN / BT CONN


Size
B
Date:

Document Number

Rev
0.2

LA-6221P
Thursday, July 01, 2010

Sheet

23

of

39

+3VALW
+EC_AVCC

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

+3VS
EC_SMB_CK2
1
2
R1307
2.2K_0402_5%
EC_SMB_DA2
1
2
R1308
2.2K_0402_5%
1
2 LIGHT_SENSOR_INT#
R1492
4.7K_0402_5%
LIGHT_SENSOR@
+5VS
1 TP_CLK
4.7K_0402_5%
1 TP_DATA
4.7K_0402_5%

2
R1301
2
R1303

R1392 1

2 1K_0402_5%

BATT_TEMP

C530 1

ACIN

C531 1

(30)
(30)
(5,26)
(5,26)

2
100P_0402_50V8J
2
100P_0402_50V8J

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

PM_SLP_S3#
PM_SLP_S5#
EC_SMI#

(13) PM_SLP_S3#
(13) PM_SLP_S5#
(13) EC_SMI#

KSO1
WLAN_OFF#

WXMIT_OFF#

KSI1

KSI5

Swap to WLAN

(9)

High

WXMIT_OFF#

GPIO15

INVT_PWM

FAN_SPEED1

(4) FAN_SPEED1

EC_TX_P80_DATA
EC_RX_P80_CLK

(17,18) EC_TX_P80_DATA
(17,18) EC_RX_P80_CLK
(27)
ON/OFF#
(23) PWR_SUSP_LED#
NUM_LED#

High

INVT_PWM

Low

PWR_SUSP_LED#
NUM_LED#

XCLKI
XCLKO

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

KSO1

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

(13)

EC_CLK

0_0402_5%

3G_BTN#

67
AVCC

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F

SPI Flash ROM

GPIO

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

1
2

BRD_ID

(31)

R1292
0_0402_5%

BRD_ID
1
0_0402_5%

68
70
71
72

2
R1389

EN_FAN1
IREF

83
84
85
86
87
88

+0.89V_PG (34)

EN_FAN1 (4)
IREF
(31)
CALIBRATE# (31)
EC_MUTE# (19,20)
USB_ON# (15)

USB_ON#

TP_CLK (25)
TP_DATA (25)

LID_SW#
1
R1293

LID_SW# (25)

119
120
126
128

2
47K_0402_5%
FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#

73
74
89
90
91
92
93
95
121
127

R1458 LIGHT_SENSOR@
WWAN_WAKEUP# (17)
1
2
LIGHT_SENSOR_INT# (26) Reserve
0_0402_5%
FSTCHG (31)
BATT_GRN_LED#
BATT_GRN_LED# (23)
CAPS_LED#
CAPS_LED#
BATT_AMB_LED#
BATT_AMB_LED# (23)
PWR_LED#
PWR_LED#
(23)
SYSON
SYSON
(28,33)
VR_ON
(35)
ACIN
(13,31)

100
101
102
103
104
105
106
107
108

PLTRST#

PWR_PWM_LED# (27)

TP_CLK
TP_DATA

97
98
99
109

Rb

BATT_TEMP (30)
BATT_OVP
ADP_I
(31)

C1159
220P_0402_50V7K

For ESD

+3VALW

FRD#SPI_SO (25)
FWR#SPI_SI (25)
SPI_CLK (25)
FSEL#SPICS# (25)

to light sensor

Add 0 ohm R1309 06/08


0_0402_5% R1309
1
2
EC_RSMRST# (13)
EC_LID_OUT#
EC_LID_OUT# (13)
EC_ON
RB751V-40TE17_SOD323-2
EC_ON
(27)
D29 @
ICH_POK_EC
1
2 EC_PWROK
BKOFF# (9)
WL_OFF# (18)
WXMIT_OFF# (17)
BT_ON# (18,23)

2
0_0402_5%

R1295

EC_PWROK (5,13)

1
2
+3VS
R1296 10K_0402_5%
@

Change BT_ON# from Pin98 to Pin108 06/24

GPI

XCLK1
XCLK0

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
V18R

KB926QFD3_LQFP128_14X14

ACOFF

BATT_TEMP
BATT_OVP

63
64
65
66
75
76

SPI Device Interface

reserve PCH CLK to EC 052810

change small size 052810

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

SM Bus

2
R1491

PS2 Interface

ACOFF

70@

BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

DA Output

WL_BTN#

110
112
114
115
116
117
118

PM_SLP_S4# (13)
GMCH_ENBKL (5)
EAPD
(19)
EC_THERM# (13)
SUSP#
(28,33,34)
PBTN_OUT# (13)
LAN_WAKE# (16)

EC_THERM#
SUSP#
PBTN_OUT#
1 R320

124

20mil 1

C524
2

@
2

C1178

+3VALW

@
D30
EC_PWROK

VGATE

100K_0402_5%

(5,8,13,35)

RB751V-40TE17_SOD323-2

EC DEBUG PORT

OSC

OSC

NC
3

NC

C525
C527
22P 50V J NPO 0402

KSI5

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

AD

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

PWR_PWM_LED1# (27)
BEEP#
(19)

BEEP#

0.1U_0402_16V4Z

PWM Output

21
23
26
27

C523

INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

470P_0402_50V7K

EC_RST#
EC_SCI#

12
13
37
20
38

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC

4.7U_0603_6.3V6K

1
R1290

(8) CLK_PCI_LPC
(4,5,13,16,17,18,26) PLTRST#
2
47K_0402_5%
(13)
EC_SCI#
2

1
2
3
4
5
7
8
10

Ra
R1291
100K_0402_5%

AGND

+3VALW

EC_SMB_CK1
2
2.2K_0402_5%
EC_SMB_DA1
2
2.2K_0402_5%
KSO1
2
47K_0402_5%
KSO2
2
47K_0402_5%

1
R1297
1
R1298
1
R1299
1
R1300

+3VALW

U6

69

(11)
GATEA20
(11)
KB_RST#
(11,26)
SERIRQ
(13,26) LPC_FRAME#
LPC_AD3
(13,26) LPC_AD3
LPC_AD2
(13,26) LPC_AD2
LPC_AD1
@
(13,26) LPC_AD1
LPC_AD0
22P_0402_50V8J
(13,26) LPC_AD0
C522 2
R1289
10_0402_5%
@
1
2
1

+3VALW

KSI1

R1292

60@

KSI[0..7]

BATT_OVP

ECAGND

KSI[0..7]

GND
GND
GND
GND
GND

(25)

11
24
35
94
113

KSO[0..15]

05/14
KSO[0..15]

(25)

Change R1292 to 0 ohm for BRD ID R01 (EVT) 06/24

9
22
33
96
111
125

C518
@
1000P_0402_50V7K

C519
1000P_0402_50V7K

Change to R_0402

C521
1000P_0402_50V7K

C520
0.1U_0402_16V4Z
1 ECAGND
2
1
R1288
0_0402_5%

+EC_AVCC

C517
0.1U_0402_16V4Z

C516
0.1U_0402_16V4Z

C515
0.1U_0402_16V4Z

+3VALW

C514
0.1U_0402_16V4Z

1
2
MBK1608121YZF_0603

VCC
VCC
VCC
VCC
VCC
VCC

L16

22P 50V J NPO 0402

X1
32.768KHZ_12.5PF_Q13MC14610002

JP25
+3VALW

EC_TX_P80_DATA
EC_RX_P80_CLK

1
2
3
4

1
2
3
4

ACES_85205-0400
CONN@

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/08/04

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

KB926
Size Document Number
Custom
Date:

Rev
1.0

LA-6221P

Thursday, July 01, 2010

Sheet

24

of

39

To TP/B Conn.

INT_KBD Conn.

(24)

KSO[0..15] (24)

JKB1

KSI0

C136 1

100P_0402_50V8J

KSO4

C104 1

100P_0402_50V8J

KSI1

C135 1

100P_0402_50V8J

KSO5

C103 1

100P_0402_50V8J

KSI2

C134 1

100P_0402_50V8J

KSO6

C102 1

100P_0402_50V8J

KSI3

C133 1

100P_0402_50V8J

KSO7

C101 1

100P_0402_50V8J

KSI4

C132 1

100P_0402_50V8J

KSO8

C100 1

100P_0402_50V8J

KSI5

C131 1

100P_0402_50V8J

KSO9

C99

100P_0402_50V8J

KSI6

C127 1

100P_0402_50V8J

KSO10

C98

100P_0402_50V8J

KSI7

C126 1

100P_0402_50V8J

KSO11

C97

100P_0402_50V8J

KSO0

C125 1

100P_0402_50V8J

KSO12

C96

100P_0402_50V8J

KSO1

C124 1

100P_0402_50V8J

KSO13

C95

100P_0402_50V8J

KSO2

C114 1

100P_0402_50V8J

KSO14

C93

100P_0402_50V8J

KSO3

C113 1

100P_0402_50V8J

KSO15

C92

100P_0402_50V8J

KSI0
KSI1
KSI2
KSO0
KSO1
KSO2
KSI3
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSI4
KSO9
KSI5
KSI6
KSO10
KSO11
KSI7
KSO12
KSO13
KSO14
KSO15

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

G2
G1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JP11
TP_CLK
TP_DATA

TP_CLK
TP_DATA

1
2
3
4
5
6

GND
GND

8
7

ACES_85201-0605N
D22
@

CONN@

PJDLC05C_SOT23-3

NU D22 0623
Chage JP11 Pin define & Add D22

ACES_85202-24051
CONN@

1
2
3
4
5
6

+5VS
(24)
(24)

KSI[0..7]

KSO[0..15]

KSI[0..7]

05/14

Update TP/B Conn 05/04

+3VALW
U75
SPI_CS#

1
3
7
4

+3VALW

LID Switch
B

CS#
WP#
HOLD#
GND

VCC
SCLK
SI
SO

8
6
5
2

SPI_CLK_R
SPI_SI
SPI_SO
B

MX25L512AMC-12G_SO8
@

Del R103 05/12


+3VALW

+3VALW

VDD

2M SPI ROM

OUTPUT

0.1U_0402_16V4Z

LID_SW # (24)

1
C150
U5

APX9132ATI-TRL SOT-23 3P

10P_0402_50V8J

GND

C155
0.1U_0402_16V4Z

C526

(24) FSEL#SPICS#
(24)

SPI_CLK

(24) FW R#SPI_SI

20mils

FSEL#SPICS# 2
R1302
SPI_CLK
2
R1304
FW R#SPI_SI 2
R1305

Chage 2M ROM 20100603

U76

SPI_CS#
22_0402_5%
SPI_CLK_R
1
22_0402_5%
SPI_SI
1
22_0402_5%

VCC

HOLD

VSS

SPI_SO
2
R1306

FRD#SPI_SO
22_0402_5%

FRD#SPI_SO

(24)

SST25LF080A_SO8-200mil
C528

SPI_CLK_R
10P_0402_50V8J

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/08/18

Issued Date

Deciphered Date

2007/8/18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

KB/TP/LID SW/ SPI


Size
B
Date:

Document Number

Rev
0.2

LA-6221P
Friday, July 02, 2010

Sheet
1

25

of

39

TPM1.2 on board

+3VS
1
2
2
TPM@

2
TPM@

Place closed to EC

+3VS

R1463
TPM@1
2
4.7K_0402_5%

TPM@1
TPM@
TPM@1
TPM@1
TPM@1
TPM@1

(13,24) LPC_AD0
(13,24) LPC_AD1
(13,24) LPC_AD2
(13,24) LPC_AD3
(13,24) LPC_FRAME#
(4,5,13,16,17,18,24) PLTRST#

8/31 HP

2
2
2
2
2

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

LPC_PD#

(11,24) SERIRQ
(8) CLK_PCI_TPM
@ 1
10P_0402_50V8J

2
C1233

2
R1435

CLK_PCI_TPM
@ 1
10_0402_5%

+3VS

R1464
R1460
R1461
R1462
R1465

15
7

R1437
4.7K_0402_5%

TPM_XTALO

14

TPM_XTALI

13

LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
LPCPD#
SERIRQ
LCLK

GPIO
GPIO2

SLB 9635 TT 1.2


CLKRUN#

ALS (Ambient Light Sensor)

2
TPM@

TEST1
TESTB1/BADD

TPM_GPIO
TPM_GPIO2

6
2

Base I/O Address


0 = 02Eh
1 =* 04Eh
R1468
1
2
4.7K_0402_5%
@

1
2
3
4
5
6
7

+3VS
(5,24) EC_SMB_CK2
(5,24) EC_SMB_DA2
(24) LIGHT_SENSOR_INT#

R1466
4.7K_0402_5%

R1467
1
2
0_0402_5%
TPM@

8
9

JP26

+3VS

T86
T87

1
2
3
4
5
GND1
GND2

TPM@

ACES_88266-05001
CONN@

PP
NC
NC
NC

XTALO

3
12
1

XTALI/32K IN
GND
GND
GND
GND

U81
26
23
20
17
22
16
28
27
21

TPM_XTALO

2
15P 50V J NPO 0402
TPM@

VSB

2
TPM@

32.768KHZ_12.5PF_Q13MC14610002
1
C1232

24
19
10

TPM@

C1231
0.1U_0402_16V4Z

10M_0402_5%

VDD
VDD
VDD

R1459

C1230
0.1U_0402_16V4Z

OSC

C1229
0.1U_0402_16V4Z

OSC

NC

C1228
0.1U_0402_16V4Z

TPM@

NC

TPM_XTALI

Y10

+3VALW

TPM@
2
15P 50V J NPO 0402

@
J16
JUMP_43X39

1
C1227

R1438
0_0402_5%
2

25
18
11
4

TPM@

SLB 9635 TT 1.2_TSSOP28


TPM@

6/30 HP

+3VS

U82

1
+3VS
(7,8,17,18) CLK_SMBDATA
(7,8,17,18) CLK_SMBCLK

R1469 1
2 3.4K_0402_1%
G SENSOR@
I2C_DATA_GS
R1470 1
2
G SENSOR@ 0_0402_5%
I2C_CLK_GS
R1471 1
2
G SENSOR@ 0_0402_5%

Add R1440, R1441 1/13

8
6
4
2
3
10
15

VDD
INT_1
VDD_IO
INT_2

11

G_SENSOR_INT#

CS
SDA/SDI/SDO
SDO/SA0
SCL/SPC
NC_1
NC_2
RSVD_1
RSVD_2

GND_1
GND_2
GND_3
GND_4

G_SENSOR_INT# (11)

14

R1473
10K_0402_5%
G SENSOR@
1

G SENSOR@

0.1U_0402_16V4Z

10U_0603_6.3V6M

C1235
G SENSOR@

C1234

@
J17
JUMP_43X39

ST LIS33DE(G-Sensor)

5
12
13
16

LIS331DLTR_LGA16_3X3
G SENSOR@

P/N SA00003VT00
Compal Secret Data

Security Classification
2008/09/15

Issued Date

2009/12/31

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


TPM/G-Sensor/Light sensor

Size

Document Number

Rev
0.1

LA-6221P
Date:

Thursday, July 01, 2010

Sheet
1

26

of

39

Add For NAV50 07/06


09/03 Change +5VS to +3VS

ON/OFF Button
+3VS
PWR_PWM_LED#

(BLUE)

SW1

Power Button Logic

ON/OFFBTN#

TOP Side

ON/OFFBTN#

D42

NAV70@

100_0402_1%
R1388

+3VALW

@
R186 2
1
0_0805_5%

EVQPLMA15 SPST PANASONIC H1.5


@
R194 2
1
0_0805_5%

R1347
100K_0402_5%

FOR EMI

D14

Bottom Side

ON/OFF#

ON/OFFBTN#

NAV70@

PJSOT24C_3P_C/A_SOT-23

LED1
HT-191NB5-DT BLUE 0603

51ON#

PWR_PWM_LED#

C1169 1

2 @ 100P_0402_50V8J

ON/OFFBTN#

C1170 1

2 @ 100P_0402_50V8J

(29)

D1 @

PWR_PWM_LED# (24)
1000P_0402_50V7K
1

RLZ20A_LL34

+3VS

100_0402_1%
R1483

(24)

EC_ON

EC_ON

PAV70@

R3

Change to SC591NB5A20 061110

Q1
2N7002W-T/R7_SOT323-3
<BOM Structure>

LED3
HT-191NB5-DT BLUE 0603

LED2
HT-191NB5-DT BLUE 0603

2
2

PAV70@

2
G

10K_0402_5%

100_0402_1%
R1480
PAV01@

(BLUE)

(BLUE)

+3VS

10mil

PAV01@

PWR_PWM_LED#
1
2
R1484 PAV70@ 0_0402_5%

PWR_PWM_LED# (24)

PWR_PWM_LED1#
1
2
R1485 PAV01@ 0_0402_5%

PWR_PWM_LED1# (24)

10mil

PWR_PWM_LED1#

PWR_PWM_LED1# (24)

10mil

H8
H

H_3P2X3P7N

(24)

51ON#

DAN202U_SC70
C4

PWR_PWM_LED#

ON/OFF#

10mil

H_3P2x3P5N

H22
H_3P2x3P5N

H3
H

H_2P8

H2
H_2P8

H_3P2N

H5
H_3P2N

H4
H_2P8

H_3P2

H23
H_2P8

H19
H

H18
H

H17
H

H7
H
@

H1
H

H_2P6

H9
H

H16
H

H11
H

H_3P3N

FM4

H20
H

H_3P4X3P2N

H24
H_3P4X3P2N

FIDUCIAL_C40M80

Compal Electronics, Inc.

Compal Secret Data


2006/08/04

Issued Date
1

FM1

Security Classification

FM3

FM2

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

ON/OFF /SCREW
Size Document Number
Custom
Date:

Rev
1.0

LA-6221P

Thursday, July 01, 2010

Sheet
1

27

of

39

Change R51 R57 R70 R63 R317 R114 R190 to 0402 SIZE 04/30
Change C221 C218 C223 C 191 C201 C170 C392 C393 C394 to 0603 SIZE 04/30

+5VALW TO +5VS

+3VALW TO +3VS

C223

C219

470_0402_5%

2
1U_0603_10V4Z

C191

R190

10U_0603_6.3V6M
2

C201

10U_0603_6.3V6M 10U_0603_6.3V6M
2
2

1
2
3

C170

C176

10U_0603_6.3V6M
2

1U_0603_10V4Z
2

470_0402_5%
R114

3
Q17B
2N7002DW-T/R7_SOT363-6
C208

SUSP

+VSB

Q12B
2N7002DW-T/R7_SOT363-6

R139
2
33K +-5% 0402

SUSP

C179

Q17A
2

Q12A
SUSP

0.1U 25V K X5R 0402


2
2N7002DW-T/R7_SOT363-6

2
1

SUSP

0.1U 25V K X5R 0402


2
2N7002DW-T/R7_SOT363-6

5
4

5VS_GATE

Q15

3 1

2
10U_0603_6.3V6M

1
R187
22K +-5% 0402

SI4800BDY-T1-E3_SO8
8
7
6
5

1
2
3

+3VS

10U_0603_6.3V6M
2

+VSB

Q19

C218

+3VALW

SI4800BDY-T1-E3_SO8
8
7
6
5

C221

+5VS

+5VALW

+5VALW

R141
100K_0402_5%
2

+1.8V to +1.8VS
+1.8V

+1.8VS
SYSON#

ADD +5VS +VCCP +0.89V Cap for EMI


R317

Q14A
(24,33)
+VCCP

+0.89V

SUSP

Q28A

C396

0.1U 25V K X5R 0402

2
1

2N7002DW-T/R7_SOT363-6

C1173

C1174

C1175

C1172

@
2

0.01U_0402_25V7K

2
2N7002DW-T/R7_SOT363-6

+1.8V

0.01U_0402_25V7K

0.01U_0402_25V7K

5
4

R318
200K +-1% 0402

SYSON

SYSON

+1.8V

0.01U_0402_25V7K

Q28B
2N7002DW-T/R7_SOT363-6
1.8VS_GATE

SUSP

470_0402_5%

C1176

+0.9VS

0.01U_0402_25V7K

C395

C394

10U_0603_6.3V6M
2

+5VS

+VSB

Q27
1
2
3

1U_0603_10V4Z

C393

10U_0603_6.3V6M

1
10U_0603_6.3V6M

C392

SI4800BDY-T1-E3_SO8
8
7
6
5

RTCVREF

+5VALW

+VCCP

+0.9VS

+1.8V
SUSP

SUSP

(34)

+1.5VS

R173
100K_0402_5%

R172
100K_0402_5%
@

470_0402_5%

R70

R63

Q14B
5

(24,33,34) SUSP#

2N7002DW-T/R7_SOT363-6

Q8B

SUSP

SUSP

2N7002DW-T/R7_SOT363-6

Q6A
5

@
@

Q8A
5 SUSP
@
2N7002DW-T/R7_SOT363-6

2
1

Q6B
2N7002DW-T/R7_SOT363-6

470_0402_5%

R57
1

470_0402_5%

R51
1

470_0402_5%

SYSON#

2N7002DW-T/R7_SOT363-6

2006/08/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2007/8/18

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

DC INTERFACE
Size
B
Date:

Document Number

Rev
0.2

LA-6221P
Thursday, July 01, 2010

Sheet
E

28

of

39

VIN
PL1
HCB2012KF-121T50_0805
1
2

DC_IN_S1

1
PC4
100P_0402_50V8J

PC5
100P_0402_50V8J

PC3
1000P_0402_50V7K

4
3
2
1

GND 4
GND 3
2
1

PJP1
6
5

SP02000GC00
PC6
1000P_0402_50V7K

ACES 88266-04001
CONN@

PBJ1
2

+RTCBATT
+RTCBATT

ML1220T13RE
45@

PJ2

2
1
PC14
0.1U_0402_25V6

JUMP_43X118

+VCCP
3

PJ5
2

JUMP_43X79

PR16
560_0603_5%
1
2

PR17
560_0603_5%
1
2

+0.89V
1

+0.89VP

+CHGRTC

+VCCPP

1
2

TP0610K-T1-E3_SOT23-3

+5VALW

(27) 51ON#

PR14
22K_0402_1%
1
2

PC13
0.22U_0603_25V7K

PR13
100K_0402_1%

JUMP_43X118

VS

+1.8V

1
1

PC195
.1U_0402_16V7K

N1

PC197
.1U_0402_16V7K

PJ4
PJ3

+1.8VP

BATT+

JUMP_43X118

PR11
68_1206_5%
2

PQ1

PC196
.1U_0402_16V7K

PR10
68_1206_5%
PD3
RLS4148_LL34-2

+5VALWP

PD2
RLS4148_LL34-2

+3VALW

PC193
.1U_0402_16V7K

JUMP_43X118

PC194
.1U_0402_16V7K

+3VALWP

PJ1

VIN

+3VLP

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

DCIN & DETECTOR


Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
D

29

of

39

PH1 under CPU botten side :


CPU thermal protection at 92 degree C
Recovery at 72 degree C
1

VMB

PR28
10K_0402_1%

VL
@ PR23
100K_0402_1%

PU3
1

VCC TMSNS1

GND RHYST1

OT1 TMSNS2

PR31
15K_0402_1%

OT2 RHYST2

SUYIN_200275MR008G15QZR

PR29
22.1K_0402_1%

(32) MAINPWON

PR22
100_0402_1%
1

G718TM1U_SOT23-8
PR25
6.49K_0402_1%
2
1

PR220
1K_0402_5%

@ PR169
47K_0402_1%

+3VALW P

PR21
100_0402_1%

PC23
0.1U_0603_25V7K

PC22
0.01U_0402_25V7K

PC21
1000P_0402_50V7K

BATT+
2

TS
EC_SMCA
EC_SMDA

B/I

PL2
HCB2012KF-121T50_0805
1
2

BATT_S1

PH2 @

100K_0402_1%_NCP15W F104F03RC
2

PR27
1K_0402_1%

PH1

100K_0402_1%_NCP15W F104F03RC
2

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
GND
GND

PJP2

VL

BATT_TEMP (24)

EC_SMB_CK1 (24)
EC_SMB_DA1 (24)

@ PR236
0_0805_5%
1
2
PQ3
3

+VSB

PR30
100K_0402_1%

TP0610K-T1-E3_SOT23-3

PC200
0.1U_0402_25V6
3

VL
2

PR32
22K_0402_1%

PR34
100K_0402_1%

(32) SPOK

B+

PQ4
2N7002W -T/R7_SOT323-3

2
G

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

BATTERY CONN / OTP


Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
D

30

of

39

B+

VCOMP

CSIP

19

ICM

PHASE

18

VREF

UGATE

17

CHLIM

BOOT

16

10

ACLIM

VDDP

15

11

VADJ

LGATE

14

GND

PGND

13

PR81
20K_0402_1%

12

DL_CHG

2
1 1
3
PQ21
AON7408L_DFN8-5

PD14
RB751V-40TE17_SOD323-2

6251VDDP

26251VDD

PC54
2200P_0402_25V7K
2
1

PR223
14.3K_0402_1%

2
2

PC65
0.1U_0603_25V7K
BST_CHGA 2
1
4

PL5
8.2UH_FDV0630-8R2M=P3_3.7A_20%
CHG
1
2

3
2
1

.1U_0402_16V7K
PR79
38.3K_0402_1%
6251VREF 1
6251aclim
2

PQ19
AON7408L_DFN8-5

DH_CHG
PR78
0_0603_5%
BST_CHG 1

2 PACIN
G
@ PQ18
2N7002W -T/R7_SOT323-3

PR82
4.7_0603_5%
PC70
4.7U_0603_6.3V6K

BATT+

PR74 0.05_1206_1%
4

3
PC68
10U_1206_25V6M
2
1

20

CSIN

PC67
10U_1206_25V6M
2
1

ICOMP

PC58
0.1U_0603_25V7K
2
1

CSOP

21

PR84
0_0402_5%
1

PR76
4.7_1206_5%

CSOP

VIN

PD13 @
1SS355TE-17_SOD323-2
2
1
2

CELLS

Vin1

CSON

22

CSON

3
2
1

EN

PC209
1000P_0402_25V8J
2
1

23

@ PR64
200K_0402_1%
1
2

PC66
680P_0402_50V7K

6251VREF

PC64
1
2

PR80
100K_0402_1%

PR221
191K_0402_1%

ADP_I

ACSET ACPRN

VIN

@ PD10
1SS355TE-17_SOD323-2
ACOFF
1
2

PC57
ACPRN 0.22U_0603_25V7K
PR68
20_0402_5%
1
2
PC59
0.047U_0402_16V7K
1
2
PR69
20_0402_5%
2
1
PR70
PC62
20_0402_5%
0.1U_0603_25V7K
1
2
PR72
2_0402_5%
LX_CHG

IREF

2
2

PR73
100_0402_1%
1
2

ACOFF

6.81K_0402_1%
2

ACOFF

6800P_0402_25V7K
2

2
PC63
@ 100P_0402_50V8J

PR77
62K_0402_1%
2
1

(24)

PC69
0.01U_0402_25V7K
2
1

(24)

(24)

PR71

DCIN

24

0.01U_0402_25V7K

PQ22
DTC115EUA_SC70-3

PC61
1
2

PR75
22K_0402_5%
1
2

PACIN

PACIN

D
2N7002W -T/R7_SOT323-3

PQ20
2
G

DCIN

PC60
1

6251_EN

VDD

PR66
150K_0402_1%

PQ17
2N7002W -T/R7_SOT323-3

@ PC56
.1U_0402_16V7K

PU5

PR58
47K_0402_1%
1
2

PQ16
DTC115EUA_SC70-3

2
G

PR62
10K_0402_1%

ACSETIN

(24) FSTCHG

PC55
2.2U_0603_6.3V6K

PR65
10K_0402_5%
2
1
1

PQ15
DTC115EUA_SC70-3
3

@ PD12
1SS355TE-17_SOD323-2
1
2

PR67

Vin1

PD1
RB751V-40_SOD323-2
PR222
10_1206_5%
2
1 1

ACSETIN

PC53
4.7U_0805_25V6-K
2
1

CSIP

6251VDD

1
2
3

CSIN

VIN

PR60
200K_0402_1%

JUMP_43X118

100K_0402_1%

PR59
47K_0402_1%

PQ12
DTA144EUA_SC70-3

PC51
0.1U_0603_25V7K
2
1

SI7121DN-T1-GE3_POW ERPAK8-5
PQ11

PJ8
2

PC50
4.7U_0805_25V6-K
2
1

CHG_B+

PR57 0.05_1206_1%
4

PC165
0.1U_0603_25V7K
2
1

B340A_SMA2

B+

P3

SI7121DN-T1-GE3_POW ERPAK8-5
PQ10
1
2
3

PC52
5600P_0402_25V7K
1
2

P2
PD9

VIN

ISL6251AHAZ-T_QSOP24

CP = 85%*Iada ; CP = 1.343A

CP mode
Vaclim=2.39*(20K/(20K+38.3K))=0.8199V

(24) CALIBRATE#

PR83
15.4K_0402_1%
1
2
2
PR85
31.6K_0402_1%
6251VDD

CC=0.3~1.76A
IREF=1.62*Icharge
IREF=0.486V~2.85V
3.24V==>2A

BATT Type
4

PR224
10K_0402_1%
1
2

Iinput=(1/0.05)((0.05*Vaclm)/2.39+0.05)
where Vaclm=0.8199V, Iinput=1.343A

S PQ32

2
G

PR227
20K_0402_1%

SSM3K7002FU_SC70-3

CV mode

12600mV

12.60V

Charging Voltage
(0x15)

Normal 3S LI-ON Cells

(13,24)

ACPRN

ACIN

PR226
10K_0402_1%
PACIN

1 2

PR225
100K_0402_1%

Iada=0~1.58A(30W)

VADJ--->Ground--->3.99V

Issued Date

2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Vcell=(0.175*VADJ+3.99)

Compal Electronics, Inc.

Compal Secret Data

Security Classification

VADJ-->VREF-->4.41V

Title

CHARGER
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
D

31

of

39

10

DRVH2

DRVH1

21

UG_5V

LX_3V

11

LL2

LL1

20

LX_5V

LG_3V

12

DRVL2

DRVL1

19

LG_5V

B++

PC44
150U_B2_6.3VM_R45M

PR38
4.7_1206_5%

2
1
2

VL

PC43
680P_0402_50V7K

PR231
@ 0_0402_5%

PC205
4.7U_0805_10V6K

1
2

5
3

VCLK

PQ8
AON7702L_DFN8-5

1
+

+3.3VALWP Ipeak=5.731A Imax=4.012A


Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 143K)/9-24mV=134.9mV
Ilimit=134.9mV/17.9m ~134.9mV/14.5m x 1.2
=7.536A ~ 7.752A
Iocp=Ilimit+Delta I/2
=8.081A ~ 8.297A
Delta I=1.090A (Freq=305KHz)

+5VALWP
Ipeak=7.0A Imax=4.9A
Rds(on)=17.9m ohm(max) ; Rds(on)=14.5m ohm(typical)
Vtrip=(10E-06 * 158K)/9-24mV=151mV
Ilimit=151mV/17.9m ~151mV/14.5m x 1.2
=8.467A ~ 8.710A
Iocp=Ilimit+Delta I/2
=9.384A ~ 9.627A
Delta I=1.834A (Freq=245KHz)
A

1
PR235
40.2K_0402_1%
2

@ PC207
0.01U_0402_16V7K

PR234
100K_0402_1%

TPS51125RGER_QFN24_4X4

+5VALWP

2N7002W -T/R7_SOT323-3

(30) MAINPWON
VS

PL4
8.2UH_FDV0630-8R2M=P3_3.7A_20%
1
2

B+

PQ34

PR233
100K_0402_1%

18

VIN

GND

VREG5
17

16

15

13

SKIPSEL

VFB=2.0V

3
2
1

UG_3V

1
1

VL

2
G

1
2
G

2N7002W -T/R7_SOT323-3

PC164
0.1U_0603_25V7K
2
1

PR40
PC41
0_0603_5% 0.1U_0402_16V7K
BST_5V 1
2 1
2

2VREF_51125
D

PC34
2200P_0402_50V7K
2
1

22

ENTRIP2

PQ33 D

PC33
4.7U_0805_25V6-K
2
1

23

VBST1

2
PC206
0.1U_0603_25V7K

ENTRIP1

2
VFB1

VREF

4
TONSEL

PGOOD

VBST2

PQ6
AON7408L_DFN8-5

(30)

VREG3

PC204
1U_0603_10V6K
2
1

SPOK

EN0

3
PQ7
AON7702L_DFN8-5

24

PR230
499K_0402_1%
1
2
PR232
100K_0402_1%

VO1

BST_3V

PC42
680P_0402_50V7K
2
1

PC39
150U_B2_6.3VM_R45M

+3VALWP

PC40
0.1U_0402_16V7K

PR37
4.7_1206_5%
2
1

PL3
8.2UH_FDV0630-8R2M=P3_3.7A_20%
1
2

PR39
2 1
2
0_0603_5%

VO2

14

1
2
3

PR229
158K_0402_1%
2

ENTRIP1

P PAD

VFB2

PU4

25
2

PC203
4.7U_0805_10V6K

PC30 @
4.7U_0805_25V6-K
2
1

PC29
4.7U_0805_25V6-K
2
1

PC31
2200P_0402_50V7K
2
1

PQ5
AON7408L_DFN8-5

PR228
143K_0402_1%
1
2

B++
PC32
4.7U_0805_25V6-K @
2
1

PR44
19.1K_0402_1%
1
2

ENTRIP1

PR43
20K_0402_1%
1
2

ENTRIP2

PR42
30K_0402_1%
1
2

+3VLP

PC163
0.1U_0603_25V7K
2
1

B+

PR41
13K_0402_1%
1
2

ENTRIP2

B++
PL11
HCB2012KF-121T50_0805
1
2

PC202
0.22U_0603_10V7K

2VREF_51125

PQ35
DTC115EUA_SC70-3

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/11/12

Issued Date

Deciphered Date

2008/11/12

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

+5V/+3V
Size
Document Number
Custom
Date:

Thursday, July 01, 2010

Rev
0.1
Sheet
1

32

of

39

PL12
HCB2012KF-121T50_0805
1
2

SYSON

PC166
0.1U_0603_25V7K
2
1

PR91
0_0603_5%
BST_1.8V 1
2

PQ23
AON7408L_DFN8-5
3
2
1

PR90
1K_0402_1%
1
2

B+

DL_1.8V

PC82
4.7U_0805_10V6K

RT8209BGQW _W QFN14_3P5X3P5
2

<Vo=1.8V> VFB=0.75V
Vo=VFB*(1+PR96/PR97)=0.75*(1+5.9K/4.12K)=1.8V
Fsw=328KHz

1
+
2

PR96
5.9K_0402_1%
1
2
1

+1.8VP

PC78
220U_B2_2.5VM_R35

LGATE

+5VALW

PGND
8

PGOOD

GND

6
2

PC79
4.7U_0603_6.3V6K

10

2
PR95
8.66K_0402_1%

VDDP

LX_1.8V
1

PR93
4.7_1206_5%

NC

14

11

FB

12

CS

0.1U_0603_25V7K

PHASE

DH_1.8V

PC80
680P_0603_50V7K

VDD

13

PQ24
AON7702L_DFN8-5

VOUT

UGATE

PL6
2.2U_FDV0630-2R2M-P3_7.2A_20%
1
2

PC76
1
2

BOOT

TON

BST_1.8V-1

PR94
100_0603_1%
1
2

+5VALW

15

PU6

EN/DEM

PC77
1U_0402_6.3V6K

PR92
30K_0402_5%

(24,28)

PR89
300K_0402_5%
1
2

PC75 @
4.7U_0805_25V6-K
2
1

PC73
2200P_0402_50V7K
2
1

PC74
4.7U_0805_25V6-K
2
1

1.8V_B+

PR97
4.12K_0402_1%

1
PR106
13.3K_0402_1%

1
2

PC90
680P_0603_50V7K

1
2

SY8033BDBC_DFN10_3X3
PC86
1U_0402_6.3V6K

LX_1.05V

PR101
30K_0402_5%

FB_1.05V

PC210
22U_0805_6.3VAM

PR105
10K_0402_1%

PC119
68P_0402_50V8J
2
1

NC

FB

<Vo=1.05V> VFB=0.6V
Vo=VFB*(1+PR105/PR106)=0.6*(1+124K/61.9)=1.05V
Ipeak=3.124A, Imax=2.187A

+VCCPP

PC88
22U_0805_6.3VAM

11

TP

PR99
2K_0402_1%

EN

(24,28,34) SUSP#

EN_1.05V

PL7
1.1UH_LFA915AY-H-1R1M=P3_4.07A_20%
1
2

SVIN

LX

LX_1.05V

PR102
4.7_1206_5%

PVIN

LX

PC120
22U_0805_6.3VAM

PVIN

JUMP_43X79

10

NC

PG

+5VALW

PU7

PJ7
2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

1.8VP / +VCCPP
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
D

33

of

39

(24)

+3VALW

+0.89V_PG

@ PR215
100K_0402_1%

1
2
1

LX_SY8033B

PR125
@ 47K_0402_5%

SY8033BDBC_DFN10_3X3

PR115
61.9K_0402_1%

1
2

FB_SY8033B

PC208
22U_0805_6.3VAM

NC

PR114
30.1K_0402_1%

NC

TP

11

EN_SY8033B

PC96
0.1U_0402_10V7K

PR108 100K_0402_5%

Ipeak=2.64A, Imax=1.848A

1
2

(24,28,33) SUSP#

FB

<Vo=0.89V> VFB=0.6V
Vo=VFB*(1+PR114/PR115)=0.6*(1+30.1K/61.9)=0.89V

+0.89VP

EN

LX_SY8033B

PC98
22U_0805_6.3VAM

SVIN

LX

PC101
68P_0402_50V8J
2
1

PC99
22U_0805_6.3VAM

LX

PVIN

PVIN

10

PR107
4.7_1206_5%

JUMP_43X79

PC81
680P_0603_50V7K

+5VALW

PL8
1.1UH_LFA915AY-H-1R1M=P3_4.07A_20%
1
2

PU8

PJ6

PG

Ipeak=1.48A, Imax=1.036A

+1.8V

PC105
1U_0402_6.3V6K

PC198
.1U_0402_16V7K

1
2

1.54K_0402_1%

+1.8V

2
2

GND

FB

APL5930KAI-TRG_SO8

PC107
0.01U_0402_25V7K

+1.5VS
PR118

PC108
22U_0805_6.3V6M

3
4

EN
POK

VOUT
VOUT

8
7

VCNTL
VIN
VIN

@
PC109
.1U_0402_16V7K

6
5
9

PR119
@ 47K_0402_5%

PR117
10K_0402_5%
1
2
2

(24,28,33) SUSP#
B

PU10

PC106
4.7U_0805_6.3V6K

+5VALW

PR120
1.74K_0402_1%
6

NC

VREF

NC

VOUT

NC

TP

+3VALW
1

VCNTL

GND

PC111
1U_0603_6.3V6M

PR121
1K_0402_1%

PC110
4.7U_0805_6.3V6K

VIN

2
1

PU11
1

1
2

PC199
.1U_0402_16V7K

+0.9VS
PC114
10U_0805_6.3V6M

PR123
1K_0402_1%
S
2N7002W -T/R7_SOT323-3

PC112
.1U_0402_16V7K
2
1

PC113
.1U_0402_16V7K

PQ29
2
G

PR122
0_0402_5%
1
2
1

(28) SUSP

APL5336KAI-TRL SOP

Ipeak=1A, Imax=0.7A

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

+0.89VP/+1.5VS/+0.9VSP
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
1

34

of

39

(5)

(5)

(5)

CPU_VID2
(24)
CPU_VID3
(5)
CPU_VID4
(5)
CPU_VID5
(5)
CPU_VID6
(5)

CPU_VID1

VR_ON

CPU_VID0

+3VS

1
2

PC148
0.1U_0402_25V6

1
2

PC147
2200P_0402_50V7K

1
2

PC116
4.7U_0805_25V6-K

1
2

PC121
4.7U_0805_25V6-K

PL10
2.2U_FDV0630-2R2M-P3_7.2A_20%
1
2

AGND

3211_DRVL

+CPU_COREP

+CPU_CORE

PR124
4.7_1206_5%

LL=5.9m ohm
OCP=7.85A
VID:0.75V~1.1V
Io(max)=6.04A

PC186
2.2U_0603_10V6K

18
17

19

+5VS

33
2

AGND

20

PQ31
AON7702L_DFN8-5

PC115
680P_0603_50V7K

PH4
100K_0402_1%_NCP15WF104F03RC
1

Place RTH1 close to inductor


on the same layer

PR213
35.7K_0402_1%
2
1
1
1

PR217
75K_0402_1%
2

PC190
220P_0402_50V7K

PC189
1000P_0402_50V7K

PR218
309K_0402_1%

PC191
1000P_0402_50V7K

PQ30
AON7408L_DFN8-5

3211_SW

3
2
1

21

B+

CSCOMP

CSFB

CSREF

3211_DRVH

16

15

LLINE

VID6

25

26
VID5

27
VID4

VID3

28

29
VID2

1
VID6

1
VID5

PR204

1
VID4

PR203

1
VID3

14

22

PR206
PC183
0_0603_5%
0.22U_0603_25V7K
2CPU_BOOST-1
1
2

Connect to input caps

23 CPU_BOOST 1

3211_RAMP-1

(6)

(6)

VCCSENSE

PR202

1
VID2

RT

2
1

1
VSSSENSE

+CPU_B+

13

12

9
PR211
200K_0402_1%
1
2 3211_RPM

PR210
80.6K_0402_1%
3211_IREF
1
2

2
2

PR158
0_0402_5%

PR219
1K_0402_1%
2
1

24

3211_CSCOMP

PR150
0_0402_5%

3211_CSFB

Avoid high dV/dt

3211_CSCOMP

3211_CSCOMP 1

PR209
2.37K_0402_1%

3211_RAMP

PR207
28K_0402_1%

RAMP

ILIM
IREF

PC188
470P_0402_50V8J

VID1

PGND
GPU

3211_ILIM 8
PR208
1K_0402_1%

PR201

DRVL
COMP

PC182
1U_0805_25V6K

PVCC

FB

PR214
499K_0402_1%

3211_COMP 6

ADP3211AMNR2G_QFN32_5X5

11

23211_COMP-1
1

PC187
47P_0402_50V8J
1

FBRTN

3211_RT

PR199

VID1

SW

RPM

PR198

VID0

DRVH
CLKEN#

PC185
390P_0402_50V7K

30

IMON

10

3211_FB

31

32
EN

BST

4
1

VID0

PWRGD

(8) CLK_ENABLE#

PL9
HCB2012KF-121T50_0805
1

PR200
10_0603_1%

VCC

1
2

1
2

PC184
1000P_0402_50V7K

+CPU_B+

PU12

PR205
10K_0402_1%

+5VS

3211_VCC

+3VS

3211_EN

PR196

PR195
0_0402_5%
2
13211_PWRGD

VGATE

PR212
274K_0402_1%
1
2

(5,8,13,24)

PR197

2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%

PR194
4.7K_0402_1%

PC192
1000P_0402_50V7K

Shortest the
net trace

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2008/09/20

Title

+CPU_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
C
Date:

Document Number

Rev
0.1

LA-6221P
Thursday, July 01, 2010

Sheet

35
H

of

39

Version change list (P.I.R. List)


Item
D

Page 1 of 1 for PWR

Fixed Issue

Reason for change

Rev.

PG#

Modify List

Date

Phase

add PR84

For design change

0.1

30

add PR84 (SD028000080 , S RES 1/16W 0 +-5% 0402)

2010.4.10

EVT

Change power solution

For design change

0.1

32

Change PU7 from SA000031D00(S IC RT8209BGQW WQFN 14P


PWM) to SA00003RU00(S IC SY8033BDBC DFN 10P SINGLE BUCK)

2010.4.12

EVT

Change SY8033B Pin1 net

For design change

0.1

32,33

Change SY8033B Pin1 connect Pin2 & Pin3

2010.4.13

EVT

32,33

Change PC101 & PC119 to SE071680J80 (S CER CAP 68P 50V J


NPO 0402)

2010.4.13

EVT

Change PR105 from SD034100200(S RES 1/16W 10K +-1% 0402 )


to SD034100280 (S RES 1/16W 10K +-1% 0402 )

2010.5.13

DVT

2010.6.1

PVT

2010.6.1

PVT

Change PC101 & PC119

For design change

0.1

Change PR105

For design change

0.1

32

Change PC30 & PC32 to non-pop

For cost down plan

0.1

32

Change PL3,PL4,PL5,PL6,PL7,PL8,PL10

For TMP choke shortage issue

0.1

32

Change PL3,PL4,PL5 from SH00000JI00 to SH00000BS00

Change PL6,PL10 from SH00000FD10 to SH000000700


Change PL7,PL8 from SH00000J300 to SH000007N00

Change PD10.PD13.PC58.PR64.
PQ18 to non-pop

For cost down plan

0.1

2010.6.11

31

PVT

Change PR84 to pop

9
10
11
12
B

13

14
15
16
17
18
19
20
A

21
22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

PIR (PWR)
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
1

36

of

39

Version change list (P.I.R. List)

Page 1 of 1 for PWR

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2007/09/20

Deciphered Date

2008/09/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

PIR (PWR)
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
1

37

of

39

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2008/09/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

PIR (HW)
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
1

38

of

39

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2008/09/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Revised List
Size Document Number
Custom
Date:

Rev
0.1

LA-6221P

Thursday, July 01, 2010

Sheet
1

39

of

39