Inventec Laptop Motherboard Schematic Diagram

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NOTE: "NI" OR "( )" USED WITH COMPONENTS INDICATES "NOT INSTALLED".
TABLE OF CONTENTS
INTERNAL SPKR & JACK
BLOCK DIAGRAM
37 -
HEADPHONE AMP
3-
RESET BLOCK DIAGRAM
38 -
AUDIO REGULATOR /MIC
4-
SYSTEM CLOCK
39 -
FWH
5-
DUAL DRCG
40 -
I2C SELECT CONTROL
6-
ITP
41 -
P/S CONNECTOR
7-
FOSTERA-1
43 -
IDE CONNECTORS
8-
FOSTERA-2
44 -
IDE TERMINATIONS
9-
FOSTERB-1
45 -
PS_ON & RESET CKT
10 -
FOSTERB-2
46 -
BATTERY & RTC OSC.
11 -
VRM decoupling
47 -
FAN CONTROL
12 -
Comparator
48 -
SIO2 POWER CKT
13 -
GTL REFERENCE
49 -
SUPER I/O
14 -
CPU PLL VOLTAGE
50 -
PARALLEL PORT TERM.
15 -
COLUSA-1
51 -
SERIAL PORTS
16 -
COLUSA-2
52 -
KB/MS/FLOPPY CONN.
17 -
CHA RIMM 1
53 -
USB PORTS 1-2
54 -
USBPORT 2&3
55 -
Embedded SCSI Controller
56 -
SCSI CTLR DECOUPLING & LED CKT
57 -
SCSI ON-BOARD AUTO-TERMINATION
58 -
INTERNAL LVD/SE SCSI CONNECTOR
59 -
VOLTAGE REGULATORS
60 -
VDDQ REGULATOR
19 20 21 22 23 24 25 26 -
l. a
w
w
27 28 29 30 31 -
32-33 -
34 35 -
CHA RIMM 2
SLP_S3
CHA RSL TERMINATION

CHB RIMM1
CHB RIMM2
CHB TERMINATION
UNIV AGP PRO
AGP TERMINATIONS
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18 -
36 2-
PAGE
61 -
2.5V DECOUPLING
PCI TERMINATIONS
62 -
2.5V REGULATOR
PCI CONNECTOR SLOT 1
63 -
1.8V REGULATOR
64 -
DECOUPLING
65-66 -
PRIMARY VRM
LAN PHY
67-68 -
SECONDARY VRM
MAGNETICS/RJ45 CONNECTOR
69 -
REV SHEET
ICH2
70 -
VOLTAGE ATTRIBUTES
sound blaster
71 -
MISC
AC97 CODEC
72-75 -
NET_CROSS_REF_PAGE(S)
76-80 -
COMP_CROSS_REF_PAGE(S)
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Audio Ports
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PCI SLOT 3
SCALABLE BUS
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Hub Link
C
AGP BUS
AC97 Link
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RAMBUS
CMOS BUS
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RSL BUS
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PCI SLOT 1
C
PCI BUS
LPC I/F BUS
USB Ports
ATA-100
IDE
CD-ROM
DVD
-------------------------
PCI SLOT 2
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1
+3.3V
33
8.2K
Q808
DTC123TKA
1/16W
2.2K
10PF
300
NI
475
XTALOUT
+3.3V
XTALIN
C288
60
10PF
L33
0.01UF
R_SPREAD_
NI
P_THERMTRIP_
NI
used for level translation
S603AT
L32
R947
R1008
SYSTEM CLOCK
+3.3V
8,10
60
SPREAD_
300
C1028
0.1UF
NC_133_100_
4.7UF
C250
C287
NI
PWR_DWN_
SEL133
SPREAD_
XTALIN
XTALOUT
VDDPCI1
VDDPCI2
VDDPCI3
VSSPCI1
VSSPCI2
VSSPCI3
VDD3V66_1
VDD3V66_2
VSS3V66_1
VSS3V66_2
VDDCPU1
VDDCPU2
VSSCPU1
VSSCPU2
AVDD
AVSS
VDDUSB
VSSUSB
VDDMEM
VSSMEM
VDDREF
VSSREF
IREF
THERMTRIP_
S603AT
10
16
22
7
13
19
29
36
32
33
43
49
40
46
38
37
27
24
56
53
4
1
39
28
23
52
5
6
4.7UF
4.7UF
SXTL4DT
C1051
114410-002
175244-001
SSO56WAT
U32
CPUCLK1
CPUCLK1_
CPUCLK0
CPUCLK0_
REFCLK0_MULTISEL0
REFCLK1_MULTISEL1
49
3V66_0
3V66_1
3V66_2
3V66_3
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9
MEMREF
MEMREF_
CPUCLK3
CPUCLK3_
CPUCLK2
CPUCLK2_
USBCLK0_SELA
USBCLK1_SELB
3_3V_SYS_CLK
Place 4.7 uF caps close to L
Clock Power - Use Islands
0.1UF
C284
0.1UF
C248
C1029
45
44
42
41
2
3
1K
30
31
34
35
8
9
11
12
14
15
17
18
20
21
55
54
51
50
48
47
NI
1K
R946
1K
NI
R1007
AGPCLK
8
7
6
5
8
7
6
5
R957
33
33
R1005
33
R1004
1
2
3
4
1
2
3
4
C38
33
33
COG
10PF
25
26
R956
33
R958
33
33
C39
COG
10PF
R953
R952
R954
R955
NI
R950
R951
R948
R949
R945
R257
*
48MHZ
RN16
RN15
NI
1%
49.9
ICH_CLK14
SIO_CLK14M
GCLKIN
1K
CLK_MCH
R1009
CLK_MCH_
R285
33
ICH_GCLKIN
AGP_CLK
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
SB_PCICLK
SCSI_PCICLK
SIO_PCICLK
FWH_PCICLK
33
33
33
33
33
33
33
33
33
1%
CLK_CPU_SEC_
NI
COG
10PF
C164
NI
COG
10PF
C165
1%
32
49
CLK_ITP
CLK_ITP_
4,16
4,16
32
24
12
27
28
29
55
49
39
34
NI
C99
NI
COG
10PF
C809
NI
NI
COG
10PF
C810
1%
*
16
32
119917-115
NI
15PF
C275
1%
CLK_ITP
CLK_ITP_
1%
ICH_PCICLK
4,16
4,16
4,8
4,8
CLK_CPU_PRI
1% CLK_CPU_PRI_
4,10
4,10
4,6
4,6
COG
10PF
15PF
C206
COG
10PF
C100
119917-115
NI
ICH_CLK48
DRCG_CLKIN
CLK_MCH
CLK_MCH_
CLK_CPU_SEC
CLK_CPU_SEC_
CLK_CPU_PRI
CLK_CPU_PRI_
4,8
4,8
49.9
CLK_CPU_SEC
49.9
R1010
1K
1%
R254
1K
CPUDIV2
NC_MEMREF_
NC_PCICLK9
49.9
R253
3_3V_SYS_CLK
0.1UF
C253
R261
0.1UF
C252
+3.3V
C282
R256
R1006
0.1UF
C283
0.1UF
C286
R259
0.1UF
C251
0.1UF
C285
*
*
0.1UF
C249
0.1UF
*
*
*
*
*
*
*
*
R255
*
49.9
C247
R260
R302
49.9
0.01UF
R258
8.2K
R251
R262
49.9
14.318MHZ
49.9
Y3
R250
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C281
10UF
C1030
R252
32
4,6
4,6
4,10
4,10
NI
60
L31
R263
1K
TANTB
10UF
C979
8.2K
NI
R887
R237
8.2K
R929
+3.3V
8:
8:
6:
8.2K
100/400
100/133
R928
*
+3.3V
100/300
Disable
Test
Bypass
Normal
MODE
28
27
26
9
10
4
5
17
16
15
1K
R888
13
14
DRCG_PWRDN_P_U
8.2K
R236
R235
8.2K
NI
+1.8V
MODE
PAclk
PLLclk
Refclk
Hi-Z
S2
0
0
0
x
23
24
Use Normal and Test Modes
0
1
S1
S0
+3.3V
Hi-Z
RefclkB
PLLclkB
PAclkB
MODE
S603AT
C228
.1UF
U31
SSO28AT
W234
S603AT
C262
.1UF
CLK1
CLK1_
CLK0
CLK0_
VDDIR
VDDIPD
176902-001
3_3V_DRCG;3,7,11,21,22
GND;6,8,18,25
STOP_
PWRDN_
S0
S1
S2
SYNCLK1
PCLK1
SYNCLK0
PCLK0
M0
M1
M2
REFCLK
R233
8.2K
1
12
20
19
C980
STATE
PWRDNB
S603AT
C259
.1UF
.01UF
S603AT
C230
3_3V_DRCG
+1.8V
X7R
0.1UF
STOPB
R266
R265
1%
39.2
R270
39.2
1%
R271
1%
39.2
39.2
1%
C263
4PF
NI
C256
4PF
NI
Place these resistors less than 1 inch from DRCG
C226
CTMA_CLK_R
CTMNA_CLK_R
CTMB_CLK_R
CTMNB_CLK_R
Powerdown
Clk Off
Normal
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DUAL DRCG
300
1:
+3.3V
100/200
FSB/RDRM
10UF
S603AT
+3.3V
0:
1:
4:
RATIO
DRCG RATIO(MULT2=0)
C978
0.01UF
C231
SOT23FT
R268
106127-002
2N2222A
Q5
SOT23FT
R286
I
RCLKOUT_A
HCLKOUT_A
16
16
DRCG_S0_S1
RCLKOUT_B
HCLKOUT_B
MULT0
MULT1
MULTO&MULT1
+3.3V
DRCG_CLKIN
to ICH2 GPIO
5,49
NI
106127-002
2N2222A
Q4
16
16
5,33
33
0:
MULT 0:1
DRCG_S0_S1
MULT0
init, cut this current spike down.
5,33
5,49
the DRCG in test mode during
on the rambus channel. putting
mode. this caused a current spike
C261
that saw some commands in broadcast
100PF
C258
Some 64 mbit tech rimms had a bug
100PF
C229
100PF
C227
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100PF
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Intel recommends
51
1%
R272
R269
51
1%
51
1%
R264
R267
51
1%
51ohm and 39ohm.
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CTMA_DIFF
CTMB_DIFF
If C815 and C796 are
C260
0.1UF
A_RM2_LCTMN
A_RM2_LCTM
B_RM2_LCTMN
C257
latency coming out of

stop clock will increase
jitter will decrease, but
changed to 0.1 uF,
0.1UF
B_RM2_LCTM
Intel recommends
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18
18
22
22
TDO
R810
ITP
CPU_SEC_TDO
CPU_PRI_TDI
TDO
TDI
XU1
40.2
40.2
CPU_PRI_TDO
CPU_SEC_TDI
1%
R812
TDI
ITP
BPM4_
BPM5_
BPM0_
BPM1_
40.2
139708-216
TDO
TDI
XU2
4
4
CLK_ITP
CLK_ITP_
0.01UF
S603AT
S603AT
C845
0.01UF
C808
ITP_PWR
8,10,12,15 GTL_RESET_
1.5K
NI
R801
ITP
PKG_TYPE=C26HD2H
BPM0_
BPM1_
BPM2_
BPM3_
BPM4_
BPM5_
RESET_
PWR
BPM5DR_
BCLK0
BCLK1
GND;1,2,8,20,25
CPU_SEC_TDO
S603AT
0.01UF
C826
3
5
7
9
11
13
15
22
23
21
19
121546-019
NI
P100
FBI
FBO
TCK
TDI
TDO
TMS
TRST_
DBA_
DBR_
16
10
24
12
14
4
6
18
17
39.2
1%
10
5%
1%
NI
CPU_SEC_TDI
1%
150
10
VDD3_AUX
CPU_PRI_TDO
SW1
P3
1%
150
R159
P4
R62
100186-012
C3HA1A
P400
NI
74LCX125
R175
1
300
VDD3_AUX;14
1 - 2 : P1 and P2
2 -3 : P1 only
8,10
8,10
TMS
TRST_
R815
8,10
33,49
VDD3_AUX
TCK
DBRESET_
INCLUDE=NI
SSW4AT
114477-007
P2
PB_SWITCH
P1
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CHECK NAMING CONVENTION
75
CPU_PRI_TDI
NI
R802
+3.3V
R803
27.4
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8,10
8,10
8,10
8,10
s
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1%
40.2
1%
R809
make sure BPMx lines are from Xu1-xu2-ITP
40.2
Make sure GTL_RESET_ is from Colusa- XU2-XU1-ITP
220
R808
150
150
1%
R804
1%
R807
R806
*
R811
1%
1.5K
l. a
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150
w
R853
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R800
219333-001
U26
4V
9,15
Y11
Y14
Y17
Y20
GTL_DSTBP3_
GTL_DSTBP2_
GTL_DSTBP1_
GTL_DSTBP0_
GTL_DP3_
GTL_DP2_
GTL_DP1_
GTL_DP0_
Y12
Y15
Y18
Y21
AE17
AC15
AE19
AC18
GTL_DBI3_
GTL_DBI2_
GTL_DBI1_
GTL_DBI0_
GTL_DSTBN3_
GTL_DSTBN2_
GTL_DSTBN1_
GTL_DSTBN0_
D9
E10
AB9
AE12
AD22
AC27
GTL_AP1_
GTL_AP0_
F14
F17
4V
121520-012
NI
C871
9,15
0.01UF
GTL_D[63:48]_
S603AT
0.01UF
C36
S603AT
C63
S603AT
0.01UF
C8
S603AT
0.01UF
C27
S603AT
0.01UF
4
GTL_D[31:16]_
121808-349
S603AT
0.01UF
C48
VCCP;A30,B4,B31,C30,D1,D31,E30,F1,F31,G30,H1,H31,J30,K1,K31,L30,M1,M31
VCCP;N1,N31,P30,R1,R31,T30,U1,U31,V30,W1,W31,Y30,AA1,AA31,AB30,AC31,AD30
GND;A31,B30,C1,C31,D30,E1,E31,F30,G1,G31,H30,J1,J31,K30,L1,L31,M30
GND;N30,P1,P31,R30,T1,T31,U30,V1,V31,W30,Y1,Y31,AA30,AB1,AB31,AC30,AD31
GND;A11,A21,A27,A29,A5,AA15,AA17,AA23,AA9,AB11,AB21,AB27,AB5
GND;AC13,AC19,AC25,AC7,AD15,AD17,AD23,AD9,AE11,AE21,AE27,B15
GND;B17,B2,B23,B28,B9,C13,C19,C25,C29,C7,D11,D2,D21,D27,D28
GND;D5,E15,E17,E23,E29,E9,F13,F19,F2,F25,F28,F7,G25,G27,G29
GND;G3,G5,G7,G9,H2,H24,H26,H28,H4,H6,H8,J23,J25,J27,J29,J3,J5
GND;J7,J9,K2,K24,K26,K28,K4,K6,K8,L23,L25,L27,L29,L3,L5,L7,L9
GND;M2,M24,M26,M28,M4,M6,M8,N2,N24,N26,N28,N4,N6,N8,P23,P25
GND;P27,P29,P3,P5,P7,P9,R2,R24,R26,R28,R4,R6,R8,T23,T25,T27
GND;T29,T3,T5,T7,T9,U2,U24,U26,U28,U4,U6,U8,V23,V25,V27,V29
GND;V3,V5,V7,V9,W2,W24,W26,W28,W4,Y13,Y19,Y25,Y5,Y7,AA2,AC2,AD3
NC=AA3,AB3,AE15,AE16,Y27,Y28,Y3,A1,A16,A26,AC1,AD1,B1,C5,D25,W3
VCCP;A14,A18,A2,A24,A28,A8,AA12,AA20,AA26,AA4,AA6,AB14,AB18
VCCP;AB24,AB8,AC10,AC16,AC22,AC4,AD12,AD20,AD26,AD6,AE14
VCCP;AE18,AE24,AE8,B12,B20,B26,B29,B6,C10,C16,C2,C22,C28,C4
VCCP;D14,D18,D24,D29,D8,E12,E2,E20,E26,E28,E6,F10,F16,F22
VCCP;F29,F4,G2,G24,G26,G28,G4,G6,G8,H23,H25,H27,H29,H3,H5
VCCP;H7,H9,J2,J24,J26,J28,J4,J6,J8,K23,K25,K27,K29,K3,K5,K7
VCCP;K9,L2,L24,L26,L28,L4,L6,L8,M23,M25,M27,M29,M3,M5,M7,M9
VCCP;N23,N25,N27,N29,N3,N5,N7,N9,P2,P24,P26,P28,P4,P6,P8
VCCP;R23,R25,R27,R29,R3,R5,R7,R9,T2,T24,T26,T28,T4,T6,T8
VCCP;U23,U25,U27,U29,U3,U5,U7,U9,V2,V24,V26,V28,V4,V6,V8
VCCP;W25,W27,W29,Y10,Y16,Y22,AB2,AC3,AD2,AE3,Y2
DECOUPLING FOR GTL DATA SIGNALS
C37
GTL_D[47:32]_
9,15
FOSTER
Symbol 1 of 2
CLOSE TO CPU1 PACKAGE ON BOTTOM SIDE
SKTBGA603F
178342-001
DSTBP3_
DSTBP2_
DSTBP1_
DSTBP0_
DSTBN3_
DSTBN2_
DSTBN1_
DSTBN0_
DP3_
DP2_
DP1_
DP0_
DBI3_
DBI2_
DBI1_
DBI0_
AP1_
AP0_
ADSTB1_
ADSTB0_
A4 VCF_PLL1
A15 VCF_PLL2
AE4 VCF_PLL3
GTL_ADSTB1_
GTL_ADSTB0_
Place <0.5" around processor #1 socket
9,15
for VCCP decoupling
820UF
FOSTERA-1
NI
C872
9,15
GTL_DSTBP[3:0]_
9,15
GTL_DSTBN[3:0]_
9,15
GTL_DP[3:0]_
9,15
GTL_DBI[3:0]_
9,15
GTL_ADSTB[1:0]_
820UF
9,15
GTL_D63_
GTL_D62_
GTL_D61_
GTL_D60_
GTL_D59_
GTL_D58_
GTL_D57_
GTL_D56_
GTL_D55_
GTL_D54_
GTL_D53_
GTL_D52_
GTL_D51_
GTL_D50_
GTL_D49_
GTL_D48_
GTL_D47_
GTL_D46_
GTL_D45_
GTL_D44_
GTL_D43_
GTL_D42_
GTL_D41_
GTL_D40_
GTL_D39_
GTL_D38_
GTL_D37_
GTL_D36_
GTL_D35_
GTL_D34_
GTL_D33_
GTL_D32_
GTL_D31_
GTL_D30_
GTL_D29_
GTL_D28_
GTL_D27_
GTL_D26_
GTL_D25_
GTL_D24_
GTL_D23_
GTL_D22_
GTL_D21_
GTL_D20_
GTL_D19_
GTL_D18_
GTL_D17_
GTL_D16_
GTL_D15_
GTL_D14_
GTL_D13_
GTL_D12_
GTL_D11_
GTL_D10_
GTL_D9_
GTL_D8_
GTL_D7_
GTL_D6_
GTL_D5_
GTL_D4_
GTL_D3_
GTL_D2_
GTL_D1_
GTL_D0_
AB6
Y9
AA8
AC5
AC6
AE7
AD7
AC8
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AC9
AD8
AD10
AE9
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
Y23
AD27
AA25
Y24
AA27
Y26
C66
DECOUPLING FOR GTL ADDR/CTRL SIGNALS
9,15
S603AT
0.01UF
C69
S603AT
0.01UF
C72
S603AT
C73
S603AT
0.01UF
A35_
A34_
A33_
A32_
A31_
A30_
A29_
A28_
A27_
A26_
A25_
A24_
A23_
A22_
A21_
A20_
A19_
A18_
A17_
A16_
A15_
A14_
A13_
A12_
A11_
A10_
A9_
A8_
A7_
A6_
A5_
A4_
A3_
C8
C9
A7
A6
B7
C11
D12
E13
B8
A9
D13
E14
C12
B11
B10
A10
F15
D15
D16
C14
C15
A12
B13
B14
B16
A13
D17
C17
A19
C18
B18
A20
A22
XU2
0.01UF
S603AT
C33
UNDER CPU1 CAVITY
GTL_A35_
GTL_A34_
GTL_A33_
GTL_A32_
GTL_A31_
GTL_A30_
GTL_A29_
GTL_A28_
GTL_A27_
GTL_A26_
GTL_A25_
GTL_A24_
GTL_A23_
GTL_A22_
GTL_A21_
GTL_A20_
GTL_A19_
GTL_A18_
GTL_A17_
GTL_A16_
GTL_A15_
GTL_A14_
GTL_A13_
GTL_A12_
GTL_A11_
GTL_A10_
GTL_A9_
GTL_A8_
GTL_A7_
GTL_A6_
GTL_A5_
GTL_A4_
GTL_A3_
(MIDDLE AGENT)
SECONDARY PROCESSOR
GTL_D[15:0]_
0.01UF
D63_
D62_
D61_
D60_
D59_
D58_
D57_
D56_
D55_
D54_
D53_
D52_
D51_
D50_
D49_
D48_
D47_
D46_
D45_
D44_
D43_
D42_
D41_
D40_
D39_
D38_
D37_
D36_
D35_
D34_
D33_
D32_
D31_
D30_
D29_
D28_
D27_
D26_
D25_
D24_
D23_
D22_
D21_
D20_
D19_
D18_
D17_
D16_
D15_
D14_
D13_
D12_
D11_
D10_
D9_
D8_
D7_
D6_
D5_
D4_
D3_
D2_
D1_
D0_
l. a
w
w
t
p
s
p
o
m
e
h
c
it c
c
.
s
C28
C57
S603AT
0.01UF
GTL_A[16:3]_
GTL_A[35:17]_
m
o
S603AT
0.01UF
9,15
9,12,15
C68
S603AT
0.01UF
1UF
s805t
1UF
1UF
1UF
10,15
10,15
s805t
C47
1/16W
2.2K
s1210t
s1210t
22UF
s1210t
s1210t
22UF
C24
s1210t
22UF
C13
4.7K
8
7
6
5
s1210t
22UF
C82
1%
s1210t
22UF
C55
139708-279
1
2
3
4
RN800
8
7
6
5
10,15
10,15
10,15
10,15
10,15
1
2
3
4
10,15
GTL_RS2_
GTL_RS1_
GTL_RS0_
GTL_RSP_
GTL_DEFER_
GTL_ADS_
GTL_DRDY_
GTL_DBSY_
GTL_TRDY_
s1210t
22UF
C67
GTL_LOCK_
GTL_BINIT_
C26
G23
B24
F27
AB7
A3
AE6
F26
B25
H_IGNNE_
H_NMI
H_INTR
H_A20M_
PWRGD_ICH_CPU
SKT_OCC_SEC_
H_SLP_
P_THERMTRIP_
PROCHOT_
10,32
10,32
10,32
10,32
10,32
RN801
8,10
22UF
s1210t
s1210t
22UF
C81
s1210t
22UF
C70
CPUMID_GTLREF3
CPUMID_GTLREF2
CPUMID_GTLREF1
CPUMID_GTLREF0
D10
E11
F12
D20
A17
F11
F20
D23
Y8
GTL_BR0_
GTL_BR1_
12,16
10,32
4,10
C46
B22
C20
C21
B21
B19
P0_GTL_BR_2_3
GTL_RESET_
GTL_REQ4_
GTL_REQ3_
GTL_REQ2_
GTL_REQ1_
GTL_REQ0_
F21
D22
E21
C6
E22
A23
C23
D19
E18
F18
E19
10,15
10
6,10,12,15
GTL_BNR_
10,15
GTL_BPRI_
10,15
10,15
10
10,15
CPUMID_GTLREF[3:0]
13
4.7K
GTL_REQ[4:0]_
GTL_RS[2:0]_
S603T
C1266
s1210t
22UF
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
COMP1
COMP0
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
s1210t
22UF
C34
s1210t
22UF
C29
SKTBGA603F
178342-001
s1210t
22UF
C54
Symbol 2 of 2
F9
F23
W9
W23
B5
E16
AD16
AE5
AD5
AA7
Y6
W8
W7
W6
VCCP decoupling
C18
PWRGOOD
SKTOCC_
SLP_
THERMTRIP_
PROCHOT_
IGNNE_
LINT1_
LINT0_
A20M_
BR3_
BR2_
BR1_
BR0_
LOCK_
BINIT_
BNR_
BPRI_
RESET_
REQ4_
REQ3_
REQ2_
REQ1_
REQ0_
RS2_
RS1_
RS0_
RSP_
HIT_
HITM_
DEFER_
ADS_
DRDY_
DBSY_
TRDY_
BPM5_
BPM4_
BPM3_
BPM2_
BPM1_
BPM0_
TCK
TDI
TDO
TMS
TRST_
VCCA
VCCIOPLL
VSSA
VCCSENSE
VSSSENSE
BCLK1
BCLK0
SM_VCC1
SM_VCC2
SM_ALERT
SM_EP_A2
SM_EP_A1
SM_EP_A0
SM_TS_A1
SM_TS_A0
SM_CLK
SM_DAT
SM_WP
SMI_
INIT_
STPCLK_
FERR_
IERR_
MCERR_
E4
E8
F5
E7
F8
F6
E24
C24
E25
A25
F24
AB4
AD4
AA5
B27
D26
W5
Y4
AE28
AE29
AD28
AB28
AB29
AA29
Y29
AA28
AC28
AC29
AD29
C27
D6
D4
E27
E5
D7
NI
s1210t
22UF
C51
s1210t
22UF
C16
MP_DP_
VID4
VID3
VID2
VID1
VID0
AE2
B3
C3
D3
E3
F3
H_FERR_
H_IERR0_
GTL_MCERR_
H_SMI_
H_INIT_
H_STPCLK_
56
56
R139
BPM5_
BPM4_
6,10
6,10
8
8
119919-001
R1154
XU2_MP_DP_
BPM1_
BPM0_
6,10
6,10
s1210t
22UF
C9
C11
11,12
11,12
11,12
11,12
11,12
6,10
6
6
6,10
6,10
14
14
14
4
4
SM_A0_CPUMID
SM_A2_CPUMID
SM_A1_CPUMID
10,49
10,26,32
8
8
8
8
8
10,40,47
10,40,47
10,32
10,32
10,32
10,15
10,32
SM_TSA1_CPUMID
SM_TSA0_CPUMID
VIDB4
VIDB3
VIDB2
VIDB1
VIDB0
CPUMID_VCCSEN
CPUMID_VSSSEN
TCK
CPU_SEC_TDI
CPU_SEC_TDO
TMS
TRST_
CPUMID_VCCA
CPUM_VCCIOPLL
CPUMID_VSSA
CLK_CPU_SEC_
CLK_CPU_SEC
ICH_SMBALERT_
SM_A2_CPUMID
SM_A1_CPUMID
SM_A0_CPUMID
SM_TSA1_CPUMID
SM_TSA0_CPUMID
SMBCLK
SMBDAT
WP_CPU_EEPROM
R15
22UF
C7
1%
10,15
S603T
47PF
XU2
m
e
h
c
C71
S603T
C1265
47PF
FOSTER
it c
129621-026
s1210t
22UF
NI
1K
1K
NI
1K
1K
C2HA1A
empty
100186-014
E405
+3.3V
R99
s1210t
8,10
R1161
C1267
R1160
139708-216
SECONDARY PROCESSOR
R96
22UF
C84
R78
VCCP decoupling
47PF
s805t
1UF
C80
R98
R97
+3.3V
33
1UF
s805t
1UF
C83
s805t
C56
GTL_HIT_
GTL_HITM_
s805t
1UF
C35
3 PROCHOT_
22UF
DTC123TKA
Q3
ICH_PROCHOT_
s805t
C50
40.2
R104
FOSTERA-2
s805t
C17
100
1K
NI
+3.3V
R102
C10
1K
C14
R34
for signal integrity
R65
R63
40.2
300
R144
R1159
41.2
R35
40.2
40.2
56
R874
43.2
8.2K
HDR1X2
43.2
s
p
o
R67
41.2
l. a
w
w
t
p
R19
100
1K
NI
NI
1K
100
w
R100
R101
R103
R105
c
.
s
m
o
7,15
4V
NI
+820UF
C946
for VCCP decoupling
Place <0.5" around processor #1 socket
FOSTERB-1
NI 4V
C949
820UF +
7,15
DSTBP3_
DSTBP2_
DSTBP1_
DSTBP0_
DSTBN3_
DSTBN2_
DSTBN1_
DSTBN0_
DP3_
DP2_
DP1_
DP0_
DBI3_
DBI2_
DBI1_
DBI0_
AP1_
AP0_
ADSTB1_
ADSTB0_
7,15
SKTBGA603F
178342-001
Y11
Y14
Y17
Y20
7,15
GTL_DSTBP[3:0]_
AE17
AC15
AE19
AC18
GTL_DP3_
GTL_DP2_
GTL_DP1_
GTL_DP0_
GTL_DSTBP3_
GTL_DSTBP2_
GTL_DSTBP1_
GTL_DSTBP0_
AB9
AE12
AD22
AC27
GTL_DBI3_
GTL_DBI2_
GTL_DBI1_
GTL_DBI0_
Y12
Y15
Y18
Y21
D9
E10
GTL_AP1_
GTL_AP0_
GTL_DSTBN3_
GTL_DSTBN2_
GTL_DSTBN1_
GTL_DSTBN0_
7,15
7,15
F14
F17
GTL_ADSTB1_
GTL_ADSTB0_
A4 VCF_PLL1
A15 VCF_PLL2
AE4 VCF_PLL3
GTL_DSTBN[3:0]_
7,15
GTL_DP[3:0]_
7,15
GTL_DBI[3:0]_
GTL_ADSTB[1:0]_
GTL_D[63:48]_
GTL_D[47:32]_
7,15
GTL_D[31:16]_
7,15
GTL_D63_
GTL_D62_
GTL_D61_
GTL_D60_
GTL_D59_
GTL_D58_
GTL_D57_
GTL_D56_
GTL_D55_
GTL_D54_
GTL_D53_
GTL_D52_
GTL_D51_
GTL_D50_
GTL_D49_
GTL_D48_
GTL_D47_
GTL_D46_
GTL_D45_
GTL_D44_
GTL_D43_
GTL_D42_
GTL_D41_
GTL_D40_
GTL_D39_
GTL_D38_
GTL_D37_
GTL_D36_
GTL_D35_
GTL_D34_
GTL_D33_
GTL_D32_
GTL_D31_
GTL_D30_
GTL_D29_
GTL_D28_
GTL_D27_
GTL_D26_
GTL_D25_
GTL_D24_
GTL_D23_
GTL_D22_
GTL_D21_
GTL_D20_
GTL_D19_
GTL_D18_
GTL_D17_
GTL_D16_
GTL_D15_
GTL_D14_
GTL_D13_
GTL_D12_
GTL_D11_
GTL_D10_
GTL_D9_
GTL_D8_
GTL_D7_
GTL_D6_
GTL_D5_
GTL_D4_
GTL_D3_
GTL_D2_
GTL_D1_
GTL_D0_
AB6
Y9
AA8
AC5
AC6
AE7
AD7
AC8
AB10
AA10
AA11
AB13
AB12
AC14
AA14
AA13
AC9
AD8
AD10
AE9
AC11
AE10
AC12
AD11
AD14
AD13
AB15
AD18
AE13
AC17
AA16
AB16
AB17
AD19
AD21
AE20
AE22
AC21
AC20
AA18
AC23
AE23
AD24
AC24
AE25
AD25
AC26
AE26
AA19
AB19
AB22
AB20
AA21
AA22
AB23
AB25
AB26
AA24
Y23
AD27
AA25
Y24
AA27
Y26
FOSTER
Symbol 1 of 2
S603AT
0.01UF
S603AT
C120
0.01UF
S603AT
C118
0.01UF
C119
S603AT
0.01UF
C91
0.01UF
S603AT
S603AT
C110
0.01UF
C177
VCCP;A30,B4,B31,C30,D1,D31,E30,F1,F31,G30,H1,H31,J30,K1,K31,L30,M1,M31
VCCP;N1,N31,P30,R1,R31,T30,U1,U31,V30,W1,W31,Y30,AA1,AA31,AB30,AC31,AD30
GND;A31,B30,C1,C31,D30,E1,E31,F30,G1,G31,H30,J1,J31,K30,L1,L31,M30
GND;N30,P1,P31,R30,T1,T31,U30,V1,V31,W30,Y1,Y31,AA30,AB1,AB31,AC30,AD31
GND;A11,A21,A27,A29,A5,AA15,AA17,AA23,AA9,AB11,AB21,AB27,AB5
GND;AC13,AC19,AC25,AC7,AD15,AD17,AD23,AD9,AE11,AE21,AE27,B15
GND;B17,B2,B23,B28,B9,C13,C19,C25,C29,C7,D11,D2,D21,D27,D28
GND;D5,E15,E17,E23,E29,E9,F13,F19,F2,F25,F28,F7,G25,G27,G29
GND;G3,G5,G7,G9,H2,H24,H26,H28,H4,H6,H8,J23,J25,J27,J29,J3,J5
GND;J7,J9,K2,K24,K26,K28,K4,K6,K8,L23,L25,L27,L29,L3,L5,L7,L9
GND;M2,M24,M26,M28,M4,M6,M8,N2,N24,N26,N28,N4,N6,N8,P23,P25
GND;P27,P29,P3,P5,P7,P9,R2,R24,R26,R28,R4,R6,R8,T23,T25,T27
GND;T29,T3,T5,T7,T9,U2,U24,U26,U28,U4,U6,U8,V23,V25,V27,V29
GND;V3,V5,V7,V9,W2,W24,W26,W28,W4,Y13,Y19,Y25,Y5,Y7,AA2,AC2,AD3
NC=AA3,AB3,AE15,AE16,Y27,Y28,Y3,A1,A16,A26,AC1,AD1,B1,C5,D25,W3
VCCP;A14,A18,A2,A24,A28,A8,AA12,AA20,AA26,AA4,AA6,AB14,AB18
VCCP;AB24,AB8,AC10,AC16,AC22,AC4,AD12,AD20,AD26,AD6,AE14
VCCP;AE18,AE24,AE8,B12,B20,B26,B29,B6,C10,C16,C2,C22,C28,C4
VCCP;D14,D18,D24,D29,D8,E12,E2,E20,E26,E28,E6,F10,F16,F22
VCCP;F29,F4,G2,G24,G26,G28,G4,G6,G8,H23,H25,H27,H29,H3,H5
VCCP;H7,H9,J2,J24,J26,J28,J4,J6,J8,K23,K25,K27,K29,K3,K5,K7
VCCP;K9,L2,L24,L26,L28,L4,L6,L8,M23,M25,M27,M29,M3,M5,M7,M9
VCCP;N23,N25,N27,N29,N3,N5,N7,N9,P2,P24,P26,P28,P4,P6,P8
VCCP;R23,R25,R27,R29,R3,R5,R7,R9,T2,T24,T26,T28,T4,T6,T8
VCCP;U23,U25,U27,U29,U3,U5,U7,U9,V2,V24,V26,V28,V4,V6,V8
VCCP;W25,W27,W29,Y10,Y16,Y22,AB2,AC3,AD2,AE3,Y2
DECOUPLING FOR GTL ADDR/CTRL SIGNALS
C143
D63_
D62_
D61_
D60_
D59_
D58_
D57_
D56_
D55_
D54_
D53_
D52_
D51_
D50_
D49_
D48_
D47_
D46_
D45_
D44_
D43_
D42_
D41_
D40_
D39_
D38_
D37_
D36_
D35_
D34_
D33_
D32_
D31_
D30_
D29_
D28_
D27_
D26_
D25_
D24_
D23_
D22_
D21_
D20_
D19_
D18_
D17_
D16_
D15_
D14_
D13_
D12_
D11_
D10_
D9_
D8_
D7_
D6_
D5_
D4_
D3_
D2_
D1_
D0_
S603AT
0.01UF
C134
S603AT
0.01UF
C142
S603AT
0.01UF
C8
C9
A7
A6
B7
C11
D12
E13
B8
A9
D13
E14
C12
B11
B10
A10
F15
D15
D16
C14
C15
A12
B13
B14
B16
A13
D17
C17
A19
C18
B18
A20
A22
S603AT
0.01UF
C184
A35_
A34_
A33_
A32_
A31_
A30_
A29_
A28_
A27_
A26_
A25_
A24_
A23_
A22_
A21_
A20_
A19_
A18_
A17_
A16_
A15_
A14_
A13_
A12_
A11_
A10_
A9_
A8_
A7_
A6_
A5_
A4_
A3_
XU1
0.01UF
S603AT
S603AT
C115
0.01UF
C111
GTL_A[35:17]_
GTL_A[16:3]_
UNDER CPU1 CAVITY
GTL_A35_
GTL_A34_
GTL_A33_
GTL_A32_
GTL_A31_
GTL_A30_
GTL_A29_
GTL_A28_
GTL_A27_
GTL_A26_
GTL_A25_
GTL_A24_
GTL_A23_
GTL_A22_
GTL_A21_
GTL_A20_
GTL_A19_
GTL_A18_
GTL_A17_
GTL_A16_
GTL_A15_
GTL_A14_
GTL_A13_
GTL_A12_
GTL_A11_
GTL_A10_
GTL_A9_
GTL_A8_
GTL_A7_
GTL_A6_
GTL_A5_
GTL_A4_
GTL_A3_
(END AGENT)
PRIMARY PROCESSOR
GTL_D[15:0]_
7,15
7,15
l. a
w
w
t
p
s
p
o
m
e
h
c
it c
c
.
s
m
o
0.01UF
S603AT
S603AT
C179
7,12,15
0.01UF
C182
s805t
s805t
s805t
FOSTERB-2
s805t
s805t
s805t
s805t
1UF
s805t
1UF
C139
s1210t
22UF
C96
s1210t
22UF
C95
s1210t
22UF
C101
s1210t
22UF
C93
VCCP decoupling
s1210t
22UF
C183
CPUEND_GTLREF3
CPUEND_GTLREF2
CPUEND_GTLREF1
CPUEND_GTLREF0
RN803
REQ4_
REQ3_
REQ2_
REQ1_
REQ0_
SM_VCC1
SM_VCC2
SM_ALERT
SM_EP_A2
SM_EP_A1
SM_EP_A0
SM_TS_A1
SM_TS_A0
SM_CLK
SM_DAT
SM_WP
s1210t
22UF
C180
GTLREF3
GTLREF2
GTLREF1
GTLREF0
ODTEN
COMP1
COMP0
BPM5_
BPM4_
BPM3_
BPM2_
BPM1_
BPM0_
TCK
TDI
TDO
TMS
TRST_
VCCA
VCCIOPLL
VSSA
VCCSENSE
VSSSENSE
BCLK1
BCLK0
E4
E8
F5
E7
F8
F6
E24
C24
E25
A25
F24
AB4
AD4
AA5
B27
D26
W5
Y4
56
R94
56
NI
NI
s1210t
22UF
C200
s1210t
22UF
C178
H_FERR_
H_IERR1_
GTL_MCERR_
H_SMI_
H_INIT_
H_STPCLK_
ICH_SMBALERT_
SM_A2_CPUEND
SM_A1_CPUEND
SM_A0_CPUEND
SM_TSA1_CPUEND
SM_TSA0_CPUEND
SMBCLK
SMBDAT
WP_CPU_EEPROM
R158
6,8,10
6,8,10
6,8,10
6,8,10
BPM5_
BPM4_
MP_DP_
VID4
VID3
VID2
VID1
VID0
AE2
B3
C3
D3
E3
F3
BPM1_
BPM0_
119919-001
S603AT
R1155
s1210t
22UF
C116
s1210t
22UF
C112
s1210t
22UF
C140
s1210t
22UF
C136
C175
10
10
10
10
10
s1210t
22UF
s1210t
22UF
C921
s1210t
22UF
C936
s1210t
22UF
22UF
s1210t
22UF
C121
s1210t
22UF
C145
SM_A0_CPUEND
SM_A2_CPUEND
SM_A1_CPUEND
s1210t
a
C92
+3.3V
TO ICH2 GPIO
SM_TSA1_CPUEND
SM_TSA0_CPUEND
C103
11,12
11,12
11,12
11,12
11,12
CPUEND_VSSSEN
CPUEND_VIDA4
CPUEND_VIDA3
CPUEND_VIDA2
CPUEND_VIDA1
CPUEND_VIDA0
XU1_MP_DP_
6,8
6
6
6,8
6,8
14
14
14
4
4
8,49
8,26,32
10
10
10
10
10
8,40,47
8,40,47
8,32
8,32
8,32
8,15
8,32
CPUEND_VCCSEN
TCK
CPU_PRI_TDI
CPU_PRI_TDO
TMS
TRST_
CPUEND_VCCA
CPUE_VCCIOPLL
CPUEND_VSSA
CLK_CPU_PRI_
CLK_CPU_PRI
NI
56
R124
VCCP decoupling
SIGNAL=VCCP;N1,N31,P30,R1,R31,T30,U1,U31,V30,W1,W31,Y30,AA1,AA31,AB30,AC31,AD30
SKTBGA603F
178342-001
Symbol 2 of 2
F9
F23
W9
W23
B5
E16
AD16
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
PWRGOOD
SKTOCC_
SLP_
THERMTRIP_
PROCHOT_
IGNNE_
LINT1_
LINT0_
A20M_
BR3_
BR2_
BR1_
BR0_
LOCK_
BINIT_
BNR_
BPRI_
RESET_
AE28
AE29
AD28
AB28
AB29
AA29
Y29
AA28
AC28
AC29
AD29
NI
s1210t
22UF
C185
NI
1K
NI
1K
1K
C2HA1A
E406
BPM0_
BPM1_
BPM4_
BPM5_
100186-014
1K
6,8,10
6,8,10
6,8,10
6,8,10
R214
1UF
C135
1
2
3
4
AE5
AD5
AA7
Y6
W8
W7
W6
PWRGD_ICH_CPU
SKT_OCC_PRI_
H_SLP_
P_THERMTRIP_
PROCHOT_
4.7K
1
2
3
4
AB7
A3
AE6
F26
B25
H_IGNNE_
H_NMI
H_INTR
H_A20M_
8,32
8,32
8,32
8,32
8
7
6
5
C26
G23
B24
F27
GTL_BR1_
GTL_BR0_
8,32
12,49
8,32
4,8
8
D10
E11
F12
D20
P1_GTL_BR_2_3
RN802
A17
F11
F20
D23
Y8
GTL_LOCK_
GTL_BINIT_
GTL_BNR_
GTL_BPRI_
GTL_RESET_
CPUEND_GTLREF[3:0]
13
8
7
6
5
B22
C20
C21
B21
B19
RS2_
RS1_
RS0_
RSP_
C27
D6
D4
E27
E5
D7
56
R12
m
e
h
c
1UF
C117
1%
4.7K
GTL_REQ4_
GTL_REQ3_
GTL_REQ2_
GTL_REQ1_
GTL_REQ0_
GTL_RSP_
8
8,15
6,8,12,15
8,15
8
8,15
8,15
8,15
F21
D22
E21
C6
HIT_
HITM_
DEFER_
SMI_
INIT_
STPCLK_
FERR_
IERR_
MCERR_
R196
1UF
C141
1%
8,15
GTL_REQ[4:0]_
GTL_RS[2:0]_
GTL_RS2_
GTL_RS1_
GTL_RS0_
E22
A23
C23
ADS_
DRDY_
DBSY_
TRDY_
R217
1UF
139708-279
8,15
GTL_HIT_
GTL_HITM_
GTL_DEFER_
8,15
8,15
8,15
D19
E18
F18
E19
XU1
R199
C94
NI
NI
GTL_ADS_
GTL_DRDY_
GTL_DBSY_
GTL_TRDY_
8,15
8,15
8,15
8,15
FOSTER
R200
C98
56
R80
NI
56
R93
(TERMINATING P)
s
p
o
NI
1K
+3.3V
139708-216
R198
1UF
C174
56
R194
for signal integrity
56
R81
NI
56
R66
1%
1K
NI
R215
1UF
C938
56
R36
NI
41.2
R163
HDR1X2
41.2
R143
56
R13
100
t
p
R140
43.2
PRIMARY PROCESSOR
10K
R161
40.2
R160
R16
100
NI
R164
1K
R138
l. a
w
w
43.2
1K
NI
1%
40.2
R17
100
R18
1%
40.2
1%
R14
40.2
40.2
w
R197
R216
R218
it c
c
.
s
m
o
R854
8.2K
NI
NI
470UF
C854
C857
E9
DUMMYNET2
0
CPUEND_VIDA0
0 CPUEND_VIDA1
CPUEND_VIDA2
0
CPUEND_VIDA3
0
CPUEND_VIDA4
0
OFF
C1HA1B
X7R
10,12
10,12
10,12
10,12
10,12
These parts go near the VRM section
Y5V
1UF
C843
8,12
8,12
8,12
8,12
8,12
OFF
470UF
100186-002
R127
R122
R128
R123
R129
DUMMYNET1
20%
100186-002
C1HA1B
E4
For VRM Heat sink guiding
VIDB0
VIDB1
VIDB2
VIDB3
VIDB4
119919-138
470UF
VRM decoupling & pullups
NI
NI
+5V
C860
VIDA0
65-68
VIDA1
65-68
VIDA2
65-68
VIDA3
65-68
65-68 VIDA4
NI
R869
8.2K
R859
NI
+5V
8.2K
NI
R871
8.2K
NI
NI
R857
8.2K
NI
100K
R855
100K
R858
100K
Y5V
1UF
C840
117467-755
C902
0.1UF
C925
0.1UF
X7R
X7R
12_PROC
C844
0.1UF
C839
0.1UF
12_PROC
R856
R860
100K
100K
R870
CAP200U
R126
0
20%
R121
0
16V
20%
CAP200U
R120
16V
R119
0
CAP200U
R125
16V
X7R
C867
0.1UF
l. a
w
w
t
p
X7R
Processor PAL
s
p
o
s1210t
22UF
C106
s1210t
22UF
C87
22UF
C88
s1210t
22UF
C130
s1210t
m
e
h
c
s1210t
22UF
C132
s1210t
22UF
C107
s1210t
22UF
C78
s1210t
22UF
C60
s1210t
22UF
C79
VCCP decoupling near VRM plane
s1210t
22UF
C4
s1210t
22UF
C62
s1210t
22UF
C173
VCCP decoupling near VRM plane
a
it c
s1210t
22UF
C23
s1210t
22UF
C131
s1210t
22UF
C6
s1210t
22UF
C89
c
.
s
s1210t
22UF
C22
s1210t
22UF
C90
s1210t
22UF
C21
s1210t
22UF
C5
m
o
B
1
1K
119919-090
R1185
106127-002
SOT23FT
Q844
150
106146-070
106127-002
SOT23FT
Q845
1K
119919-090
R1183
VDD3_AUX
2.2K
119919-098
R1184
B
1
R1163
SIO_SLOT2_OCC_
49
2P_PRESENT_
7SZ04
Y_
19
SKT_OCC_SEC_
(P=Q)
347910-003
U7
COMP_OUTEN
NI
E40
C2HA1A
100186-014
8,16
3
4
6
11
13
14
D1
D2
D3
D4
D5
D6
347910-004
PCI_CLK4
GTL_RESETB_
6,8,10,15
place the header after gtl_reset to ITP
GTL_RESET_
119917-121
47PF
C1270
I
+3.3V
8.2K
VDD3_AUX
10K
119919-114
R1181
+5V
U29
7SZ32
P/D_NUM=347910-004
SLOT2_OCC_
2
74LS688A
7SZ32
U14
74174
Q1
Q2
Q3
Q4
Q5
Q6
2
5
7
10
12
15
U6
P/D_NUM=121708-001
NI
C1269
VRM_OUTEN
12,65-68
For proto purposes only
Comparator & JT disable
+5V
SKT_OCC_PRI_
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
P0
P1
P2
P3
P4
P5
P6
P7
192537-001
3
5
7
9
12
14
16
18
2
4
6
8
11
13
15
17
R816
3.6K
119919-103
R1182
10,49
VIDB0
VIDB1
VIDB2
VIDB3
VIDB4
CPUEND_VIDA0
CPUEND_VIDA1
CPUEND_VIDA2
CPUEND_VIDA3
CPUEND_VIDA4
U28
into the wrong slot, the VIDS are high and hence VCCP will be disabled.
m
e
h
c
s
p
o
8,11
8,11
8,11
8,11
8,11
10,11
10,11
10,11
10,11
10,11
need new part shape
In a 1P config, both VRMs get enabled but if the VRM is plugged,
t
p
G_
COST OF LOGIC GATE SOLUTION: 70c as COMPARED TP 96c FOR PAL
CLK
CLR_
U55
R136
8.2K
NI
NI
12,65-68
VRM_OUTEN
12,65-68
E3
GTL_A31_
100186-014
C2HA1A
JT_DIS_
NI
7,9,15
Place this jumper very close to gtl_a31 testpoint
VDD3_AUX;5
2
+5V
VRM_OUTEN
NI
7SZ125
347910-010
NI
+5V
8.2K
l. a
w
w
R26
R137
HDR1X2
0.1UF
w
8.2K
HDR1X2
it c
c
.
s
m
o
139708-025
139708-001
1%
139708-140
C196
0.01UF
C160
16
GTL REFERENCE
HXSWING
NI
139708-025
16
S603AT
1%
HXRCOMP
NI
1%
*
1%
16
1%
HYSWING
HYRCOMP
105077-149
139708-009
MCH_HAVREF
16
16
1%
1%
1%
1%
1%
16
1%
1%
1%
*
1%
1%
1%
1%
1%
1%
MAX trace length = 1.5"
Place 1uF and 0.01uF caps at volltage divider
0.01UF
S603AT
S603AT
C148
S603AT
0.01UF
C32
Place 220pF caps at processor pins
Place 1uF and 0.01uF caps at voltage divider
0.01UF
C53
S603AT
0.01UF
C30
220PF
105077-149
NI
16
S603AT
S603AT
MCH_HDVREF
MIN_LINE_WIDTH=50
MIN_LINE_WIDTH=50
S603AT
S603AT
0.01UF
C52
it c
S603AT
0.01UF
C150
Place 220pF caps at processor pins
S603AT
S603AT
S603AT
S603AT
CPUMID_GTLREF0
CPUMID_GTLREF1
CPUMID_GTLREF2
CPUMID_GTLREF3
S603AT
S603AT
S603AT
CPUEND_GTLREF0
CPUEND_GTLREF1
CPUEND_GTLREF2
CPUEND_GTLREF3
S603AT
220PF
139708-009
49.9
100
MCH_CCVREF
1UF
Y5V
S603AT
220PF
1%
place near MCH
C159
C894
R837
1%
1UF
Y5V
0.01UF
49.9
100
1%
C895
C896
49.9
100
0.01UF
R201
R202
R172
R171
R209
R210
49.9
100
R130
R131
49.9
100
C195
49.9
100
C147
49.9
100
C168
R162
R195
1%
Y5V
49.9
100
49.9
100
R836
R141
R142
Y5V
1UF
Y5V
C75
1%
R204
1UF
Y5V
C15
20
C897
1UF
Y5V
C65
0.01UF
X7R
1UF
Y5V
C114
20
C108
1UF
49.9
100
220PF
220PF
R21
R20
R79
R64
R33
R32
R82
R83
C102
1UF
Y5V
49.9
100
C133
1UF
Y5V
1UF
Y5V
C109
C26
C49
220PF
C12
220PF
R170
C144
s
p
o
m
e
h
c
1UF
C176
220PF
C25
C104
220PF
Y5V
C146
220PF
C74
l. a
w
w
t
p
220PF
c
.
s
m
o
0.01UF
8
8
8
8
10
10
10
10
L_VCCA1
5%
L_VCIOPLL1
4.7UH
A
L7
S1206T
142866-002
4.7UH
A
L8
S1206T
142866-002
4.7UH
A
L801
S1206T
142866-002
S1206T
L800
4.7UH
A
142866-002
CPUM_VCCIOPLL
CPUMID_VSSA
CPUMID_VCCA
CPUE_VCCIOPLL
CPUEND_VSSA
Single circuit for 2 CPUs?
CPUEND_VCCA
Place C close to VCCA, VSSA
CPU PLL VOLTAGE
119919-018
1/16W
5%
R825
119919-018
1/16W
R826
5%
L_VCIOPLL
5%
L_VCCA
Verify Rail Voltage
119919-018
1/16W
R23
119919-018
1/16W
R22
Verify Rail Voltage
C874
33UF
C873
33UF
33UF
C803
C802
33UF
w
6
l. a
w
w
5
10
10
10
S603AT
S603AT
C113
0.01UF
0.01UF
C138
t
p
S603AT
0.01UF
C137
C204
.01UF
Y5V
.01UF
.01UF
I
.01UF
I
.01UF
.01UF
I
Y5V
Y5V
C152
C221
Y5V
C964
Y5V
C193
Y5V
.01UF
Y5V
C188
Y5V
C187
.01UF
.01UF
I
Y5V
.01UF
C213
Y5V
.01UF
I
C947
Y5V
Y5V
C1070
.01UF
C189
Y5V
C898
.01UF .01UF
I
I
Y5V
C191
COLUSA MCH DECOUPLING
.01UF
C205
Y5V
C202
MCH DECOUPLING
s
p
o
m
e
h
c
a
it c
Y5V
.01UF
Y5V
C192
.01UF
C201
c
.
s
.01UF
Y5V
C190
m
o
TANTD
+1.8V
109764-087
150UF
C940
8,10
8,10
NI
S603AT
S603AT
COLUSA-1
0.01UF
0.01UF
C162
S603AT
C161
0.01UF
C163
DECOUPLING FOR GTL ADDR&CONTROL SIGNALS
GTL_RS0_
GTL_RS1_
GTL_RS2_
GTL_REQ0_
GTL_REQ1_
GTL_REQ2_
GTL_REQ3_
GTL_REQ4_
GTL_DSTBP0_
GTL_DSTBP1_
GTL_DSTBP2_
GTL_DSTBP3_
GTL_DSTBN0_
GTL_DSTBN1_
GTL_DSTBN2_
GTL_DSTBN3_
GTL_ADSTB0_
GTL_ADSTB1_
GTL_DBI0_
GTL_DBI1_
GTL_DBI2_
GTL_DBI3_
GTL_DP0_
GTL_DP1_
GTL_DP2_
GTL_DP3_
GTL_AP0_
GTL_AP1_
CLOSE TO MCH PACKAGE
7,9
7,9
GTL_ADS_
GTL_MCERR_
GTL_BNR_
GTL_BPRI_
GTL_BR0_
GTL_RESET_
GTL_DBSY_
GTL_DEFER_
GTL_DRDY_
GTL_HIT_
GTL_HITM_
GTL_LOCK_
GTL_TRDY_
GTL_RSP_
GTL_RS[2:0]_
8,10
GTL_REQ[4:0]_
7,9
GTL_DSTBP[3:0]_
7,9
GTL_DSTBN[3:0]_
7,9
GTL_ADSTB[1:0]_
7,9
GTL_DBI[3:0]_
7,9
GTL_DP[3:0]_
8,10
8,10
8,10
8,10
8,10
6,8,10,12
8,10
8,10
8,10
8,10
8,10
8,10
8,10
41.2
R203
RS0_
RS1_
RS2_
RSP_
HREQ0_
HREQ1_
HREQ2_
HREQ3_
HREQ4_
S603AT
7,9
S603AT
0.01UF
C157
HDSTBP0_
HDSTBP1_
HDSTBP2_
HDSTBP3_
HDSTBN0_
HDSTBN1_
HDSTBN2_
HDSTBN3_
HASTBN0_
HASTBN1_
DINV0_
DINV1_
DINV2_
DINV3_
DEP0_
DEP1_
DEP2_
DEP3_
AP0_
AP1_
ADS_
BERR_
BNR_
BPRI_
BREQ0_
CPURST_
DBSY_
DEFER_
DRDY_
HIT_
HITM_
HLOCK_
HTRDY_
0.01UF
C158
AM11
AL10
AM10
AK14
AG3
AF2
AF1
AF5
AE4
H1
N3
T1
AA2
G3
N4
T3
AA3
AJ2
AJ7
A3
K1
V2
AC1
P1
P4
P5
R2
AK11
AH11
AG11
AJ14
AM12
AK12
AM15
AL11
AJ12
AH12
AM13
AL13
AK13
AH13
AM14
7,9
GTL_A[16:3]_
7,9,12
GTL_A[35:17]_
GTL_A3_
GTL_A4_
GTL_A5_
GTL_A6_
GTL_A7_
GTL_A8_
GTL_A9_
GTL_A10_
GTL_A11_
GTL_A12_
GTL_A13_
GTL_A14_
GTL_A15_
GTL_A16_
GTL_A17_
GTL_A18_
GTL_A19_
GTL_A20_
GTL_A21_
GTL_A22_
GTL_A23_
GTL_A24_
GTL_A25_
GTL_A26_
GTL_A27_
GTL_A28_
GTL_A29_
GTL_A30_
GTL_A31_
GTL_A32_
GTL_A33_
GTL_A34_
GTL_A35_
AE6
AF4
AH1
AH3
AG2
AH4
AJ1
AL3
AJ4
AK3
AM4
AL4
AK2
AL2
AF7
AG9
AH9
AM5
AJ10
AK6
AJ8
AH7
AJ5
AM7
AM8
AH6
AH10
AK5
AK9
AL9
AK8
AL6
AL7
HA3_
HA4_
HA5_
HA6_
HA7_
HA8_
HA9_
HA10_
HA11_
HA12_
HA13_
HA14_
HA15_
HA16_
HA17_
HA18_
HA19_
HA20_
HA21_
HA22_
HA23_
HA24_
HA25_
HA26_
HA27_
HA28_
HA29_
HA30_
HA31_
HA32_
HA33_
HA34_
HA35_
A_DQA0
A_DQA1
A_DQA2
A_DQA3
A_DQA4
A_DQA5
A_DQA6
A_DQA7
A_DQA8
AC29
AC27
AC31
AB28
AD30
AD28
AE31
AE27
AE29
CHA_DQA0
CHA_DQA1
CHA_DQA2
CHA_DQA3
CHA_DQA4
CHA_DQA5
CHA_DQA6
CHA_DQA7
CHA_DQA8
P/D_NUM=175170-001
GND;A12,A13,A14,A16,A18,A19,A22,A23,A25,AA1,AA10,AA11
GND;AA16,AA17,AA22,AA23,AA24,AA25,AA26,AA28,AA30,AA4
GND;AA7,AA8,AA9,AB12,AB13,AB14,AB15,AB18,AB19,AB20,AB21
GND;AB26,AB27,AB29,AB31,AB32,AC12,AC13,AC14,AC15,AC18
GND;AC19,AC20,AC21,AC26,AC28,AC3,AC30,AC32,AC6,AC7,AD12
GND;AD13,AD14,AD15,AD18,AD19,AD20,AD21,AD26,AD27,AD29
GND;AD31,AD32,AE12,AE13,AE14,AE15,AE18,AE19,AE2,AE20,AE21
GND;AE26,AE28,AE30,AE32,AE5,AE7,AF10,AF14,AF15,AF16,AF23
GND;AF29,AF31,AG1,AG15,AG16,AG24,AG4,AG8,AH14,AH22,AH28
GND;AH31,AH8,AJ13,AJ20,AJ26,AJ3,AJ6,AK10,AK18,AK24,AK30
GND;AL12,AL22,AL28,AL5,AL8,AM20,AM26,B11,B13,B15,B17,B19
GND;B22,B24,B26,B4,B7,C1,C12,C14,C16,C18,C20,C21,C23,C25
GND;C28,C3,C30,D13,D15,D17,D19,D22,D24,D32,D6,D9,E11,E12
GND;E14,E15,E16,E18,E20,E21,E23,E25,E28,E3,F11,F13,F17
GND;F19,F22,F24,F30,G10,G12,G13,G14,G15,G16,G17,G18,G19
GND;G2,G20,G21,G22,G23,G24,G25,G26,G5,H12,H13,H14,H15
GND;H18,H19,H20,H21,H28,H31,H7,J1,J12,J13,J14,J15,J18
GND;J19,J20,J21,J26,J4,J7,K12,K13,K14,K15,K18,K19,K20
GND;K21,K29,L12,L13,L14,L15,L18,L19,L20,L21,L26,L28,L3
GND;L31,L6,L7,M10,M11,M16,M17,M22,M23,M24,M25,M26,M28
GND;M30,M32,M8,M9,N10,N11,N16,N17,N2,N22,N23,N24,N25,N26
GND;N27,N29,N31,N32,N5,N8,N9,P10,P11,P16,P17,P22,P23,P24
GND;P25,P26,P28,P30,P32,P8,P9,R1,R10,R11,R16,R17,R22,R23
GND;R24,R25,R26,R28,R29,R31,R4,R7,R8,R9,T12,T13,T14,T15
GND;T18,T19,T20,T21,T26,T28,T30,T32,U12,U13,U14,U15,U18
GND;U19,U20,U21,U26,U27,U29,U3,U31,U6,U7,V10,V11,V16,V17
GND;V22,V23,V24,V25,V26,V28,V30,V32,V8,V9,W10,W11,W16
GND;W17,W2,W22,W23,W24,W25,W26,W27,W29,W31,W32,W5,W7,W8
GND;W9,Y10,Y11,Y16,Y17,Y22,Y23,Y24,Y25,Y26,Y28,Y30,Y8,Y9
Symbol 1 of 2
COLUSA_MCH
A_DQB0
A_DQB1
A_DQB2
A_DQB3
A_DQB4
A_DQB5
A_DQB6
A_DQB7
A_DQB8
T27
P31
P29
M29
P27
M31
N30
M27
N28
CHA_DQB0
CHA_DQB1
CHA_DQB2
CHA_DQB3
CHA_DQB4
CHA_DQB5
CHA_DQB6
CHA_DQB7
CHA_DQB8
B_DQA0
B_DQA1
B_DQA2
B_DQA3
B_DQA4
B_DQA5
B_DQA6
B_DQA7
B_DQA8
D23
F23
B23
E22
A24
E24
C24
D25
B25
CHB_DQA0
CHB_DQA1
CHB_DQA2
CHB_DQA3
CHB_DQA4
CHB_DQA5
CHB_DQA6
CHB_DQA7
CHB_DQA8
S603AT
0.01UF
C156
GTL_D[15:0]_
GTL_D[31:16]_
7,9
7,9
GTL_D[47:32]_
3
A_DQA[8:0]
B_DQB0
B_DQB1
B_DQB2
B_DQB3
B_DQB4
B_DQB5
B_DQB6
B_DQB7
B_DQB8
CHB_DQB0
CHB_DQB1
CHB_DQB2
CHB_DQB3
CHB_DQB4
CHB_DQB5
CHB_DQB6
CHB_DQB7
CHB_DQB8
GTL_D[63:48]_
C155
C154
CLOSE TO MCH PACKAGE
HS_RET1
HS_RET2
HS_RET3
HS_RET4
C153
CHB_RQ0
CHB_RQ1
CHB_RQ2
CHB_RQ3
CHB_RQ4
CHB_RQ5
CHB_RQ6
CHB_RQ7
CHB_SCK
CHB_SIO
CHB_EXCC
CHB_EXRC
CHB_CMD
CHB_CTM
CHB_CTM_
CHB_CFM
CHB_CFM_
CHA_RQ0
CHA_RQ1
CHA_RQ2
CHA_RQ3
CHA_RQ4
CHA_RQ5
CHA_RQ6
CHA_RQ7
CHA_SCK
CHA_SIO
CHA_EXCC
CHA_EXRC
CHA_CMD
CHA_CTM
CHA_CTM_
CHA_CFM
CHA_CFM_
U22
B_DQB[8:0]
B_DQA[8:0]
A_DQB[8:0]
7,9
S603AT
0.01UF
S603AT
0.01UF
17
R889
R890
B_MCH_LCFM
B_MCH_LCFMN
B_MCH_LCTM
B_MCH_LCTMN
B_MCH_LCMD
B20
A20
A21
B21
A11
S603AT
0.01UF
1013
1014
1015
1016
A15
D16
B16
E17
A17
F18
B18
E19
A10
C11
S603AT
0.01UF
C31
19,21
21
1%
1%
28
28
21
+1.8V
0.01UF
S603AT
S603AT
C181
0.01UF
S603AT
S603AT
0.01UF
17
S603AT
C97
17
0.01UF
C194
21
B_MCH_ROW[2:0]
B_MCH_COL[4:0]
C166
R167
R166
19,21
21
21
21
21
A_MCH_ROW[2:0]
17,19
17
28
28
+1.8V
A_MCH_COL[4:0]
1%
1%
17,19
17
17
17
17
0.01UF
C64
B_MCH_COL0
B_MCH_COL1
B_MCH_COL2
B_MCH_COL3
B_MCH_COL4
B_MCH_ROW0
B_MCH_ROW1
B_MCH_ROW2
B_MCH_LSCLK
B_MCH_SIO
C17 B_MCH_EXCC
D18 B_MCH_EXRC
A_MCH_COL0
A_MCH_COL1
A_MCH_COL2
A_MCH_COL3
A_MCH_COL4
A_MCH_ROW0
A_MCH_ROW1
A_MCH_ROW2
A_MCH_LSCLK
A_MCH_SIO
A_MCH_EXCC
A_MCH_EXRC
A_MCH_LCMD
A_MCH_LCTM
A_MCH_LCTMN
A_MCH_LCFM
A_MCH_LCFMN
Check if these need to be removed

from the colusa symbol
21
21
R32
T29
T31
U28
U32
V27
V31
W28
K32
L30
U30
V29
L32
AA32
AA31
Y31
Y32
17
*
*
F16
B14
D14
D12
F14
B12
C13
F12
E13
HD0_
HD1_
HD2_
HD3_
HD4_
HD5_
HD6_
HD7_
HD8_
HD9_
HD10_
HD11_
HD12_
HD13_
HD14_
HD15_
HD16_
HD17_
HD18_
HD19_
HD20_
HD21_
HD22_
HD23_
HD24_
HD25_
HD26_
HD27_
HD28_
HD29_
HD30_
HD31_
HD32_
HD33_
HD34_
HD35_
HD36_
HD37_
HD38_
HD39_
HD40_
HD41_
HD42_
HD43_
HD44_
HD45_
HD46_
HD47_
HD48_
HD49_
HD50_
HD51_
HD52_
HD53_
HD54_
HD55_
HD56_
HD57_
HD58_
HD59_
HD60_
HD61_
HD62_
HD63_
D3
B2
E1
E4
C2
F2
E2
D4
D1
F3
G4
G1
H2
G6
H4
H5
K6
J5
K4
J3
K3
J2
L4
L5
N1
M3
L2
M5
M2
L1
N6
P2
T4
R3
R5
U2
R6
U5
U1
U4
V5
V3
W1
V6
W4
W3
Y5
Y4
Y2
AA6
AA5
AB6
Y1
AB3
AB1
AB4
AC5
AD2
AD3
AE3
AD5
AC4
AC2
AE1
GTL_D0_
GTL_D1_
GTL_D2_
GTL_D3_
GTL_D4_
GTL_D5_
GTL_D6_
GTL_D7_
GTL_D8_
GTL_D9_
GTL_D10_
GTL_D11_
GTL_D12_
GTL_D13_
GTL_D14_
GTL_D15_
GTL_D16_
GTL_D17_
GTL_D18_
GTL_D19_
GTL_D20_
GTL_D21_
GTL_D22_
GTL_D23_
GTL_D24_
GTL_D25_
GTL_D26_
GTL_D27_
GTL_D28_
GTL_D29_
GTL_D30_
GTL_D31_
GTL_D32_
GTL_D33_
GTL_D34_
GTL_D35_
GTL_D36_
GTL_D37_
GTL_D38_
GTL_D39_
GTL_D40_
GTL_D41_
GTL_D42_
GTL_D43_
GTL_D44_
GTL_D45_
GTL_D46_
GTL_D47_
GTL_D48_
GTL_D49_
GTL_D50_
GTL_D51_
GTL_D52_
GTL_D53_
GTL_D54_
GTL_D55_
GTL_D56_
GTL_D57_
GTL_D58_
GTL_D59_
GTL_D60_
GTL_D61_
GTL_D62_
GTL_D63_
*
*
l. a
w
w
t
p
s
p
o
m
e
h
c
a
it c
c
.
s
m
o
1%
HCLKOUT_B
RCLKOUT_B
HCLKOUT_A
RCLKOUT_A
CLK_MCH
CLK_MCH_
HLREFA_MCH
16
AGP_SBSTB
AGP_SBSTB_
AGP_ADSTB1
AGP_ADSTB1_
AGP_ADSTB0
AGP_ADSTB0_
AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBF_
AGP_WBF_
AGP_PIPE_
GCLKIN
OVERT_
ICH_RST_
TESTIN_
AGP_DEVSEL_
AGP_FRAME_
AGP_GNT_
AGP_IRDY_
AGP_PAR
AGP_REQ_
AGP_SERR_
AGP_STOP_
AGP_TRDY_
COLUSA-2
139708-009
150
1%
150
+1.8V
32,39,45,49
5
5
5
5
4
4
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24
AGP_SBA[7:0]
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
24,25
+1.8V
301
1%
150
1%
VDDQ
MIN_LINE_WIDTH=010
16
33
HL[00:11]
16,24,25,60
GCLKIN
OVERT_
RSTIN_
TESTIN_
CHB_HCLKOUT
CHB_RCLKOUT
CHA_HCLKOUT
CHA_RCLKOUT
BCLK0
BCLK1
SB_STB
SB_STB_
AD_STB1
AD_STB1_
AD_STB0
AD_STB0_
ST0_HLE18
ST1_HLE19
ST2
RFB_
WBF_
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
PIPE_
GDEVSEL_
GFRAME_RQMD
GGNT_RQME
GIRDY_
GPAR_PSTOPD
GREQ_RQIE
GSERR_
GSTOP_RQID
GTRDY_PARD
HLREF_NC
AG23
AJ16
AM16
AK16
B10
C10
K31
K30
AG6
AG7
AM19
AK19
AL21
AK22
AK29
AJ30
AL17
AK17
AJ17
AH17
AM18
AL18
AJ18
AH18
AG18
AJ19
AG19
AF19
AL20
AG17
AH26
AG26
AM17
AK26
AF27
AL16
AG27
AJ27
AH27
139708-025
272777-002
24
33,63
175170-001
Symbol 2 of 2
COLUSA_MCH
VDD1_8;A6,A9,AA12,AA13,AA14,AA15,AA18,AA19,AA20,AA21
VDD1_8;AB10,AB11,AB16,AB17,AB22,AB23,AB24,AB25,AB8
VDD1_8;AB9,AC10,AC11,AC16,AC17,AC22,AC23,AC24,AC25,AC8
VDD1_8;AC9,AD10,AD11,AD16,AD17,AD22,AD23,AD24,AD25,AD8
VDD1_8;AD9,AE10,AE11,AE16,AE17,AE22,AE23,AE24,AE25,AE8,AG5
VDD1_8;AE9,AF22,B29,B31,C5,C8,D11,D26,D27,E10
VDD1_8;E31,E7,G11,G29,G32,G7,G9,H10,H11
VDD1_8;H16,H17,H22,H23,H24,H25,H26,H8,H9,J10,J11,J16
VDD1_8;J17,J22,J23,J24,J25,J27,J30,J8,J9,K10,K11,K16,K17
VDD1_8;K22,K23,K24,K25,K8,K9,L10,L11,L16,L17,L22
VDD1_8;L23,L24,L25,L27,L29,L8,L9,M12,M13,M14,M15,M18,M19
VDD1_8;M20,M21,N12,N13,N14,N15,N18,N19,N20,N21,P12,P13
VDD1_8;P14,P15,P18,P19,P20,P21,R12,R13,R14,R15,R18,R19
VDD1_8;R20,R21,T10,T11,T16,T17,T22,T23,T24,T25
VDD1_8;T8,T9,U10,U11,U16,U17,U22,U23,U24,U25,U8,U9,V12
VDD1_8;V13,V14,V15,V18,V19,V20,V21,W12,W13,W14,W15,W18
VDD1_8;W19,W20,W21,Y12,Y13,Y14,Y15,Y18,Y19,Y20,Y21
VCCP;AB2,AB5,AB7,AD1,AD4,AD7,AF11,AF3,AF6,AF9,AG10,AG12
VCCP;AG14,AH2,AH5,AJ11,AJ9,AK1,AK4,AK7,AL14,AM3,AM6
VCCP;AM9,B3,D2,F1,F4,H3,K2,M1,M4,M7,P3,P6,T2,T5,T7,V1,V4
VCCP;V7,Y3,Y6,Y7,K5,K7,H6
VDDQ;AG21,AG30,AH19,AH25,AJ23,AJ29,AJ32,AK21,AK27,AL19
VDDQ;AL25,AM23,AM29
NC;AL15,AJ15,AK15
C1260
VDD1_8
AGP_CBE[3:0]_
AGP_AD[31:00]
24
HL_STB
HL_STB_
D28
C27
AGP MCH Decoupling
0.01UF
16,24,25,60
R226
R227
0.1UF
C212
HLA0
HLA1
HLA2
HLA3
HLA4
HLA5
HLA6
HLA7
HLA8
HLA9
HLA10
HLA11
D29
C29
A29
B28
A28
B27
A27
A26
E26
E27
F26
C26
HL00
HL01
HL02
HL03
HL04
HL05
HL06
HL07
HL08
HL09
HL10
HL11
HLB0
HLB1
HLB2
HLB3
HLB4
HLB5
HLB6
HLB7
HLB8
HLB9
HLB10
HLB11
HLB12
HLB13
HLB14
HLB15
HLB16
HLB17
HLB18
HLB19
B30
D30
A30
C31
C32
F31
F32
E30
J31
F28
F29
J28
H30
H29
J32
J29
G30
G27
H27
G28
X7R
.1UF
1
L806
3.3NH
3.3NH
224246-001
L805
CHB_RAC
NC_HLB00
NC_HLB01
NC_HLB02
NC_HLB03
NC_HLB04
NC_HLB05
NC_HLB06
NC_HLB07
NC_HLB08
NC_HLB09
NC_HLB10
NC_HLB11
NC_HLB12
NC_HLB13
NC_HLB14
NC_HLB15
NC_HLB16
NC_HLB17
NC_HLB18
NC_HLB19
AH30 NC_HLDSTB0
AG31 NC_HLDSTB0_
NC_HLCSTB1
NC_HLCSTB1_
NC_HLCSTB0
NC_HLCSTB0_
F5
E5
E6
C4
A5
A4
B6
B5
E9
F8
B8
F10
B9
F9
E8
D10
A8
D7
A7
C7
VDDQ
C214
AG32
AH32
AK32
AF32
AJ31
AK31
AL31
AF30
AM30
AH29
AG29
AL29
AF28
AG28
AJ28
AM28
AG25
AJ25
AM25
AH24
AJ24
AK23
AM24
AG22
AM22
AF21
AH21
AJ21
AM21
AG20
AH20
AK20
GAD0_PDD5
GAD1_PDD7
GAD2_PDD3
GAD3_PDD1
GAD4_PDD9
GAD5_PDD6
GAD6_PDD12
GAD7
GAD8_PDD13
GAD9_PDD4
GAD10_PDD2
GAD11_PDD15
GAD12_PDD14
GAD13_PDD10
GAD14_PDD0
GAD15
GAD16_PDE2
GAD17_PDE1
GAD18_PDE0
GAD19_PDE5
GAD20_PDE4
GAD21_PDE7
GAD22_PDE3
GAD23_PDE6
GAD24_PDE8
GAD25_PDE13
GAD26_PDE12
GAD27_PDE10
GAD28_PDE9
GAD29_PDE15
GAD30_PDE14
GAD31_PDE11
AL30
AM27
AL26
AL23
GCBE0_PDD11
GCBE1_PDD8
GCBE2
GCBE3
33
33
NC_HLBSTB0
NC_HLBSTB0_
HLASTB
HLASTB_
NC_HLBSTB1
NC_HLBSTB1_
E32
D31
HLBSTB0
HLBSTB0_
H32
G31
HLBSTB1
HLBSTB1_
C6
D5
HLCSTB0
HLCSTB0_
C9
D8
HLCSTB1
HLCSTB1_
AL27 NC_HLDSTB1
AK28 NC_HLDSTB1_
HLDSTB1
HLDSTB1_
AL24 NC_HLESTB0
AK25 NC_HLESTB0_
AJ22 NC_HLESTB1
AH23NC_HLESTB1_
C1254
.1UF
X7R
C186
S603T
1UF
1UF
C203
S603T
HUB_REF
HUB_COMP_v
HOST_REF_V
U22
HOST_COMP_V
HUB_COMP_REF_V
HLESTB0
HLESTB0_
HOST_COMP_REFV
5%
AH15
AH16
AG13
AF17
AF26
AF18
AF20
AF12
N7
AF13
P7
K26
G8
AF25
F27
K28
F6
E29
K27
F7
AF24
J6
M6
T6
W6
AF8
AD6
SKT_OCC_SEC_
it c
8,12
MIN_LINE_WIDTH=25
1%
HLAENH_
R221
100
R165
100
R228
X7R
0.01UF
C151
NC_HLRCOMPB
NC_HLRCOMPC
NC_HLRCOMPD
MIN_LINE_WIDTH=25
D20
D21
Y29
AA29
R831
HLAENH_
BUSPARK
CCVREF
PRCOMPE_AGP
PREFD_AGPREF0
PREFE_AGPREF1
PSWNGE_AGP
HSWNG0
HSWNG1
HRCOMP0
HRCOMP1
HLSWNGB
HLSWNGC
HLSWNGD
HLREFA
HLREFB
HLREFC
HLRCOMPA
HLRCOMPB
HLRCOMPC
HLRCOMPD
HDVREF0
HDVREF1
HDVREF2
HDVREF3
HAREF0
HAREF1
CHB_VREF0
CHB_VREF1
CHA_VREF0
CHA_VREF1
0.01UF
C219
R220
2
2
HLDSTB0
HLDSTB0_
HLC0
HLC1
HLC2
HLC3
HLC4
HLC5
HLC6
HLC7
HLC8
HLC9
HLC10
HLC11
HLC12
HLC13
HLC14
HLC15
HLC16
HLC17
HLC18
HLC19
NC_HLC00
NC_HLC01
NC_HLC02
NC_HLC03
NC_HLC04
NC_HLC05
NC_HLC06
NC_HLC07
NC_HLC08
NC_HLC09
NC_HLC10
NC_HLC11
NC_HLC12
NC_HLC13
NC_HLC14
NC_HLC15
NC_HLC16
NC_HLC17
NC_HLC18
NC_HLC19
1%
1%
300
B_RIMM_VREF
A_RIMM_VREF
0.01UF
C217
R829
1K
1K
NI
NI
NI
P403
24
R830
13
MCH_CCVREF
13
13
13
13
16
13
13
21,22
17,18
AGP_VREF_CG
HXSWING
HYSWING
HXRCOMP
HYRCOMP
0.1UF
C215
HLREFA_MCH
HLREF_NC
HLRCOMPA
MCH_HDVREF
MCH_HAVREF
0.01UF
NI
C1268
+1.8V
MIN_LINE_WIDTH=25
MIN_LINE_WIDTH=25
R225
R168
C207
HLESTB1
HLESTB1_
R169
R205
100
CHA_RAC6
CHA_RAC5
CHA_RAC4
CHA_RAC3
CHA_RAC2
CHA_RAC1
40.2
m
e
h
c
CHB_RAC7
CHB_RAC6
CHB_RAC5
CHB_RAC4
CHB_RAC3
CHB_RAC2
CHB_RAC1
0.1UF
s
p
o
30.1
l. a
w
w
t
p
HDR1X3
c
.
s
m
o
16
20,63
2.48MA
VDD1_8_RSL
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
A_MCH_LCMD
A_MCH_LSCLK
18
+3.3V
MEM_SMBCLK
MEM_SMBDAT
CHA RIMM 1
139708-061
560
1%
R1000
139708-217
162
1%
R1001
18,21,22,40
18,21,22,40
R944
A_RIMM_VREF
4.7K
16-18
B38
A2
B2
A4
B4
A6
B6
A8
B8
A10
MTH_RST_
LDQA8
LDQA7
LDQA6
LDQA5
LDQA4
LDQA3
LDQA2
LDQA1
LDQA0
XMM1
18,21,22,33
B32
A32
B30
A30
B28
A28
B26
A26
B24
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
RDRAM_RIMM_168
(RSL)
(RSL)
(RSL)
B16
LROW2
A18
LROW1
B18
LROW0
(RSL)
(RSL)
(CMOS)
(CMOS)
B10
LCFM
B12
LCFMN
B34
LCMD
A34
LSCLK
A45
SCL
A47
SDA
B49
SA2
B47
SA1
B45
SA0
A49
SWP
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(RSL)
(RSL)
A14
LCTM
A12
LCTMN
B36
SIN
A36
SOUT
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LCOL4
LCOL3
LCOL2
LCOL1
LCOL0
A20
B20
A22
B22
A24
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LDQB8
LDQB7
LDQB6
LDQB5
LDQB4
LDQB3
LDQB2
LDQB1
LDQB0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
RDQB8
RDQB7
RDQB6
RDQB5
RDQB4
RDQB3
RDQB2
RDQB1
RDQB0
B53
A53
B55
A55
B57
A57
B59
A59
B61
A83
B83
A81
B81
A79
B79
A77
B77
A75
-001 = .062" PCB

-002 = .093" PCB
NOTE: 360107-001 is part number

of 168 pin RIMM socket.
RDQA8
RDQA7
RDQA6
RDQA5
RDQA4
RDQA3
RDQA2
RDQA1
RDQA0
RCFM
RCFMN
RCTM
RCTMN
RCOL4
RCOL3
RCOL2
RCOL1
RCOL0
RROW2
RROW1
RROW0
VREF1
VREF2
VCMOS1
VCMOS2
VCMOS3
VCMOS4
RCMD
RSCLK
TPOINT=OFF
C168HZ4C
360107-001
(CMOS)
(CMOS)
GND;A1,A11,A13,A15,A17,A19,A21,A23,A25,A27
GND;A29,A3,A31,A33,A39,A5,A44,A52,A54,A56
GND;A58,A60,A7,A62,A64,A66,A68,A70,A72,A74
GND;A76,A78,A80,A9,A82,A84,B1,B11,B13,B15
GND;B17,B19,B21,B23,B25,B27,B29,B3,B31,B33
GND;B39,B5,B44,B52,B54,B56,B58,B60,B7,B62
GND;B64,B66,B68,B70,B72,B74,B76,B78,B80,B9,B82,B84
VDD2_5;A41,A42,A46,A50,B41,B42,B46,B50
VDD3;A48,B48
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
A_MCH_LCFM
A_MCH_LCFMN
15
15
15,19
15,19
RIMM_SWP
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
A_MCH_LCTM
A_MCH_LCTMN
15
15
RIMM_SWP
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
A_MCH_COL4
A_MCH_COL3
A_MCH_COL2
A_MCH_COL1
A_MCH_COL0
15
15
15
15
15
J9_ID=000 (0)
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
A_MCH_ROW2
A_MCH_ROW1
A_MCH_ROW0
15
15
15
15
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
A_DQB8
A_DQB7
A_DQB6
A_DQB5
A_DQB4
A_DQB3
A_DQB2
A_DQB1
A_DQB0
15
15
15
15
15
15
15
15
15
A_MCH_SIO
RM1_SIO
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
NC_MTH_RST_
A_DQA8
A_DQA7
A_DQA6
A_DQA5
A_DQA4
A_DQA3
A_DQA2
A_DQA1
A_DQA0
18
15
15
15
15
15
15
15
15
15
08/21/98: Rambus says our method is correct!
Our routing: RAC->SIN SOUT->SIN SOUT->SIN SOUT->TERM.

Intel routing: RAC->SOUT SIN->SIN SOUT->SOUT SIN->TERM.
Get SIO connection story from RAMBUS.
l. a
w
w
t
p
B75
B73
A71
A73
A65
B65
A63
B63
A61
B69
A67
B67
s
p
o
A43
B43
A35
A37
B35
B37
B51
A51
C998
50V
S603AT
20%
0.01UF
X7R
X7R
C1005
A_RIMM_VREF
RIMM_VCMOS
RM1_RCMD
RM1_RSCLK
RM1_RCFM
RM1_RCFMN
RM1_RCTM
RM1_RCTMN
RM1_RCOL4
RM1_RCOL3
RM1_RCOL2
RM1_RCOL1
RM1_RCOL0
RM1_RROW2
RM1_RROW1
RM1_RROW0
RM1_RDQB8
RM1_RDQB7
RM1_RDQB6
RM1_RDQB5
RM1_RDQB4
RM1_RDQB3
RM1_RDQB2
RM1_RDQB1
RM1_RDQB0
RM1_RDQA8
RM1_RDQA7
RM1_RDQA6
RM1_RDQA5
RM1_RDQA4
RM1_RDQA3
RM1_RDQA2
RM1_RDQA1
RM1_RDQA0
GROUND
.
.
5 MILS
19 MILS
5 MILS
RSL TRACE
SPACE
GROUND
SPACE
5 MILS
19 MILS
5 MILS
RSL TRACE
SPACE
5 MILS
0.01UF
NOTE: To achieve 28 ohm channel impedance,
the RSL trace width must be 22 MILS,
S603AT
with a 6 MIL ground trace between signal traces.
20%
The spacing between traces is 5 MILS.
50V
This assumes a 60 ohm board with 6 layer
stackup, dielectric thickness of 5 MILS,
dielectric material is FR-4, and 5 MIL
traces with 5 MIL spacing.
m
e
h
c
it c
c
.
s
16-18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
m
o
18.3ma
1%
1.83v
CHA RIMM 2
X7R
0.01UF
100
C1042
RIMM_VCMOS
VDD2_5
1%
R999
139708-001
36.5
R998
139708-218
17,18
22,59,61-63
+3.3V
RM1_SIO
RM2_SIO
17
R1016
MEM_SMBCLK
MEM_SMBDAT
RM2_LCMD
RM2_LSCLK
20
20
17,21,22,40
17,21,22,40
RM2_LCFM
RM2_LCFMN
RM2_LCOL4
RM2_LCOL3
RM2_LCOL2
RM2_LCOL1
RM2_LCOL0
20
20
20
20
20
A_RM2_LCTM
A_RM2_LCTMN
RM2_LROW2
RM2_LROW1
RM2_LROW0
20
20
20
5
5
RM2_LDQB8
RM2_LDQB7
RM2_LDQB6
RM2_LDQB5
RM2_LDQB4
RM2_LDQB3
RM2_LDQB2
RM2_LDQB1
RM2_LDQB0
20
20
20
20
20
20
20
20
20
20
20
NC_MTH_RST_
RM2_LDQA8
RM2_LDQA7
RM2_LDQA6
RM2_LDQA5
RM2_LDQA4
RM2_LDQA3
RM2_LDQA2
RM2_LDQA1
RM2_LDQA0
20
20
20
20
20
20
20
20
20
8.2K
17
17,21,22,33
8.2K
R1002
J10_ID=010 (2)
w
6
l. a
w
w
5
B38
A2
B2
A4
B4
A6
B6
A8
B8
A10
RIMM_SWP
J10_SA1
B32
A32
B30
A30
B28
A28
B26
A26
B24
t
p
MTH_RST_
LDQA8
LDQA7
LDQA6
LDQA5
LDQA4
LDQA3
LDQA2
LDQA1
LDQA0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LDQB8
LDQB7
LDQB6
LDQB5
LDQB4
LDQB3
LDQB2
LDQB1
LDQB0
B16
LROW2
A18
LROW1
B18
LROW0
(RSL)
(RSL)
(RSL)
(RSL)
(CMOS)
(CMOS)
A14
LCTM
A12
LCTMN
B10
LCFM
B12
LCFMN
B34
LCMD
A34
LSCLK
B36
SIN
A36
SOUT
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LCOL4
LCOL3
LCOL2
LCOL1
LCOL0
A20
B20
A22
B22
A24
RDQB8
RDQB7
RDQB6
RDQB5
RDQB4
RDQB3
RDQB2
RDQB1
RDQB0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(CMOS)
(CMOS)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
A45
SCL
A47
SDA
B49
SA2
B47
SA1
B45
SA0
A49
SWP
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
VREF1
VREF2
TPOINT=OFF
C168HZ4C
360107-001
GND;A1,A11,A13,A15,A17,A19,A21,A23,A25,A27
GND;A29,A3,A31,A33,A39,A5,A44,A52,A54,A56
GND;A58,A60,A7,A62,A64,A66,A68,A70,A72,A74
GND;A76,A78,A80,A9,A82,A84,B1,B11,B13,B15
GND;B17,B19,B21,B23,B25,B27,B29,B3,B31,B33
GND;B39,B5,B44,B52,B54,B56,B58,B60,B7,B62
VDD2_5;A41,A42,A46,A50,B41,B42,B46,B50
VDD3;A48,B48
VCMOS1
VCMOS2
VCMOS3
VCMOS4
RCMD
RSCLK
RCFM
RCFMN
RCTM
RCTMN
RCOL4
RCOL3
RCOL2
RCOL1
RCOL0
RROW2
RROW1
RROW0
RDQA8
RDQA7
RDQA6
RDQA5
RDQA4
RDQA3
RDQA2
RDQA1
RDQA0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
RDRAM_RIMM_168
s
p
o
A35
A37
B35
B37
B51
A51
B75
B73
A71
A73
A65
B65
A63
B63
A61
B69
A67
B67
B53
A53
B55
A55
B57
A57
B59
A59
B61
A83
B83
A81
B81
A79
B79
A77
B77
A75
XMM2
A43
B43
m
e
h
c
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
50V
20%
S603AT
0.01UF
X7R
C1044
X7R
20%
0.01UF
S603AT
50V
C1041
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
it c
c
.
s
A_RIMM_VREF
RIMM_VCMOS
RM1_RCMD
RM1_RSCLK
RM1_RCFM
RM1_RCFMN
RM1_RCTM
RM1_RCTMN
RM1_RCOL4
RM1_RCOL3
RM1_RCOL2
RM1_RCOL1
RM1_RCOL0
RM1_RROW2
RM1_RROW1
RM1_RROW0
RM1_RDQB8
RM1_RDQB7
RM1_RDQB6
RM1_RDQB5
RM1_RDQB4
RM1_RDQB3
RM1_RDQB2
RM1_RDQB1
RM1_RDQB0
RM1_RDQA8
RM1_RDQA7
RM1_RDQA6
RM1_RDQA5
RM1_RDQA4
RM1_RDQA3
RM1_RDQA2
RM1_RDQA1
RM1_RDQA0
m
o
16,17
17,18
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
desktop is using SUS_STAT
32,45,49,59
119919-001
NI
S3_CONTROL_
119919-001
R1157
3V_PWRGD
SUS_STAT_
SLP_S3_
SLP_S3
32
32,49
R1158
6
5
U30
7SZ00
U807
7SZ00
VDD3_AUX;5
347910-001
1
4
VDD3_AUX;5
347910-001
B
1
B
1
Q810
SOT23FT
150
R873
106127-003
MMBT100
Q806
l. a
w
w
t
p
B
1
139708-009
150
R234
SOT23FT
106127-003
MMBT100
B
1
139708-009
s
p
o
Q807
Q811
SOT23FT
A_MCH_LSCLK
A_MCH_LCMD
106127-003
MMBT100
B_MCH_LSCLK
B_MCH_LCMD
SOT23FT
106127-003
MMBT100
m
e
h
c
15,17
15,17
15,21
15,21
a
it c
c
.
s
m
o
RM2_LROW1
RM2_LROW0
RM2_LCOL4
RM2_LCOL3
RM2_LDQA8
RM2_LDQA7
RM2_LDQA6
RM2_LDQA5
18
18
18
18
18
18
18
18
RM2_LCFMN
18
17,63
CHA RSL TERMINATION
RM2_LCFM
RM2_LDQA0
18
18
RM2_LROW2
18
RM2_LDQA4
RM2_LDQA3
RM2_LDQA2
RM2_LDQA1
RM2_LCOL2
RM2_LCOL1
RM2_LCOL0
RM2_LDQB0
18
18
18
18
18
18
18
18
RM2_LDQB5
RM2_LDQB6
RM2_LDQB7
RM2_LDQB8
18
18
18
18
RM2_LDQB1
RM2_LDQB2
RM2_LDQB3
RM2_LDQB4
RM2_LCMD
18
18
18
18
18
RM2_LSCLK
18
VDD1_8_RSL
R996
R997
S603AT
5%
56
S603AT
5%
56
R995
These are discretes for

routing purposes.
56
R994
S603AT
5%
56
S603AT
5%
S603AT
28
R975
S603AT
28
R976
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
S603AT
28
28
28
28
28
28
28
28
28
28
28
28
1%
1%
28
28
28
28
28
28
28
28
28
28
28
28
X7R
296166-004
16V
10%
S603AT
C289
.1UF
28
R974
28
R977
S603AT
RCFMC
R971
R970
R973
R972
R968
R966
R969
R967
R979
R978
R980
R981
R982
R983
R984
R985
R990
R991
R992
R993
R986
R987
R988
R989
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
l. a
w
w
t
p
s
p
o
.1UF
.1UF
C1077
C1066
.1UF
X7R
C1067
.1UF
C1068
C1059
S603AT
X7R
296166-004
C1076
.1UF
.1UF
C1040
X7R
S603AT
C1079
.1UF
50V
20%
.1UF
.1UF
C1073
.1UF
C1074
C1078
.1UF
RNETS at left.
HRM: Add extra decoupling for 512MB
25V
X7R
C1069
20%
.1UF
50V
296166-004
S603AT
X7R
C1071
.1UF
20%
S603AT
X7R
296166-004
C1072
.1UF
.1UF
X7R
C1075
Place these CAPS near
NOTE: Two decoupling caps.
NOTE: These RNETS

really need to be 1% tolerance!
m
e
h
c
a
it c
C1062
.1UF
50V
20%
.1UF
50V
20%
S603AT
X7R
C1063
C1080
10UF
2
129621-019
296166-004
10UF
129621-019
1 C1038
.1UF
per RNET.
S603AT
X7R
296166-004
X7R
C1064
c
.
s
m
o
2.48MA
B_VDD1_8_RSL
129621-026
23
C1026
139708-061
560
1%
R875
139708-217
162
1%
R923
17,18,22,40
17,18,22,40
15
22
121808-349
50V
20%
S603AT
0.01UF
X7R
C149
B_RIMM_VREF
+3.3V
MEM_SMBCLK
MEM_SMBDAT
B_MCH_SIO
B_RM1_SIO
R880
4.7K
16,21,22
15
15
CHB RIMM1
B_MCH_LCTM
B_MCH_LCTMN
15
15
15
15
15
B_MCH_LCMD
B_MCH_LSCLK
B_MCH_COL4
B_MCH_COL3
B_MCH_COL2
B_MCH_COL1
B_MCH_COL0
15
15
15
B_MCH_LCFM
B_MCH_LCFMN
B_MCH_ROW2
B_MCH_ROW1
B_MCH_ROW0
15
15
15
15
15
15
15
15
15
15
15
B_DQB8
B_DQB7
B_DQB6
B_DQB5
B_DQB4
B_DQB3
B_DQB2
B_DQB1
B_DQB0
15
15
15
15
15
15
15
15
15
15,19
15,19
NC_MTH_RSTB_
B_DQA8
B_DQA7
B_DQA6
B_DQA5
B_DQA4
B_DQA3
B_DQA2
B_DQA1
B_DQA0
22
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
17,18,22,33
J30_ID=001 (1)
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
R865
8.2K
I
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
RIMM_SWP
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
+3.3V
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
08/21/98: Rambus says our method is correct!
Our routing: RAC->SIN SOUT->SIN SOUT->SIN SOUT->TERM.

Intel routing: RAC->SOUT SIN->SIN SOUT->SOUT SIN->TERM.
Get SIO connection story from RAMBUS.
22UF
l. a
w
w
B38
A2
B2
A4
B4
A6
B6
A8
B8
A10
MTH_RST_
LDQA8
LDQA7
LDQA6
LDQA5
LDQA4
LDQA3
LDQA2
LDQA1
LDQA0
B32
A32
B30
A30
B28
A28
B26
A26
B24
XMM3
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
RDRAM_RIMM_168
t
p
(RSL)
(RSL)
(RSL)
B16
LROW2
A18
LROW1
B18
LROW0
(RSL)
(RSL)
(RSL)
(RSL)
(CMOS)
(CMOS)
A14
LCTM
A12
LCTMN
B10
LCFM
B12
LCFMN
B34
LCMD
A34
LSCLK
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
RDQB8
RDQB7
RDQB6
RDQB5
RDQB4
RDQB3
RDQB2
RDQB1
RDQB0
RDQA8
RDQA7
RDQA6
RDQA5
RDQA4
RDQA3
RDQA2
RDQA1
RDQA0
VREF1
VREF2
VCMOS1
VCMOS2
VCMOS3
VCMOS4
RCMD
RSCLK
RCFM
RCFMN
RCTM
RCTMN
RCOL4
RCOL3
RCOL2
RCOL1
RCOL0
RROW2
RROW1
RROW0
TPOINT=OFF
C168HZ4C
360107-001
(CMOS)
(CMOS)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
GND;A1,A11,A13,A15,A17,A19,A21,A23,A25,A27
GND;A29,A3,A31,A33,A39,A5,A44,A52,A54,A56
GND;A58,A60,A7,A62,A64,A66,A68,A70,A72,A74
GND;A76,A78,A80,A9,A82,A84,B1,B11,B13,B15
GND;B17,B19,B21,B23,B25,B27,B29,B3,B31,B33
GND;B39,B5,B44,B52,B54,B56,B58,B60,B7,B62
VDD2_5;A41,A42,A46,A50,B41,B42,B46,B50
VDD3;A48,B48
A45
SCL
A47
SDA
B49
SA2
B47
SA1
J30_SA0 B45
SA0
A49
SWP
B36
SIN
A36
SOUT
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LCOL4
LCOL3
LCOL2
LCOL1
LCOL0
A20
B20
A22
B22
A24
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LDQB8
LDQB7
LDQB6
LDQB5
LDQB4
LDQB3
LDQB2
LDQB1
LDQB0
B51
A51
B75
B73
A71
A73
A65
B65
A63
B63
A61
B69
A67
B67
B53
A53
B55
A55
B57
A57
B59
A59
B61
A83
B83
A81
B81
A79
B79
A77
B77
A75
-001 = .062" PCB

-002 = .093" PCB
NOTE: 360107-001 is part number

of 168 pin RIMM socket.
s
p
o
A43
B43
A35
A37
B35
B37
C941
20%
50V
S603AT
0.01UF
X7R
m
e
h
c
with a 6 MIL ground trace between signal traces.
B_RIMM_VREF
B_RIMM_VCMOS
B_RM1_RCMD
B_RM1_RSCLK
B_RM1_RCFM
B_RM1_RCFMN
B_RM1_RCTM
B_RM1_RCTMN
B_RM1_RCOL4
B_RM1_RCOL3
B_RM1_RCOL2
B_RM1_RCOL1
B_RM1_RCOL0
B_RM1_RROW2
B_RM1_RROW1
B_RM1_RROW0
B_RM1_RDQB8
B_RM1_RDQB7
B_RM1_RDQB6
B_RM1_RDQB5
B_RM1_RDQB4
B_RM1_RDQB3
B_RM1_RDQB2
B_RM1_RDQB1
B_RM1_RDQB0
B_RM1_RDQA8
B_RM1_RDQA7
B_RM1_RDQA6
B_RM1_RDQA5
B_RM1_RDQA4
B_RM1_RDQA3
B_RM1_RDQA2
B_RM1_RDQA1
B_RM1_RDQA0
50V
SPACE
5 MILS
5 MILS
20 MILS
5 MILS
RSL TRACE
SPACE
GROUND
The spacing between traces is 5 MILS.

This assumes a 60 ohm board with 6 layer
stackup, dielectric thickness of 5 MILS,
dielectric material is FR-4, and 5 MIL
traces with 5 MIL spacing.
0.01UF
NOTE: To achieve 28 ohm channel impedance,
the RSL trace width must be 22 MILS,
S603AT
20%
X7R
C971
.
.
.
.
.
5 MILS
20 MILS
5 MILS
RSL TRACE
SPACE
GROUND
it c
c
.
s
16,21,22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
m
o
18.3ma
36.5
1%
R232
1.83v
21,22
18,59,61-63
RIMM_SWP
MEM_SMBCLK
MEM_SMBDAT
R924
4.7K
*
(CMOS)
(CMOS)
B34
LCMD
A34
LSCLK
B_RM2_LCMD
B_RM2_LSCLK
23
23
(RSL)
(RSL)
B10
LCFM
B12
LCFMN
B_RM2_LCFM
B_RM2_LCFMN
+3.3V
(RSL)
(RSL)
A14
LCTM
A12
LCTMN
B_RM2_LCTM
B_RM2_LCTMN
5
5
23
23
J31_ID=011 (3)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LCOL4
LCOL3
LCOL2
LCOL1
LCOL0
A20
B20
A22
B22
A24
B_RM2_LCOL4
B_RM2_LCOL3
B_RM2_LCOL2
B_RM2_LCOL1
B_RM2_LCOL0
23
23
23
23
23
B_RM1_SIO
B_RM2_SIO
(RSL)
(RSL)
(RSL)
B16
LROW2
A18
LROW1
B18
LROW0
B_RM2_LROW2
B_RM2_LROW1
B_RM2_LROW0
23
23
23
21
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
LDQB8
LDQB7
LDQB6
LDQB5
LDQB4
LDQB3
LDQB2
LDQB1
LDQB0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
B32
A32
B30
A30
B28
A28
B26
A26
B24
MTH_RST_
LDQA8
LDQA7
LDQA6
LDQA5
LDQA4
LDQA3
LDQA2
LDQA1
LDQA0
B_RM2_LDQB8
B_RM2_LDQB7
B_RM2_LDQB6
B_RM2_LDQB5
B_RM2_LDQB4
B_RM2_LDQB3
B_RM2_LDQB2
B_RM2_LDQB1
B_RM2_LDQB0
B38
A2
B2
A4
B4
A6
B6
A8
B8
A10
XMM4
J31_SA0
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
(CMOS)
RDQB8
RDQB7
RDQB6
RDQB5
RDQB4
RDQB3
RDQB2
RDQB1
RDQB0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(CMOS)
(CMOS)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
A43
B43
A35
A37
B35
B37
B51
A51
B75
B73
A71
A73
A65
B65
A63
B63
A61
B69
A67
B67
B53
A53
B55
A55
B57
A57
B59
A59
B61
A83
B83
A81
B81
A79
B79
A77
B77
A75
TPOINT=OFF
HARD
360107-001
C168HZ4C
VREF1
VREF2
VCMOS1
VCMOS2
VCMOS3
VCMOS4
RCMD
RSCLK
RCFM
RCFMN
RCTM
RCTMN
RCOL4
RCOL3
RCOL2
RCOL1
RCOL0
RROW2
RROW1
RROW0
RDQA8
RDQA7
RDQA6
RDQA5
RDQA4
RDQA3
RDQA2
RDQA1
RDQA0
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
(RSL)
GND;A1,A11,A13,A15,A17,A19,A21,A23,A25,A27
GND;A29,A3,A31,A33,A39,A5,A44,A52,A54,A56
GND;A58,A60,A7,A62,A64,A66,A68,A70,A72,A74
GND;A76,A78,A80,A9,A82,A84,B1,B11,B13,B15
GND;B17,B19,B21,B23,B25,B27,B29,B3,B31,B33
GND;B39,B5,B44,B52,B54,B56,B58,B60,B7,B62
VDD2_5;A41,A42,A46,A50,B41,B42,B46,B50
VDD3;A48,B48
A45
SCL
A47
SDA
B49
SA2
B47
SA1
B45
SA0
A49
SWP
B36
SIN
A36
SOUT
RDRAM_RIMM_168
23
23
23
23
23
23
23
23
23
NC_MTH_RSTB_
B_RM2_LDQA8
B_RM2_LDQA7
B_RM2_LDQA6
B_RM2_LDQA5
B_RM2_LDQA4
B_RM2_LDQA3
B_RM2_LDQA2
B_RM2_LDQA1
B_RM2_LDQA0
23
23
23
23
23
23
23
23
23
17,18,21,33
CHB RIMM2
X7R
0.01UF
C255
100
21
17,18,21,40
17,18,21,40
B_RIMM_VCMOS
VDD2_5
8.2K
1%
R230
139708-001
R231
139708-218
l. a
w
w
t
p
s
p
o
m
e
h
c
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
BUS_NAME=RSL
X7R
20%
0.01UF
S603AT
50V
C984
B_RM1_RCTM
B_RM1_RCTMN
B_RM1_RCFM
B_RM1_RCFMN
B_RM1_RCMD
B_RM1_RSCLK
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
S603AT
20%
0.01UF B_RIMM_VREF
X7R
B_RM1_RCOL4
B_RM1_RCOL3
B_RM1_RCOL2
B_RM1_RCOL1
B_RM1_RCOL0
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
50V
B_RM1_RROW2
B_RM1_RROW1
B_RM1_RROW0
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
B_RIMM_VCMOS
B_RM1_RDQB8
B_RM1_RDQB7
B_RM1_RDQB6
B_RM1_RDQB5
B_RM1_RDQB4
B_RM1_RDQB3
B_RM1_RDQB2
B_RM1_RDQB1
B_RM1_RDQB0
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
C254
B_RM1_RDQA8
B_RM1_RDQA7
B_RM1_RDQA6
B_RM1_RDQA5
B_RM1_RDQA4
B_RM1_RDQA3
B_RM1_RDQA2
B_RM1_RDQA1
B_RM1_RDQA0
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
MIN_LINE_WIDTH=018
it c
c
.
s
m
o
16,21
21,22
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
B_RM2_LROW1
B_RM2_LROW0
B_RM2_LCOL4
B_RM2_LCOL3
B_RM2_LDQA8
B_RM2_LDQA7
B_RM2_LDQA6
B_RM2_LDQA5
22
22
22
22
22
22
22
22
B_RM2_LDQA0
B_RM2_LCFMN
B_RM2_LCFM
22
22
22
CHB TERMINATION
B_RM2_LROW2
22
B_RM2_LDQA4
B_RM2_LDQA3
B_RM2_LDQA2
B_RM2_LDQA1
B_RM2_LCOL2
B_RM2_LCOL1
B_RM2_LCOL0
B_RM2_LDQB0
22
22
22
22
22
22
22
22
B_RM2_LDQB5
B_RM2_LDQB6
B_RM2_LDQB7
B_RM2_LDQB8
B_RM2_LDQB1
B_RM2_LDQB2
B_RM2_LDQB3
B_RM2_LDQB4
B_RM2_LCMD
B_RM2_LSCLK
22
22
22
22
22
22
22
22
22
22
B_VDD1_8_RSL
R921
R922
S603AT
5%
56
S603AT
5%
56
56
S603AT
5%
R920
These are discretes for

routing purposes.
56
R919
S603AT
5%
S603AT
28
R900
28
R901
S603AT
*
*
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
10V
10%
S603AT
X7R
.1UF
C225
1%
1%
296166-002
S603AT
28
R899
28
R902
S603AT
B_LCFMC
R896
R895
R898
R897
R893
R891
R894
R892
R904
R903
R905
R906
R907
R908
R909
R910
R915
R916
R917
R918
R911
R912
R913
R914
*
*
*
*
*
*
*
*
*
*
*
*
21
l. a
w
w
t
p
L29
X7R
.1UF
C1006
S1812T
C1003
C1020
107352-012
296166-004
+1.8V
.1UF
s
p
o
*
w
1
C1015
.1UF
X7R
C1019
0.1UF
C1013
.1UF
.1UF
C1022
S603aT
0.1UF
296166-004
S603AT
0.1UF
S603AT
296166-004
S603AT
C1021
0.1UF
S603AT
Y5V
296166-004
20%
16V
22UF
.1UF
.1UF
296166-004
20%
50V
S603AT
X7R
C1009
50V
20%
.1UF
296166-004
X7R
S603AT
C1023
S603AT
296166-004
296166-004
+3.3V
10UF
C981
129621-019
C1103 for 3.3v pins at RIMM
per RNET.
.1UF
C1008
C1014
S603AT
.1UF
.1UF
C1018
C1017
C1027
0.1UF
C1024
C1011
.1UF
296166-004
20%
X7R
C1016
C1012
0.1UF
RNETS at left.
Place these CAPS near
NOTE: Two decoupling caps.
HRM: Add extra decoupling for 512MB
.1UF
C1025
NOTE: These RNETS

really need to be 1% tolerance!
.1UF
C982
m
e
h
c
it c
c
.
s
m
o
C1094
129621-019
10UF
C1004
109764-087
150UF
16,25
16,25
16,25
AGP_CLK
AGP_RST_
AGP_GNT_
AGP_REQ_
AGP_IRDY_
AGP_FRAME_
AGP_DEVSEL_
AGP_TRDY_
AGP_STOP_
AGP_TYPEDET_
16,25
16,25
16,25
16,25
16,25
PCI_P_INTC_
PCI_P_INTD_
26-29,32
26,32
4
45
16,25
16,25
AGP_SERR_
AGP_PERR_
AGP_PIPE_
AGP_RBF_
AGP_WBF_
AGP_ST0
AGP_ST1
AGP_ST2
16,25
25
16,25
16,25
16,25 AGP4X
R1040
15K
AGP_SBA[7:0]
RESERVED
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
C1119
AGP_PRSNT1_
AGP_PRSNT2_
110W MAX PWR AGP CARD
50W MAX PWR AGP CARD
NO AGP CARD
SLOT CONFIGURATION
C1120
AGP_USB_P
AGP_USB_N
UNIV AGP PRO
GND
OPEN
OPEN
GND
GND
OPEN
OPEN
GND
PRSNT2
PRSNT1
AGPPRO
AGPPRO
3.3v cards leave TYPEDET_ open.

1.5v cards ground TYPEDET_.
16
AGP_ADSTB1
AGP_ADSTB1_
B32
A32
B59
A59
B18
A18
A48
AD_STB1
AD_STB1_
AD_STB0
AD_STB0_
SB_STB
SB_STB_
B41
A41
B46
A46
A47
A2
B7
A7
A8
B8
A6
B6
B50
B48
A12
B12
A14
B10
A10
B11
B4
A4
B15
A15
B17
A17
B20
A20
B21
A21
PRSNT1_
PRSNT2_
IRDY_
FRAME_
DEVSEL_
TRDY_
STOP_
TYPEDET_
CLK
RST_
GNT_
REQ_
INTA_
INTB_
SERR_
PERR_
PIPE_
RBF_
WBF_
ST0
ST1
ST2
USB_P
USB_N
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
VDDQ;A34,B34,A40,B40,B47
VDDQ;A52,B52,A58,B58,A64,B64
VDD3;A9,B9,A16,B16,A25,B25,A28,B28
VDD3;C1,C3,D1,D2,D3,D4,D5,D6,D7,D8
TPOINT=OFF
VDD;B2,B3
D10
D9
NC=A3,A11,A22,A24,A42,B14
NC=B22,C9,C10,E1,E2,F1,F2
NC=MH1,MH2,MH3,MH4
GND;A5,B5,A13,B13,A19,B19,A23,B23,A31
GND;B31,A37,B37,A49,B49,A55,B55
GND;A61,B61,C2,C4,C5,C6,C7,C8,F3,F4,F5
GND;F6,F7,F8,F9,F10,F11,F12,F13,F14
VDD12;A1,E3,E4,E5,E6,E7,E8
VDD12;E9,E10,E11,E12,E13,E14
VDD3_AUX;B24
PAR
VREF1
VREF2
OVRCNT_
AGPPROCONNU
PME_
A50
A66
B66
B1
J40
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE0_
C_BE1_
C_BE2_
C_BE3_
AGP_CBE0_
AGP_CBE1_
AGP_CBE2_
AGP_CBE3_
AGP_AD00
AGP_AD01
AGP_AD02
AGP_AD03
AGP_AD04
AGP_AD05
AGP_AD06
AGP_AD07
AGP_AD08
AGP_AD09
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
A57
B51
B39
A33
A65
B65
A63
B63
A62
B62
A60
B60
B57
A56
B56
A54
B54
A53
B53
A51
A39
B38
A38
B36
A36
B35
A35
B33
A30
B30
A29
B29
A27
B27
A26
B26
(Mounting Holes)
AGP_CBE[3:0]_
MIN_LINE_WIDTH=010
MIN_LINE_WIDTH=010
200K
R1039
289006-005
C172HZ4A
16
16
AGP_PAR
NC_AGP_VREF
AGP_VREF_CG
NI
200K
R1043
Intel uses 330K here.
USB0_OC_AGP_
+3.3V
This connector will only allow 1.5V cards to plug in
AGP_AD[31:00]
s
p
o
15K
R1041
AGP4X
16,25 AGP4X
16,25
AGP_ADSTB0
AGP_ADSTB0_
16,25
16,25
AGP4X
AGP4X
AGP_SBSTB
AGP_SBSTB_
16,25 AGP4X
16,25 AGP4X
AGP_PME_
t
p
26,33
l. a
w
w
0.01UF
0.01UF
w
*
16
16,25
m
e
h
c
106147-401
1K
1%
R1025
S1206T
1K
1%
R1026
& CAPS 500PF
AGP_HI
C1091
AGP_LO
C1050
470PF
470PF
MAKE THESE RESISTORS 430 OHMS
AGP4X
AGP4X
VDDQ
106147-401
16,25,60
a
it c
c
.
s
82
R1024
82
R1003
m
o
E14
Bottom View
E1
A1
A66
C1
Top View
F1
D1
F14
B66
F1
B1
E1
A66
A1
B1
B66
C1
D1
AGP_ADSTB0
AGP_ADSTB1
AGP_SBSTB
16,24
16,24
16,24
16,24
16,24
16,24
AGP_IRDY_
AGP_FRAME_
AGP_DEVSEL_
AGP_TRDY_
16,24
16,24
16,24
16,24
NC_PU_5
R1017
16,24,25,60
8
7
6
5
AGP TERMINATIONS
AGP_SBSTB_
AGP_ADSTB1_
AGP_ADSTB0_
AGP_PIPE_
AGP_RBF_
AGP_WBF_
16,24
16,24
16,24
16,24
24
16,24
16,24
AGP_REQ_
AGP_GNT_
AGP_ST2
AGP_STOP_
AGP_PERR_
AGP_SERR_
AGP_PAR
16,24
16,24
16,24
AGP_ST0
AGP_ST1
VDDQ
1
2
3
4
16,24
R1018
Max. stub length, 4X AGP,

is 100MILS.
1
2
3
4
16,24
DO ST LINES NEED TO BE TERMINATED?
8.2K
114567-005
R1020
+3.3V
S603AT
.01UF
VDDQ
.01UF
8.2K
R1023
8.2K
R1044
16,24,25,60
8.2K
R1022
8.2K
R1021
VDDQ
8.2K
R1019
8.2K
16,24,25,60
Y5V
C1134
C1090
Y5V
.01UF
Y5V
.01UF
I
COG
1000PF
1000PF
COG
C1136
Y5V
.01UF
.01UF
Y5V
C1087
S603AT
1000PF
COG
C1138
.01UF
.01UF
Y5V
C1140
C1145
X7R
1000PF
Y5V
+3.3V
.01UF
Y5V
C1144
S603AT
C1118
.01UF
.01UF
I
109764-076
S603AT
+12V
C1089
.01UF
C1116
C1092
AGP PULLUP DECOUPLING
Y5V
.01UF
I
1
33UF
109764-048
S603AT
C1139
S603AT
C1135
.01UF
S603AT
C1088
.01UF
C1095
C1109
.01UF
C1128
S603AT
S603AT
C1111
.01UF
C1121
1000PF
C1126
S603AT
C1086
.01UF
C1131
.01UF
Y5V
C1084
S603AT
S603AT
S603AT
C1112
.01UF
.01UF
S603AT
C1085
.01UF
.01UF
VDDQ
+3.3V
S603AT
C1113
.01UF
C1083
S603AT
C1082
S603AT
C1114
.01UF
.01UF
C1123
C1122
AGP PRO Decoupling

agp decoupling
S603AT
C1124
.01UF
16,24,25,60
S603AT
C1081
.01UF
C1115
VDD
+5V
33UF
33UF
1
2
3
4
8.2K
C1132
l. a
w
w
t
p
RN18
8.2K
s
p
o
1
2
3
4
C1107
33UF
w
RN19
8.2K
m
e
h
c
a
it c
c
.
s
m
o
8
7
6
5
RN20
8.2K
8
7
6
5
RN17
8.2K
8
7
6
5
8
6
8.2K
8.2K
8.2K
8
7
6
5
RN25
8
7
6
5
RN31
8
7
6
5
RN21
8
7
6
5
27-29
27-29
PCI_P_REQ64_
PCI_P_ACK64_
24,32
24,27-29,32
PCI_P_INTD_
PCI_P_INTC_
ich strapping
R298
4
3
2
1
8.2K
8.2K
R295
R281
R292
R293
VDD3_AUX
1.8K
RN34
5
6
7
8
27-29,41,42,64
R1042
ALERT BUS ties to SMBus
RN10 will be removed if
ALERT_CLK
ALERT_SDA
ICH_SMBCLK
ICH_SMBDAT
R1038
PCI TERMINATIONS
27
1
2
3
4
8.2K
1
2
3
4
1.8K
1
2
3
4
1.8K
PCI_P_TRST_2_
28
R1110
R1072
1
2
3
4
32,40
32,40
27-29,32
27-29,32
m
e
h
c
PCI_P_TRST_1_
PCI_P_TRST_3_
29
32,55
32,55
8
7
6
5
RN807
1.8K
1
2
3
4
1.8K
ICH_SMBALERT_
SCSI_ENABLE
33
33,55
ICH_GPIO8
8,10,32
AGP_PME_
PCI_PME_
24,33
27-29,32,49
NARROW_CABLE
SCSI_GNT_
SCSI_REQ_
RN27
8
7
6
5
RN32
49
27-29,32
29,32
27-29,32,55
PCI_P_REQ3_
PCI_P_INTG_
PCI_P_INTA_
PCI_P_GNT3_
PCI_P_INTB_
PCI_P_INTH_
NC_GNT5_
NC_REQ5_
1
2
3
4
1.8K
s
p
o
29,32
32
32
32
32,34
SB_PCI_REQ_
SB_PCI_GNT_
PCI_P_INTE_
PCI_P_INTF_
8
7
6
5
t
p
32,34
32,34
32
27-29,32
1
2
3
4
1.8K
RN33
+5V
1
2
3
4
8
7
6
5
8.2K
8.2K
+3.3V
1.8K
R1111
1.8K
1.8K
RN22
4.7K
PCI_P_GNT2_
PCI_P_REQ2_
PCI_P_REQ1_
PCI_P_GNT1_
PCI_P_FRAME_
PCI_P_IRDY_
PCI_P_TRDY_
PCI_P_DEVSEL_
27-29,32,34,55
27-29,32,34,55
27-29,32,34,55
27-29,32,34,55
28,32
28,32
27,32
27,32
PCI_P_STOP_
PCI_P_LOCK_
PCI_P_PERR_
PCI_P_SERR_
27-29,32,34,55
27-29,32
27-29,32,55
27-29,32,34,55
l. a
w
w
*
w
*
it c
c
.
s
VDD3_AUX
VDD3_AUX
m
o
internal USB1
internal USB2
int Audio/SMB
26
Slot 3 (J22)
29
CONNECTOR TOP VIEW
B1
A1
SCSI_IDSEL
22
25
Slot 2 (J21)
sound blaster
20
AD Line
(Int2)
Slot 1 (J20)
PCI Device Assignments
Internal LAN
scsi
sound blaster
Slot 3 (J22)
(Int1)
Slot 2 (J21)
(Int0)
System Board Interrupts
PCI IDSEL Assignments
Slot 1 (J20)
B49
A49
(Int3)
B52
A52
B62
A62
l. a
w
w
5
PCI_P_CBE[3:0]_
26
28,29,41,64
28,29,41
42,48,64
28,29,45
4
26,28,29
26,28,29
26,28,29,32
26,28,29
32,34,55
26,28,29,32,55
26,28,29
32,34,55
26,28,29
32,34,55
26,28,29
32,34,55
28,29,32,34,55
PCI_P_CBE3_
PCI_P_CBE2_
PCI_P_CBE1_
PCI_P_CBE0_
-12V
+12V
B39
B42
B40
A34
A36
A38
A43
A60
B60
B35
A17
A26
B37
B10
B14
B8
A7
B7
A6
B26
B33
B44
A52
LOCK#
SERR#
PERR#
FRAME#
TRDY#
STOP#
PAR
REQ64#
ACK64#
IRDY#
GNT#
IDSEL
DEVSEL#
R_B10
R_B14
INTD#
INTC#
INTB#
INTA#
CBE3#
CBE2#
CBE1#
CBE0#
J20
CONN_PCI
C120HG4A
148062-001
PRSNT1#
PRSNT2#
TDO
TCK
TMS
TDI
TRST#
-12V
+12V
PCIRST#
PCLK
PCI SLOT 1
R_A9
R_A11
+3AUX
SDONE
SBO#
PME#
REQ#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
B53
B52
B61
B62
Key Position
VDD3;A21,A27,A33,A39,A45,A53,B25,B31,B36,B41,B43,B54
A9
A11
A14
A40
A41
A19
B18
B20
A20
B21
A22
B23
A23
B24
A25
B27
A28
B29
A29
B30
A31
B32
A32
A44
B45
A46
B47
A47
B48
A49
B52
B53
A54
B55
A55
B56
A57
B58
A58
B48
A49
A48
B49
Bottom side view
NC_PCI_A9_1
NC_PCI_MICS1_
PCI_P_AD31
PCI_P_AD30
PCI_P_AD29
PCI_P_AD28
PCI_P_AD27
PCI_P_AD26
PCI_P_AD25
PCI_P_AD24
PCI_P_AD23
PCI_P_AD22
PCI_P_AD21
PCI_P_AD20
PCI_P_AD19
PCI_P_AD18
PCI_P_AD17
PCI_P_AD16
PCI_P_AD15
PCI_P_AD14
PCI_P_AD13
PCI_P_AD12
PCI_P_AD11
PCI_P_AD10
PCI_P_AD09
PCI_P_AD08
PCI_P_AD07
PCI_P_AD06
PCI_P_AD05
PCI_P_AD04
PCI_P_AD03
PCI_P_AD02
PCI_P_AD01
PCI_P_AD00
Device # : 04h
GND;A12,A13,A18,A24,A30,A35,A37,A42,A48,A56
VDD;A5,A8,A10,A16,A59,A61,A62
VDD;B5,B6,B19,B59,B61,B62
B9
B11
A50, B50, A51, B51
0.01UF
C1171
PCI_PRSNT1_1_
PCI_PRSNT2_1_
B4
B2
A3
A4
A1
B1
A2
A15
B16
A53
A52
0.01UF
C1170
NC_PCI_P_TCK_1
NC_PCI_P_TMS_1
NC_PCI_P_TDI_1
NC_PCI_P_TDO_1
NC_PCI_R_B10_1
NC_PCI_R_B14_1
A61
A62
PCI_P_TRST_1_
NEG12V
VDD12
PCI_SLT_RST_
PCI_CLK1
PCI_P_LOCK_
PCI_P_SERR_
PCI_P_PERR_
PCI_P_FRAME_
PCI_P_TRDY_
PCI_P_STOP_
PCI_P_PAR
PCI_P_REQ64_
PCI_P_ACK64_
PCI_P_IRDY_
PCI_P_GNT1_
PCI_P_AD20
PCI_P_DEVSEL_
26,32
27-29,32,34,55
26,28,29
32,34,55
26,28,29
32,34,55
PCI_P_INTG_
PCI_P_INTF_
PCI_P_INTC_
PCI_P_INTA_
26,28,29,32,55
26,28,29,32
24,26,28,29,32
26,28,29,32
28,29,32,34,55
t
p
s
p
o
m
e
h
c
a
it c
A1
A2
B1
B2
VDD3_AUX
VDD3_AUX
ALERT_CLK
ALERT_SDA
PCI_PME_
PCI_P_REQ1_
PCI_P_AD[31:00]
c
.
s
26,28,29
41,42,64
26,28,29,32
26,28,29,32
26,28,29,32,49
26,32
m
o
27-29,32,34,55
B62
A61
A62
B61
B52
A53
A52
B53
B48
A49
A48
B49
Bottom side view
w
-12V
26
PCI_P_TRST_2_
NEG12V
VDD12
B2
A1
A2
B1
0.01UF
C1195
NC_PCI_TDO_2
NC_PCI_P_TCK_2
NC_PCI_P_TMS_2
NC_PCI_P_TDI_2
A50, B50, A51, B51
Key Position
0.01UF
C1196
PCI_PRSNT1_2_
PCI_PRSNT2_2_
PCI_SLT_RST_
PCI_CLK2
27,29,45
4
27,29,41,64
27,29,41
42,48,64
PCI_P_LOCK_
PCI_P_SERR_
PCI_P_PERR_
PCI_P_FRAME_
PCI_P_TRDY_
PCI_P_STOP_
PCI_P_PAR
PCI_P_REQ64_
PCI_P_ACK64_
B39
B42
B40
A34
A36
A38
A43
A60
B60
B35
PCI_P_IRDY_
B10
B14
A17
A26
B37
NC_PCI_R_B10_2
NC_PCI_R_B14_2
PCI_P_GNT2_
PCI_P_AD25
PCI_P_DEVSEL_
B8
A7
B7
A6
B26
B33
B44
A52
26,32
27-29,32,34,55
26,27,29
32,34,55
26,27,29
32,34,55
26,27,29,32
26,27,29
32,34,55
26,27,29,32,55
26,27,29
32,34,55
26,27,29
32,34,55
26,27,29
32,34,55
27,29,32,34,55
26,27,29
26,27,29
PCI_P_CBE3_
PCI_P_CBE2_
PCI_P_CBE1_
PCI_P_CBE0_
+12V
PCI_P_INTA_
PCI_P_INTG_
PCI_P_INTF_
PCI_P_INTC_
PCI_P_CBE[3:0]_
26,27,29,32
26,27,29,32,55
26,27,29,32
24,26,27,29,32
27,29,32,34,55
l. a
w
w
t
p
INTD#
INTC#
INTB#
INTA#
CBE3#
CBE2#
CBE1#
CBE0#
LOCK#
SERR#
PERR#
FRAME#
TRDY#
STOP#
PAR
REQ64#
ACK64#
IRDY#
GNT#
IDSEL
DEVSEL#
R_B10
R_B14
s
p
o
CONN_PCI
J21
C120HG4A
148062-001
PRSNT1#
PRSNT2#
TDO
TCK
TMS
TDI
TRST#
-12V
+12V
PCIRST#
PCLK
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
REQ#
R_A9
R_A11
+3AUX
SDONE
SBO#
PME#
B20
A20
B21
A22
B23
A23
B24
A25
B27
A28
B29
A29
B30
A31
B32
A32
A44
B45
A46
B47
A47
B48
A49
B52
B53
A54
B55
A55
B56
A57
B58
A58
A9
A11
A14
A40
A41
A19
B18
B1
A1
GND;A12,A13,A18,A24,A30,A35,A37,A42,A48,A56
VDD;A5,A8,A10,A16,A59,A61,A62
VDD;B5,B6,B19,B59,B61,B62
B9
B11
B4
B2
A3
A4
A1
B1
A2
A15
B16
PCI_P_AD31
PCI_P_AD30
PCI_P_AD29
PCI_P_AD28
PCI_P_AD27
PCI_P_AD26
PCI_P_AD25
PCI_P_AD24
PCI_P_AD23
PCI_P_AD22
PCI_P_AD21
PCI_P_AD20
PCI_P_AD19
PCI_P_AD18
PCI_P_AD17
PCI_P_AD16
PCI_P_AD15
PCI_P_AD14
PCI_P_AD13
PCI_P_AD12
PCI_P_AD11
PCI_P_AD10
PCI_P_AD09
PCI_P_AD08
PCI_P_AD07
PCI_P_AD06
PCI_P_AD05
PCI_P_AD04
PCI_P_AD03
PCI_P_AD02
PCI_P_AD01
PCI_P_AD00
Device # : 09h
PCI SLOT 2
m
e
h
c
CONNECTOR TOP VIEW
B49
B52
A52
B62
A62
VDD3_AUX
ALERT_CLK
ALERT_SDA
PCI_PME_
PCI_P_REQ2_
PCI_P_AD[31:00]
VDD3_AUX
A49
NC_PCI_A9_2
NC_PCI_MICS2_
a
it c
c
.
s
26,27,29
41,42,64
26,27,29,32
26,27,29,32
26,27,29,32,49
26,32
27-29,32,34,55
m
o
A61
A62
B61
B52
A53
A52
B53
B48
A49
A48
B49
Bottom side view
B62
-12V
26
PCI_P_TRST_3_
B2
A1
A2
B1
0.01UF
C1215
NC_PCI_P_TDO_3
NC_PCI_P_TCK_3
NC_PCI_P_TMS_3
NC_PCI_P_TDI_3
A50, B50, A51, B51
Key Position
0.01UF
C1216
PCI_PRSNT1_3_
PCI_PRSNT2_3_
A15
B16
PCI_SLT_RST_
PCI_CLK3
27,28,45
4
NEG12V
VDD12
B39
B42
B40
A34
A36
A38
A43
A60
B60
PCI_P_LOCK_
PCI_P_SERR_
PCI_P_PERR_
PCI_P_FRAME_
PCI_P_TRDY_
PCI_P_STOP_
PCI_P_PAR
PCI_P_REQ64_
PCI_P_ACK64_
26-28,32
26-28,32,34,55
26-28,32,55
26-28,32,34,55
26-28,32,34,55
26-28,32,34,55
27,28,32,34,55
26-28
26-28
27,28,41,64
27,28,41
42,48,64
B35
PCI_P_IRDY_
26-28,32,34,55
B10
B14
B8
A7
B7
A6
B26
B33
B44
A52
A17
A26
B37
NC_PCI_R_B10_3
NC_PCI_R_B14_3
PCI_P_CBE3_
PCI_P_CBE2_
PCI_P_CBE1_
PCI_P_CBE0_
+12V
PCI_P_GNT3_
PCI_P_AD26
PCI_P_DEVSEL_
PCI_P_INTC_
PCI_P_INTA_
PCI_P_INTG_
PCI_P_INTF_
PCI_P_CBE[3:0]_
26,32
27-29,32,34,55
26-28,32,34,55
24,26-28,32
26-28,32
26-28,32,55
26-28,32
27,28,32,34,55
l. a
w
w
t
p
INTD#
INTC#
INTB#
INTA#
CBE3#
CBE2#
CBE1#
CBE0#
LOCK#
SERR#
PERR#
FRAME#
TRDY#
STOP#
PAR
REQ64#
ACK64#
IRDY#
GNT#
IDSEL
DEVSEL#
R_B10
R_B14
s
p
o
CONN_PCI
J22
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
B20
A20
B21
A22
B23
A23
B24
A25
B27
A28
B29
A29
B30
A31
B32
A32
A44
B45
A46
B47
A47
B48
A49
B52
B53
A54
B55
A55
B56
A57
B58
A58
C120HG4A
148062-001
PRSNT1#
PRSNT2#
TDO
TCK
TMS
TDI
TRST#
-12V
+12V
PCIRST#
PCLK
REQ#
R_A9
R_A11
+3AUX
SDONE
SBO#
PME#
A9
A11
A14
A40
A41
A19
B18
B1
A1
GND;A12,A13,A18,A24,A30,A35,A37,A42,A48,A56
VDD;A5,A8,A10,A16,A59,A61,A62
VDD;B5,B6,B19,B59,B61,B62
B9
B11
B4
B2
A3
A4
A1
B1
A2
NC_PCI_A9_3
NC_PCI_MICS3_
PCI_P_AD31
PCI_P_AD30
PCI_P_AD29
PCI_P_AD28
PCI_P_AD27
PCI_P_AD26
PCI_P_AD25
PCI_P_AD24
PCI_P_AD23
PCI_P_AD22
PCI_P_AD21
PCI_P_AD20
PCI_P_AD19
PCI_P_AD18
PCI_P_AD17
PCI_P_AD16
PCI_P_AD15
PCI_P_AD14
PCI_P_AD13
PCI_P_AD12
PCI_P_AD11
PCI_P_AD10
PCI_P_AD09
PCI_P_AD08
PCI_P_AD07
PCI_P_AD06
PCI_P_AD05
PCI_P_AD04
PCI_P_AD03
PCI_P_AD02
PCI_P_AD01
PCI_P_AD00
Device # : 0Ah
PCI SLOT 3
m
e
h
c
CONNECTOR TOP VIEW
a
A49
A52
VDD3_AUX
B49
B52
it c
B62
A62
VDD3_AUX
ALERT_CLK
ALERT_SDA
PCI_PME_
PCI_P_REQ3_
PCI_P_AD[31:00]
c
.
s
26-28,41,42,64
26-28,32
26-28,32
26-28,32,49
26,32
27-29,32,34,55
m
o
33
33
33
33
16V
Y5V
80%
S603AT
NI
R284
300
EE_CS
EE_SHCLK
EE_DIN
EE_DOUT
80%
S603AT
CS
SK
DI
DO
U33
93C66
change eeprom
1
2
3
4
CN7
VDD
DC
ORG
GND
8
7
6
5
S1206T
4.7UF
Y5V
C976
0.1UF
278757-002
P/D_NUM=247372-101
1
2
3
4
VDD3_AUX
80%
S603AT
Y5V
Y5V
C974
0.1UF
16V
16V
X7R
0.1UF
C296
16V
Y5V
C962
0.1UF
80%
S603AT
C963
0.1UF
PLACE NEAR PIN 8 OF U42
C973
0.1UF
8
7
6
5
20V
20%
TANTB
10UF
C975
0.1UF
1
2
3
4
CN8
8
7
6
5
278757-002
NIC_I2C
IC
8 Pin
R884
49
32,49
R301
300
NI
R300
8.2K
VDD3_AUX
VCCR
3VAUX_PWRGD
4
23
19
40
36
17
14
12
25
1K
VCCR_2
VCCR_1
VCCP_2
VCCP_1
VCCT_4
VCCT_3
VCCT_2
VCCT_1
VCCA_2
VCCA_1
VCC_2
VCC_1
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1
ADV10
RBIAS100
RBIAS10
TESTEN
22
20
38
33
4
U808
173849-001
SSO48WAT
1K
R1126
AUX_PWROK
VSSR_2
VSSR_1
VSSA_2
VSSA_1
VSSP_2
VSSP_1
PART OF PHY DISABLE
R1127
48
24
18
13
41
21
219333-001
U26
VDD3_AUX;14
CLASS=MISC
74LCX125
NC_PHY_ADV10
PHY_RBIAS_10
PHY_RBIAS_100
549
PHY_TESTEN
619
SIO_GP41
300
check on this GPIO
R299
300
NI
VDD3_AUX
R885
R886
L30
4.7UH
142860-005
S805T
check cnet part #
*
*
RDP
LAN_RXD0
LAN_TXD2
LAN_TXD1
LAN_TXD0
TOUT
ISOL_TCK
ISOL_TEX
ISOL_TI
LILED
ACTLED
SPDLED
LAN_RSTSYNC
LAN_CLK
TDN
TDP
RDN
PHY_TEX
30
34
45
44
43
32
VDD3_AUX
NI
CLK
47
46
37
35
MHZ=25
SM_OSC
EN 1
Y2
112453-075
GND
VCC
X2
X1
LAN_RXD2
LAN_RXD1
R274
LINKLED_
EN_PHY_OSC
300
300
R275
8.2K
VDD3_AUX
PHY_X2
PHY_X1
LAN_RXD2
LAN_RXD1
LAN_RXD0
LAN_TXD2
LAN_TXD1
LAN_TXD0
R238
LAN_RST
NIC_PCICLK
TDN
TDP
ACTLED_
NC_PHY_TOUT
PHY_TI
PHY_TCK
29
26
RDP
RDN
SPEED_100_
28
27
32
31
42
39
11
10
16
15
*
*
33
33
33
33
33
33
R273
300
PHY_GPIO
31
31
31
33
33
31
31
31
31
25MHZ
C1037
NPO
22PF
212066-002
8.2K
R943
Y1
R883
E409
C2HA1A
C1036
NPO
22PF
PHY_ENABLE_
VDD3_AUX
100186-014
Install Jumper to disable PHY
NC;2,3
SXTL4U
HDR1X2
l. a
w
w
t
p
s
p
o
m
e
h
c
a
it c
c
.
s
m
o
49
NI
31,49
SOT23FT
R1098 *
THERM_
NIC AOL Header
VDD3_AUX
AOLHDR_DETECT_
NC_POWER_ALERT
NC_AOLHDR_PWR
ICH_INTRUDE_
AOL_BFAIL_
119922-001
MAGNETICS/RJ45 Conn.
AOL_OS_NB_
Q829
DTC143TKA
VDD3_AUX
139708-001
8.2K
R878
1%
100
1%
INTRUDER_
RDN
RDP
TDN
139708-001
32,47,49
30
30
30
TDP
30
C7HA2A
401517-001
HDR1X7
1
P12
WOL
C1247
0.01UF
I
20%
X7R
DO I STILL NEED A PULLDWN AT SIO2
49
Route These Traces on top layer

Next to GND Layer
keep as short as possible
50 ohm microstrip line
Y5V
4.7UF
I
C1246
VDD_AUX
41,42,64
+3.3V
146737-008
C3HA1N
P410
I
I
C934
C939
22PF
+3.3V
Q828
SOT23FT
119922-002
2.2K
Evently Spaced
Straddle Caps between GND and Analog GND island
FAN_THERM_ICH_
0.1UF
32
RD_
RD+
CT_RX
GND_5
GND_4
CT_TX
TD_
TD+
option for 3COM NIC
JACK12F
TPOINT=OFF
GND;S1,S2
160411-002
160411-002
J7
11
12
10
10K
300
Link Status
AOL_BFAIL_
30
30
30*
31,49
300
VDD3_AUX
R863
ACTLED_
R872
SPEED_100_
(SYSOPT/GP24)
R340
10K
R341
STRAPPING OPTION
NI
NI
VDD3_AUX
Activity
LINKLED_
YELLOW_LED
GREEN_LED
CHECK ON HOW TO CONNECT THIS??
LED
LED
R1099
4.7K
8.2K
1/16W
R1097
300
100
R1096
R879
20K
GREEN_LED
YELLOW_LED
l. a
w
w
t
p
s
p
o
HDR1X3
m
e
h
c
a
it c
c
.
s
m
o
160193-003
+1.8V
150
139708-009
46
36
HLREFA
8,10,26
26,40
26,40
ICH
32
T20
N22
RTCRST_
SPEAKER
4
4
4
M19
P20
D4
ICH_CLK14
ICH_CLK48
ICH_GCLKIN
46
46
SMBDATA
SMBCLK
GPIO11_SMBALERT_
RTCRST_
SPKR
CLK14
CLK48
CLK66
RTCX1
RTCX2
27-29,34,55
26,27
26,28
26,29
26,34
26,55
PCI_P_CBE[3:0]_
27-29,34,55
PCI_P_AD[00:31]
VDD1_8;D10,D2,E5,K19,L19,P5,V9
VDD3;E14,E15,E16,E17,E18,F18,G18
VDD3;H18,J18,P18,R18,R5,T5,U5,V5
VDD3;V6,V7,V8
1_8V_AUX;H5,J5,V14,V15,V16
VDD3_AUX;F5,G5,T18,U18,V17,V18
GND;A1,A10,A2,B1,B10,B2,B3,B9,C2
GND;C3,C4,C9,D5,D6,D7,D8,D9,E6,E7
GND;E8,E9,J10,J11,J12,J13,J14,J9
GND;K10,K11,K12,K13,K14,K9,L10,L11
GND;L12,L13,L14,L9,M10,M11,M12,M13
GND;M14,M9,N10,N11,N12,N13,N14,N9
GND;P10,P11,P12,P13,P14,P9,A21,A22
GND;AA2,AA21,AA22,AB1,AB2,AB21,AB22
GND;AA1,B21,B22,D3,K1
NC=C1,D1,E1,E2
NC=E3,E4,F4,G4,H3,H4,J1,J2
PINOUT PER INTEL BALLOUT REV. 0.32.
Symbol 1 of 2
ICH2
LAD0_FWH0
LAD1_FWH1
LAD2_FWH2
LAD3_FWH3
LFRAME_FWH4
FS0
LDRQ0_
LDRQ1_
V_CPU_IO1
V_CPU_IO2
VBIAS
VCCRTC
V5REF_SUS
HUBREF
V5REF1
V5REF2
AC_RST_
AC_SYNC
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
U34
Y12
W12
AB13
AB12
AB11
AA12
Y13
W13
D12
D13
T21
U21
V19
B4
K2
M20
V22
P19
R19
P21
Y22
W22
X7S
PCI_P_INTH_
PCI_P_INTG_
PCI_P_INTF_
PCI_P_INTE_
PCI_P_INTD_
PCI_P_INTC_
PCI_P_INTB_
PCI_P_INTA_
SER_IRQ
SB_PCI_GNT_
PCI_P_GNT3_
PCI_P_GNT2_
PCI_P_GNT1_
SCSI_GNT_
10K
R283
INTRUDER_
SMLINK0
SMLINK1
TP0
THRM_
SLP_S3_
SLP_S5_
PWROK
PWRBTN_
RI_
RSMRST_
RSM_PWROK
SUSSTAT_
SUSCLK
VRMPWRGD
T19
U19
V20
U20
AA13
W16
AB18
R20
W21
AA17
R21
Y16
Y17
AA18
B15
R277
10K
and AC_SDATA[1:0]
26,34
26,29
26,28
26,27
26,55
49
26,34
26-29
24,26-29
24,26
26
26-29,55
26-29
26
NI
*
*
NI
1%
R1122
32,65-68
X7S
internal pull-down resistors will be enabled on AC_BIT_CLK

VDD3_AUX
if ACLINK shutoff bit in the global control register is set to a 1,
1K
X7R
VRM_PWRGD
NI
R1013
*
300
49
31
39,49
39,49
39,49
39,49
39,49
19,32,45,49,59
3V_PWRGD
26-29
26-29
49
31,47,49
30,49
32,65-68
30
19
49
19,32,45,49,59
49
49
19,49
49
46
46,49
32
32
UNUSED
CPU_SLOW
make these NIs after

proto-1 testing
INTRUDER_
ALERT_CLK
ALERT_SDA
FAN_THERM_ICH_
SLP_S3_
SLP_S5_
3V_PWRGD
PWRBTN_OUT_
SIO_SCI_
3VAUX_PWRGD
R1123
AUX_PWROK
I
300SUS_STAT_
SUSCLK
VRM_PWRGD
LPC_DRQ0_
NC_LPC_DRQ1_
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME_
VBIAS
VBAT_OUT
HLREFA
ICH_5VREF
NC_ACRST_
NC_ACSYNC
NC_BITCLK
NC_ASDOUT
NC_ASDIN
NC_ASDIN1
R278
SCSI_REQ_
PCI_P_REQ1_
PCI_P_REQ2_
PCI_P_REQ3_
SB_PCI_REQ_
GPIO16_GNTA_
GPIO17_GNTB_GNT5_
GPIO0_REQA_
GPIO1_REQB_REQ5_
DEVSEL_
FRAME_
IRDY_
TRDY_
STOP_
PAR
PCICLK
PCIRST_
PLOCK_
SERR_
PERR_
PME_
A20M_
CPUSLP_
FERR_
IGNNE_
INIT_
INTR
NMI
SMI_
STPCLK_
RCIN_
A20GATE
CPUPWRGD
P/D_NUM=168704-103
AA16
AB16
AB17
U22
T22
ICH_RTCX1
ICH_RTCX2
26
26
42
26-29,49
26-29,34,55
26-29,55
ICH_SMBDAT
ICH_SMBCLK
ICH_SMBALERT_
L2
L4
NC_GNTA_
NC_GNT5_
D11
A12
R22
A11
C12
C11
B11
B12
C10
B13
C13
A13
M3
L3
S603AT
LED_PWRDET
NC_REQ5_
R276
1K
NI
.01UF
AB7
V3
W8
V4
W1
W2
W11
AA15
AA7
W7
Y7
Y15
MIN_LINE_WIDTH=010
150
1%
H_A20M_
H_SLP_
H_FERR_
H_IGNNE_
H_INIT_
H_INTR
H_NMI
H_SMI_
H_STPCLK_
KBRST_
A20GATE_
PWRGD_ICH_CPU
S1206T
C280
PCI_P_DEVSEL_
PCI_P_FRAME_
PCI_P_IRDY_
PCI_P_TRDY_
PCI_P_STOP_
PCI_P_PAR
ICH_PCICLK
ICH_RST_
PCI_P_LOCK_
PCI_P_SERR_
PCI_P_PERR_
PCI_PME_
8,10
49
49
8,10
8,10
8,10
26-29,34,55
26-29,34,55
26-29,34,55
26-29,34,55
26-29,34,55
27-29,34,55
4
8,10
8,10
8,10
8,10
8,10
8,10
1UF
1K
C268
R1011
R290
Place this circuit

near ICH
1%
16,39,45,49
26-29
SOD123A
ICH_5VREF
1UF
0.01UF
8.2K
R1027
32
C245
8.2K
R1050
CR17
56
8.2K
R294
SM_DIODE
R247
0.1UF
C243
CBE0_
CBE1_
CBE2_
CBE3_
AA3
AB6
Y8
AA9
PCI_P_CBE0_
PCI_P_CBE1_
PCI_P_CBE2_
PCI_P_CBE3_
REQ0_
REQ1_
REQ2_
REQ3_
REQ4_
R2
R3
T1
AB10
P4
GNT0_
GNT1_
GNT2_
GNT3_
GNT4_
M2
M1
R4
T2
R1
+3.3V
R95
PCI_P_AD00
PCI_P_AD01
PCI_P_AD02
PCI_P_AD03
PCI_P_AD04
PCI_P_AD05
PCI_P_AD06
PCI_P_AD07
PCI_P_AD08
PCI_P_AD09
PCI_P_AD10
PCI_P_AD11
PCI_P_AD12
PCI_P_AD13
PCI_P_AD14
PCI_P_AD15
PCI_P_AD16
PCI_P_AD17
PCI_P_AD18
PCI_P_AD19
PCI_P_AD20
PCI_P_AD21
PCI_P_AD22
PCI_P_AD23
PCI_P_AD24
PCI_P_AD25
PCI_P_AD26
PCI_P_AD27
PCI_P_AD28
PCI_P_AD29
PCI_P_AD30
PCI_P_AD31
AA4
AB4
Y4
W5
W4
Y5
AB3
AA5
AB5
Y3
W6
W3
Y6
Y2
AA6
Y1
V2
AA8
V1
AB8
U4
W9
U3
Y9
U2
AB9
U1
W10
T4
Y10
T3
AA10
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
SERIRQ
PIRQA_
PIRQB_
PIRQC_
PIRQD_
GPIO2_PIRQE_
GPIO3_PIRQF_
GPIO4_PIRQG_
GPIO5_PIRQH_
APICCLK
APICD0
APICD1
N21
P1
P2
P3
N4
N3
N2
N1
M4
N20
P22
N19
8.2K
R309
8.2K
R297
+5V
1UF
301
R296
C236
m
e
h
c
C267
R246
10K
0.1UF
C244
R248
10K
s
p
o
10K
l. a
w
w
t
p
*
R291
it c
c
.
s
m
o
0.01UF
8
7
6
5
278757-002
1
2
3
4
0.1UF
CN801
0.1UF
8
7
6
5
4.7UF
0.01UF
C241
C295
0.1UF
8
7
6
5
1_8V_AUX
0.01UF
C270
+3.3V
0.1UF
C239
JP3 jumper will be installed as default
59
C238
278757-002
1
2
3
4
0.1UF
CN803
0.1UF
*
C279
0.01UF
C269
E49 installed with jumper to enable password.
X7R
C1052
CN802
0.01UF
0.01UF
C240
C242
C991
C276
4.7UF
C990
4.7UF
JUMPER
JP3
0.1UF
C237
0.1UF
8
7
6
5
CN804
1
2
3
4
0.1UF
X7R
16V 20%
278757-002
43
43
CHECK ON SPREAD_
+1.8V
E49
C2HA1A
100186-014
NI
1%
VDD3_AUX
IDE_PD[15:00]
43,44
43,44
43
43
43
43
43
IDE_PA[2:0]
ICH-1: PWRDET went to GPIO5; SCI went to PME
NI
40
49
8
26
42
IDE_PCS1_
IDE_PCS3_
IDE_PDRQ
IDE_PDAK_
IDE_PRD_
IDE_PWR_
IDE_PRDY
IDE_PIRQ14
IDE_PD00
IDE_PD01
IDE_PD02
IDE_PD03
IDE_PD04
IDE_PD05
IDE_PD06
IDE_PD07
IDE_PD08
IDE_PD09
IDE_PD10
IDE_PD11
IDE_PD12
IDE_PD13
IDE_PD14
IDE_PD15
HL_STB
HL_STB_
HL00
HL01
HL02
HL03
HL04
HL05
HL06
HL07
HL08
HL09
HL10
HL11
R1130
MIN_LINE_WIDTH=010
RIMM_SWP
MULT0
MULT1
SCSI_ENABLE
AGP_PME_
SPREAD_
PSWDIS_
LED_HDDET
ICH_PROCHOT_
ICH_GPIO8
NC_GPIO12
SIO_SMI_
I2C_SELECT
NC_GPIO19
0
DBRESET_
HL[11:00]
16
16
26,55
24,26
6,49
17,18,21,22
5
5
R925
40.2
1%
VDD3_AUX
0.01UF
C271
1
2
3
4
4.7UF
ICH
C274
VDD1_8
0.01UF
16,63
C278
+1.8V
HDR1X2
ICH Decoupling
R1120
R1119
3.3V Aux / 1.5V Decoupling for ICH
C233
8.2K
300
15K
0.01UF
C232
16
4.7UF
IDE_PA2
IDE_PA1
IDE_PA0
*
43
G22
F22
G19
G21
G20
F21
H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20
E21
E19
F20
F19
E22
PDDREQ
PDDACK_
PDIOR_
PDIOW_
PIORDY
IRQ14
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDCS1_
PDCS3_
PDA0
PDA1
PDA2
A4
B5
A5
B6
B7
A8
B8
A9
C8
C6
C7
C5
A6
A7
A3
Y11
AA11
Y14
W14
AB15
A15
D14
C14
L1
B14
A14
V21
W15
AB14
AA14
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB_
HLCOMP
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO27
GPIO28
ICH2
U34
PINOUT PER INTEL BALLOUT REV. 0.32.
P/D_NUM=168704-103
Symbol 1 of 2
LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_CLK
LAN_RSTSYNC
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
OC0_
OC1_
OC2_
OC3_
USBP3P
USBP3N
USBP2P
USBP2N
USBP1P
USBP1N
USBP0P
USBP0N
SDDREQ
SDDACK_
SDIOR_
SDIOW_
SIORDY
IRQ15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDCS1_
SDCS3_
SDA0
SDA1
SDA2
F3
F2
F1
LAN_TXD0
LAN_TXD1
LAN_TXD2
G2 LAN_RXD0
G1 LAN_RXD1
H1 LAN_RXD2
30
30
30
30
30
30
NIC_PCICLK
EE_CS
EE_DOUT
EE_DIN
EE_SHCLK
USB3_PLUS
USB3_MIN
USB2_PLUS
USB2_MIN
USB1_PLUS
USB1_MIN
USB0_PLUS
USB0_MIN
IDE_SDRQ
IDE_SDAK_
IDE_SRD_
IDE_SWR_
IDE_SRDY
IDE_SIRQ15
IDE_SD00
IDE_SD01
IDE_SD02
IDE_SD03
IDE_SD04
IDE_SD05
IDE_SD06
IDE_SD07
IDE_SD08
IDE_SD09
IDE_SD10
IDE_SD11
IDE_SD12
IDE_SD13
IDE_SD14
IDE_SD15
K4
K3
J4
J3
G3
H2
30
IDE_SA0
IDE_SA1
IDE_SA2
IDE_SCS1_
IDE_SCS3_
IDE_SA[2:0]
USB0_OC_JCK_
USB1_OC_JCK_
USB2_OC_JCK_
USB3_OC_JCK_
LAN_RST
43
W19
Y20
Y21
W20
AB20
AA20
W18
Y19
AB19
AA19
W17
Y18
B18
B17
D17
C17
A17
C16
D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18
C15
D15
A16
D16
B16
43
43
30
30
30
30
30
54
54
53
53
54
54
54
54
53
53
53
53
43
43
43
43,44
IDE_SD[15:00]
43
43
43,44
l. a
w
w
t
p
s
p
o
m
e
h
c
it c
c
.
s
m
o
R926
30.1
R927
SB_PCICLK
SOUND BLASTER
22
2
19
PCI_P_PAR
PCI_P_AD22
27-29,32,55
27-29,32,34,55
26-29,32,55
84
81
82
86
87
15
16
18
20
21
PCI_P_INTB_
IDE_RST_
SB_PCI_GNT_
SB_PCI_REQ_
PCI_P_FRAME_
PCI_P_IRDY_
PCI_P_TRDY_
PCI_P_STOP_
PCI_P_SERR_
26,32
35,43,45
26,32
26,32
26-29,32,55
26-29,32,55
26-29,32,55
26-29,32,55
26-29,32,55
PCI_P_DEVSEL_
35
23
14
99
PCI_P_CBE0_
PCI_P_CBE1_
PCI_P_CBE2_
PCI_P_CBE3_
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PAR
IDSEL
DEVSEL
INTA#
RST#
GNT#
REQ#
FRAME#
IRDY#
TRDY#
STOP#
SERR#
CBE0#
CBE1#
CBE2#
CBE3#
CLK
GIPO0
GIPO1
GIPO2
GIPO3
JYSTK0
JYSTK1
JYSTK2
JYSTK3
JYSTK4
JYSTK5
JYSTK6
JYSTK7
53
54
55
56
79
78
77
76
73
72
71
70
HARD
180345-001
QF100PT
VDD;37,50,62,74
VDD;12,25,85,100
SDATA_IN.
SDATA_OUT
SYNC
MIDI_OUT
MIDI_IN.
I2S_LCKK_IN
SPDIF/I2S_IN
SPDIF_OUT/BCLK_IN
R_SDA_OUT
61
59
R_SYNC
58
69
68
52
48
49
MIDI_NC
NC_GPIO2
NC_GPIO3
JOYTIME0
JOYTIME1
JOYTIME2
JOYTIME3
JOY4_
JOY5_
+5V
33
33
R352
NET_SPACING_TYPE=10
GND;1,6,11,17,26,
GND;31,36,42,47,51
GND;57,64,67,75,80
GND;83,90,95
XTAL_OUT
XTAL_IN.
XTAL0_BUF
BCLK
66
65
63
60
NC_XTAL_OUT
NC_XTAL_BUF
+5V
10UF
C1152
C383
X7R
0.1UF
C357
SB_XTALIN
SB_BCLK
SB_SDIN
SB_SDOUT
NET_SPACING_TYPE=10
SB_SYNC
NET_SPACING_TYPE=10
NET_SPACING_TYPE=10
NET_SPACING_TYPE=10
R372
m
e
h
c
46
45
44
43
41
40
39
38
34
33
32
30
29
28
27
24
13
10
9
8
7
5
4
3
98
97
96
94
93
92
91
89
t
p
s
p
o
27-29,32,55
27-29,32,55
27-29,32,55
27-29,32,55
PCI_P_AD00
PCI_P_AD01
PCI_P_AD02
PCI_P_AD03
PCI_P_AD04
PCI_P_AD05
PCI_P_AD06
PCI_P_AD07
PCI_P_AD08
PCI_P_AD09
PCI_P_AD10
PCI_P_AD11
PCI_P_AD12
PCI_P_AD13
PCI_P_AD14
PCI_P_AD15
PCI_P_AD16
PCI_P_AD17
PCI_P_AD18
PCI_P_AD19
PCI_P_AD20
PCI_P_AD21
PCI_P_AD22
PCI_P_AD23
PCI_P_AD24
PCI_P_AD25
PCI_P_AD26
PCI_P_AD27
PCI_P_AD28
PCI_P_AD29
PCI_P_AD30
PCI_P_AD31
U48
ES1373
+5V
RN815
PCI_P_AD[00:31]
CHECK_MUTE
1
2
3
4
27-29,32,34,55
36
8
7
6
5
l. a
w
w
8.2K
RN816
1
2
3
4
8
7
6
5
R1112
C1184
X7R
0.1UF
C358
X7R
0.1UF
C355
X7R
0.1UF
it c
10UF
35
35
35
35
35
C382
C380
B
1
X7R
0.1UF
+5V
C381
106127-002
SOT23FT
SPDIF
Q840
CHK_MUTE_
X7R
0.1UF
B
1
X7R
0.1UF
C356
X7R
0.1UF
106127-002
8.2K
Q839
+5V
8.2K
R1149
SOT23FT
1K
36
CHK_MUTE
R1150
NI
Q825
NI
R1131
SOT23FT
110098-001
w
8.2K
c
.
s
m
o
1
2
3
4
1
2
3
4
AUD_AUXR
38
AUD_CDGND
RN26
1
2
3
4
6.8K
114567-024
R4
R3
R2
R1
RNET4C
C346
22PF
NPO
HP_R
MIC_IN
8
7
6
5
LIN_R
LIN_L
220PF
C1158
AUD_CDR
AC97 CODEC
36-38
36
36
Y7
NC;2,3
SXTL4DT
114410-037
34
RN35
R4
R3
R2
R1
RNET4C
1
2
3
4
R1102
1M
SB_XTALIN
22PF
NPO
C347
C1259
1UF
33
1UF
1UF
1UF
C1234
X7R
X7R
C1236
X7R
C1235
R361
C370
AUD_CD2R
AUD_CD2GND
AUD_CD2L
20
19
18
XTAL_OUT
1000PF
C340
30
AFLT2
X7R
29
13
12
22
21
AFLT1
NC_PHONE_IN
NC_PC_BEEP
NC_MIC2
AUD_MIC_1
15
AUD_AUX2R
17
16
24
23
14
VREFOUT_L
VREFOUT_L
AUD_LIN_4R
AUD_LIN_4L
AUD_AUX2L
XTAL_IN2
X7S
C371
35
35
X7R
C368
X7R
X7R
1000PF
C366
1UF
1UF
1UF
129720-001
119917-113
10PF
X7R
X7R
C1233
AUD_CD1R
AUD_CD1L
1UF
C1160
1
2
3
4
6.8K
114567-024
6.8K
114567-024
R4
R3
R2
R1
RNET4C
RN36
220PF
C1161
8
7
6
5
139708-236
AUD_CD1GND
1%
NET_SPACING_TYPE=10
AUD_AUX1R
NET_SPACING_TYPE=10
8
7
6
5
3.4K
3.4K
AUD_AUX1L
220PF
C1159
R1069
R1070
NET_SPACING_TYPE=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10
AUD_AUXL
241895-005
PIN4
PIN3
PIN2
PIN1
P11
C4HA1AR
NI
C4HA1Z
148243-011
P408
241895-004
PIN4
PIN3
PIN2
PIN1
P7
C4HA1AP
P7 adn P701 will occupy the same space
NEW
OLD
CDROM IN
CDROM IN
AUX IN
l. a
w
w
CD_R
CD_GND
CD_L
t
p
U51
STA9721
VIDEO_R
VIDEO_L
LINE_IN_R
LINE_IN_L
AC97_SIGMATEL_REV1.0
s
p
o
HARD
QF48CT
192162-001
NC=40,39,41
NC=43,44,45
NC=46,47,48
GND;4,7,26,42
check part number for Crystal
AFLT2
AFLT1
XTL_OUT
XTL_IN
PHONE_IN
PC_BEEP
MIC2
MIC1
AUX_R
AUX_L
VREFOUT
(2.2V)
AVDD1
AVDD2
VDD2
VDD1
AFILT3/CAP1
CAP2
M_AFILT/CAP4
M_VREG_CAP3
MONO_OUT
LINE_OUT_R
LINE_OUT_L
RESET
SDATA_OUT
SDATA_IN
SYNC
BIT_CLK
31
32
34
33
37
36
35
11
10
28
25
MIN_LINE_WIDTH=015
X7R
10UF
C345
NC_CAP1
REFFLT
X7R
1UF
C1202
27
X7R
0.1UF
C1203
AC97_REFFLT
126653-015
SB_SDOUT
SB_SDIN
SB_SYNC
SB_BCLK
0
119919-001
R1175
X7R
0.1UF
C341
NI
C337
0.01UF
X7R
0.1UF
NI
X7R
C339
LINE_OUT_R
LINE_OUT_L
IDE_RST_
35
X7R
1UF
C1201
X7R
0.1UF
C343
+5V
VREFOUT_L
X7R
0.1UF
C344
AC97_FILT_L
AC97_CX3D
AC97_RX3D
R371
33
NET_SPACING_TYPE=10
MIN_LINE_WIDTH=015
R1103
33
NET_SPACING_TYPE=10
NC_MONO_OUT
COD_SD_IN
129621-018
38
COD_BCLK
m
e
h
c
it c
c
.
s
X7R
0.1UF
C369
C338
1UF
X7S
37
37
AVDD
NI
37
1000PF
X7R
C1200
AUD_VREF
34,43,45
34
34
34
34
m
o
AUDJACKB3
SARIGHT
SALEFT
20K
R1152
20K
R1151
20K
R1105
20K
R354
119919-121
R358
10K
NI
NI
C365
34
36
35
35
38
35,37,38
34,36
37,38
INTERNAL SPKR & JACK
This is for internal Speaker/Headphone detection
WHen headphone jack is open, the HP_SENSE pin is high
MIC_IN2
HP_R
CHECK_MUTE
HP_L
SPDIF
AUDJACKB3
LIN_R
LIN_L
When a cable is plugged into the headphone jack, the HP_SENSE is grounded
36
37
37
100K
PC_SPKR1
296166-004
0.1UF
0.1UF
PC_SPKR2
20K
R353
107352-034
NI
L23
3900PF
X7S
B Q92_1
C935
300
2N2222
Q832
5%
R355
5.1K
R359
AVDD
C1238
33UF
AMP_IN_R
SPDIF_1
6.3V
TANTCA
20%
C362
.01UF
AMP_IN
AUD_SPK_VOL
126653-015
1UF
C361
109764-050
34,36
1%
R864
X7R
220PF
C915
300
L24
MIN_LINE_WIDTH=30
X7R
220PF
C917
374
X7R
S603AT
20%
NET_SPACING_TYPE=15
CHECK_MUTE
NET_SPACING_TYPE=15
MIN_LINE_WIDTH=30
100K
NI
R360
51.1K
1%
R356
SPEAKER
X7R
220PF
C916
X7R
220PF
C933
0
119919-001
R1153
U54
OUT-
OUT+
GND;1,2,3,8,9,10,11
GND;12,13,16,18,19,20
NI
TDA7056AT
VC
VI
168822-001
+12V
C360
0.1UF
X7R
51.1K
R842
38
MIC_IN3
NC_AUDJACK
NC_AUDJACKB3
AVDD
MIN_LINE_WIDTH=30
SPK_OUTM
MIN_LINE_WIDTH=30
SPK_OUTP
119919-118
139708-184
m
e
h
c
32
C364
R357
15K
S1206T
129890-008
C1157
2.2UF
X7R
P6
C2HA1L
P1
P2
138312-001
J83
MIC
122721-004
GND;A1,S1,S2,S3,S4
A5
A4
A3
A2
B5
B4
B3
B2
C5
C4
C3
C2
check part # and shape
RIght angle:144742-001
Present Zurich has 138312-001
C1208
220UF
SCAP406A
20% 16V
119949-006
1K
R367
100.0K
s
p
o
1K
SIG_GND
R841
l. a
w
w
t
p
1%
PWR_GND
R862
w
VCC
it c
c
.
s
HEADPHONE
LINE IN
m
o
35
AVDD
1.0 UF
C378
NI
119919-001
0
R1145
R366
126653-015
296166-004
S603AT
.1 UF
NI
C1263
139708-184
51.1K
1%
R364
(Fo = 16 Hz)
139708-184
51.1K
1%
AUD_HDP_3RN
S1206T
10%
1.0 UF
C373
MIN_LINE_WIDTH=015
MIN_LINE_WIDTH=015
NET_SPACING_TYPE=10
NET_SPACING_TYPE=10
AUD_HDP_3LN
139708-027
R365
119917-121
COG
47PF
C376
MIN_LINE_WIDTH=015
(Fo = 80 Hz)
B_N
B_P
A_P
B_O 7
A_O 1
0.1UF
10%
C1187
*
NET_SPACING_TYPE=10
47PF
139708-027
R362
100K
COG
119917-121
NET_SPACING_TYPE=10
MIN_LINE_WIDTH=015
GND
C377
SO8T
A_N
TDA1308T
AVDD
214406-001
U53
100K
NI
220UF
C1261
I
S603AT
75
C1232
100UF
119949-010
SCAP327A
NI
S603AT
121808-129
220PF
C1258
HP_LR
S603AT
R1134
1K
75
R1148
220PF
C1257
I
119919-063
R1147
119949-006
SCAP406A
SALEFT
121808-129
38
HP_LL
SCAP327A
25V
100UF
C1231
25V
220UF
C1262
119949-010
AVDD
NI
AUD_HDP_3RNL
R1168
6.19K
139708-231
AUD_VREF
204432-004
35
AUD_HDP_4LN
R1167
6.19K
NI
139708-231
119919-001
R1146
1.0 UF
HEADPHONE AMP
NET_SPACING_TYPE=10
MIN_LINE_WIDTH=015
LINE_OUT_R
NET_SPACING_TYPE=10
LINE_OUT_L
204432-004
NI
C1255
S603AT
R1133
1K
SARIGHT
NET_SPACING_TYPE=10
MIN_LINE_WIDTH=015
S603AT
R1138 0
NI
Y5V
HP_RIGHT
HP_LEFT
36
4.7UF
S1206T
129621-017
C1243
R1136
470K
S603AT
119919-154
*
+12V
NI
R1135
0
S603AT
NI
36
S603AT
Q834
MUTE
caps from charging up.

from an audio standpoint
these also prevent the
38
HP_R
NET_SPACING_TYPE=20
HP_L
NET_SPACING_TYPE=20
mute for the 1373
1k pulldowns to generate
2N7002
107816-002
2N7002
107816-002
Q833
R1137
35
*
*
m
e
h
c
*
l. a
w
w
t
p
s
p
o
*
it c
c
.
s
m
o
35,36,38
36,38
36
MIC_IN3
LMV324
4.7UF
Y5V
S603AT
C1244
119919-133
AVDD
AVDD;4
GND;11
R1128
62K
SOT23FT
110758-001
CR803
334148-001
U461
AVDD;4
GND;11
U467
R1121
+12V
220PF
C918
2.2K
R844
2.2K
62K
R1129
S603AT
1UF
C920
NI
2.2K
R845
MUTE_E
S1206T
129720-001
S1206T
4.7UF
Y5V
C1245
MUTE_BASE
10%
S603AT
50V
0.1UF
X7R
C328
S1206T
106147-547
119919-133
MUTE_DELAY
AUDIO REGULATOR /MIC
NI
LMV324
334148-001
NI
NI
AVDD;4
GND;11
U4614
36
38
30.1K
R1106
30.1K
R1082
REFV
38
S603AT
C1207
2
1
100UF
C1206
Place caps near regulator
.01UF
+12V
110098-002
NI
25V
20%
CAP100A
AUDIO REGULATOR
NC;4,5
OUT
COM
GND;3,6,7
IN
107352-034
NI
300
L25
C1186
MC2A
35-37
36,37
HP_L
HP_R
1/16W
2.2K
20%
*
*
S603AT
C1189
.01UF
MC2A_R
R325
10K
U4_9
NI
MIN_LINE_WIDTH=30
NI
NI
Q836
2.2K
1/16W
NI
S603AT
MUTE
0
R1139
.01UF
NI
139708-181
97.6K
R1081
56PF
C1185
S603AT
C363
37
ANTIPOP CKT
it c
Q837
SOT23FT
DTC123TKA
119922-002
E 3
NI
LMV324
SO14T
AVDD;4
GND;11
U46
334148-001
10
S603AT
C375
.01UF
R1140
Place 2 caps. near CODEC, the rest near op amps.
WARNING: If deleting GNDA, change

all analog component GNDs also,
like LMV324, MC14066B, etc.
NI
25V
CAP100A
100UF
C1188
Place caps near regulator
Layout Guideline: MIC_IN should be routed on third layer and should have atleast 10 mil trace width
It should have ground trace on either side. SAme for LINE_IN traces
SOT23FT
DTC123TKA
119922-002
X7R
.22UF
S1206T
R843
USE THE AMPLIFIER IF CODEC IS FAR FROM THE JACK
MUTE_C
220PF
C919
NET_SPACING_TYPE=15
MIN_LINE_WIDTH=30
SOT23FT
Q835
MIC_IN2
REFV
4.7UF
Y5V
C1205
LM78L05
114671-002
U47
LMV324
334148-001
13
AVDD
12
m
e
h
c
*
l. a
w
w
t
p
s
p
o
*
10%
MIC_IN
.01UF
AVDD
S603AT
C367
AVDD
Place near Audio jacks
NI
1UF
C329
S603AT
C342
.01UF
MIN_LINE_WIDTH=30
50V
Y5V
S603AT
C374
.01UF
c
.
s
m
o
35
37
.01UF
.01UF
NC_E1_1
R1113
R350
JP2
2-3 UNLOCK
1-2 LOCK
C3HA1A
TPOINT=OFF
PROTO
TOP BLOCK LOCK
PROTO
NI
JUMPER
4.7K
300
24
31
29
ICH_RST_
FWH_IC
FWH_TBL_
FWH_PCICLK
FWH_RST_
FWH_WP_
FWH
16,32,45,49
49
49
39
39
39
CLK
INIT_
RST_
IC
TBL_
WP_
(I)
9
ID3
10
ID2
11
ID1
12
ID0
FWH4
FWH_ID3
FWH_ID2
FWH_ID1
FWH_ID0
4.7K
R369
39
17
FWH3
15
FWH2
14
FWH1
13
FWH0
NI
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
Is this pullup needed?
32,49
32,49
32,49
32,49
+3.3V
+3.3V
23
P59
C379
LPC_FRAME_
C351
.01UF
32,49
Decoupling pins(25, 27, 32)
S603AT
121808-349
C352
XU15
(I)
(I)
(I)
(I)
(I)
(I)
PCSK32T
FGPI4
FGPI3
FGPI2
FGPI1
FGPI0
NC1
NC2
NC3
NC4
NC5
GNDA
114409-001
(I)
(I)
(I)
(I)
(I)
(I)
VPP
FIRMWARE HUB SOCKET

BLANK ROM=355712-020
(I)
(I)
(IO)
(IO)
(IO)
(IO)
(I)
FWH
NI
GND;16,26
VDD3;25,27,32
+3.3V
NC_FWH_GPI4
NC_FWH_GPI3
NC_FWH_GPI2
NC_FWH_GPI1
FAN_SENSE
NC_U15_18
NC_U15_19
NC_U15_20
NC_U15_21
NC_U15_22
18
19
20
21
22
R1118 *
NI
R370
R1115
BSRST_
28
NI
300
300
300
FWH_ID3
FWH_ID2
39
39
8.2K
R1117
47
+12V
NI
C2HA1A
100186-014
E26
FWH_ID1
FWH_ID0
2N7002
2N7002
107816-002
Q830
NOTE: The boot device must be ID 0000.

All other LPC memory devices should
sequentially count up by 1.
300
R1116
R1087
39
39
300
R1114
NI
+3.3V
Bottomside Testpoint for factory

boot block override
355712-030 for 8MB
355712-020 for 4MB
+3.3V
30
3
4
5
6
33
RN814
1
2
3
4
t
p
s
p
o
m
e
h
c
it c
8
7
6
5
l. a
w
w
HDR1X2
c
.
s
107816-002
GATE
Q831
m
o
+12V
4.7K
R368
+3.3V
33
I2C_SELECT
High = RDRAM, SDRAM
Low = CPUs, TAFI
.01UF
S603AT
+3.3V
26,32
26,32
107816-002
Q813
S 3
12
8
VDD3;14
GND;7
13
11
VDD3;14
GND;7
U35
74CBT3125
10
U35
74CBT3125
4 VDD3;14
GND;7
U35
6
74CBT3125
m
e
h
c
SOT23FT
3
1 VDD3;14
GND;7
U35
74CBT3125
114567-005
+3.3V
R4
ICH_SMBCLK
ICH_SMBDAT
1
G
D 2
2N7002A
R3
1
2
3
4
I2C SELECT CONTROL
I2C_SELECT
C246
+3.3V
RNET4C
R2
TAFI
SEC PROC THERMAL
SEC PROC E2PROM
PRI PROC THERMAL
PRO PROC e2PROM
PROC
CHB RIMM2
CHB RIMM1
A0
A1
A2
R1
CHA RIMM2
CHA RIMM1
MEMORY
t
p
s
p
o
R249
4.7K
l. a
w
w
8
7
6
5
RN23
8.2K
it c
SMBCLK
8,10,47
8,10,47
17,18,21,22
MEM_SMBCLK
SMBDAT
17,18,21,22
MEM_SMBDAT
c
.
s
m
o
P/S CONNECTOR
14
20
+3.3V4
-12V
TPOINT=OFF
C24HF2A
15
17
18
19
GND4
GND3
GND2
GND1
10
+12VIO2
GND5
23
3.3SENSE
Bottom View
16
24
12
ON/STBY
11
FAN_SINK
FAN_CMD
FAN_OFF
+3.3VAUX
+5VAUX
22
GND7
+12VIO1
13
21
GND6
241306-013
+5V3
+5V4
AUX_RTN
12
+3.3V2
+3.3V1
+3.3V3
PS24PIN
P1
+3.3V
Pinout
13
24
POWER SUPPLY
CONNECTOR
+5V
VDD_AUX
VDD3_AUX
+12V
-12V
+3.3V
NI
MIN_LINE_WIDTH=25
NI
109764-057 1
10UF
C869 2
-12V
+5V
PS_FAN1_OFF_
VDD3_AUX
VDD_AUX
VDD12
119919-112
8.2K
R814
NEG12V
VDD3
VDD12
45
R824
27-29,64
60,63,64
27-29,42,48,64
G
2
3 S
1 D
+5V
2.2K
119919-098
R1170
SOT23FT
243175-001
JFET_NCH
Q800
10
106146-042
+3.3V
G
2
This circuit is used to bleed off 5.0V & 3.3V
2.2K
119919-098
R819
106146-042
10
R1169
10
106146-042
1 D
3 S
SOT23FT
243175-001
JFET_NCH
Q843
+3.3V
119919-001
PS_FAN_OFF_
NI
Per Merle, Fan sink can be left floating.
47
R813
26-29,42,64
31,42,64
Per Merle, 3.3V Sense can be connected directly to 3.3V at Connector
PS_ON
PS_FAN_SINK
PS_FAN_SPD
R805
134244-038
S2010T
36
R1171
*
134244-038
S2010T
36
R1172
49
C842
*
134244-038
S2010T
36
R1173
12_PROC
134244-038
S2010T
36
C6HF2B
P1
P2
P3
P4
P5
P6
CONN6
241306-012
1
2
3
4
5
6
129621-026
R1174
1
22UF
l. a
w
w
t
p
s
p
o
m
e
h
c
it c
c
.
s
m
o
P2
LED TEST
NEED TO UPDATE
Missing lens
Failures Not Detected
Open LED
Broken Led cable
Unsoldered pin
Unseated connector
Bent pin
Broken VCC trace
Shorted connector
Shorted LED/cable
Defective transistors
Failures Detected
VDD12
VDD_AUX
VDD3_AUX
LED_HD_
27-29,41,48,64
31,41,64
26-29,41,64
44
49
Off
Off
Red
Red
Green
Green
Off
Off
Off
Off
Red
Red
Off
Off
Green
Green
PWRBTN_IN_
+12V
VDD_AUX
VDD3_AUX
49
49
49
GPO
GPO from SIO
LED_PWRBLINK
GPO from SIO
LED_TEST
129621-017
LED_PWRGRN
R940
8.2K
VDD3_AUX
C997
300
R942
300
R941
VDD_AUX
l. a
w
w
4.7UF
*
*
300
R1035
t
p
HDD/PWR LEDs
300
R1036
S805T
129633-001
C996
.1UF
Q820
s
p
o
+5V
119922-002
SOT23FT
NPN
Q819
2.2K
SOT23FT
NPN
SOT23FT
119922-002
SOT23FT
2.2K
2.2K
15K
R305
4.7K
R306
+5V
LED_PS_CATHODE
LED_PS_ANODE
R1052
SCSI_A_LED_
LED_HD_ANODE
R1034
33
106146-063
75
R1053
m
e
h
c
119922-002
SOT23FT
Q821
44
2.2K
it c
KEY
11
10
SO14T
12
13
14
LM339
+5V
109322-001
10
11
U39
100186-051
P5
C11HA1C
c
.
s
8.2K
R307
+3.3V
8.2K
R304
LED_PWRDET
LED_HDDET
NC_LM339_2
+3.3V
NC_RISER_DET1
m
o
32
33
IDE_PRDY
33
IDE_RST_
RN11
RN11
RN12
RN12
RN13
RN14
RN14
RN14
RN14
RN13
RN13
RN13
RN12
RN12
RN11
RN11
33
IDE_PDRQ
IDE_PIRQ14
33,44
IDE_PDAK_
34,35,43,45
IDE_PD15
IDE_PD14
IDE_PD13
IDE_PD12
IDE_PD11
IDE_PD10
IDE_PD09
IDE_PD08
IDE_PD07
IDE_PD06
IDE_PD05
IDE_PD04
IDE_PD03
IDE_PD02
IDE_PD01
IDE_PD00
IDE CONNECTORS
33
33
33
33
33,44
33
33
33
33
33
33
33
33
33
33
33
33
R964
4.7K
4
1
3
2
3
4
3
1
2
1
2
4
1
4
2
3
5
8
6
7
6
5
6
8
7
8
7
5
8
5
7
6
R962
33
35
23
25
IDE_PA0
IDE_PWR_
IDE_PRD_
33
33
33
33
NI
0.01UF
Z5U
150PF
C1035
R_IRQ14
21
31
29
R_IDE_DRQ
37
38
IDE_R_PDAK_
IDE_PCS1_
IDE_PCS3_
NPO
33
R961
8.2K
R960
R965
33
IDE_PA1
33
36
RP_IDE_RST_
27
R_IDE_RDY
IDE_PA2
33
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
HDV_CONN
P20
IO16_
PRIMARY IDE
(Hard Disk)
18
16
14
12
10
8
6
4
3
5
7
9
11
13
15
17
33
C1034
+3.3V
R963
33 IDE_PD15_R
33
IDE_PD14_R
33 IDE_PD13_R
IDE_PD12_R
33
IDE_PD11_R
33
IDE_PD10_R
33
IDE_PD09_R
33
33
IDE_PD08_R
IDE_PD07_R
33
IDE_PD06_R
33
33
IDE_PD05_R
IDE_PD04_R
33
33
IDE_PD03_R
33
IDE_PD02_R
33
IDE_PD01_R
33
IDE_PD00_R
R1015
114567-001
+3.3V
32
+5V
NC_PIO16_
C40HC2B
107114-004
IRQ
DRQ
DAK_
CS1FX_
CS3FX_
RESDRV_
IOR_
IOW_
A0
A1
A2
IOCHRDY
DASP_
PDIAG
39
34
R959
PHD_LED_
IDE_P80PIN_
100K
Y5V
C1033
33
33
33
33
33
44
49
G40
G30
G26
G24
G22
G19
G2
ALE
40
30
26
24
22
19
2
28
0.047UF
33
33
33
33
33
33
33
33
33
33
33,44
33
IDE_SD15
IDE_SD14
IDE_SD13
IDE_SD12
IDE_SD11
IDE_SD10
IDE_SD09
IDE_SD08
IDE_SD07
IDE_SD06
IDE_SD05
IDE_SD04
IDE_SD03
IDE_SD02
IDE_SD01
IDE_SD00
IDE_SRDY
R937
4.7K
+3.3V
2
3
2
3
2
3
2
3
4
1
4
1
4
1
4
1
+3.3V
RN7
RN7
RN8
RN8
RN9
RN9
RN10
RN10
RN10
RN10
RN9
RN9
RN8
RN8
RN7
RN7
114567-001
NET_SPACING_TYPE=10
MIN_LINE_WIDTH=5
33
IDE_SDRQ
IDE_SDAK_
IDE_RST_
IDE_SIRQ15
33,44
33
34,35,43,45
7
6
7
6
7
6
7
6
5
8
5
8
5
8
5
8
R939
R936
33
R1014
0
R938
R934
R935
8.2K
NPO
C994
150PF
l. a
w
w
t
p
s
p
o
m
e
h
c
IDE_SA0
IDE_SWR_
IDE_SRD_
33
33
33
33
RS_IDE_DRQ
IDE_R_SDAK_
IDE_SCS1_
IDE_SCS3_
RS_IDE_RST_
IDE_SA1
33
33
IDE_SA2
RS_IDE_RDY
R_IDE_SD15
R_IDE_SD14
R_IDE_SD13
R_IDE_SD12
R_IDE_SD11
R_IDE_SD10
R_IDE_SD09
R_IDE_SD08
R_IDE_SD07
R_IDE_SD06
R_IDE_SD05
R_IDE_SD04
R_IDE_SD03
R_IDE_SD02
R_IDE_SD01
R_IDE_SD00
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
a
33
NI
0.01UF
Z5U
C995
R_IRQ15
it c
31
21
29
37
38
25
23
35
33
36
27
18
16
14
12
10
8
6
4
3
5
7
9
11
13
15
17
HDV_CONN
C40HC2B
107114-004
IRQ
DRQ
DAK_
CS1FX_
CS3FX_
RESDRV_
IOR_
IOW_
A0
A1
A2
IOCHRDY
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
P21
G40
G30
G26
G24
G22
G19
G2
ALE
DASP_
PDIAG
IO16_
40
30
26
24
22
19
2
28
39
34
32
SECONDARY IDE
(CD ROM)
c
.
s
R933
100K
19
KEY
Pinout
TOP
19
39
49
BOTTOM
44
0.047UF
Y5V
C223
39
40
SHD_LED_
IDE_S80PIN_
NC_SIO16_
+5V
m
o
40
KEY
R245 *
IDE TERMINATIONS
NI
5.6K
R242
NI
5.6K
NI
150PF
NPO
C235
NI
1%
100
R244
R243
8.2K
NI
33,43
IDE_PD07
NI
150PF
R279
8.2K
NI
NPO
C234
NI
1%
100
R241
t
p
43
42
55
43
PHD_LED_
R1031
1K
20K
R1030 *
+5V
s
p
o
IDE_PDRQ
33,43
33,43
IDE_SD07
SCSI_A_LED_
AIC7892_LED_
SHD_LED_
1K
R1028
1K
R1033
1K
R931
IDE_SDRQ
33,43
l. a
w
w
w
4
R932 *
20K
20K
R1029
20K
R1032
m
e
h
c
SOT23FT
110098-001
Q815
a
it c
Q814
SOT23FT
110098-001
SOT23FT
110098-001
Q812
LED_HD_
110098-001
Q816
SOT23FT
c
.
s
m
o
DSRC
DPRC
42
R311
NI
R310
NI
PS_ON & RESET CKT
3V_PWRGD
SIO_AGP_RST_
ICH_RST_
SIO_PCI_RST_
19,32,49,59
49
16,32,39,49
49
49
PS_ON_SIO
4.7K
Q7
119925-001
DTA143TK
106146-077
R314
300
2
4
6
8
11
13
15
17
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
R315
300
2.2K
R313
Check in Proto-1, if we can do away with this part
Changing this signal to

open drain in SIO?
U49
1
VDD_AUX;5
*
R1100
300
7SZ125
347910-010
U37
G2_
SO20WT
18
16
14
12
9
7
5
3
106146-077
243159-001
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
G1_
74LCX244
VDD3;20
19
l. a
w
w
4
t
p
8.2K
R1101 *
VDD_AUX
NI
s
p
o
PS_ON
1
B
Q6
2.2K
R312
8.2K
R303
+3.3V
NI
PS_ON to power supply should be 5v 6ma sink/source.
SIO PS_ON is 3.3v 8ma sink, 4ma source.
41
m
e
h
c
4.7K
119925-001
DTA143TK
.01UF
S603AT
C970
*
+3.3V
R347
300
it c
VDD;5
2
1
7SZ125
347910-010
U50
AGP_RST_
+5V
8.2K
R346
PCI_SLT_RST_
PCI_INT_RST_
c
.
s
m
o
24
27-29
55
IDE_RST_
C
34,35,43
4 RTC_CLR_CMOS
119919-138
MIN_LINE_WIDTH=015
SOD123A
CR24
160193-003
LL101
BT1
BATT_IN
NI
CR26
LL101
160193-003
SOD123A
+3.3V
166899-001
NC;3
SMTU2032
SBAT2DT
129694-002
3.0V
Surface Mount
Coin Cell Socket
XBT1
C333
.1UF
296166-002
S603AT
R1080
1K
LL101
VCC
CR25
Y5
CLK
S805T
129633-001
C334
.1UF
160193-003
SOD123A
2 LL101
VDD3_AUX
312317-101
SXTL4V
NI
32.768KHZ
SM_OSC
GND
NC 1
NC_OSC_1
Y4
119917-116
18PF
1%
COG
C1096
SXTL4BT
NC;2,3
4
I
114476-002
10M
I
R1012
C265
X7R
.047UF
S805T
114569-157
32.768KHZ
10M
I
R289
MIN_LINE_WIDTH=015
VBIAS1
MIN_LINE_WIDTH=015
R280
1K
BATTERY & RTC OSC.
Black Jumper without tab

White Jumper without tab
Black Jumper with tab
Green Jumper with tab
P4
100K
S603AT
m
e
h
c
101521-001
101521-002
199698-001
199698-002
OTHER JUMPER PART NUMBERS:
SW4K
194113-002
P3
P2
BAT2D
129694-013
XBT2
NI
LITHIUM
NC_SW50_3
P1
PB_SWITCH
SW2
.1UF
2
2
NC_SW50_1
CLEAR CMOS
X7R
C266
S805T
129633-001
R282
Detect presence of
switch here.
RTCRST_
32
s
p
o
I
t
p
O
2
*
l. a
w
w
*
*
w
*
it c
10M
ICH_RTCX2
COG
C1053
119917-116
1%
for component
availability.
32,49
R288
32
32
Resistor ( >60 M) for ICH ERR#76
ICH_RTCX1
VBAT_OUT
Dual Footprint
NI
18PF
MIN_LINE_WIDTH=015
changed cap to 0.047uf per ICH#76
c
.
s
m
o
119919-169
NI
2M
R287
VBIAS
32
47
S603AT
FAN_SPD
+3.3V
119919-112
8.2K
R1156
R852
4.7K
R181
NI
+12V
FAN CONTROL
+3.3V
C930
.01UF
47
FAN_SPD
S603AT
C932
.01UF
+3.3V
A0
U25
MAX517
2
SMBDAT
3
SMBCLK
GND
PFAN3
104074-001
SOT23FT
190098-001
OUT0
VCC
Q802
+12V
PS_FAN_SPD
-12V
PFAN2
300
NI
R848
R851
4.7K
SOT23FT
104074-001
Q804
R850
4.7K
PFAN1
+12V
Q803
387329-001
D2PAKB
41
R849
12K
t
p
Vout=(R1337/R1338) Vin
PFAN4
+12V
39
R840
4.7K
SMBDAT
SMBCLK
FAN_SENSE
CR8
3.0K
R820
R821
8.2K
8,10,40
8,10,40
m
e
h
c
Q82 can provide only 0.9A. Also, the power

dissipation will be an issue (6V*0.9A=5.4W)Q82<0.5W
3 S
S603AT
C931
.01UF
-12V
+12V
l. a
w
w
s
p
o
w
4 D
KEY
31,32,49
INTRUDER_
Chassis
Fan Header
C4HA1AF
105607-003
HDR1X4_K1
P8
E28
C1HA1J
Security
Hood Switch
HDR1X2
a
it c
c
.
s
TPOINT=OFF
105607-004
m
o
X7R
C336
0.01UF
SIO2 POWER CKT
27-29,41,42,64
X7R
20%
NI
C1156
0.01UF
NC_U27_3
SIO_12V
SOT23FT
114543-001
NI
GND
RESET
CR23
312071-002
MR
VCC
CYA OPTION FOR SIO2
U40
NI
49
U27_2
6
5
16V
+80/-20%
S603AT
C307
0.1UF
Y5V
NC_U26_3
+5V
X7R
20%
NI
C323
0.01UF
296166-004
NI
U36
312071-001
MR
VCC
CYA OPTION FOR SIO2
s
p
o
GND
RESET
m
e
h
c
VDD12
C1151
0.1UF
Y5V
296166-004
+80/-20%
S603AT
16V
+3.3V
7
3
NI
+12V
NI
SOT23FT
110758-001
CR22
8.2K
2
R1079
2
R1078
13K
1.78K
+5V
249
t
p
NC_CR_3
R1058
2
l. a
w
w
0
2
w
R1059
R1060
a
it c
c
.
s
NI
10%
0.1UF
16V
X7R
296166-004
C324
SIO_5V
m
o
49
+3.3V
49
49
49
49
31,32,47
10,12,49
32,46
PWRBTN_IN_
PWRBTN_OUT_
+3.3V
INTRUDER_
SKT_OCC_PRI_
45
R1176
I
R1089
21
22
23
24
25
26
27
28
30
31
46
15
7
11
16V
X7S
107
109
SIO_5V
SIO_12V
VDD3AUX_SIO
2
3
1
10
13
12
55
56
74
75
76
77
78
79
14
111
4
5
108
110
16
20
1UF
48
48
49
8.2K
52
+3.3V
8.2K
C1183
+3.3V
LAD0
LAD1
LAD2
LAD3
LFRAME_
LDRQ_
PCI_RESET_
LPCPD_
PCI_CLK
SER_IRQ
0
R1093
8.2K
R348
8.2K
0 NI
R1092
R349
I
NI
5VIN
12VIN
AVSS
VBAT
VTR
VDD3_AUX
PDS_EN_GP85
PS_ON_GP67
SLP_S3_GP63
SLP_S5_GP64
PWRBTN_IN_GP62
PWRBTN_OUT_GP66
BLINK_GR_GP31
COLOR_GP30
GP34_IRRX2
GP35_IRTX2
KDAT
KCLK
MDAT
MCLK
KBDRST_
A20M
IO_PME_GP42
IO_SMI_GP46
PWRGOODA
RSMRST_
MR_
PWRGOODB
CLKI32
CLOCKI
52
LPC47B35X
GND;6,32,57,87,99
PKG_TYPE=QF128BT
167986-003
U44
ISA_IRQ9_PU
R211
8.2K
PIN49SIO2
INIT_
SLCTIN_
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK_
ERROR_
ALF_
STROBE_
GP40_DRVDEN0
GP41_DRVDEN1_IOCHCK_
MTR0_
DSKCHG_
DS0_
DIR_
STEP_
WDATA_
WGATE_
HDSEL_
INDEX_
TRK0_
WRTPRT_
RDATA_
GP36_MTR1_
GP37_DS1_
60
61
62
63
64
65
66
67
68
69
70
71
72
73
58
59
81
82
83
84
85
86
88
89
90
91
92
93
94
95
96
97
98
123
124
125
126
127
128
120
122
112
113
114
115
116
117
118
119
0 I
R333
RXD1
TXD1
DSR1_
RTS1_
CTS1_
DTR1_
RI1_
DCD1_
NI
+3.3V
RXD2_IRRX_GP52
TXD2_IRTX_GP53
DSR2_GP54
RTS2_GP55
CTS2_GP56
DTR2_GP57
RI2_GP50
DCD2_GP51
R1076
R1061
8.2K
hood lk/unlk should be tied up
ISA_IRQ6_PU
300
R1094
31
VDD3_SIO
41
49
49
49
+3.3V
R324
8.2K
R336 *
R337
300
I
50
50
50
50
50
50
50
50
R338
300
NI
8.2K
I
C353
*
VDD3_SIO
0.01UF
C335
*
0.01UF
R351
VDD3_AUX
51
51
51
52
52
52
30
52
52
52
52
52
52
52
52
52
52
52
52
50
50
50
50
50
50
50
50
50
51
51
51
51
51
51
51
51
51
51
51
51
51
0.01UF
C354
VDD3AUX_SIO
I
49
FLP_LOWDEN_
SIO_GP41
FLP_MOTOR_A_
FLP_DSKCHNG_
FLP_SELECT_A_
FLP_DIR_
FLP_STEP_
FLP_WR_DATA_
FLP_WRTENA_
FLP_HD_SEL_
FLP_INDEX_
FLP_TRACK0_
FLP_WPROTECT_
FLP_RD_DATA_
FLP_MOTOR_B_
FLP_SELECT_B_
LPT_SLCT
LPT_PE
LPT_BUSY
LPT_ACK_
LPT_ERR_
LPT_AUFDXT_
LPT_STRB_
LPT_INIT_
LPT_SLCTIN_
UART2_RXDAT
UART2_TXDAT
UART2_DSR_
UART2_RTS_
UART2_CTS_
UART2_DTR_
UART2_RI_
UART2_DCD_
UART1_RXDAT
UART1_TXDAT
UART1_DSR_
UART1_RTS_
UART1_CTS_
UART1_DTR_
UART1_RI_
UART1_DCD_
C322
0.01UF
49
R339 *
+3.3V
Super I/O Decoupling
LPT_PRD0
LPT_PRD1
LPT_PRD2
LPT_PRD3
LPT_PRD4
LPT_PRD5
LPT_PRD6
LPT_PRD7
RISER_ID0
RISER_ID1
NI
HOOD_LOCK_
LPCPD_
RISER_ID2
KBMS_PWR_EN
PS_ON_SIO
SLP_S3_
SLP_S5_
LED_PWRBLINK
LED_PWRGRN
42
32
KBD_DAT
KBD_CLK
MS_DAT
MS_CLK
KBRST_
A20GATE_
42
42
32
32
52
52
52
52
SIO_SCI_
SIO_SMI_
DBRESET_
SIO_PWRGDB
FWH_WP_
FWH_RST_
NI
32
33
6,33
SUSCLK
SIO_CLK14M
8.2K
119919-112
39
39
19,32
32
VBAT_OUT
HOOD_UNLOCK_
119919-121
NI
32
4
4
32
49
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME_
LPC_DRQ0_
ICH_RST_
LPCPD_
SIO_PCICLK
SER_IRQ
Future Use
Slimline ATX
32,39
32,39
32,39
32,39
32,39
32
16,32,39,45
3V_PWRGD
3VAUX_PWRGD
Tower able ATX
Description
1
2
3
4
19,32,45,59
30,32
20K
R1177
DET0
R1180
R334
2M
DET1
3.9M
20K
VDD3_AUX
R1067
riser det
R335
5
42
EVENT5_GP15
EVENT6_GP16
38
39
RISER_ID4
SIO_SLOT2_OCC_
12
R1068
43
43
26
49
GPRST1_GP60
GPRST2_GP61
17
18
SIO_PCI_RST_
SIO_AGP_RST_
45
45
R1088
31
BOARD_REV1
BOARD_REV0
DRCG_S0_S1
LED_TEST
IDE_P80PIN_
IDE_S80PIN_
NARROW_CABLE
RISER_ID2
AOL_BFAIL_
RISER1_GP71_IRQ4
RISER2_GP72_IRQ5
R342
30
PHY_ENABLE_
CPU_SLOW_GP65
INTRUDER_GP25
PME_IN_GP13
R_OFF_GP70_IRQ3
S3_2_5V_ON_GP86
SLOTOCC1_GP26
THERMTRIP_GP32
WOL_GP14
32
101
102
RISER_ID0
RISER_ID1
49
49
1
2
3
4
26-29,32
8.2K
a
53,59
8.2K
R1179
9
47
36
100
8
48
53
37
R1090
19
CPU_SLOW
RISER_ID3
PCI_PME_
PS_FAN_OFF_
S3_2_5V_ON_
SKT_OCC_PRI_
THERMTRIP_
WOL
8.2K
R1091
t
p
8.2K
s
p
o
m
e
h
c
121
80
10,12,49
4
l. a
w
w
8.2K
8.2K
8.2K
R1124
8,10
49
49
FLP_2M_MED
WP_CPU_EEPROM
HOOD_LOCK_
HOOD_UNLOCK_
33
34
35
40
41
42
43
44
45
49
54
29
50
51
103
104
105
106
GP10
GP11
GP12
GP17
GP20_P17
GP21_P16
GP22_P12
GP23_RING_
GP24_SYSOPT
GP27_SLOTOCC2_
GP33_WDO
GP43_DDRC
GP44_HDLOCK_
GP45_HDUNLCK_
GP73_IRQ6
GP74_IRQ7
GP75_IRQ9
GP76_IRQ10
VDD3_1
*
*
VDD3_2
VDD3_3
w
*
it c
c
.
s
m
o
RN30
8
7
6
5
8.2K
8.2K
R1178
RN28
8
7
6
5
8.2K
121808-349
LPT_PRD1
LPT_PRD0
LPT_PRD6
LPT_PRD7
LPT_PRD2
RN812
RN812
RN811
RN811
RN812
33
33
33
33
33
33
RN811
1
4.7K
2
4.7K
LPT_PRD4
33
3
4.7K
33
4
4.7K
SOT23FT
CR3
150PF
RN2
6
RN3
5
RN3
50
PARA_D1
CN4
50
PARA_D0
50
PARA_D2
50
50
PARA_D4
PARA_D6
50
PARA_D5
50
50
PARA_D3
PARA_D7
150PF
CN3
150PF
CR10_POWER
CN5
PARA_STRB_
PARA_LF_
PARA_ERR_
PARA_INIT_
PARA_SELIN_
4
4.7K
RN811
RN812
+5V
C846
39PF
S603AT
LPT_PRD5
CR9_POWER
33
R1063
1
4.7K
2
4.7K
3
4.7K
LPT_PRD3
50
1K
R1062
50
50
50
50
50
s
p
o
49
49
49
49
LPT_ACK_
LPT_BUSY
LPT_PE
LPT_SLCT
114543-001
m
e
h
c
33
R1065
+5V
PARA_INIT_
50
PARA_LF_
PARA_ERR_
PARA_SELIN_
50
CR1
5
6
7
8
a
50
50
SOT23FT
2
114567-006
RN813
4
3
2
1
1K
CR9_POWER
50
C813
14
15
16
17
18
19
20
21
22
23
24
25
RN1
BAV70
SOT23FT
33
R1064
33
R1066
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
P24
P23
P22
P21
P20
P19
P18
P17
P16
P15
P14
CONNPAR
P12
P13
P25
J50
119917-120
RN1
49
LPT_PRD[7:0]
8
7
6
5
Verify the package
NI
CN807
150PF
1
2
3
4
LPT_STRB_
LPT_AUFDXT_
LPT_ERR_
LPT_INIT_
LPT_SLCTIN_
SOT23FT
114543-001
BAV70
t
p
49
49
49
49
49
CLOSE TO Super IO
LOCATE SERIES RESISTORS
RN4
NOTE:
BAV70
CR4
39PF
+5V
RN4
RN4
RN4
R817
4.7K
2
RN3
8
7
6
5
4
4.7K
5
RN1
1
2
3
4
8
7
6
5
3
4.7K
1
2
3
4
3
1
10
11
12
13
PARA_SEL
PARA_PE
PARA_BUSY
PARA_ACK_
PARA_STRB_
PARA_D0
PARA_D1
PARA_D2
PARA_D3
PARA_D4
PARA_D5
PARA_D6
PARA_D7
PARA_ACK_
PARA_BUSY
PARA_PE
PARA_SEL
175135-003
RN1
8
7
6
5
BAV70
3
C815
8
39PF
1
4.7K
39PF
1
8
1
2
3
4
l. a
w
w
1
2
4.7K
7
39PF
4
4.7K
3
4.7K
2
4.7K
C812
C814
w
1
4.7K
it c
c
.
s
m
o
RN3
RN2
6
RN2
RN2
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
50
+5V
10UF
UART2_RTS_
UART2_RXDAT
UART2_DSR_
UART2_DCD_
49
49
49
49
49
PLUS12
19
UART1_DCD_
49
18
UART1_DSR_
49
C821
.01UF
17
UART1_RXDAT
49
Place across pins 20 & 11
16
UART1_RTS_
49
VDD
RY1
RY2
RY3
DA1
DA2
RY4
DA3
121808-349
75185
RY5
VDD
RY1
RY2
RY3
DA1
DA2
RY4
75185
RY5
DA3
VDD;20
GND;11
VDD;20
GND;11
U801
SO20WT
175509-001
C822
.01UF
15
UART1_TXDAT
49
13
12
14
UART1_RI_R
UART1_CTS_
R37
NI
SOT23FT
114543-001
U803
SO20WT
175509-001
C831
.01UF
19
18
17
16
15
14
13
12
49
CR2
10K
UART1_DTR_
UART1_RI_
+12V
UART2_CTS_
UART2_TXDAT
49
UART2_DTR_
49
R1144
49
49,51
109764-057
C830
.01UF
NC_UART2_RI_
Place across pins 11 &20
DY3
RA5
B_EIARI
B_EIADTR
RA2
RA3
DY1
DY2
RA4
B_EIADSR
B_EIARXDAT
B_EIARTS
B_EIATXDAT
B_EIACTS
VSS
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
VSS
RA1
10
10
.01UF
C818
A_EIARI
.01UF
C848
CN6
CR6
NC_UART1_C
A_EIACD
A_EIADSR
A_EIARXDAT
A_EIARTS
A_EIATXDAT
A_EIACTS
A_EIADTR
MINUS_12
B_EIACD
1
5
114543-001
SOT23FT
+5V
C800
100PF
CN808
242931-005
10%
100PF
10
CD
DSR
RXD-
RTS
TXD-
CTS
DTR
RI
GND
11
C40
NPO
10%
TANTB
109764-057
C870
-12V
100PF
11
109069-005
P54
CD
10
DSR
RXD-
RTS
TXD-
CTS
DTR
RI
GND
CONN_DSUB9
C9RF2A
109069-005
CONN_DSUB9
a
C9RF2A
CR801
CR800
114543-001
SOT23FT
114543-001
SOT23FT
4.7K
R40
R69
4.7K
CR5
1000PF
C819
C820
BAV70
4.7UF
1000PF
MAKE SURE TO CHANGE THE SYMBOL TO A SINGLE CONNECTOR
6800PF
P53
I
C58
6800PF
BAV70
+5V
CN2
R68
Q2
R38
Q1
UART1_RI_
3
BAV70
SOT23FT
1K
R39
SOT23FT
Verify the package
2.2K
106127-002
UART2_RI_
1K
R70
VDD_AUX
2.2K
C829
VDD_AUX
8
7
6
5
1
2
3
4
8
7
6
5
3
BAV70
1
2
3
4
2
2
8
7
6
5
s
p
o
NPO
m
e
h
c
1
2
3
4
1
3
NPO
10%
BAV70
t
p
BAV70
l. a
w
w
2
w
1
it c
c
.
s
m
o
10UF
49,51
C41
49
4.7UF
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
G5
G7
G9
G11
G13
G15
G17
G19
G21
G23
G25
G27
G29
G31
G33
G1
RN6
FLOPPY CONNECTOR
LOWDEN* 2
2M-MED 4
DSEL3* 6
INDEX* 8
MOTON0* 10
DSEL1* 12
DSEL0* 14
MOTON1* 16
DIR* 18
STEP* 20
WDATA* 22
WRTEN* 24
TRK0* 26
WPROTECT* 28
RDATA* 30
HDSEL* 32
DSKCHNG* 34
34P_RA_FLP_CONN
P10
PULLUPS
FLOPPY
114567-006
8
7
6
5
1
2
3
4
1K
+5V
Finalize routing of 2m_med and DSEL3
1K
FLP_LOWDEN_
FLP_2M_MED
NC_FLP_DSEL3
FLP_INDEX_
FLP_MOTOR_A_
FLP_SELECT_B_
FLP_SELECT_A_
FLP_MOTOR_B_
FLP_DIR_
FLP_STEP_
FLP_WR_DATA_
FLP_WRTENA_
FLP_TRACK0_
FLP_WPROTECT_
FLP_RD_DATA_
FLP_HD_SEL_
FLP_DSKCHNG_
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
7
2
6
53
MIN_LINE_WIDTH=025
49
49
Hook up to a GPI for media sense.
KBMSVCC1
RN5
4.7K
Top View
Pinout of Ms/Kbd
RN5
4.7K
MS_CLK
MS_DAT
RN5
4.7K
RN5
4.7K
39
R822
39
R827
39
R828
49
49
KBD_CLK
KBD_DAT
100PF
CN800
39
R823
8
7
6
5
8
1
5
4
2
6
3
2
2
2
R930
1
2
3
4
l. a
w
w
t
p
s
p
o
m
e
h
c
I4
CR802
O4
128879-001
SO8T
680
R818
NC_KB_2
NC_KB_1
NC_MS_2
NC_MS_1
KBMSVCC
MIN_LINE_WIDTH=025
148037-002
DATA
NC1
GND
VCC
CLOCK
NC2
J68
DATA
NC1
GND
VCCKEYBOARD / BOTTOM
CLOCK
NC2
J68
MOUSE / TOP
121808-349
0.01UF
C868
148037-002
TPOINT=OFF
7
8
9
10
11
12
TPOINT=OFF
Dual Mouse
Keyboard
Connector
1
2
3
4
5
6
Dual Mouse
Keyboard
Connector
Bottom View
Pinout of Ms/Kbd
DIODE2PK
1
8
I1
O1
7
2
O2
I2
6
3
O3
I3
L6
a
it c
c
.
s
m
o
300
R229
S603AT
.01UF
S603AT
C167
22PF
CN806
10
114567-012
1
2
3
4
USB PORTS 1-2
.01UF
C122
10%
S603AT
C123
NPO
.01UF
VDD3_AUX
USB1_PLUS
USB1_MIN
USB0_PLUS
USB0_MIN
8
7
6
5
33
33
33
33
RN806
S3_2_5V_ON_
8
7
6
5
RN24
L_USB1_PLUS
L_USB1_MIN
L_USB0_PLUS
L_USB0_MIN
1/16W
4.7K
R835
10K
VDD_AUX
NI
Q801
SOT23FT
8
7
6
5
49,59
DTC143TKA
R146
8.2K
VDD_AUX
R145
8.2K
U21_EN2
U21_EN1
VDD_AUX
C911
.01UF
R834
*
300
VDD_AUX
S603AT
SO16T
47PF
GND;1,5
388758-002
EN4
EN3
IN2
EN2
EN1
IN1
0.125_OHM
TPS2054
U19
C914
OC4
OUT4
OC3
OUT3
OC2
OUT2
OC1
OUT1
KBMSVCC1
11
NI
10
12
13
NC_OUT4
NI
NC_OC4
NI
USBTHM0
MIN_LINE_WIDTH=025
U21_OC2_
14
MIN_LINE_WIDTH=025
USBTHM1
MIN_LINE_WIDTH=025
U21_OC1_
16
15
119917-121
S603AT
C908
S603AT
47PF
S603AT
120
L19
52
C910
150UF
R173
10K
.01UF
S603AT
NI
C904
107352-024
C907
C906
47PF
47PF
R147
10K
R151
10K
TANTD
10V
20%
S603AT
L20
120
.01UF
S603AT
0.1UF
20%
12
11
S805T
MNT2
MNT3
MNT4
150UF
Bottom View
Pinout
33
USB0_OC_JCK_
33
USB1_OC_JCK_
129633-001
10
C909
TANTD
210V
MNT1
GND1
GND0
+DATA1
-DATA1
+DATA0
-DATA0
VCC0
VCC1
USB_DS
225427-008
J71
107352-024
R152
10K
2
VDD3_AUX
R174
10K
C905
119922-001
TPS2052 (2 port) = 388757-001
1
2
3
4
1
2
3
4
C169
15K
114567-044
2
1
USBVCC
MIN_LINE_WIDTH=025
2
1
USBVCC1
MIN_LINE_WIDTH=025
0.1UF
C125
l. a
w
w
t
p
s
p
o
m
e
h
c
it c
c
.
s
m
o
33
33
33
33
R832
8.2K
USB2_PLUS
USB2_MIN
R833
8.2K
U21X_EN2
U21X_EN1
8
7
6
5
NPO
10%
1
2
3
4
22PF
CN805
GND;6
EN2
EN1
IN
MIC2526
U18
8
7
6
5
L_USB2_MIN
OC2_
OUT2
OC1_
OUT1
10K
R148
OC3_
USBTHM3
MIN_LINE_WIDTH=025
L_USB3_PLUS
L_USB3_MIN
L_USB2_PLUS
P/D_NUM=314017-001
RN805
10
114567-012
USBPORT 2&3
USB3_PLUS
USB3_MIN
VDD_AUX
VDD_AUX
RN804
54
54
10K
R150
VDD3_AUX
OC4_
MIN_LINE_WIDTH=025
USBTHM2
10K
R149
10K
R153
.01UF
S603AT
C1229
*
VDD_AUX
S603AT
C890
47PF
S603AT
119917-121
NI
S805T
129633-001
NI
S603AT
C892
47PF
S603AT
C889
47PF
NI
USBTHM3
USBTHM2
54
33
33
54
USB2_OC_JCK_
USB3_OC_JCK_
VDD_AUX
C884
.01UF
C124
0.1UF
8
7
6
5
*
*
1
2
3
4
1
2
3
4
0.1UF
15K
114567-044
S603AT
47PF
NI
C891
C882
107352-024
120
L15
2
1
USBVCC2
MIN_LINE_WIDTH=025
C883
TANTD
10V
20%
150UF
S603AT
.01UF
2
1
L16
120
10
MNT2
MNT3
MNT4
20%
150UF
TANTD
210V
MNT1
GND1
GND0
+DATA1
-DATA1
+DATA0
-DATA0
VCC0
C893
USB_DS
VCC1
J79
225427-008
107352-024
S603AT
C881
.01UF
USBVCC3
MIN_LINE_WIDTH=025
C126
l. a
w
w
t
p
s
p
o
m
e
h
c
it c
c
.
s
12
11
m
o
Bottom View
Pinout
+3.3V
+5V
27-29,32,34
27-29,32,34
27-29,32,34
27-29,32,34
+5V
4
45
26,32
27-29,32,34,55
26-29,32
26-29,32,34
26-29,32,34
26,32
27-29,32,34
26-29,32,34
26-29,32,34
26-29,32,34
26-29,32
26-29,32,34
SCSI_ENABLE
107352-029
C313
+5V
+3.3V
+5V
GND
VCC
PCI_P_CBE0_
PCI_P_CBE1_
PCI_P_CBE2_
PCI_P_CBE3_
SCSI_PCICLK
PCI_INT_RST_
SCSI_GNT_
PCI_P_AD29
PCI_P_INTG_
PCI_P_FRAME_
PCI_P_IRDY_
SCSI_REQ_
PCI_P_PAR
PCI_P_DEVSEL_
PCI_P_TRDY_
PCI_P_STOP_
PCI_P_PERR_
PCI_P_SERR_
13
74LCX125
CLK
40MHZ
S805T
R320
SCSI_ID
22
SCSI_TRST_
D14
C14
A14
A13
C3
G3
C13
B13
V11
P20
P19
N20
N19
N18
B16
A17
L3
M4
M3
U3
L4
V5
U2
M1
W6
V1
W5
V6
V2
W2
V12
Y11
W13
M17
B18
V9
W1
U1
P2
Y13
V13
Y12
W12
NC_40MHZ_1
Close To IC
SCSI_40MHZ
139708-113
NC_TDO
SCSI_TMS
SCSI_TCK
SCSI_TDI
R344
114567-001
8
7
6
5
NC_CBE4_
NC_CBE5_
NC_CBE6_
NC_CBE7_
SCSI CLOCK GENERATOR
112453-011
+5V
33
1
2
3
4
R308
22
R321
R1125
8.2K
NC_PAR64
NC_PCIRST0
SWI_IDDQ_
RN810
R331
+3.3V
NC_U12_11
219333-001
11
U26
SM_OSC
EN 1
Y6
D
26,33
R318
NI
.01UF
0 R319
AGND1
AGND2
AGND3
SVCC5_1
SVCC5_2
SVCC5_3
AVCC
AVCC5
VDPCI
TCK
TMS
TDI
TDO
TRST_
SCLK
CLKIN
PCLK
RST_
GNT_
IDSEL_
INTA_
FRAME_
IRDY_
REQ_
PAR
DEVSEL_
TRDY_
STOP_
PERR_
SERR_
REQ64_
ACK64_
PAR64
PCIRSTO_
IDDQ_
CBE0_
CBE1_
CBE2_
CBE3_
CBE4_
CBE5_
CBE6_
CBE7_
AIC7892
VDD3;D11,D15,D6,F17,F4,K4,L17,R17,R4,U10,U15,U6
SVCC;A12,C8,D10,D2,D5,D7,E1,H3,K2
GND;A1,D13,D17,D4,D8,H17,H4,J10,J11,J12,J9,K10
GND;K11,K12,K9,L10,L11,L12,L9,M10,M11,M12,M9
GND;N17,N4,U13,U17,U4,U8
NC=B14,E17,G17,P4,T4,U11,U12,U14,U16,U5,U7,U9,Y1,Y20,Y3
Rev 1.3
09-14-1998
Revision: 1.3
U42
126999-001
ABGA272B
BRDOE_
BRDWE
DIFFSENSE
EXPACT
EXTARBACK_
EXTARBREQ_
LDALTID_
EXTXCVR_
IDDAT
LED_
LVREXT
SEECS
SEREXT
STPWCTL
TESTMODE_
WIDEPS_
RAMPS_
MWE_
MOE_
RAMCS_
ROMCS_
MDP
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
NC_RAMPS_
NC_MWE_
NC_MOE_
NC_RAMCS_
NC_ROMCS_
NC_BRDOE_
NC_BRDWE
C17
K18
J18
H18
G18
F18
E18
D18
C18
C16
J20
K20
J19
K19
L19
L20
D12
D16
M19
M20
K17
A16
M18
L18
A15
J17
B15
C15
A18
B17
SEECS
SEREXT
NC_STPWCTL
TESTMODE_
NC_VCR_
NC_IDDAT
AIC7892_LED_
NC_BREQ_
NC_MDP
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
LVRSTM
NC_MA0
NC_MA1
NC_MA2
NC_MA3
NC_MA4
NC_MA5
NC_MA6
NC_MA7
NC_MA8
NC_MA9
NC_MA10
NC_MA11
NC_MA12
NC_MA13
NC_MA14
NC_MA15
55,57,58
LVREQP
LVCDP
LVATNP
LVACKP
LVBSYP
LVDPHP
LVDPLP
LVIOP
LVSELP
LVMSGP
LVDP[15:00]
PCI_P_AD[31:00]
H19
H20
G19
G20
F19
F20
E19
E20
D19
D20
C19
C20
B19
B20
A19
A20
C291
CLASS=MISC
L38
.01UF
C332
.01UF
.047UF
4.7K
8.2K
114567-010
.01UF
+3.3V
LDALTID_
139708-231
LVDM[15:00]
LVATNM
LVCDM
LVREQM
LVRSTM
LVMSGM
LVSELM
LVIOM
LVDPLM
LVDPHM
LVBSYM
LVACKM
DIFFSENSE
LVRSTP
VDD;8
GND;5
CS
NC
ORG
DO
93C66_Z
SK
DI
U41
57,58
57,58
57,58
57,58
57,58
57,58
57,58
57,58
55,57,58
57,58
57,58
57,58
44
R317
+3.3V
+3.3V
R322
247372-101
57,58
C292
.01UF
57,58
57,58
57,58
57,58
57,58
57,58
57,58
57,58
57,58
57,58
57,58
27-29,32,34,55
.01UF
VDD3_AUX;14
12
C321
8.2K
C293
I
R330
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AD39
AD40
AD41
AD42
AD43
AD44
AD45
AD46
AD47
AD48
AD49
AD50
AD51
AD52
AD53
AD54
AD55
AD56
AD57
AD58
AD59
AD60
AD61
AD62
AD63
8.2K
I
R329
LVDP00
LVDP01
LVDP02
LVDP03
LVDP04
LVDP05
LVDP06
LVDP07
LVDP08
LVDP09
LVDP10
LVDP11
LVDP12
LVDP13
LVDP14
LVDP15
G2
F2
F3
E3
C1
D3
B1
B2
B10
A11
B11
C12
L1
K3
J2
J4
SCDM0
SCDM1
SCDM2
SCDM3
SCDM4
SCDM5
SCDM6
SCDM7
SCDM8
SCDM9
SCDM10
SCDM11
SCDM12
SCDM13
SCDM14
SCDM15
G1
F1
G4
E2
D1
E4
C2
A2
C10
A10
C11
B12
L2
K1
J1
J3
L37
2
C348
I
R345
4.99K
PCI_P_AD00
PCI_P_AD01
PCI_P_AD02
PCI_P_AD03
PCI_P_AD04
PCI_P_AD05
PCI_P_AD06
PCI_P_AD07
PCI_P_AD08
PCI_P_AD09
PCI_P_AD10
PCI_P_AD11
PCI_P_AD12
PCI_P_AD13
PCI_P_AD14
PCI_P_AD15
PCI_P_AD16
PCI_P_AD17
PCI_P_AD18
PCI_P_AD19
PCI_P_AD20
PCI_P_AD21
PCI_P_AD22
PCI_P_AD23
PCI_P_AD24
PCI_P_AD25
PCI_P_AD26
PCI_P_AD27
PCI_P_AD28
PCI_P_AD29
PCI_P_AD30
PCI_P_AD31
W11
Y10
W10
Y9
V10
Y8
W9
Y7
Y6
W8
Y5
V8
Y4
W7
Y2
V7
W4
T2
V4
T1
W3
R2
V3
R1
T3
P1
R3
N2
P3
N1
N3
M2
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
AD08
AD09
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
A9
A7
A6
B6
C9
A8
B4
IOP
SELP
MSGP
RESETP
REQP
CDP
ATNP
IOM
SELM
MSGM
RESETM
REQM
CDM
ATNM
a
LVDM00
LVDM01
LVDM02
LVDM03
LVDM04
LVDM05
LVDM06
LVDM07
LVDM08
LVDM09
LVDM10
LVDM11
LVDM12
LVDM13
LVDM14
LVDM15
P18
R20
P17
R19
R18
T20
T18
T19
T17
U20
U18
U19
V18
V20
W18
V19
W17
W20
V17
W19
W16
Y19
V16
Y18
W15
Y17
V15
Y16
W14
Y15
V14
Y14
NC_AD32
NC_AD33
NC_AD34
NC_AD35
NC_AD36
NC_AD37
NC_AD38
NC_AD39
NC_AD40
NC_AD41
NC_AD42
NC_AD43
NC_AD44
NC_AD45
NC_AD46
NC_AD47
NC_AD48
NC_AD49
NC_AD50
NC_AD51
NC_AD52
NC_AD53
NC_AD54
NC_AD55
NC_AD56
NC_AD57
NC_AD58
NC_AD59
NC_AD60
NC_AD61
NC_AD62
NC_AD63
B5
C5
H1
B3
R332
+5V
57,58
4.7K
R323
C6
A4
H2
C4
ACKP
BSYP
SCDPHP
SCDPLP
ACKM
BSYM
SCDPHM
SCDPLM
SCDP0
SCDP1
SCDP2
SCDP3
SCDP4
SCDP5
SCDP6
SCDP7
SCDP8
SCDP9
SCDP10
SCDP11
SCDP12
SCDP13
SCDP14
SCDP15
s
p
o
m
e
h
c
B9
B7
C7
A5
D9
B8
A3
4.7K
6.19K
8
7
6
5
8
7
6
5
R316
4.7K
1
2
3
4
4.7K
1
2
3
4
10K
t
p
RN809
4.7K
l. a
w
w
RN808
it c
c
.
s
m
o
129621-024
C1056
57,58
109764-057
C305
.01UF
S603AT
10UF
Decoupling 2.85V at AIC7892
121808-349
C1054
LVTRMPWR
121808-349
S603AT
C301
C316
10UF
ADJ
VOUT
OUT
4
2
109764-021
C315
.01UF
IN
.01UF
C314
C330
C1098
LT1117
.01UF
.01UF
CR18
C304
.01UF
C1055
.01UF
C294
.1UF
22UF
SVCC
296166-002
121808-349
S603AT
2.85 VOLTAGE REGULATOR
.01UF
C264
SOT223AT
C1099
142048-001
SVCC
56
272777-002
C318
+5V
.01UF
.1UF
56
.1UF
C303
.01UF
l. a
w
w
t
p
s
p
o
C320
+3.3V
C319
.1UF
.01UF
C317
.1UF
w
m
e
h
c
a
it c
c
.
s
m
o
.1UF
TANTD
109764-021
4.7UF
22UF
C331
C300
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
MIN LINE WIDTH = 50 MILS
TERMINATION ICS TO BE PLACED NEXT TO THE SCSI CTLR AIC-7892
SCSI Termination Power
L35
1
2
C297
R1051
C1100
4.7UF
CR20
C312
4.7UF
LVDP02
LVDM02
LVDP10
LVDM10
LVDP11
LVDM11
LVDP08
LVDM08
LVIOP
LVIOM
NC_ST1
NC_ST2
LVDP05
LVDM05
LVCDP
LVCDM
LVBSYP
LVBSYM
LVSELP
LVSELM
LVMSGP
LVMSGM
LVDP00
LVDM00
LVDP06
LVDM06
LVDP04
LVDM04
LVDP01
LVDM01
LVDP15
LVDM15
UCC5630
REG
NC1
NC2
L1+
L1L2+
L2HI Byte
L3+
L3L4+
L4L5+
L5DISCON
NC_ST6
NC_ST7
1
2
3
4
5
6
7
11
12
13
14
15
16
17
REG
NC1
NC2
L1+
L1L2+
L2Controls
L3+
L3L4+
L4L5+
L5DISCON
UCC5630
U38
GND;8,9,10,18,26,27,28
1
2
3
4
5
6
7
11
12
13
14
15
16
17
U45
TERMPWR
HIPD
LVD
SE
L9L9+
L8L8+
L7L7+
L6L6+
DIFFB
DSENSE
MST/SLV
TERMPWR
HIPD
LVD
SE
L9L9+
L8L8+
L7L7+
L6L6+
DIFFB
DSENSE
MST/SLV
36
35
34
33
32
31
30
29
25
24
23
22
21
20
19
NC_ST11
NC_ST12
REG
NC1
NC2
L1+
L1L2+
L2LO Byte
L3+
L3L4+
L4L5+
L5DISCON
GND;8,9,10,18,26,27,28
1
2
3
4
5
6
7
11
12
13
14
15
16
17
UCC5630
U43
GND;8,9,10,18,26,27,28
TERMPWR
HIPD
LVD
SE
L9L9+
L8L8+
L7L7+
L6L6+
DIFFB
DSENSE
MST/SLV
36
35
34
33
32
31
30
29
25
24
23
22
21
20
19
+5V
NC_ST8
NC_ST9
NC_ST10
36
35 NC_ST3
34 NC_ST4
33 NC_ST5
32
31
30
29
25
24
23
22
21
20
19
NC_ST13
NC_ST14
NC_ST15
NC_ST_17
NC_ST_16
.1UF
.1UF
10K
R328
129621-024
C308
20K
LVTRMPWR
LVDPLM
LVDPLP
LVATNM
LVATNP
LVDM03
LVDP03
LVDM07
LVDP07
129621-024
LVDPHM
LVDPHP
LVDM14
LVDP14
LVDM13
LVDP13
LVDM12
LVDP12
129621-024
DIFFSENSE
LVREQM
LVREQP
LVDM09
LVDP09
LVACKM
LVACKP
LVRSTM
LVRSTP
PLACE ALL CAPS CLOSE TO ICS
C311
C298
10UF
.1UF
.1UF
+5V
C310
C299
C309
C290
10UF
10UF
R326
l. a
w
w
t
p
s
p
o
100
m
e
h
c
a
it c
c
.
s
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
55,58
m
o
R327
56,58
56,57
LVTRMPWR
LVDP12
LVDP13
LVDP14
LVDP15
LVDPHP
LVDP00
LVDP01
LVDP02
LVDP03
LVDP04
LVDP05
LVDP06
LVDP07
LVDPLP
DIFFSENSE
LVATNP
LVBSYP
LVACKP
LVRSTP
LVMSGP
LVSELP
LVCDP
LVREQP
LVIOP
LVDP08
LVDP09
LVDP10
LVDP11
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
l. a
w
w
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
t
p
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
169050-003
P30
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
NC_ISC_19
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
s
p
o
NC_ISC_53
m
e
h
c
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
55,57
LVDM12
LVDM13
LVDM14
LVDM15
LVDPHM
LVDM00
LVDM01
LVDM02
LVDM03
LVDM04
LVDM05
LVDM06
LVDM07
LVDPLM
LVATNM
LVBSYM
LVACKM
LVRSTM
LVMSGM
LVSELM
LVCDM
LVREQM
LVIOM
LVDM08
LVDM09
LVDM10
LVDM11
a
it c
c
.
s
m
o
VOLTAGE REGULATORS
IN
ADJ
0.5A
Q838
GND;5
139708-025
1%
S603AT
R239
301
139708-123
1%
S603AT
R240
110
1_8V_AUXREF
*
X7R
20%
121808-349
C273
0.01UF
S603AT
MIN_LINE_WIDTH=050
119922-001
SOT23FT
Y5V
C277
0.01UF
80%
S1206T
129621-017
4.7UF
C992*
0.3A @ 1.8V
Change part number
DTC143TKA
NI
DPAKAT
NI
8.2K
C 2
MIN_LINE_WIDTH=010
1/16W
4.7K
OUT
10%
10UF
X7R
NI
C1249
*
X7R
10%
C170 *
NI .1UF
X7R
10%
68PF
C1250
NI *
R847
NI
4.7UF
C993*
C272
0.01UF
4.7UF
C1032*
1_8V_AUX
VDD2_5
33
18,22,61-63
2.5V aux @250mA for S3
139708-006
139708-002
chnage to 10.5K
TANTB
20V 20%
109764-057
C1031
10UF
1%
S603AT
R846
NI
10K
1%
S603AT
10.7K
NI
220490-002
SOD123A
CR7
220490-002
SOD123A
m
e
h
c
80%
CR15
116728-001
ADJ
OUTA
s
p
o
4.7UF
129621-017
S1206T
Y5V 16V
C224
VDD_AUX
PER MERLE: VOUT=VREF(1+R1/R2) + IFB*R1
change symbol to NOR gate
347910-004
S3_2_5V_ON_
7SZ32
X7R
SHDN
NI
3V_PWRGD
X7R
10%
LP3964EMP
t
p
C171
NI
* 109764-050*
296166-004.1UF
33UF
10%
R182
IN
U809
C1248
NI
NI
NI
CR804
R1141
NI
U24
218396-001
1N4148
49,53
19,32,45,49
VDD_AUX
l. a
w
w
1N4148
w
2
a
it c
c
.
s
m
o
+1.8V
470
R1075
NI
106146-112
VDDQ_EN
8.2K
R1074
R1073
8.2K
SOT23FT
106127-002
2N2222A
Q824
VDDQ_EN_
106146-112
+12V
VDDQ REGULATOR
Per M. Fulghum 7/30/98
Y5V
C1181
R1046
5%
36K
SOT23FT
106127-002
2N2222A
Q823
4.7UF
VDD3
ECN: Change R1074 to be 8.2K (PN# 106146-112) for vdd1_8 leading VDDQ 3mS
S1206T
1.0UF
X5R
C1264
204432-001
PLACE THIS CIRCUIT NEAR AGP CONNECTOR.
41,63,64
+3.3V
4.7UF
Y5V
C1155
C1182
NC_CR1_2;2
228409-002
SO5T
NC_CR1_1;1
SC431L
CR21
10
R1045
2.2K
R1054
+12V
219246-002
STB60NE03L-10
D2PAKB
Q822
0.1UF
X7R
C325
On fet drain:
provide large copper pad
or multiple vias to plane
as a heatsink
4 D
VDDQ_COMP
NPN 2.7K base = 119922-002

PNP 4.7K base = 119925-001
8.2K
NI
R1057
VDDQ_ANODE
MIN_LINE_WIDTH=020
MIN_LINE_WIDTH=020
0.1UF
G
1
VDDQ_GATE
820UF
C1147
C1149
4V
MIN_LINE_WIDTH=050
VDDQ_REF
MIN_LINE_WIDTH=010
X7R
6800PF
5%
NI
C1150
2200PF
NPO
50V
l. a
w
w
t
p
2
R1055
4.7UF
Y5V
C327+
+1.5V/+3.3V
634
1%
139708-033
3.01K
R1056
1%
139708-211
0.01UF
w
S 3
s
p
o
m
e
h
c
S603AT
121808-349
C1142
C220
4.7UF
Y5V
AGP CONNECTOR DECOUPLING
2A @ 1.5V / 2.2A @ 3.3V
it c
c
.
s
1
2
4.7UF
Y5V
C326+
VDDQ
m
o
16,24,25
4.7UF
C956
VDD2_5
channel A decoupling
2.5V decoupling
f(ACPI & !MAIN_PG & SLP_S5)
4.7UF
C928
min line width=100
f(AUX POWER - IOL=4mA, IOH=2mA)
18,22,59,61-63
CAPS AS REQUIRED
ADD 2_5V HIGH FREQ
l. a
w
w
5
20%
X7R
X7R
0.01UF
C1043
10%
.1UF
C1002
S603AT
C1001
.01UF
C1045
18,22,59,61-63
t
p
*
C1046
VDD2_5
4.7UF
Y5V
C927
C929
4.7UF
+
2
109764-087
20%
10V
TANTD
150UF
C977
+
2
16V
Y5V
80%/-20%
20%
X7R
C1048
16V
Y5V
5%
470PF
4.7UF
C1000
0.01UF
C1047
X7R
10%
.1UF
C999
*
20%
X7R
10%
X7R
Decoupling XMM2
0.1UF
.1UF
C1007
Decoupling XMM1
X7R
20%
0.01UF
s
p
o
109764-087
20% 10V
TANTD
150UF
C1049
0.01UF
20%
X7R
C1010
m
e
h
c
CAPS AS REQUIRED
20%
10V
TANTD
1 C955
150UF
16V
Y5V
80%/-20%
4.7UF
C983
C950
109764-087
+
2
129621-026
20% 10V
S1210DF
1 C954
22UF
109764-087
20%
10V
TANTD
1 C989
150UF
X7R
109764-087
20%
10V
TANTD
1 C948
150UF
2
296166-004
X7R
10%
20%
16V
Y5V
.1UF
4.7UF
80%/-20%
0.01UF
C969
C951
20%
0.01UF
C966
X7R
10%
.1UF
C986
C952
20%
10V
S1210DF
129621-026
X7R
5%
470PF
C944
1 C945
22UF
16V
Y5V
X7R
20%
0.01UF
C943
Decoupling XMM2
X7R
20%
0.01UF
C988
Decoupling XMM1
S603AT
.01UF
channel B decoupling
ADD 2_5V HIGH FREQ
it c
c
.
s
20%
16V
Y5V
5%
470PF
C968
*
X7R
20%
0.01UF
C967
16V
Y5V
5%
470PF
C987
0.01UF
20%
X7R
C942
NI
X7R
10%
.1UF
C965
NI
0.01UF
C985
X7R
m
o
0.1UF
2_5VDIODE_C
R867
1K
1%
1000PF
C197
MIN_LINE_WIDTH=15
2_5VPWM_OSC
1%
R212
OSC
REF
VCC
U27
D2PAKB
1/2W
C972
1.0
R881
2.4K
MIN_LINE_WIDTH=100
2_5VREG_SOURCE
6
OUT
1/2W
R868
1K
S603AT
3843
SO8T
247188-001
4.7
VFB
COMP 1
R866
0.01UF
5%
R877
IND2X
CR14
+5V
PE-00001
270629-001
A
CR11
VF=0.36
L28
470
C958
R876
C960
820UF
4V
C957
820UF
4V
12A@ 2.5V
R224
2.59UH 12A
MIN_LINE_WIDTH=15
2_5VPWM_COMP
C211
4.7UF
NC=3
TLV431L
228409-003
CR13
3.3K
C210
NC;1
NC;1
.1UF
296166-002
2_5V_431_4
117026-102
100PF
5%
R222
1%
106147-439
2.49K
R223
2.49K
1%
2.5V REGULATOR
2_5V_BJT_E
MIN_LINE_WIDTH=15
CR12
SOT23FT
10K
NI
C199
MIN_LINE_WIDTH=15
2_5VPWM_REF
MIN_LINE_WIDTH=100
2_5VPWM_ISENSE
PER M WOOD & P DIZEREGA
SOT23FT
820UF
4V
C959
D 4
GND
3
Q805
820UF
4V
C961
2_5VREG_DRAIN
ISENSE
4.7UF
C198
min line width=25
9A
R882
+12V
IND2N
186676-001
1.3UH
1K
Q809
D2PAKB
166723-001
MIN_LINE_WIDTH=25
L27
2_5VREG_GATE
MIN_LINE_WIDTH=100
+3.3V
4
3
S 3
t
p
NC=3
VCCP1_SNUB
m
e
h
c
MIN_LINE_WIDTH=15
CR9
NC;1
l. a
w
w
MIN_LINE_WIDTH=25
s
p
o
2_5VPWM_OUT
VF=0.36
MIN_LINE_WIDTH=25
VF=0.36
w
CR10
*
C953
MIN_LINE_WIDTH=15
820UF
4V
VDD2_5
it c
18,22,59,61,63
c
.
s
m
o
MIN_LINE_WIDTH=15
1_8V_BJT_E
1K
R1084
1%
1000PF
C384
NI
C385
MIN_LINE_WIDTH=15
1_8VDIODE_C
MIN_LINE_WIDTH=15
CR27
SOT23FT
0.1UF
1_8VPWM_OSC
1%
R1083
MIN_LINE_WIDTH=15
1_8VPWM_REF
OSC
REF
VCC
U52
6
OUT
1/2W
R1085
1K
S603AT
3843
SO8T
247188-001
4.7
D2PAKB
1/2W
5%
C1101
1.0
R1037
2.4K
MIN_LINE_WIDTH=100
1_8VREG_SOURCE
R1071
1_8VPWM_ISENSE
SOT23FT
Q827
10K
C1162
820UF
CAP200U
MIN_LINE_WIDTH=100
1_8VREG_DRAIN
VFB
COMP 1
0.01UF
R1109
L36
A
IND2X
CR29
+5V
470
R1108
PE-00001
270629-001
2.59UH 12A
CR19
VF=0.36
R1107
C1209
820UF
C1065
4V
C1210
4.7UF
1_8VPWM_COMP
MIN_LINE_WIDTH=15
NC=3
TLV431L
CR28
100PF
5%
+1.8V
.1UF
2.49K
41,60,64
VDD3
R1047
220
1%
R374
C1211
1.13K
1%
R373
820UF
C1102
4V
5%
296166-002
1_8V_431_4
117026-102
3.3K
R1049
1.8V REGULATOR
Per P.DIZEREGA 2/2000
min line width=25
C1190
820UF
cap200u
9A
2
D 4
GND
4.7UF
C386
+12V
IND2N
186676-001
B
MIN_LINE_WIDTH=25
L39
1.3UH
1_8VREG_GATE
1_8VPWM_OUT
Q826
D2PAKB
166723-001
S 3
ISENSE
a
220
MIN_LINE_WIDTH=100
4
3
+3.3V
R1086
m
e
h
c
MIN_LINE_WIDTH=15
VCCP_SNUB
s
p
o
MIN_LINE_WIDTH=25
NC;1
l. a
w
w
t
p
1K
NC=3
MIN_LINE_WIDTH=25
w
MIN_LINE_WIDTH=15
Q817
4.7UF
Y5V
C1061
4.7UF
C1104
ICH2 POWER SEQUENCING PROBLEM
C1105
125
L34
.01UF
C1060
S1812T
107352-012
C1103
VDD1_8
Q818
P/D_NUM=191359-001
4.7UF
VDD2_5
4.7UF
SOD123A
160193-003
1N4148
CR16
10 A
min line width=100
it c
c
.
s
16,33,63
.01UF
C1039
VDD1_8
m
o
470
R1048
MIN_LINE_WIDTH=15
10V
1C1058
22UF
17,20
16,33,63
S1210DF
129621-026
VDD1_8_RSL
18,22,59,61,62
20%
C1177
0.01UF
20%
X7R
DECOUPLING
C1224
0.01UF
20%
X7R
C1221
0.01UF
20%
X7R
C1133
0.01UF
C1220
0.01UF
20%
X7R
C1175
0.01UF
20%
X7R
20%
X7R
C1127
0.01UF
20%
X7R
C1222
0.01UF
C1176
0.01UF
20%
X7R
20%
X7R
C1223
0.01UF
20%
X7R
*
+5V
+5V
C1219
33UF
20%
6.3V
TANTCA
C1198
33UF
20%
6.3V
TANTCA
C1174
33UF
20%
6.3V
TANTCA
.01UF
S603AT
VDD3_AUX
NEG12V
VDD12
PCI Slot 1 Decoupling
27-29,41
27-29,41,42,48
26-29,41,42
C1110
0.01UF
C1108
0.01UF
20%
X7R
20%
X7R
C1226
0.01UF
20%
X7R
C1141
0.01UF
20%
X7R
20%
X7R
C1179
0.01UF
20%
X7R
C1227
0.01UF
20%
X7R
C1169
0.01UF
C1214
0.01UF
20%
X7R
C1180
0.01UF
C1143
0.01UF
20%
X7R
20%
X7R
20%
X7R
C1167
0.01UF
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=100
MIN_LINE_WIDTH=50
m
e
h
c
C1168
0.01UF
C1194
0.01UF
20%
X7R
C1218
0.01UF
C1225
0.01UF
C1173
0.01UF
20%
X7R
S603AT
4.7UF
Y5V
129621-017
0.01UF
.01UF
0.01UF
C1125
20%
X7R
+5V
C827
20%
X7R
MIN_LINE_WIDTH=50
-12V
+12V
20%
X7R
S1206T
it c
20%
X7R
S1206T
C1165
4.7UF
S1206T
C1106
4.7UF
S1206T
C1164
4.7UF
S1206T
C1153
4.7UF
-12V Decoupling for PCI
C1212
4.7UF
S1206T
C1213
4.7UF
12V Decoupling for PCI
4.7UF
0.01UF
VDD_AUX
C828
C1228
33UF
20%
6.3V
TANTCA
C1130
20%
X7R
S603AT
.01UF
S603AT
31,41,42
C816
.01UF
.01UF
C349
S603AT
C306
.01UF
.01UF
S603AT
C1230
1 +5V
S1206T
C1192
4.7UF
S1206T
C1193
4.7UF
-12V
C1172
4.7UF
S1206T
VDD3_AUX
C1217
4.7UF
S1206T
S603AT
C222
.01UF
+12V Supply Connector P1

Place these near the Power
VDD3_AUX
S603AT
C350
.01UF
C811
20%
X7R
C1178
0.01UF
0.01UF
C1117
VDD_AUX
S603AT
C1129
.01UF
VDD3_AUX
4.7UF
Y5V
129621-017
C1137
20%
X7R
Y5V
C1166
0.01UF
+3.3V
.01UF
.01UF
Y5V
C1191
C359
+5V
C817
C1199
33UF
20%
6.3V
TANTCA
C1154
33UF
20%
6.3V
TANTCA
.01UF
Y5V
C209
VDD_AUX
0.01UF
+3.3V
+3.3V
.01UF
.01UF
Y5V
C1057
109764-048
VDD3_AUX
s
p
o
33UF
Y5V
C1163
-12V
t
p
C1093
X7R
0.01UF
CN9
0.01UF
Y5V
-12V
X7R
0.01UF
+5V
0.01UF
C1148
X7R
0.01UF
CN11
C801
+3.3V
Place 1 each near XMM1, XMM2, (RIMM sockets).

VDD3
41,60,63
X7R
CN1
+5V
C1097
4.7UF
Y5V
129621-017
CN10
0.01UF
8
7
6
5
1
2
3
4
C302
+5V
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
+5V
8
7
6
5
1
2
3
4
l. a
w
w
C847
c
.
s
m
o
C1197
66-68
11,66-68
11,66-68
11,66-68
11,66-68
11,66-68
66-68
10K
.1UF
NI
R58
C43
NI
NI
NI
65-68
65-68
DR1
R51
I_LIMIT
65-68
DR0
R52
R47
65-68
NI
SP1
NI
R77
C1
R44
65-68
1%
47.5
SP0
R59
R55
NI
139708-077
62K
6.8NF
P_VSENSE
NC_M1XTAL
DR0
DR1
M1_CBR
I_LIMIT
IND_SEL
VRM_PWRGD
VRM_OUTEN
SP0
SP1
M1_CBM
65-68
65-68
20
21
23
25
26
27
28
29
30
31
32
33
34
17
18
19
11
14
7
10
1
2
4
5
6
C19
C3
XTAL
CLK
OSC_BIAS
VSENSE+
VSENSEVNOM
RESET_
VID0
VID1
VID2
VID3
VID4
VID_SEL
DR0
DR1
CLK_SEL
PRIM_SEC
CBR
I_LIM
IND_SEL
PWRGD
OE
SP0
SP1
CBM
C806
U802
VT1100M
R54
R43
R53
R50
SIGNAL=VDD;12,13,15,22,41,55
SIGNAL=GND;16,24,42,56
SIGNAL=NC;3
PRIMARY VRM
+5V
65-68
65-68
65-68
65-68
65-68
65-68
+5V
N_VSENSE
P_VSENSE
N_VSENSE
M1_RESET
VIDA0
VIDA1
VIDA2
VIDA3
VIDA4
VNOM
65-68
32,66-68
12,66-68
65-68
65-68
65
R92
12_PROC
R117
C45
.1UF
.1UF
R60
.1UF
22K
.1UF
R57
61
62
63
64
57
58
59
60
51
52
53
54
47
48
49
50
35
36
37
38
39
40
43
44
45
46
R74
R75
M1_CBA
M1_CBB
M1_CLK33
M1_CBC
M1_CBD
I
0I
0
+5V
R48
NI
R49
IND_SEL
Install this for future revision of the chip
S5_CB0
S5_CB1
S5_CB2
S5_CB3
NC1
NC2
S4_CB0
S4_CB1
S4_CB2
S4_CB3
S3_CB0
S3_CB1
S3_CB2
S3_CB3
S2_CB0
S2_CB1
S2_CB2
S2_CB3
CB_A
CB_B
CLK_33
CB_C
CB_D
OVP
S1_CB0
S1_CB1
S1_CB2
S1_CB3
66-68
65-68
65
65-68
M1_OVP
66-68
66-68
66-68
66-68
66-68
6.19K
R73
M1_CBR
M1_CBM
*
*
10K
M1_CBR
M1_CBM
1%
G5
G4
G7
F1
G1
F7
G6
G2
65-68
65
R90
6.19K
R76
V2
V1
1%
CB3
CB2
CB1
CB0
CBR
CBM
G7
F1
G1
F7
G6
G2
G5
G4
V2
V1
+5V
C877
65-68
65
VT1100S
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1UF
C856
12_PROC
C855
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1%
G5
G4
G7
F1
G1
F7
G6
G2
L5
I
6.19K
1%
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
200NH
R89
M1_CBR
M1_CBM
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
6.19K
R91
M1_CBR
M1_CBM
U9
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
65-68
65
CB3
CB2
CB1
CB0
CBR
CBM
VT1100S
U5
10K
*
l. a
w
w
t
p
R61
s
p
o
m
e
h
c
G5
G4
G7
F1
G1
F7
G6
G2
1UF
25V
1UF
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
200NH
L10
I
VT1100S
it c
U10
VT1100S
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
U8
1UF
C851
12_PROC
2
+5V
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
1UF
C853
12_PROC
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1UF
C849
c
.
s
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
L9
I
1UF
+5V
L11
25V
1UF
C876
I
200NH
200NH
1UF
C852
25V
C875
m
o
0
0
1UF
C836
12_PROC
1UF
C850
+5V
25V
C1UF
C835
119919-098
2.2K
R1164
B
1
R4
Q841
SOT23FT
E 106127-002
12_PROC
NI
R28
I
PRIMARY
VRM
.1UF
NC_M2XTAL
139708-077
10K
119919-114
R1166
119919-114
+5V
62K
C2
6.8NF
R30
47.5
10K
R1165
R10
NI
R3
11,65,67,68
11,65,67,68
11,65,67,68
11,65,67,68
11,65,67,68
65,67,68
P_VSENSE
N_VSENSE
NI
0
R11
VIDA0
VIDA1
VIDA2
VIDA3
VIDA4
VNOM 0
DR0
DR1
M2_CBR
I_LIMIT
IND_SEL
65,67,68
M1_CBR
65,67,68
65,67,68
65-68
66
66
10K
M1_RESET
65,67,68
65,67,68
65,67,68
65,67,68
65,67,68
65,67,68
VRM_OUTEN
SP0
SP1
M2_CBM
VRM_PWRGD
C61
1
2
4
5
6
C42
XTAL
CLK
OSC_BIAS
VSENSE+
VSENSEVNOM
RESET_
VID0
VID1
VID2
VID3
VID4
VID_SEL
DR0
DR1
CLK_SEL
PRIM_SEC
CBR
I_LIM
IND_SEL
PWRGD
OE
SP0
SP1
CBM
C20
VT1100M
U800
SIGNAL=VDD;12,13,15,22,41,55
SIGNAL=NC;3
20
21
23
25
26
27
28
29
30
31
32
33
34
17
18
19
11
14
7
10
C44
61
62
63
64
57
58
59
60
51
52
53
54
47
48
49
50
35
36
37
38
39
40
43
44
45
46
SOT23FT
107816-002
Q842
S5_CB0
S5_CB1
S5_CB2
S5_CB3
NC1
NC2
S4_CB0
S4_CB1
S4_CB2
S4_CB3
S3_CB0
S3_CB1
S3_CB2
S3_CB3
S2_CB0
S2_CB1
S2_CB2
S2_CB3
CB_A
CB_B
CLK_33
CB_C
CB_D
OVP
S1_CB0
S1_CB1
S1_CB2
S1_CB3
0
0
0
0
0
R46
R45
NI
NI
NI
NI
NI
12,65,67,68
32,65,67,68
.1UF
+5V
.1UF
.1UF
M1_CBD
M1_CBC
M1_CLK33
M1_CBB
M1_CBA
NI
66
66
R8
65,67,68
65,67,68
65,67,68
65,67,68
65,67,68
1%
M1_OVP
6.19K
R25
M2_CBR
M2_CBM
R6
G5
G4
G7
F1
G1
F7
G6
G2
M1_RESET
I
0I
0
R1
R2
R5
R7
R9
65-68
66
66
6.19K
R31
M2_CBR
M2_CBM
R24
1%
65,67,68
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
G7
F1
G1
F7
G6
G2
VT1100S
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
66
66
G5
G4
V2
V1
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1%
G5
G4
G7
F1
G1
F7
G6
G2
R56
M2_CBR
M2_CBM
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
6.19K
R29
M2_CBR
M2_CBM
U1
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
U3
66
66
CB3
CB2
CB1
CB0
CBR
CBM
VT1100S
l. a
w
w
t
p
s
p
o
*
w
*
m
e
h
c
1%
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
I
200NH
L2
6.19K
G5
G4
G7
F1
G1
F7
G6
G2
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
U4
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
U2
VT1100S
200NH
L3
VT1100S
1UF
C825
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
1UF
C837
12_PROC
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1UF
C824
12_PROC
it c
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1UF
L4
I
200NH
25V
C804
L1
I
200NH
1UF
+5V
25V
C807
1UF
C832
+5V
c
.
s
1UF
C834
12_PROC
1UF
C841
12_PROC
m
o
10K
2N7002
1UF
C833
1UF
C838
+5V
+5V
1UF
25V
1UF
C823
25V
C805
NI
C85
0 R86
VIDA0
VIDA1
VIDA2
VIDA3
VIDA4
VNOM 0
47.5
139708-077
62K
6.8NF
R72
R107
C77
NI
R71
NC_M3XTAL
1%
SECONDARY VRM
NI
R106
11,65,66,68
11,65,66,68
11,65,66,68
11,65,66,68
11,65,66,68
65,66,68
R87
P_VSENSE
N_VSENSE
DR0
DR1
M3_CBR
I_LIMIT
IND_SEL
VRM_PWRGD
VRM_OUTEN
SP0
SP1
M3_CBM
.1UF
C59
XTAL
CLK
OSC_BIAS
VSENSE+
VSENSEVNOM
RESET_
VID0
VID1
VID2
VID3
VID4
VID_SEL
DR0
DR1
CLK_SEL
PRIM_SEC
CBR
I_LIM
IND_SEL
PWRGD
OE
SP0
SP1
CBM
C76
VT1100M
U804
QF64BT
192375-001
SIGNAL=VDD;12,13,15,22,41,55
SIGNAL=NC;3
20
21
23
25
26
27
28
29
30
31
32
33
34
17
18
19
11
14
7
10
1
2
4
5
6
C86
S5_CB0
S5_CB1
S5_CB2
S5_CB3
NC1
NC2
S4_CB0
S4_CB1
S4_CB2
S4_CB3
S3_CB0
S3_CB1
S3_CB2
S3_CB3
S2_CB0
S2_CB1
S2_CB2
S2_CB3
CB_A
CB_B
CLK_33
CB_C
CB_D
OVP
S1_CB0
S1_CB1
S1_CB2
S1_CB3
61
62
63
64
57
58
59
60
51
52
53
54
47
48
49
50
35
36
37
38
39
40
43
44
45
46
NI
NI
NI
NI
NI
R41
R42
0
0
0
0
0
65,66,68
M1_CBR
67
65,66,68
67
65,66,68
65,66,68
65,66,68
M1_RESET
65,66,68
65,66,68
65,66,68
65,66,68
65,66,68
10K
12,65,66,68
32,65,66,68
.1UF
+5V
.1UF
M1_CBD
M1_CBC
M1_CLK33
M1_CBB
M1_CBA
67
67
R115
65,66,68
65,66,68
65,66,68
65,66,68
65,66,68
I
0I
0
R108
R110
R111
R112
R116
NI
1%
G5
G4
G7
F1
G1
F7
G6
G2
M3_CBR
M3_CBM
M1_OVP
6.19K
R88
M3_CBR
M3_CBM
.1UF
R113
*
67
67
R84
6.19K
R114
1%
65,66,68
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
G7
F1
G1
F7
G6
G2
VT1100S
G5
G4
V2
V1
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
67
67
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1%
ABGA49A
192376-001
G5
G4
G7
F1
G1
F7
G6
G2
R109
M3_CBR
M3_CBM
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
6.19K
R85
M3_CBR
M3_CBM
U13
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
U11
67
67
CB3
CB2
CB1
CB0
CBR
CBM
VT1100S
l. a
w
w
t
p
s
p
o
6.19K
w
*
m
e
h
c
1%
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
G5
G4
G7
F1
G1
F7
G6
G2
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
L14
U16
VT1100S
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
1UF
C858
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
1UF
C866
12_PROC
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1UF
C859
12_PROC
U12
I
200NH
VT1100S
I
200NH
L12
it c
c
.
s
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1UF
I
200NH
L17
25V
C864
L13
I
200NH
+5V
25V
1UF
C878
1UF
C865
+5V
m
o
10K
+5V
1UF
C880
1UF
C862
1UF
C885
12_PROC
1UF
C863
12_PROC
25V
1UF
C879
+5V
25V
1UF
C861
6.8NF
C128
139708-077
R157
R154
NI
R193
NC_M4XTAL
47.5
1%
SECONDARY VRM
62K
NI
R156
65-67
11,65-67
11,65-67
11,65-67
11,65-67
11,65-67
0
R184
NI
VIDA0
VIDA1
VIDA2
VIDA3
VIDA4
VNOM 0
P_VSENSE
N_VSENSE
R186
DR0
DR1
M4_CBR
I_LIMIT
IND_SEL
VRM_PWRGD
VRM_OUTEN
SP0
SP1
M4_CBM
65-67
M1_CBR
65-67
65-67
68
68
10K
65-67
M1_RESET
65-67
65-67
65-67
65-67
65-67
65-67
32,65-67
.1UF
C129
.1UF
C172
XTAL
CLK
OSC_BIAS
VSENSE+
VSENSEVNOM
RESET_
VID0
VID1
VID2
VID3
VID4
VID_SEL
DR0
DR1
CLK_SEL
PRIM_SEC
CBR
I_LIM
IND_SEL
PWRGD
OE
SP0
SP1
CBM
C127
U805
VT1100M
QF64BT
192375-001
SIGNAL=VDD;12,13,15,22,41,55
SIGNAL=NC;3
20
21
23
25
26
27
28
29
30
31
32
33
34
17
18
19
11
14
7
10
1
2
4
5
6
C105
S5_CB0
S5_CB1
S5_CB2
S5_CB3
NC1
NC2
S4_CB0
S4_CB1
S4_CB2
S4_CB3
S3_CB0
S3_CB1
S3_CB2
S3_CB3
S2_CB0
S2_CB1
S2_CB2
S2_CB3
CB_A
CB_B
CLK_33
CB_C
CB_D
OVP
S1_CB0
S1_CB1
S1_CB2
S1_CB3
61
62
63
64
57
58
59
60
51
52
53
54
47
48
49
50
35
36
37
38
39
40
43
44
45
46
NI
NI
NI
NI
NI
R133
R134
0
0
0
0
0
12,65-67
.1UF
+5V
.1UF
M1_CBD
M1_CBC
M1_CLK33
M1_CBB
M1_CBA
68
68
R191
65-67
65-67
65-67
65-67
65-67
R183
M4_CBR
M4_CBM
I
0I
0
R185
R187
R188
R189
R190
NI
1%
M1_OVP
6.19K
R135
*
G5
G4
G7
F1
G1
F7
G6
G2
68
68
R132
M4_CBR
M4_CBM
6.19K
R192
1%
65-67
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
G7
F1
G1
F7
G6
G2
VT1100S
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
G5
G4
V2
V1
68
68
R155
M4_CBR
M4_CBM
U20
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
U23
68
68
CB3
CB2
CB1
CB0
CBR
CBM
VT1100S
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
1%
M4_CBR
M4_CBM
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
6.19K
l. a
w
w
t
p
s
p
o
G5
G4
G7
F1
G1
F7
G6
G2
R118
6.19K
w
*
m
e
h
c
1%
V2
V1
CB3
CB2
CB1
CB0
CBR
CBM
G5
G4
G7
F1
G1
F7
G6
G2
V2
V1
VT1100S
1UF
C924
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
1UF
C901
12_PROC
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
U17
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
VOUT16
VOUT17
1UF
C937
12_PROC
U21
L21
I
200NH
CB3
CB2
CB1
CB0
CBR
CBM
VT1100S
I
200NH
L26
it c
A2
A3
A4
B2
B3
B4
C2
C3
C4
D2
D3
D4
E2
E3
E4
F2
F3
F4
I
200NH
L18
25V
1UF
C899
L22
I
200NH
1UF
+5V
25V
C923
1UF
C900
+5V
c
.
s
m
o
10K
1UF
C888
12_PROC
1UF
C922
12_PROC
1UF
C887
1UF
C913
+5V
+5V
25V
1UF
C886
25V
1UF
C912
+3.3V
+5V
+1.5V
+1.8V
This data is needed for the QUAD DESIGN

PCB modeling tool and will get inserted into
the $A_PROPERTIES section of the netlist,
and passed on to the Allegro .brd database.
-5V
VDD3_AUX
t
p
VOLTAGE ATTRIBUTES
VOLTAGE=0
VOLTAGE=0
VOLTAGE=-12.0
VOLTAGE=12.0
VOLTAGE=3.3
VOLTAGE=5.0
VOLTAGE=3.3
VOLTAGE=-5.0
VOLTAGE=1.8
VOLTAGE=2.0
VOLTAGE=1.5
VOLTAGE=5.0
VOLTAGE=3.3
VOLTAGE=2.5
+2.5V
l. a
w
w
w
VDD_AUX
+1.5V/+3.3V
SYMBOL NAME
VDD2_DUAL.1
VDD2.1
VDD3_AUX.1
VDD3.1
VDD_MINUS5.1
VDD_AUX.1
VCC.1
VDD_MINUS12.1
VDD12.1
+12V
VOLTAGE NET NAME
+2.5V_S3
+2.5V
VDD3_AUX
+3.3V
-5V
VDD_AUX
+5V
-12V
+12V
VOLTAGE DESIGNATION
m
e
h
c
+1.8V
+1.5V
VCCP
+1.5V/+3.3V
GND
GNDA
AVDD
VDD1_8.1
VCC1-5.1
VCCP.1
VDDQ.1
GND.2
AGND.1
AVDD.1
it c
-12V
c
.
s
AVDD
GNDA
GND
VDDQ
VCCP
VTT
VDD1_8
VDD2_5_S3
VDD2
VDD3_AUX
VDD3
NEG5V
VDD_AUX
VDD
NEG12V
VDD12
m
o
s
p
o
9
7
5
3
1
P9
P7
P5
P3
P1
NC_U26_8
U26
219333-001
LAYER3_5MIL
MIN_LINE_WIDTH=5
MIN_LINE_WIDTH=18
P10
P8
P6
P4
P2
TPOINT=OFF
10
8
6
4
2
BOT_18MIL MIN_LINE_WIDTH=18
LAYER6_5MIL
MIN_LINE_WIDTH=5
11
12
13
14
15
16
17
18
P11
P12
P13
P14
P15
P16
P17
P18
CLASS=MISC
10
74LCX125
VDD3_AUX;14
9
Z_COUPON_CPN8C
19
20
21
22
23
24
25
26
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
27
28
29
30
31
32
33
34
CPN1
w
6
l. a
w
w
5
t
p
MOUNTING
HOLE
CM159MIN
CM2
s
p
o
CM1
CM3
MOUNTING
HOLE
CM159MIN
MOUNTING
HOLE
CM6
MOUNTING
HOLE
CM5
MOUNTING
HOLE
m
e
h
c
CM9
MOUNTING
HOLE
a
debug only.
TPOINT=OFF
100186-002
C1HA1B
NI
E36
OFF
100186-002
C1HA1B
NI
E37
CM8
MOUNTING
HOLE
it c
CPN2_1
CM10
MOUNTING
HOLE
CPN2_2
MIN_LINE_WIDTH=18
MIN_LINE_WIDTH=18
c
.
s
m
o
E34
TPOINT=OFF
C1HA1B
100186-002
NI
E35
TPOINT=OFF
C1HA1B
100186-002
NI
CM140MIN
CM4
MOUNTING
HOLE

Inventec Laptop Motherboard Schematic Diagram

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Inventec Laptop Motherboard Schematic Diagram

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8

INTERNAL SPKR & JACK

RESET BLOCK DIAGRAM

AUDIO REGULATOR /MIC

I2C SELECT CONTROL

PS_ON & RESET CKT

BATTERY & RTC OSC.

SIO2 POWER CKT

CPU PLL VOLTAGE

PARALLEL PORT TERM.

USB PORTS 1-2

Embedded SCSI Controller

SCSI CTLR DECOUPLING & LED CKT

SCSI ON-BOARD AUTO-TERMINATION

INTERNAL LVD/SE SCSI CONNECTOR

CHA RSL TERMINATION

PCI CONNECTOR SLOT 1

PCI CONNECTOR SLOT 2

PCI CONNECTOR SLOT 3

LPC I/F BUS

used for level translation

Place 4.7 uF caps close to L

Clock Power - Use Islands

Use Normal and Test Modes

Place these resistors less than 1 inch from DRCG

init, cut this current spike down.

the DRCG in test mode during

on the rambus channel. putting

mode. this caused a current spike

that saw some commands in broadcast

Some 64 mbit tech rimms had a bug

51ohm and 39ohm.

If C815 and C796 are

latency coming out of

jitter will decrease, but

changed to 0.1 uF,

make sure BPMx lines are from Xu1-xu2-ITP

Make sure GTL_RESET_ is from Colusa- XU2-XU1-ITP

DECOUPLING FOR GTL DATA SIGNALS

CLOSE TO CPU1 PACKAGE ON BOTTOM SIDE

Place <0.5" around processor #1 socket

for VCCP decoupling

DECOUPLING FOR GTL ADDR/CTRL SIGNALS

UNDER CPU1 CAVITY

for signal integrity

for VCCP decoupling

Place <0.5" around processor #1 socket

DECOUPLING FOR GTL DATA SIGNALS

CLOSE TO CPU1 PACKAGE ON BOTTOM SIDE

DECOUPLING FOR GTL ADDR/CTRL SIGNALS

CLOSE TO CPU1 PACKAGE ON BOTTOM SIDE

UNDER CPU1 CAVITY

for signal integrity

These parts go near the VRM section

For VRM Heat sink guiding

VRM decoupling & pullups

VCCP decoupling near VRM plane

VCCP decoupling near VRM plane

place the header after gtl_reset to ITP

For proto purposes only

Comparator & JT disable

need new part shape

In a 1P config, both VRMs get enabled but if the VRM is plugged,

COST OF LOGIC GATE SOLUTION: 70c as COMPARED TP 96c FOR PAL