INTRODUCTION

CMOS inverters (Complementary NOSFET Inverters) are some of the most widely used
and adaptable MOSFET inverters used in chip design. They operate with very little power loss
and at relatively high speed. Furthermore, the CMOS inverter has good logic buffer
characteristics, in that, its noise margins in both low and high states are large.
This short description of CMOS inverters gives a basic understanding of the how a
CMOS inverter works. It will cover input/output characteristics, MOSFET states at different
input voltages, and power losses due to electrical current.

CMOS INVERTER:
A CMOS inverter contains a PMOS and a NMOS transistor connected at the drain and
gate terminals, a supply voltage VDD at the PMOS source terminal, and a ground connected at
the NMOS source terminal, were VIN is connected to the gate terminals and VOUT is connected
to the drain terminals.(See diagram). It is important to notice that the CMOS does not contain
any resistors, which makes it more power efficient that a regular resistor-MOSFET inverter. As
the voltage at the input of the CMOS device varies between 0 and 5 volts, the state of the NMOS
and PMOS varies accordingly. If we model each transistor as a simple switch activated by VIN,
the inverters operations can be seen very easily: