Slide 1 2014 W.

Rhett Davis Digital Integrated Circuit Design Module MOSModShort

Digital Integrated Circuit Design
Module MOSModShort
MOSFET Models:
Short-Channel Effects
W. Rhett Davis
Slide 2 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
A model for manual analysis
source: Rabaey
Slide 3 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
I
D
versus V
GS
0 0.5 1 1.5 2 2.5
0
1
2
3
4
5
6
x 10
-4
V
GS
(V)
I
D
(
A
)
0 0.5 1 1.5 2 2.5
0
0.5
1
1.5
2
2.5
x 10
-4
V
GS
(V)
I
D
(
A
)
quadratic
quadratic
linear
Long Channel
Short Channel
source: Rabaey
Problem: Short Channel Effects
(early saturation, became apparent around 600nm)
Slide 4 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
I
D
versus V
DS
-4
V
DS
(V)
0 0.5 1 1.5 2 2.5
0
0.5
1
1.5
2
2.5
x 10
I
D
(
A
)
VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
0 0.5 1 1.5 2 2.5
0
1
2
3
4
5
6
x 10
-4
V
DS
(V)
I
D
(
A
)
VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
Resistive Saturation
V
DS
= V
GS
- V
T
Long Channel Short Channel
source: Rabaey
Slide 5 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Velocity Saturation
(V/m)

c
= 1.5
u
n
(
m
/
s
)
u
sat
= 10
5
Constant mobility (slope = )
Constant velocity
source: Rabaey
Slide 6 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Short-Channel I-V Model
( ) ( )
DS
DS
DS T GS
C
DS
D
V
V
V V V
L
W
k
L
V
I

+
(

'
|
|
.
|

\
|
+
= 1
2
1
1
2
I
D
Long-channel device
Short-channel device
V
DS
V
DSAT
V
GS
- V
T
V
GS
= V
DD
(Take ECE 557
for a better
explanation)
source: Rabaey
Slide 7 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Simplified Model for Velocity Saturation
Assume abrubt transition from saturation to
velocity saturation.
Assume V
DS
term L
C
(constant throughout
Velocity Saturation Region)
Call this Value V
DSAT
New equation:
( ) ( )
DS
DSAT
DSAT T GS D
V
V
V V V
L
W
k I +
(

'
= 1
2
2
Slide 8 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
A unified model for manual analysis
S
D
G
B
Triode when V
min
=V
DS
Saturation when V
min
=V
GS
-V
T
Velocity Saturated when V
min
=V
DSAT
source: Rabaey
Source:
Rabaey, DigIC
2003, sec. 3.3,
pp. 94-103
Slide 9 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Simple Model versus SPICE
Source: Rabaey, LPDE 2009, sec. 2.8, sub 100-nm technology
Blue line:
Actual V
DSAT
Slide 10 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Example 1
V
T0
(V) (V
0.5
) V
DSAT
(V) k (A/V
2
) (V
-1
)
NMOS 0.3 0.4 0.4 250x10
-6
0.1
Assume W/L = 1 and V
SB
=0
Find I
D
for the device V
GS
=0.2 & V
DS
=0.1
V
min
Calculation
Sat. V
GS
-V
t
Lin. V
DS
Vel. Sat. V
DSAT
( ) ( )
DS T GS D
V
V
V V V
L
W
k I +
(

' = 1
2
2
min
min
Slide 11 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Example 2
V
T0
(V) (V
0.5
) V
DSAT
(V) k (A/V
2
) (V
-1
)
NMOS 0.3 0.4 0.4 250x10
-6
0.1
Assume W/L = 1 and V
SB
=0
Find I
D
for the device V
GS
=0.5 & V
DS
=0.1
V
min
Calculation
Sat. V
GS
-V
t
Lin. V
DS
Vel. Sat. V
DSAT
( ) ( )
DS T GS D
V
V
V V V
L
W
k I +
(

' = 1
2
2
min
min
Slide 12 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Example 3
V
T0
(V) (V
0.5
) V
DSAT
(V) k (A/V
2
) (V
-1
)
NMOS 0.3 0.4 0.4 250x10
-6
0.1
Assume W/L = 1 and V
SB
=0
Find I
D
for the device V
GS
=0.5 & V
DS
=1.0
V
min
Calculation
Sat. V
GS
-V
t
Lin. V
DS
Vel. Sat. V
DSAT
( ) ( )
DS T GS D
V
V
V V V
L
W
k I +
(

' = 1
2
2
min
min
Slide 13 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Example 4
V
T0
(V) (V
0.5
) V
DSAT
(V) k (A/V
2
) (V
-1
)
NMOS 0.3 0.4 0.4 250x10
-6
0.1
Assume W/L = 1 and V
SB
=0
Find I
D
for the device V
GS
=1.0 & V
DS
=1.0
V
min
Calculation
Sat. V
GS
-V
t
Lin. V
DS
Vel. Sat. V
DSAT
( ) ( )
DS T GS D
V
V
V V V
L
W
k I +
(

' = 1
2
2
min
min
Slide 14 2014 W. Rhett Davis Digital Integrated Circuit Design Module MOSModShort
Digital Integrated Circuit Design
Module MOSModShort
MOSFET Models:
Short-Channel Effects
W. Rhett Davis
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