Chapter 3:

BIPOLAR JUNCTION
TRANSISTOR
 Learning Outcomes
At the end of this chapter, the students should
be able to:

●Understand the basic transistor construction,

operation & configuration

●Discuss transistor parameters and

characteristics

● Develop working knowledge of a transistor

through use of specification sheet
2
● In the nineteenth century, scientists were rarely
inventors: Samuel F.B. Morse, Alexander
Graham Bell, Thomas Alva Edison
● In the twentieth century, scientists invaded the
domain of invention: John Fleming invented the
vacuum diode tube and Lee De Forest invented
the triode tube
● The transistor can be viewed, as can the laser,
as an invention of physicists.
– Source: Bunch and Hellemans, The Timetables of
Technology, Simon and Schuster, 1993
 William B. Shockley (1910-1989)
● Known as the “Father of the Transistor”
● joined Bell Labs in 1936 in the vacuum tube
department (solid state physicist)
● Moved to the semiconductor laboratory:
– “It has today occurred to me that an amplifier using
semiconductors rather than vacuum tubes is in
principle possible.”
William B. Shockley
 Walter Houser Brattain

● Experimental physicist who also worked on

vacuum tubes
● Joined Shockley and Bardeen in
semiconductor research.
Walter Houser Brattain
 John Bardeen (1908-1991)
● Physicist, Naval Ordnance Laboratory 1941-1945
● Research Physicist, Bell Telephone Laboratories
1945-1951 (theorist)
● Professor of Electrical Engineering,
– University of Illinois, 1951-1978
● Nobel Prize in Physics: 1956 and 1972
● transistor (1956) and superconductivity (1972)
– “I knew the transistor was important, but I never
foresaw the revolution in electronics it would bring.”
John Bardeen
 Nobel Prize in 1956

● Shockley, Brattain and Bardeen start

working with p- and n- type germanium and
silicon semiconductors in 1946
● Bardeen and Brattain put together the first
transistor in December 1947:
– a point-contact transistor consisting of a single
germanium crystal with a p- and an n- zone.
Two wires made contact with the crystal near
the junction between the two zones like the
“whiskers” of a crystal-radio set.
Point-contact-transistor
● Shockley immediately set out to define the
effects that they had observed, i.e., to explain
the physics of transistors
● A few months later, Shockley devised the
junction transistor, a true solid-state device
which did not need the “whiskers” of the point-
contact transistor.
● AT&T licensed the transistor very cheaply to
other manufacturers and waived patent rights
for the use of transistors in hearing aids, in the
spirit of its founder, Alexander Graham Bell
Shockley’s sandwitch transistor
Manufacturing transistors on a chip

● Shockley Semiconductor Laboratories,

Palo Alto, CA (1954)
– the beginnings of “Silicon Valley”
● Fairchild Semiconductors founded in Mountain
View, CA (1957) by eight Shockley employees
including Gordon Moore and Robert Noyce
● Bell Labs had made several improvements in
the manufacturing of crystals of silicon and
germanium with the impurities needed to create
semiconductors
 Meanwhile….

● Jack Kilby worked for Texas Instruments

● Conceived of a manufacturing method that
allowed the miniaturization of electronic
circuits on semiconductor chips, called
integrated circuits or ICs.
● Kilby had reduced the transistor to the size of
a match head
● Texas Instruments sold these for $450.
 Introduction

• The basic of electronic system nowdays is semiconductor

device. The famous and commonly use of this device is
BJTs (Bipolar Junction Transistors).

• It can be use as amplifier and logic switches.

• BJT consists of three terminal:

collector : C
base :B
emitter : E

17
 BJT consists of three
terminal:
 collector : C
 base :B
emitter : E
Two types of BJT :
pnp and
npn
 Bipolar Transistor
• NPN / PNP Block Diagrams
Emitter Collector
N P N

Base Emitter Collector

P N P

Base
 Transistor Construction (Size)
There are two types of transistors: (a) pnp and (b) npn-type.

20
 Transistor Construction

• 3 layer semiconductor device consisting:

• 2 n- and 1 p-type layers of material  npn

transistor
• 2 p- and 1 n-type layers of material pnp
transistor
• The term bipolar reflects the fact that holes and
electrons participate in the injection process into
the oppositely polarized material

• A single pn junction has two different types of bias:

• forward bias
• reverse bias
•
 Position of the terminals and symbol
of BJT.

• Base is located at the middle

and more thin from the level
of collector and emitter
• The emitter and collector
terminals are made of the
same type of semiconductor
material, while the base of the
other type of material
 Transistor currents
-The arrow is always drawn
on the emitter

-The arrow always point

toward the n-type

-The arrow indicates the

direction of the emitter
current:
pnp:E B
IC=the collector current
npn: B E
IB= the base current
IE= the emitter current
• By imaging the analogy of diode, transistor can be
construct like two diodes that connected together.
• It can be conclude that the work of transistor is base on
work of diode.
 Transistor Operation
• The basic operation will be described using the pnp
transistor. The operation of the pnp transistor is
exactly the same if the roles played by the electron
and hole are interchanged.
• One p-n junction of a transistor is reverse-biased,
whereas the other is forward-biased.

Forward-biased junction Reverse-biased junction

of a pnp transistor of a pnp transistor
• Both biasing potentials have been applied to a pnp
transistor and resulting majority and minority carrier
flows indicated.
• Majority carriers (+) will diffuse across the forward-
biased p-n junction into the n-type material.
• A very small number of carriers (+) will through n-type
material to the base terminal. Resulting IB is typically in
order of microamperes.
• The large number of majority carriers will diffuse
across the reverse-biased junction into the p-type
material connected to the collector terminal.
• Majority carriers can cross the reverse-biased
junction because the injected majority carriers will
appear as minority carriers in the n-type material.
• Applying KCL to the transistor :
IE = IC + IB
• The comprises of two components – the majority
and minority carriers
IC = ICmajority + ICOminority
• ICO – IC current with emitter terminal open and is
called leakage current.
 Common--Base Configuration
Common
• Common-base terminology is derived from the fact that
the :
- base is common to both input and output of the
configuration.
- base is usually the terminal closest to or at
ground potential.
• All current directions will refer to conventional (hole)
flow and the arrows in all electronic symbols have a
direction defined by this convention.
• Note that the applied biasing (voltage sources) are such
as to establish current in the direction indicated for each
branch.
Common-base configuration (CB)
• Fig below shows the common-base configuration for pnp
and npn transistor.
• CB is derived from the fact that the :
- base is common to both i/p and o/p of the configuration.
- base is usually the terminal closest to or at ground potential

C
IC C IC
B B
IB
E IE IB E IE
pnp npn
Fig. 4.3: Symbols used with the CB configuration
30
Analysis of Common-base configuration for pnp
Step 1:
• B-E junction must be forward bias

E C B
p
n
p

B IB IE
E
VEB
VEB pnp
31
Analysis of Common-base configuration for pnp
Step 2:
• B-C junction must be reverse bias
• ICBO=ICO=0 A is a reverse saturation current and normally
known as leakage current

C
E C ICBO
B
B IB

VCB
pnp
32
Analysis of Common-base configuration for pnp

• Current base, IB (A) is small compare to current

emitter, IE (mA) and current collector,IC (mA).

• The relationship among these current can be analyse

with KCL : IE = IB + IC

• Current collector is produce from the total sum of

current emitter and leakage current.

• Current emitter that flow through collector known as

DC IE . The value is big compare to leakage current.

33
The analysis can be understand by expression below:

IC = IC(majority) + IC(minority)

IC = IE + ICBO

IC = IE (ignore ICBO due to small value)

= I C Ideally  = 1, but in reality it is between 0.9 and

0.998.
IE
thus,
IC IE
is a common base current gain factor that shows the
efficiency

34
● To describe the behavior of common-base amplifiers
requires two set of characteristics:
- Input or driving point characteristics.
- Output or collector characteristics

● The output characteristics has 3 basic regions:

- Active region –defined by the biasing arrangements
- Cutoff region – region where the collector current is 0A
- Saturation region- region of the characteristics to the left of
- VCB = 0V
 IE(mA) IC(mA)
VCB=-20V
IE=6mA
VCB=-10V 5
VCB=-1V IE=5mA
9 6
IE=4mA
7
Saturation4 ActiveregionI =3mA
5 region 3 E

IE=2mA
3 2
1 IE=1mA
1 IE=0mAV (V)
VBE(V) CB

-5 -10-15-20
0.2 0.4 0.6 0.81.0 Cutoffregion

Input characteristics for a Output characteristics for a

common-base pnp transistor common-base pnp transistor
37
Energy band of a NPN transistor

38
Try to do analysis
Common-base configuration for

npn !!!

39
Transistor as an amplifier

40
 Common-emitter configuration (CE)
• It is called common-emitter configuration since :
- emitter is common or reference to both i/p and o/p
terminals.
- emitter is usually the terminal closest to or at ground
potential.

• Almost amplifier design is using connection of CE

due to the high gain for current and voltage.

• Two set of characteristics are necessary to describe the

behavior for CE ;input (base terminal) and output (collector
terminal) parameters.

41
Proper Biasing common-emitter configuration in active region
C IC

n
IC
IB B p
n VCC IB VCC
VBB VBB
IE E IE

(a) npntransistor configuration

C IC
IE IC IB
IC
p
IB
n VCC
IB B VCC
p
VBB
VBB IE
IE E

(b) pnptransistor configuration

Fig4.7: Common-emitter configuration
42
Common Emitter Characteristics

Treating the transistor as a current node:

● Also: IE  IC IB

IC αIE  Ico
 Common Emitter Characteristics

● Hence:

IC  α ΙC IB)  ICO
which after some rearrangement gives

    ICO 
IC   IB   
   1- α 
 Common Emitter Characteristics

● Define a common emitter current-transfer ratio



 α 
β 
Such that:
1 α 

 ICO 
IC  βIB   
 1- α 
 Common Emitter Characteristics

● Since reverse saturation current is negligible

the second term on the right hand side of this
equation can usually be neglected (even
though (1- α) is small)
● Thus

C  B
 Common Emitter Characteristics

● We note, in passing that, if β can be regarded

as a constant for a given transistor then

c  b

● For a practical (non-ideal) transistor this is only

true at a particular bias (operating) point.
 Common Emitter Characteristics

● A small change in α causes a much bigger

change in ß which means that ß can vary
significantly, even from transistor to transistor
of the same type.
● We must try and allow for these variations in
circuit design.
 Common Emitter Characteristics

● We can therefore draw an input characteristic

(plotting base current IB against base-emitter
voltage VBE) and
● an output characteristic (plotting collector
current Ic against collector-emitter voltage VCE)
 Common Emitter Characteristics

● We will be using these characteristic curves

extensively to understand:
● How the transistor operates as a linear
amplifier for a.c. signals.
● The need to superimpose the a.c. signals on
d.c. bias levels.
● The relationship between the transistor and the
circuit in which it is placed.
Common Emitter Characteristics

● Once these basics are understood we will

understand:
● Why we can replace the transistor by a
small signal (a.c.) equivalent circuit.
● How to derive a simple a.c. equivalent
circuit from the characteristic curves.
● Some of the limitations of our simple
equivalent circuit.
IDEAL CE INPUT (Base)
Characteristics
 IDEAL CE INPUT Characteristics

● The plot is essentially that of a forward biased

diode.
● We can thus assume VBE  0.6 V when
designing our d.c. bias circuits.
● We can also assume everything we know about
incremental diode resistance when deriving our
a.c. equivalent circuit.
● In the ‘non-ideal’ case IB will vary slightly with
VCE. This need not concern us.
IDEAL CE OUTPUT (Collector)
Characteristics
 IDEAL CE OUTPUT
(Collector) Characteristics
Avoid this
saturation
region
where we
try to
forward
bias both
junctions
 IDEAL CE OUTPUT

Avoid this cut-off region where we try to reverse

bias both junctions (IC approximately 0)
 IDEAL CE OUTPUT (Collector)
Characteristics
● The plots are all parallel to the VCE axis (i.e. IC
does not depend on VCE)
● The curves strictly obey IC = βIB
● In particular IC = 0 when IB = 0.
● We shall work with the ideal characteristic and
later on base our a.c. equivalent circuit model
upon it.
ACTUAL CE OUTPUT
Characteristics
IB =
 Characteristics of Common-Emitter
npn transistor(Actual)

(a) - Collector characteristics = output characteristics.

(b) - Base characteristics = input characteristics.
59
 ACTUAL CE OUPUT
Characteristics
● Salient features are:
● The finite slope of the plots (IC depends on
VCE)
● A limit on the power that can be dissipated.
● The curves are not equally spaced (i.e β varies
with base current, IB).
 ACTUAL CE OUPUT
Characteristics
● You will get to measure these curves in the
lab.
 Figure 4.3 Current flow for an npn BJT in the active region.
Most of the current is due to electrons moving from the emitter
through the base to the collector. Base current consists of holes
crossing from the base into the emitter and of holes that recombine
with electrons in the base.
Simulation of transistor as an amplifier

63
Example:
a) Using the o/p characteristics, determine IC at IB=30 A
VCE=10 V.
b) Using the i/p characteristics, determine IC at VBE=0.7 V
and VCE =10 V.

64
Solution: (a)
IC(mA)

IB=60 uA
6
IB=50 uA
5
IB=40 uA
4
Saturation Active region
region IB=30 uA
3

2 IB=20 uA

IB=10 uA
1
IB=0 uA
VCE(V)
VCE(sat) 5 10 15 20
ICEO ICBO Cutoff region

65
Solution: (b)
IC(mA)
IB(uA) VCE=1 V
VCE=10 V IB=60uA
6
100 VCE=20 V IB=50uA
90 5
80 IB=40uA
70 4
Saturation Activeregion I =30uA
60 region 3 B
50
40 2 IB=20uA
30
20 IB=10uA
1
10
IB=0uA
VBE(V) VCE(V)
VCE(sat) 5 10 15 20
0.2 0.4 0.6 0.8 1.0 Cutoffregion
IC EO IC B O

66
 Beta ()
• The ratio of dc collector current (IC) to the dc base current
(IB) is dc beta (dc ) which is dc current gain where IC and
IB are determined at a particular operating point, Q-point
(quiescent point).

• It’s define by the following equation: IC

dc IB
30 < dc < 300  2N3904
• On data sheet, dc=hFE with h is derived from ac hybrid
equivalent cct. FE are derived from forward-current
amplification and common-emitter configuration
respectivley.

67
• For ac conditions an ac beta has been defined as the
changes of collector current (IC) compared to the
changes of base current (IB) where IC and IB are
determined at operating point.

• On data sheet, ac=hfe

• It can defined by the following equation:

IC
ac IB VCE=constant

68
Example :
From o/p characteristics of CE configuration
find ac and dc with an operating point at
IB=25 A and VCE =7.5V.

69
Solution:
IC(mA)

IB=60uA
6
IB=50 uA
5
IB=40 uA
4
Saturation IB2 Active region
region IB=30 uA
3
IC2 2 Q- IB=20 uA
IC Ipoint
B1 IB=10 uA
IC1 1
IB=0 uA
VCE(V)
VCE(sat) 5 10 15 20
VCE 7.5 V Cutoff region

70
Common-collector configuration (CC)

• Also called emitter-follower (EF).

• It is called common-emitter configuration since both the

signal source and the load share the collector terminal as a
common connection point.

• The o/p voltage is obtained at emitter terminal.

• The input characteristic of CC configuration is similar

with CE configuration.

• All the current relationship for CE configuration are true

for CC configuration.

71
 C IC IC

n IB V EE
IE
IB p
B n VEE V BB
Vout
V BB IE
E

(a) npn tran sistor configu ration

C IC IC

p V BB IB VE E
IE
IB n
B p V EE Vout
VB B IE
E

(b) p np transistor configuration

Fig 4.8 : Common-coll ector configuration 72

 IE(mA)

IB=60 uA
6
IB=50 uA
5
IB=40 uA
4
Saturation Active region
region IB=30 uA
3

2 IB=20 uA

IB=10 uA
1
IB=0 uA
VCE(V)
VCE(sat) 5 10 15 20
Cutoff region
Fig 4.9: Output characteristic in CC configuration
for npn transistor 73
Example :
Calculate the emitter current for the common-collector
configuration below:

74
Limits of operation for transistor
• Many BJT transistor used as an amplifier. Thus it is
important to notice the limits of operations.
• At least 3 maximum values is mentioned in data sheet.
There are:
a) Maximum power dissipation at collector: PCmax or PD
b) Maximum collector-emitter voltage: VCEmax sometimes
named as VBR(CEO) or VCEO.
c) Maximum collector current: ICmax
• There are few rules that need to be followed for BJT
transistor used as an amplifier. The rules are:
i) transistor need to be operate in active region!
ii) IC < ICmax
ii) PC < PCmax

75
Transistor limits of operation

Note: VCE is at maximum and IC is at minimum (ICmax=ICEO) in the cutoff

region.
IC is at maximum and VCE is at minimum (VCEsat ) in the
saturation region.
The transistor operates in the active region between saturation and cutoff.
76
 Example : Refer to the fig.
Step1:
PD: maximum power The maximum collector
IC(mA) dissipation line
power dissipation,
PD=ICmax x VCEmax (1)
IB=60uA = 18m x 20 = 360 mW
ICmax 18 Step 2:
At any point on the characteristics the
IB=50uA
15 product of and must be equal to 360
IB=40uA mW.
12 Ex. 1. If choose ICmax= 5 mA, subtitute
Saturation Activeregion into the (1), we get
region 9 IB=30uA
VCEmaxICmax= 360 mW
IB=20uA VCEmax(5 m)=360/5=7.2 V
6
IB=10uA Ex.2. If choose VCEmax=18 V, subtitute
3 into (1), we get
IB=0uA VCEmaxICmax= 360 mW
VCE(V) (10) ICmax=360m/18=20 mA

VCE(sat) 5 10 15 20 VCEmax
Cutoffregion

77
 Derating PDmax

● PDmax is usually specified at 25°C.

● The higher temperature goes, the less is PDmax
● Example;
– A derating factor of 2mW/°C indicates the power
dissipation is reduced 2mW each degree
centigrade increase of temperature.

78
More Example:

Transistor 2N3904 used in the circuit with

VCE= 20 V.This circuit used at temperature
1250C. Calculate the new maximum IC.
Transistor 2N3904 have maximum power
dissipation is 625 mW. Derating factor is 5
mW/0C.

79
 Transistor 2N3904 used in the
Solution:
circuit with VCE= 20 V.This
Step 1:
circuit used at temperature
Temperature increase : 1250C – 250C = 1000C
1250C. Calculate the new
Step 2: maximum IC. Transistor

Derate transistor : 5 mW/0C x 1000C = 500 mW 2N3904 have maximum power

Step 3: dissipation is 625 mW. Derating

Maximum power dissipation at factor is 5 mW/0C.

1250C = 625 mW–500 mW=125 mW.

Step 4:
Thus ICmax = PCmax / VCE=125m/20 = 6.25 mA.
Step 5:
Draw the new line of power dissipation at 1250C .
80
Example:
The parameters of transistor 2N3055 as follows:
- Maximum power dissipation @ 250C=115 W
- Derate factor=0.66 mW/0C.
This transistor used at temperature 780C.
a) Find the new maximum value of power dissipation.
b) Find the set of new maximum of IC if VCE=10V, 20 V
and 40 V.

81
Solution:
Step 1:
Temperature increase : 780C – 250C = 530C
Step 2:
Derate transistor : 0.66mW/0C x 530C = 35 mW
Step 3:
Maximum power dissipation at 780C = 115W– 35W=80 mW.
Step 4:
ICmax = PCmax / VCE=80m/10 = 8 mA (point C)
ICmax = PCmax / VCE=80m/20 = 4 mA. (point B)
ICmax = PCmax / VCE=80m/40 = 2 mA (point A)

82
Step 5:
Draw the new line of power dissipation at 780C .
I C (m A )

I B=60 uA
18
I B=50 uA
15
I B=40 uA
12
C I B=30 uA
9
6 I B=20 uA
B IB=10 uA
3
A I B=0 uA
VC E(V )
10 20 30 40
83
Transistor Specification Sheet

84
 Transistor Testing
1. Curve Tracer
Provides a graph of the characteristic curves.
2. DMM
Some DMM’s will measure DC or HFE.
3. Ohmmeter

1. Curve Tracer
Provides a graph of the characteristic curves.
2. DMM
Some DMM’s will measure DC or HFE.
3. Ohmmeter

85