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  • Tabel Curs2

    Diunggah oleh

    Dan Mircea
    3 tayangan2 halaman
    This document describes a 1-bit full adder circuit. It shows the inputs of a and b, a carry-in bit cy_in, and the outputs of carry-out cy_out and sum y. It then lists the truth table that defines the functionality of the circuit, with cy_out and y being a function of a, b, and cy_in. It also shows the logic gate implementation of the circuit using AND, OR, and XOR gates.

    Deskripsi Asli:

    tabel logica adevar

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    This document describes a 1-bit full adder circuit. It shows the inputs of a and b, a carry-in bit cy_in, and the outputs of carry-out cy_out and sum y. It then lists the truth table that defines the functionality of the circuit, with cy_out and y being a function of a, b, and cy_in. It also shows the logic gate implementation of the circuit using AND, OR, and XOR gates.

    Hak Cipta:

    © All Rights Reserved
    Unduh sebagai XLSX, PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    3 tayangan2 halaman

    Tabel Curs2

    Diunggah oleh

    Dan Mircea
    This document describes a 1-bit full adder circuit. It shows the inputs of a and b, a carry-in bit cy_in, and the outputs of carry-out cy_out and sum y. It then lists the truth table that defines the functionality of the circuit, with cy_out and y being a function of a, b, and cy_in. It also shows the logic gate implementation of the circuit using AND, OR, and XOR gates.

    Hak Cipta:

    © All Rights Reserved
    Unduh sebagai XLSX, PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    dari 2

    Sumator de un bit

    cy_in

    cy_out

    0
    0
    0
    0
    1
    1
    1
    1

    0
    0
    1
    1
    0
    0
    1
    1

    0
    1
    0
    1
    0
    1
    0
    1

    0
    0
    0
    1
    0
    1
    1
    1

    0
    1
    1
    0
    1
    0
    0
    1

    0
    1

    oo
    0
    0

    o1
    0
    1
    c_in_b

    11
    1
    1

    10
    0
    1

    o1
    1
    0

    11
    0
    1

    ab/cy_in

    ab/cy_in

    oo
    0
    1

    0
    1
    c_out

    a1
    0
    1
    2
    3
    4

    a0
    0
    0
    0
    0
    0

    cy_out=cy*a*b+cy*b*(a+a)+cy

    D13-ab
    E14-c_in_a
    C14+D14-c_in_b

    c_in_a

    b1
    0
    0
    0
    0
    0

    y=cy*a*b+cy*a*b+cy*a*b+cy

    10
    1
    0
    b0

    0
    0
    0
    0
    1

    cy
    0
    0
    1
    1
    0

    c_out
    0
    1
    0
    1
    0

    y1
    0
    0
    0
    0
    0

    y0
    0
    0
    0
    1
    1

    0
    1
    1
    0
    0

    cy*a*b+cy*a*b

    +cy*a*(b+b)=(cy+ cy)*a*b+cy*b+cy*a

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