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Computer Organization Architecture MCQ with Answers-Computer Organisation & Architecture Questions Answer- Avatto

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Home >Computer Science MCQ > Computer Organization Architecture > Machine instructions and addressing modes

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Cache and main memory
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Machine instructions and addressing
modes

16: A certain processor supports only the immediate and the direct addressing
modes. Which of the following programming language features cannot be
implemented on this processor ?

A.

Pointers

B.

Arrays

C.

Records

D.

All of these

Registers

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Answer: Option D
Explanation :
Pointers require indirect addressing mode. Arrays and records
required indexing modes.Recursive procedures with local
variable required.

17: In the absolute addressing mode

A.

Operand is inside the

instruction

B.

Address of the operand is

outside the instruction

C.

Register containing the

D.
address of the operand is
speciied inside theinstruction

Location of the operand is

implicit.

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Answer & Explanation

Answer: Option D
Explanation :

18: The programmable interval timer is

A.

8251

B.

8250

C.

8253

D.

8088

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Answer & Explanation

Answer: Option C
Explanation :

Computer Organisation
Online Test

19: Pseudo-instructions are

A.

Assembler directives

www.avatto.com/computer/exam/mcqs/computer/questions-answers/45/4.html

B.

Instructions in any program

that have corresponding
machine code instruction

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Computer Organization Architecture MCQ with Answers-Computer Organisation & Architecture Questions Answer- Avatto
machine code instruction

C.

Instruction in any program

whose absence will not
change the output for any
input

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D.

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None of these

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Answer & Explanation

Answer: Option A

846

Explanation :

Like

20: The number of instructions needed to add 'n' numbers and store the result
in memory using only one address instructions is

Send

19

A.

B.

n+1

Tw eet

C.

n-1

D.

independent of n

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123

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Answer & Explanation

Answer: Option B
Explanation :

1 2 3 4 5 6 7 8 9

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