ZAHREIN B YAACOB

Phone: 60122096051, zahrein@gmail.com

Summary: Highly motivated engineer with over 5 years of experience in the semiconductor
industry. Have the ability to design or develop Circuit design /layout/test methodologies and
verify the RTL logic design in verilog.

TECHNICAL SKILLS
 Programming/Environment: Perl, Unix, Windows .
 Design & Layout: AutoCAD, Protel, OrCAD, Cadence Allegro.
 Simulation/Analysis, MATLAB, LABVIEW.

PROFESSIONAL WORK EXPERIENCE

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INTEL Microelectronics Inc, Penang, Malaysia

Circuit Engineer (CPU & chipset) 2008 till present

 Team lead for Circuit Validation group on the Hard IP products.

 Working on innovative power and/or performance optimization and dynamic power
management for future generation microprocessor and chipset including energy efficient
architecture, power and/or performance tradeoff analysis, voltage and clock frequency
distribution, dynamic power managements, RTL level power estimation and power efficient
architecture verification
 Responsible on validating the schematic circuits by using the RTL(stimulus input) to make
sure the circuit functionality is working fine and according to the specs required. Catching the
bugs at the core and the I/O ring system is the aim objective of my job. Currently validating the
future edge technologies such as Pcie/DMI Gen2.0, SATA Gen 3.0 and USB Gen3.0 that will be
out on the year 2012-2013.

INTEL Microelectronics Inc, Penang, Malaysia

Analog Validation Engineer (CPU & chipset) 2005 to 2007
System engineer for validating Intel’s desktop and server processors. Job scope included
verification and evaluation of processor's electrical design, functionality, feature enhancement
and post silicon validation. Major accomplishments are as follows
 Team lead for system validation group. Successfully launch Penang’s first desktop processor.
 Capture hardware design failures and identify probable cause for component defect, provide
recommendations to ensure products meets design and technical specs
 Improve the validation process by adopting new methodologies (i.e., data driven process,
using large sample size and statistical approach).
 Test and design electrical hardware for motherboard components (i.e., power supply, graphics
and audio cards, memory cards and other Intel’s on boards technologies).
Professional Certificate on Analog Design - May 2004 to May 2005

1. Design of CMOS Operational Amplifier

- Default design by TOPPAN Tech. Design Center JAPAN, - Two stage CMOS
operational amplifier

2. Design of Window Comparator

- Mixed signal design (analog and digital components)

3. Design of ANALOG TO DIGITAL CONVERTER (ADC)

- Mixed signal design (analog and digital components), 3 bit ADC using FLASH
methodology

4. Design the physical layout using 0.35um CMOS Technology for:

- Two stage CMOS Operational Amplifier layout, Modified 741 BJT Operational
Amplifier layout
- Window Comparator layout, 3-Bit FLASH A/D Converter layout
- Supervision by TOPPAN Tech. Design Center instructors

EDUCATION
Professional Certificate on Analog design from TOPPAN Japan – May 2004 to May 2005
B.Eng. Telecommunication - International Islamic University, Malaysia, GPA: 3.0/4.0 March 2004

AWARDS /Publications
 3 submitted papers on test methodologies for white papers.

 Dean's List , Internatioanl Islamic University Malaysia, KL, Malaysia, 2001 to 2003 – for 1
semester