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EXPERIMENT 26

haracteristics
eed Control

OBJECTIVE
1. Unde

.._ e structures and characteristics of JFETs .

2. PloUi .

ristic curves of a JFET .

3. Unde
4.

Plqitlnij

e structures and characteristics of MOSFETs.


transfer characteristic curve of a MOSFET.

5. lmpl~menting and measuring a MOSFET motor-speed control circuit .

4
4

4
DISCUSSION

Field-Effect Transistors (FETs)

The field-effect transistor (FET) is a semiconductor device which depends for its operation on
the control of current by an electric field and conducts the current with a single carrier, hole
or electron. According ~, ~c~h! ~fr~cture, there are two types of FETs, the Junction Field

(JfBt:I J'u~~ Jt1~t~l-0xide Semiconductor FET (MOSFET).


from the Bipolap\J!J~ctid~tr~rl~i~tor (BJT) in the following characteristics:
Effect Transistor

The FET differs

4
t
t .
t

It is a unipolar device similar to the vacuum tube.

B.

It is immune from radiation .

C.

It has an extremely high input impedance, typically many megaohms.

t
t

D.

It is less noisy than a BJT or a vacuum tube.

It has no offset voltage at zero drain current, and makes an exceii~OJ !?i911~fchopper.

E.
F.

It provides greater thermal stability than a BJT.

G.

Its key disadvantage is the relatively small GBP of the device compared to the BJT.

..
C:::- :- : .

;-; --;: :;::: ::;: : ~..::

... . .

4
4

4
The structure and operation of the FET .are different to those of the BJT.

The current of the

BJT contains majority and minority catri$rs which flow through two p-n junctions, while the
current of the FET is only th~ rnajority carrier flowing in drifting .
width can be controlled by

an~~~rnal electric field

For the FET, its channel

so that the magnitude of channel current

4
4
4
t
4

26-1

4
4
4

is determined by the electric field .

On the contrary, the magnitude of BJT collector current is

controlled by the injected base current.


Either JFET or MOSFET, there are
type .

n-chaqn~! ~nc;l J~$h(m(iel FETs according to the channel

Basically the operating principles

of ~~~T ~nd

MOSFET are very similar; however,

the input resistance of the JFET is smaller than that of the MOSFET (up to 10 14 0) due to a
pn-junction between the gate and channel.

Furthermore, the MOSFET has many

advantages ir:t m~qqf;;~cturing so that the MOSFET is more important than the JFET in

microel~ctrqh!P~ ;~i~~dbstry .

In this

experiment you

will

study the

basic electrical

chataet.eristic a~d bircuits of JFET and MOSFET devices .


The FET is a semiconductor device which delivers the current with a single carrier.

The

charge carrier in a p-channel FET is hole,. while in an n-channel FET is electron.

Compared

Prody~t(GBP),

higher input

to the BJT, the MOSFET which features smaller Gain-Bandwidth

~mpedance,

Sl.!il~~~ ~~~ manufacturing


Large-Scale Integrated (LSI) and Very-Large-Scale lntegr;;~t~(~;$i}~~cciits .
and lower manufacturing complication , is

... ------

-' ,._

-. -: :-~- -:

----

the

Junction Field-Effect Transistors (JFETs)


The JFET devices can be divided into p-channel and n-channel JFETs.
cross section of a typigpl. n<;;~~rt!'lel JFET structure.

Fig. 26-1 shows the

The JFET is a three-terminal device

sour~ t};;: dit~ (G), and the drain (D) terminals . The circuit symbol shown
is the n-channet ~~~;r. ~dr~ pchannel JFET, the arrow at the gate points in the opposite

containing the
direction.
resistor.

Gen~f~lly

>a JFET can be considered as a gate-voltage-controlled variable

Either end of the channel may be used as a source or drain .

ID

loss

.,-----VGs=O
-----VGs<O
VGs=VP

tL
f Vos(sat.)

2b(X},V(x)

Fig. 26-1

Vos

N-channel JFET structure, circuit symbol, and output characteristics

26-2

..

The voltage across drain-source V 0 s, which results in a draip current 10 from drain to source.
This drain current passes through the channel SYffOQJ'lci~

py the p-type gate. Since the


gate-source voftage VGs will reverse bias the g~~~j~g~rrlij~~.n\ttion, no gate current will result.
b~~~~Pf~j{~ a depletion region in the channel and
incre~~ th~drain-source resistance resulting in less

The effect of the gate-source voltage will


therefore reduce the channel width to
drain current .
We first
linearly

consid43r . tg~n-channel

with./.t~~~~~~~.;;source

JFET operation with VGs=O V, the drain current 10 increases

voltage Vos .

The drain current through the n-material of the

drain-:s~~r~1~pt;lut~s a voltage drop along the channel , which is more positive at the
dralgf~~{ejJ~etioh than at the source-gate junction . This reverse-bias potential across the
p-n junction causes a depletion region to form as shown in Fig. 26-1 .
increased, the 10 increases, resulting

i~

a larger depletion region.

increased, the depletion region is fully formed across the channel.


V 0 s, greater than the Vos(sat) . will result in no increase in the drain

When the Vos is

As the voltage Vos is


Any further increase in
rrtiJr'itt :ith'"

current 10 then

remaining constant or saturation and designated as loss.


characteristic curve of Fig. 26-1 . With the reverse-bias ~~!~f~~
region fully forms at a lower level of drain current. .

in the VGs=O

~~ ';:i~~~,:~~:ea~;ed,

the depletion
voltage VGs is

increased to the pinch-off value Vp or VGs(OFF). the drain current reduces to 0, and the JFET is
completely turned off.

The pinch-off voltage Vp and the saturation drain-source current loss

are two important param~t~r~ pf the JFET device and they are indicated in the transfer
characteristic curve .H.t 6~,~~~. :i
lo

s
Fig. 26-2

Transfer characteristic of n-channel JFET (Vos>V0 s1sat1)

JFET Drain Characteristic


The drain characteristic is a set of curves

for different values of VGs from

0 V to the pinch-off

voltage, Vp or VGs(oFF> the voltage at which the depletion region is formed without any drain
current and at which no drain

current can occur.

26-3

41

4
4
4

Fig. 26-3 shows the typical n-channel JFET drain characteristic curves plotted the actual
drain current 10 at different values of drain-sourCf't.rVQJ.t~g~ )fos for a range of gate-source
voltage values VGs

The drain characteristic .t,:orif~i~~ ~~h~ 6hmic region , saturation region,

avalanche region , and cutoff region.


Ohm1c reg1on or lnstauration region

Ava lanche reg ion

Con&tant current region


I~

or
Sllturat ion region

.,

II-

lo

10 rnA
5 .62 rnA

- -~

VGs=-1

:r_ :

2.5 rnA
1
0.625 rnA '

VGs=-2

15

Fig. 26-3

VGs=O

VGs=-3
Cutoff region

Vos

Drain characteristic curves of n-chanfielJFI:ET


i i/)\!}!?:::r:-:-:-: ..

For VGs=O V, the curve plotted shows that the drain

--:- .:.-:

curr~ptiflCI'~~~~ as Vos is increased

until a point (V05 = 4 V) at which the current reaches saturation and loss = 10 rnA

From the

previous discussion we know that the internal depletion region acts to limit the drain current.
If the gate-source voltage is set atVGs
a saturation level is
region, starting
current.

If

=-1

V, the current increases as V 0 s is increased until

rea<:;~, t~l~ fime at a lower level than


-- -.

---:-- - ---- .. :_ ;c-:-.:;:.~ ----.

for VGs

=0 V, since the depletion

pa~ry f~~~~ ~~~ to VGs = -1 V, fully forms at a lower level of drain-source

the~~t~pd(~EJ Jbttage is increased

beyond the pinch-off value (-5 V), the drain

current reducest6 6 : ~~d the JFET device is completely turned off.

Since the drain current

is a single carrier, each characteristic curve therefore passes through the origin.

JFET Transfer Characteristic Curve


The transfer characteristic curve also called transconductance curve ~~ ~<plot

ofc:lrain current

10 as a function of gate-source voltage VGs. for a constant value of drain~source voltage Vo 5 .


The transfer curve of an n-channel JFET shown in Fig . 26-4 is plotted from the drain
characteristic curves of Fig . 26-3 and

mathematically expressed by the parabolic

approximation:

26-4

lo

ID

loss
Vos=15V

5.62mA
2.5mA
0.625 A

' ~~~'+---+--+--+---+

VGs
VGs(off)

Fig. 26-4

Transfer curve of n-channel JFET

Metal-Oxide-Semiconductor FETs (MOSFETs)

t.~~~'.~t~i~~~i~al insulated from


Metai-Oxide-Semi~i~~dct~f FET (MOSFET), or

A field-effect transistor can be constructed with


the channel .

The popular

sometimes called the Insulated Gate Field Effect Transistor (IGFET), is constructed as
either a depletion MOSFET (DMOS) or enhancement MOSFET (EMOS) .

In the

depletion-mode constru.ctioQ . a channel is physically constructed and current

bg{p~li~ill result from a voltage connected across the


t~r~~~~~~ : The enhancement MOSFET structure has no channel
thij d~vibe is constructed . Voltage must be applied at the gate to

between drain aqq


drain-source
formed when

develop a channel of charge carriers so that a current results when a voltage is

applied across the drain-source terminals .

~oise and good stabiliJyf {tis !~~~!y used


amplification circuits. T@g.vef'Y' ~b!n: Josulating

Since the MOSFET device has the features of low


in high input impedance and high voltage

_-.;;,:,:-~:-:,:,i::

"-

. .. .. .

layer between the gate and substrate of a MOSFET can easily be pdrt~tQfed, if
;:;:::::'.;::;:;:_._:-

voltage is applied.
friction.

- .

an excessive

Human body can build up extremely large electrostatic charges due to

If this charge comes in contact with the terminals of a MOSFET device, an

electrostatic discharge would occur, resulting in a possible arc across the thin insulating layer
causing permanent damage.

To avoid

tf1is

sJamage, the MOSFET terminals are usually

shorted with a conductive ring or conductive foam in shipping and the conductive ring must
be removed after soldering .

26-5

4
~

4
4

t
t
t

''

Fig . 26-5 shows the structure and characteristic of an n-channel MOSFET.


JFET, it can be considered as a

gate-voltage..,cootroJI~d

three-terminal de\ltce containing the source

Similar to the

variable resistor and it is a

(Sl ~at~y~~); ~nd drain (D) terminals.

The main

difference between MOSFET and JFET is..~~~~ig~; !a~~; between the gate and p-substrate
(not a p-n junction) of the NMOSFET.

T~~t~f;;: the MOSFET's input

resistance is much

higher than the JFET.


D

G-4~

s
lo

VGs>O

. ~:;t::~::=:;~::..::.:..::_:__. Vos
8

Fig. 26-5

NMOSFET structure, circuit symbol and output characteristic

Fig. 26-6 shows the ~ ~~Q~fTr y~~racteristics of depletion and enhancement NMOSFETs.
The depletion

MOSf;IE~ Q~~!~ . ~~6(a)

is shown to operate with either positive or negative

volt~si. nl;~p~~ Values of VGs reducing the drain current until the pinch-off
voltage Vp, aftef~tWefi; ~6drain current occurs. The transfer characteristic is the same for
gate-source

negative gate-source voltages, but it continues for positive values of VGs

Since the gate is

isolated from the channel for both negative and positive values of VGs. the device can be
operated with either polarity of VGs and no gate current resulting in either case .
(b)

ID

~ID

Go---1
+

VGS

Vt

Nos?:.. Vos(sat))
Fig. 26-6

NMOSFET transfer curves: (a) Depletion (b) Enhancement

26-6

1. Depletion MOSFET

Fig. 26-7 shows the structure and circuit syl$b~l Qf t~e n:..channel depletion MOSFET.

high~~iJih~cl ffi:type semiconductor material and the


region. Am~t;il~yer is deposited above then-channel on

Source and drain are made by the


channel is a lower-doped n-type

a layer of silicon dioxide (Si0 2 ) which is an insulating layer.

This combination of a metal

gate on an oxide layer over a semiconductor substrate forms the depletion MOSFET device.
The gate-sour~ vp~~ge to this kind of MOSFET can be either positive or negative.

For the

n-chanqeE~~~-~~~rlMOSFET of Fig. 26-7, negative gate-source voltages push electrons out


ttl~: bnaH~~t f~~ion to deplete the channel and a large enough negative gate-source
of <::.::::::\
}:!:': :; ;:;:;:_:-:: -:-..

voltag$

YF'

:;~}{":

wil[plhch off the channel.

resulfinan increase in the channel

Positive gate-source voltage on the other hand will

si~e

(pushing away p-type carries), allowing more charge

carriers and therefore greater channel current to result.


The circuit symbol in Fig. 26-7 shows the addition of a substrat~;t~ri!m~!g@which the device
type is indicated, the arrow here indicating a p-substrate

anct~ha~tJ..1,Pri~l device.

Drain Terminal
n-<;h~'lJlel

..sql$1~~!~
Drain (D)

(G)

Gate~
Source (S)

Fig. 26-7 The structure and circuit symbol of n-channel deei~JollMI,JJ::"t


2. Enhancement MOSFET

Fig. 26-8 shows the structure and circuit symbol of n-channel enhancement MOSFET.
substrate is a lower-doped p-type
higher-doped n-type

s~miqc:5pductor

semicondudprQi~teti~l.'

as part of the basic device st.ruptlire.

The

material and source and drain are

It has no channel between drain and source

~pplication of a positive gate-source voltage will repel

holes in the substrate region under the gate leaving a depletion region.

26-7

When the gate

.
~.

"

voltage is sufficiently positive, electrons are attracted into this depletion region making it then
act as an n-channel between drain and source.

ThetEr is no drain current until the

\6r'~i~Jt j~ Increased drain current. The


FiQ~:liQ;-6{6); ::~ote that no value loss can be

gate-source voltage exceeds the threshold voltRge


transfer characteristic is described in
associated with an enhancement

MOSFET b~ea~se no drain current occurs with VGs=O V.

Although the enhancement MOSFET is more restricted in operating range than is the
depletion device, the enhancement device is very useful in large-scale integrated circuits in
which the simpl~r~jtruction and smaller size make it a suitable device .

Drain

Dra i n

Gate~ ~ate~
Source
NChannel

Fig. 26-8

Enb.:~ncfiment

Source
P Chann e I

MOSFET structure and circuit symbols

A complementarjMClSFET (CMOS) connects enhancement PMOS and NMOS FETs into a


complementary device which is primarily used in digital circuits .
connected in common to the gate of both PMOS and NMOS FETs.
drives the PMOS off and the NMOS on . A low input voltage will

The input is internally

A high JOP~Y91tage

correspdh.~j~~IY ; df~~ the

PMOS on and the NMOS off.

Power MOSFET
The power Metal-Oxide-Semiconductor FET

(power MOSFET)

is

unipolar and

pp~er ~~SEET has the features of fast switching speed,


good high-frequency . chara~~7~~~i~, <~i~b i ihput impedance, small drive power, excellent
thermal stability, no second 6~~~dowrlJ ~ide Safe Operating Area (SOA), and high operating
voltage-controlled device.

The

26-8

=::

'

''

1i

11

linearity, etc.

Since the key advantages of small size anq lightweight, the power MOSFET

volt~g~; . )@p~ ~lgh gain device. The power


switchirl~ ~~~ii~ti~ns such as power supplies,

provides a high speed, high power, high


MOSFET is Widely used in high-power
converters and PWM motor controls .
Structure of Power MOSFET

Power MOSij.~)f !~ ;*~fl integrated power device which contains tens of thousands small

MOSF~J$j.~t~~F~~6ted in parallel. Fig . 26-9 shows the typical structure of an n-channel


povy~[{,MO$~~~ Two higher-doped n regions are constructed as source and drain

terrlliil~:

Afiirisulating layer (Si02) exists between gate and channel .

t1

'

Source

Gate Polysilicon
Oxide
Gate

4
4

p+ Body Region

'
41

Drift Region

n- Epi Layer

n+ Substrate
(1 00)

t
t
t .
t

o rai~

Metallization
Drain

Fig. 26-9

41
t

N-channel Power MOSFET structure

The power MOSFET shown in Fig . 26-9 is a 4-layer sandwich configqratjbg df n(n-)pn.

device\V~uPg~taHrlg. In the
tfrlbdate voltage is
device, two back-to-back pn-junctions exist between drain and source~ >
The lower-doped n region is a drift region which increases the

applied , the device is always in off state whenever the drain-source voltage is either positive

f
f
4
4

or negative.

4
4

26-9

l
Static Characteristics of Power MOSFET

Power MOSFET's o~tput characteristic cury~$ i.q~ye . ~o distinct operating regions: a


constant-resistance region and a constant-gpi;t~ntr~gion.

In the constant-resistance region,

th~'' 1R;~~$e

in the drain-source voltage until the

drain-source voltage reaches at its pinch-off voltage.

Beyond this point, the drain current

the drain current is direct proportion to

remains constant and the device operates in the constant-current region .


When tp~ pg't(~r Jv1QSF.ET is used as an electronic switch, the drain-source voltage drop is

propQrftl~ncif tdth~
re~iai :hd it can

drain current, that is, the MOSFET operates in the constant resistance
be considered as a resistive component.

The on-state

drain-sourc~

resistance Ros(on> is the key parameter which determines the power losses at a given drain
current.

The drain current starts to flow at

voltage (typically 2 to 4 V) .

t~e

applied gate voltage over the threshold

Once the gate-source voltage is over the threshold voltage , the


.-,-.;..-.-.

relationship between drain current and gate voltage is approxiiT)~t~lyJ!n~~r:


The common-source forward transconductance gm or 91$
amplification.

It is measured with drain-source shorted

~P~91fies

the power MOSFET ac

and indicates how much the ac drain

current will change due to an applied ac gate-source voltage.


Safe Operating Area
. :-:-:-

....::-.

($Qil~~~qwer MOSFET
-:-.-.-...-:-.

:G}.::"_::::--:-:-.-.

As mentioned ~(<rite ~
temperature

.-:.<..-..:-:.-:-:-:-::{:::{::::-;:,:::- . -

-.- -:- - --~: -:

--:-:-: -:

Ma>$FET is a majority-carrier device and therefore it has a positive


co~Hlbi;~ic>f;esistance and its second breakdown effect is minimal compared

to that of a BJT device. A comparison of the forward-biased safe operating areas is shown
in Fig. 26-10. The de and pulse SOAs of power MOSFET are superior to those ofJge BJT
under de (solid line) and pulse(dotted line) operating conditions.

DCSOA

Fig. 26-10

BJT SOA

SOA comparison between BJT and MOSFET

26-10

.,
;j

'i

Full- Bridge ZVS MOSFET


In recent years, the power requirements of power $!.Jpply systems are higher and higher,
especially in telecommunication and sery~( ~ppljp~ltiOns.
power electronics industry to develop the

These requirements push the

pdW~r ~~pply equipment with

higher power density

and reliability . This is a strict challenge to design engineers how to promote the power
density from 5.7 W/in3 to 10 W/in 3 .
(ZVS)

The use of the phase-shifting Zero-Voltage-Switching

a good solution of this problem.

can be obtained .

With ZVS design, higher power

In designs, the ZVS technique can minimize the

increase relatively higher switching frequency.

Higher switching

at the smaller size and shorter response time of filtering devices may be
used so that the circuit size is reduced and the power density is promoted.

Lower switching

loss means that a lowe;- temperature rise -can be obtained so that the requirement of heat
sink is lowered .

In addition, ZVS operation can reduce the effects o( transient dv/dt and

HP\\tlv~~~ ltre MOSFET in a


full-bridge ZVS converter may be failure under some con<;litiQn~ ~Y~~ ~ ~low recovery body
diode, especially at low reverse voltage condition. An~ij,~e ~.~~ ~f. MSFET failure is the
di/dt, and increase reliability of power supply equipments.

puncture-through problem of Cdv/dt.

When the

MOS~~f . is

forced to ON or OFF, ZVS

converter could be failure under no load or light load conditions.

~~)(imizes efficiency
switch-mode powe~r~ui~!~ l$~' ~s) circuits.
In brief, the ZVS tes!J!liRYn

and enables higher power output in

The research for the MOSFET operation in ZVS circuits leads the development of MOSFET
technology to a new generation of fast built-in body diode. The main purpp~esf.lr~tQ Jower

gf (f\1(~. t~ m1f1imize
In higt'Jffr~qCency and

the reverse recovery time of body diode, to enhance the permission


puncture through effect of Cdv/dt, and to increase . the reliability
high-power phase-shifting ZVS applications without pay of efficiency .

In a full-bridge ZVS circuit , if the reverse recovery process of built-in body diode doesn't
complete before the MOSFET is turne,g pff~ ~lbe transient dv/dt will result in the MOSFET
failure . When the ZVS circuit
because the permissible

o~rM~~~f bi~h~r frequencies,


::::==-----

==-:-=-:='": .

reve~~n~covery

--=:=: : .::.<::

this problem becomes worse

time of the built-in body diode becomes shorter.

26-11

Basically the ZVS converter cannot switch at zero voltage under a light-load condition so that
the MOSFET in on-state will be forced to turn off,
full-controlled bridge

c~r.cuit,

and the Cdv/dt

~imiit=Jr tP~Q~

operation of forced-switching

tr~(lsient.~ill~r~~te

a voltage surge at the gate

and will result in a damage to the device.


In no-load or light-load conditions , the reliability of ZVS circuits will be improved by
enhancing the permission of Cdv/dt.
improved by

r~ducingthe

De!~r;pti~.f'

The failure of Cdv/dt puncture through can be

Qgd/Qgs1 ratio and internal gate resistance Rg.

of Experimental Circuit

Fig . 26-11 shows the circuit for JFET/MOSFET characteristic measurements on


Module KL-53015.

Fig . 26-12 shows the MOSFET motor-speed control circuit .

The 2SK30A is a silicon n-channel JFET.

Its major electrical $P~9!fications include :

gate to drain voltage VGos =-50 V, gate current IG =

10m..i;driJn~ower dissipation

Po= 100 mW, drain to source leakage current loss ::;:()i~n;tAmln. to 6.5 mAmax. (test
conditions: Vos=10 V, VGs=O V).
The 2SK2698 is a silicon n-channel MOSFET.

Its major electrical specifications

include : drain to souq:;eiglt'9~ Voss= 500 V, drain current 10 = 15 A (continuous) or


60A (pulsed) ,
Ros(on) = 0.3s

voltage

v,h

dr~in pqi~~ i ~i~sipation

~ ~l~t l~~~dJtions:

2 :~)\'l;ln: . t.;4Vmax

P 0 = 150 W, drain to source on resistance

VGs = 10 V, lo = 7 A), gate to source threshold


(test conditions: V 0 s=10 V, 10 =1 mA).

; I

26-12

AC

12V

C1
220~

'' ..1ot<
~f ~-----~>--------.

VR1

C2

R3
1K

220~

AC

rol'~
~

12V

1K

a o s
I

'

s
AC

ov

JFET/MOSFET CHARACTERISTIC EXPERIMENT

Fig. 26-11

Circuit for JFET/MOSFET

charactQri$t~~~~asurements
,::::-\r= :::_:=;={\:?_: ;: = ::=\Hi:J:;.:_:::, .: .-::

The 12-V AC supply input is full-wave-rectified

by J.t~h~' btldge

rectifier BR 1 and

capacitor-filtered by the capacitors C 1 and C2 and dual Voltage about 17 V 0 c to


supply the power to the JFET or MOSFET.

Zener diodes ZD1 and ZD2 regulate the

17 Voc to 6 .1 V for g9te qias and the potentiometer VR2 is used to control the

VVh~~ .t~~ connect plugs are placed in positions 1, 4 , 6, and 7 .


the JFET is COQf~uct~~ ~ cC>mmon source configuration and a negative voltage is
applied to the ;~f~. ,,, \\r:h~n the connect plugs are placed in positions 2, 4, 6, and 7,
gate bias voltage .

the JFET is cC> ri:tfucted as common source configuration and a positive voltage is
applied to the gate .
For the MOSFET characteristic measurements,. the connect plugs must bEt placed in
positions 1, 4, 5, and 8 to construct the MOSFET as common so.u rce configuration
and to apply a negative voltage at the gate .

When the

connect ~lt..lgs are .p laced in

positions 2, 4, 5 , and 8 , the MOSFET is configured as common source configuration


and a positive voltage is applied at the gate .

For drain current 10 measurement, the

required gate-source voltages are provided by adjusting the potentiometer VR2 .


And finally, the characteristic curves will be plotted according to the measured
results.

26-13

,.

"'..

..

AC

36V

ill

..
..
._.
jl

0000

UID
0000

Jl

I
I
I
I
I

'
''

VR1

Fig. 26-12

MOSFET motor-speed contrpl crcgit

The motor-speed control circuit is illustrated in

Fi!;J r ~S-. 12. : Jtfie 36-V AC input is

full-wave-rectified by the BR 1 bridge rectifier and capacitor-filtered by the capacitor


C1 and about 50 Vdc is obtained to supply the power to universal motor and
MOSFET.

The additional 12-V DC supply provides the working voltage for the

operational amplifier UL
The combination .o f

the. U1

operational amplifier and MOSFET acts as the feedback

speed controller ~hiclt can be adjusted to provide the predetermined motor speed.

The

reference voltage is provided by the Zener diode ZD1 and the diode 01 connected in
series (temperature-compensated configuration) and is adjusted by the speed control
potentiometer VR1.

The feedback voltage which is directly related to the spe~ is .. ~clfrom

the voltage drop across the resistor R2.

The difference . or error betwe~l"i ft1@ 1t~dback

voltage (proportional to the motor speed) and the reference. voltage


the system whether it should increase the speed or reduce it, in
close as possible to the reference value .

t
t

'

R2

0.1

26-14

cc;~n thenq~ ~~~d to "tell"


ord~t to bring if back as

EQUIPMENT REQUIRED
1 - KL-53015 Module
1 - KL-51 001 Module
1 - KL-58002 Module
1 -Analog Multimeter
2 - Digital Multi meter (DMM)
<~:~~-

A.

J ~ET/MOSFET
D 1.

Static Characteristics

Place Module KL-53015 in the experimental frame .


JFET/MOSFET characteristic measurement.

q@

...v~~,,..,

the circuit for

o rtl~if i~~ > located on the

odule .

upper half of the module .


02. Set the range selector of analog multi

In this case,

the multimeter is used as an Ohmmeter and the internal battery is used to


bias the JFET d

The positive polarity (+) of internal battery is


ck lead, and the negative (-) is interconnected to
to the following tables, connect the Ohmmeter

lead

JFET Pin
Ohmmeter
Lead

Red (-)

Black(+)

JFET Pin
Ohmmeter

Result

JFET Pin
Ohmmeter
Lead

JFET Pin
Ohmmeter

Black (+)

Lead

Result

Result

26-15

Black (+)

Red (-)

JFET Pin
Ohmmeter
Lead

D
Black ( +)

s
Red

Red (-)

Black(+)

Result

03.

From the above results, what is the type of this JFET? _ _ _ _ _ _ __

selector of analog multi meter to the Rx1 0 setting.

According

tables, connect the Ohmmeter leads to the MOSFET pins


the measured values.

MOSFET
Pin
Ohmmeter
Lead

MOSFET

Red (-)

Black (+)

D
Black(+)

Result

MOSFET

MOSFET

Black (+)

Red (-)

Pin

Red (-)

Ohmmeter
Lead
Result

MOSFET
Pin
Ohmmeter
Lead

MOSFET

Black(+)

Red (-)

Pin

Lead
Result

Result

05.

.Ohmmeter

From the above results, what is the type of the MOSFET?

26-16

,...

B. JFET Characteristic Curves


0 1. Place Module KL-53015 in

Locate the JFET/

MOSFET characteristic circuit ~tl ~-~~~ i~~(?~IU


upper half of the module .

The circuit is located on the

02. Connect 110 V AC power source to Modules KL-51 001 and KL-58002 .

P_l .~q.~ t~~ fower switch in OFF position .

s~~J:itl~fd~ Module

Connect the 12V-OV-12V AC

KL-51 001 to Module KL-53015.

~~~l'~~~~~e\/R1 fully CW and the VR2 fully CCW.

Place the connect plugs in

positions 1, 4, 6, and 7.
0 4. Two DMMs are required in the following procedur~ ,

Set the range

::::;.;:::::::::~

selectors of DMMs to DCV 20 setting .

In this ~.l~l t~IIIJwo DMMs are

me~~~fiR~~i ij~~~~~~~'s VGs and lo


obtained ll~ ll'l~~~gtih~ >the voltage drop

used as DVMs (digital voltmeters) for


values.

The drain current lo is

across the R3, VR3. and by calculating 10

=V~~zi Kn. .

05. Turn on the power of KL""51 001.


06. Connect

~>~~~!~ ~~~~~: JFET G-S terminals for measuring the VGs values,

::ld :!trt~~~~s~~ ~~~~ ~::~'::,:~:~~ v:~~::;ionA~~~:t :h:~sR~ ::~

Adjustih~

the potentiometer VR2 for each of the listed VGs values, measure

and record the corresponding VR 3 values in the table below.

Calcu .

record the lo values using the equation lo=VR3/1 Kn.


OV -0 .5V -1V

1.5V -2V -2.5V -3V -3 .5V -4V

07. Remove the connect plug

fr9m

PP!>ition 1 to position 2.

: : :/::>::. _:::<)):::::::::-:::=,:- :, : r-: :-: .;: : -:n:~::.::,,

Connect a DVM

across the JFET G-S . .terriiirtalr:; for measuring the VGs values.
DVM across the...
potentiometer VR2

Ri .tat

-~~asuring

the VR3 values .

Connect a

Adjusting the

{()j i ~a8~ of the listed VGs values, measure and record

26-17

the corresponding VR3 values in the table

Calculate and record the

n . . ln\1\1

10 values using the equation lo=VR3/1

VGs

ov

ii>

1V 1.5V 2Vc

0 .5V

"'v

i >i

VR3

i \

s\1
.

3 .5V 4V 4 .5V 5V

5.5V 6V

lo
curves (transfer characteristic curve) using the results in
Determine the pinch-off voltage Vp and describe the

Vas

09. Remove the connect plug from position 2 to position 1.


VGs value to -1.5 V.
below.

Adjust the VR1 for each of

Adjusttt)~ ~J~i~ set

th~ V05 v~IL!~~ ~~~~-ii jl ~~ t~ble

Measure and record the corresponding values of

~~~~!'l~a;l~ut~te the

lo

values using the equation lo=VR3/1 KO.

Vos

OV

6\J

1V

lo

26-18

7V

8V

9V

10V 11V 12V

Adjust the VR2 and set VGs value to -1 .0 V. Adjyst the VR1 for each of the Vos
values listed in the table below.
VR3. and calculate the lo values

2V

3V

Measu~~ ~~i~~~~d the corresponding values of


~~~~ti~'~ ~~:!::VRJ/1 KO.

4V

5V

6V

and set VGs value to -1.0 V.


-.,.,..,.....,.,.,. listed in the table below.

?V

8V

9V

10V 11V 12V

Adjust the VR1 for each of the Vos

Measure and record the corresponding values of

VR3 and calculate the lo values using the equation lo=VR3/1 KO.

OV

D 10.

1V

2V

4V

5V

6V

OV 11V 12V

9, plot the Vos - 10 curves (drain characteristic

Using the
curves) ..

3V

r>

diffe ,. , r i .a
. itntl,I!Jatlth

s values in the graph below and describe the


curves .

26-19

Io

C. MOSFET Transfer Curve


. 01. Place Module KL-53015 on the

the JFET/

MOSFET characteristic circuit on the ma~~~.~~~icrtllfi:s


half of the module.

on the upper

ly to Modules KL-51 001 and KL-58002.


GOi

Place the

m::.rc. position.

Connect 12V-OV-12V AC supply from


odule KL-53015.

03. Turn th'i:.t\IR

Place the connect plugs in

positions 1, 4, 5, and 8.

~h~<range
In this case, thi$'$IMMs are
>' --------- - ... -...

0 4. Two DMMs are required in the following procedure.

,et

:_,:-::,:::<:::-::::::::::<;:::

selectors of DMMs to the DCV 20 setting.

used as DVMs for measuring the MOSFET gate-sourc~ 'V~!t~ge VC.sand the
drain current 10 .
05. Turn on thepower of Module KL-51001.

acro~s M'$;:t,J;:t G~S terminals for measuring VGs, and a


DVM across the ~~~()[,1'11~~$uting lo. Adjust the VR1 and set Vos ~ 10 V to

06. Connect a DVM

ensure the MOSFEI

op~ratlng . . in

saturation (Vos > VGs - Vp).

26-20

Adjust the

potentiometer VR2 for each of the

listed in the table below.

Measure and record the VR4 and

using the equation 10

= VR"4/1KO.

plug from position 1 to position 2.

Connect a DVM

gate-source terminals for measuring VGs. and a DVM


R4 for measuring lo.

Adjust the potentiometer VR2 for each of

VGs values listed in the table below.


calculate the lo values
OV

1V

usin~

Measure and record the VR4 and

the equation lo

= VR4 I

1 KO.

2V 2.2V 2.4V 2.6V 2.8V 3V

5.5V 6V

08. Plot the lo-VGs curve (transfer characteristic curve) using the results of steps
6 and 7.

e threshold voltage VT value.

Io

26-21

D. MOSFET Motor-Speed Control


0 1. Place the Module KL-53015

frame.

MOSFET motor-speed control C!tQ,!.JJ!'C!MMOict

Locate the

It is located on

the lower half of this module.


02. Connect 110 V AC supply to Modules KL-51 001 and KL-58002 .
pOW@f s~~~G P in OFF position.

Place the

Connect 36V-OV AC supply and 12 V DC

t$~s~tlttd~ Module KL-51001 to Module KL-53015 .


>> i mdtOtftbm Module KL-58001 to Module KL-53015.

Connect the universal

~~:<+~rn the speed control potentiometer VR 1 fully CCW


04. Turn on the power of Module KL-51 001 .
05. Connect a DVM (DCV 20 setting) across the

ground.

Connect a DVM (DCV 20 setting) across


06. Slowly adjust the speed control potentiometer VR 1 until the motor runs.
motor speed.
U1 pin1

Measure and record the voltage on

drop across the R2, VR2. in the table below.


Result

07. Slowly adjust the VR1 to increase the motor spe ed .


the change in motor speed.

Measure and record

and the voltage drop across the R2 , VR2. in the table


Test Point

Result

26-22

08. Turn the VR1 to its maximum value .


motor speed.

Observe and record the change in

Measure and record

U 1 pin 1 and the voltage

drop across the R2, VR 2 , in the

voltage on U1 pin1 when the motor runs at its highest speed.

CONCLUSION
A. JFET/MOSFET Static Characteristics
In the exercise of JFET/MOSFET static
resistances of gate-source, gate-drain and drain-source using an Ohmmeter.
a low resistance of 100

n .

You saw that

gate-source and gate-drain when the black lead (+)

dt.ti&iIred lead (-) is connected to drain or source, and a high


resistance of
JFET is ann
You also measured the MOSFET de resistances of gate-source, gate-drain and

drain-sg~rce

using an Ohmmeter. You observed that a very high resistance exists between

gat!~ urce

and gate-drain terminals since an insulting layer is between the gate

observed that the forward resistance of body diode . i~ about


connected to the source and the red lead to the drain.

and ~.h~O~~~. ~~ti:also

son "VQ~ ~~~:: ~~~l<. : l~~fj

Therefore

~~ ~~~~~ltype

is

of the

2SK2698 couldn't be identified according these testing results.

B. JFET Characteristic Curves

JFE.J 9ha~ij~tip curves, you


curve and the drain characte!~~~~ ~H;.y~~ 6t.the 2SK30A.
of the JFET is 12.65mA apprd~i~at~l~ . .
In the exercise of plotting

26-23

plotted the transfer characteristic


You observed that the

I~ value

C. MOSFET Transfer Curve


In the

exercis~

of MOSFET transfer curvEJ, yqy p'ptted the transfer characteristic

curve of the 2SK2698.

The transfer . ourv~

.showed

the n-channel MOSFET is an

enhancement type and its gate thresholdVoltag~ . Vr is 2 V.

D. MOSFET Motor-Speed Control


In the eX:EJ[(:;i$13

vol~~g~
;,:::;:-::::

of

MOSFET motor-speed control, you observed that the output

C)ftJ1 plhJ. is

star~~~Ofbtate

8. 7 V and the voltage drop across R2 is 0.034 V as the motor

by adjusting the VR1.

You also observed that the output voltage at

U1 pH11 is 10.7 V and the voltage drop across R2 is 0.035 Vas the motor rotates at
full speed by adjusting the VR 1.

26-24