JAWAHARLAL NEHRU TECHNOLOGY UNIVERSITY,

HYDERABAD
M. Tech. I Semester Regular Examinations, March – 2009
LOW POWER VLSI DESIGN
(Common to VLSI & Embedded Systems and Embedded
Systems &
VLSI Design)
Time: 3 hours
Max. Marks.60
Answer any Five questions
All questions carry equal marks
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1.a)Compare CMOS, BICMOS and Bipolar circuits in are
respects.
b)Compare Full custom Design Approach, Gate Array
Approach and Standard-Cell Approach in all respects.

2.a)With the help of neat sketches compare petrograde N-

Well architecture with conventional N-well architecture.
b)What are the advantages of petrogradewell process?
Explain.

3.a)Draw the sketches for shallow Trench Isolation process

with tapered trenches and explain the same.
b)What is the significance of chemical mechanical
polishing (CMP) in I.C. fabrication? Explain the same with
the help of net sketches.

4.What are the advantages of SOI process? What are the

advantages of copper Inter connects for Deep
submicronCMOS/BICMOS structures?

5. Explain about Level 1, Level 2 and Level 3 models of

MOSFETS and critically compare them.

6.a)Draw the circuit for BICMOS utilizing a lateral PNP BJT

in PMOS structure and explain its operator for a given logic
functions.
b)With the help of necessary graphs, compare CCB, CMOS,
C, B, CMOS, FS BICMOS and FS-CMBL circuits.
7.a)Draw the circuit for Quasi-complimentary BICMOS
Digital circuit and explain its operation.
b)Compare conventional MOS Inverter and QC-BICMOS
Logic Inverter in all respects.

8.Write notes on any Two:

a) Advanced BICMOS Digital Circuits
b) Low Power hatches
c) Quality measures for Flip-Flops.