NIBS PROJECTS CHENNAI

IEEE VLSI TITLES

Slno IEEE - TITLES
Mail us :Projects.nibs@gmail.com
YEAR
1 An Accumulator—Based Test-Per-Clock Scheme 2010
2 FPGA based system for video compression and transmission over 2010
bluetooth
3 A Hardware and Software Cooperative Design of SoC IP 2010
4 CPLD-based system for the quadrature digital up converter 2010
5 A harmonic signal generator based on DDS and SOPC 2010
6 The embedded measurement system for multiple motor speed based 2010
on FPGA
7 Design of frequency measurement based on FPGA and MCU 2010
8 Optimization of DNA Sequences Data to Accelerate DNA Sequence 2010
Alignment on FPGA
9 Time-Multiplexed Compressed Test of SOC Designs 2010
10 A comparison of pipelined parallel and iterative CORDIC design on 2010
FPGA
11 FPGA-Based Design and Implementation of Reduced AES Algorithm 2010
12 Space-based wireless sensor networks: Design issues 2010
13 A time interval measurement system based on FPGA used for 2010
frequency calibration
14 Accelerating Synchronous sequential circuits using Adaptive clock 2010
15 A VLSI design of sensor node for wireless image sensor network 2010
16 Hardware Implementation of RF ID Mutual Authentication protocol 2010
17 The power stability of FPGA-based microcontroller design and 2010
measurement
18 OFDM baseband Modulation technology based on VHDL 2010
19 Joint code-encoder-decoder design for LDPC coding system VLSI 2010
implementation
20 Practical Approach to Programmable Analog Circuits 2010
With Memristors
21 Design and FPGA implementation of High speed Low 2009
power Digital up converter for power line
communication system
22 An improved RC6 Algorithm with the same structure of Encryption 2009
and Decryption
23 Modeling of RF- MEMS BAW Resonator 2010
24 Optical Lithography Simulation with Focus Variation using Wavelet 2010
Transform
25 Passive switching of electromagnetic devices with memristors 2010
 NIBS PROJECTS CHENNAI
IEEE VLSI TITLES
Mail us :Projects.nibs@gmail.com

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