A Low-Voltage Fully Balanced OTA with

Common-Mode Feedforward and Inherent

Common-Mode Feedback Detector

Reference:
A. N. Mohieldin, A.N.,E. Sanchez-Sinencio, J. Silva-Martinez, "A fully balanced pseudo-differential OTA with
common-mode feedforward and inherent common-mode feedback detector", IEEE Journal of Solid-State Circuits
, Volume: 38 Issue: 4 , Apr 2003 , Page(s): 663 -668

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 Outline
R Introduction
R Pseudo differential OTA
R Proposed OTA architecture
R Design Considerations
R Measurement Results
R Conclusions
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Simple Differential OTA Introduction
With tail Current Source
VDD Differential Mode Common Mode
VDD
VDD

Vbias
M2 M2 Vbias
Vbias M2 M2
M2 M2

Vout- Vout+ Gm=gm1

Vout- Vout+ Vout- Vout+

Vi+ Vi- Vd -Vd Vcm Vcm

M1 M1 M1 M1 M1 M1

VSS
Itail g m1 Rs
Gm =
1+ g m1 R S
VSS
VSS

 Limited linear input range  Reasonable Common-mode gain

 Limited tuning range  Reasonable PSRR
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 Pseudo Differential Transconductance
VDD
R Advantages
 Suitability for low voltage
Vbias
M2 M2
 Wider common-mode input range

Vout- Vout+
R Disadvantages
Vi+ Vi-
 Poor common-mode gain ACM=ADM>>1
M1 M1
 Poor PSRR
 Need for fast and strong Extra
VSS CMFB Circuit to
(1) Fix output common-mode voltage
Simple Pseudo (2) Suppress common-mode signals
Differential OTA
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 What are the Solutions to

Overcome those Limitations?

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 Solution In the Literature
Differential Mode OTA VDD

Vi+=Vicm+Vd/2
+ Gm(Vicm+Vd/2)
GmVd/2
+
Gm M2 M2 2M2
Vi-=Vicm-Vd/2 _
_ Icm
Gm(Vicm-Vd/2) -GmVd/2 Vout- Vout+ 2Icm
Icm

+ GmVicm Vi+ Vi- Vi+ Vi-

_ M1 M1 M1 M1

Gm
_ GmVicm

+ VSS VSS

Common Mode OTA

Pseudo differential OTA With CMFF

 CMFF is applied to cancel the common mode input signal

 Add load to the driving stage, input capacitance doubles
 CMFB is still needed
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 Proposed OTA Block Diagram
Gm(Vicm+Vd/2)
Vi+=Vicm+Vd/2
+ + Gm(Vicm+Vd/2) GmVd/2
+
Gm
Gm(Vicm-Vd/2) -GmVd/2
-
_
Vi =Vicm-Vd/2
_ -GmVicm
_ Gm(Vicm-Vd/2) 1
Σ -GmVicm
2

R Common-mode detection using the same differential

transconductance by making copies of the current
 Input capacitance is not increased
 CMFF is inherently achieved
 CMFB can be easily arranged
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 How to Implement the

Proposed OTA?

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 Proposed OTA Architecture
VDD

VX
M3 M3 M3 M3

VDD
I1 + I 2
I1I1 + I 2
2
2
Vout+ Vi+ Vi- Vout
I 2 − I1 I1 M1 M1 I2
I 01 = I1 − I 2
2 I0 =
2

I1 I1 I2 I2

M2 M2 M2 M2 M2 M2

VSS

R Inherent common-mode detection

R Inherent common-mode Feedforward
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 Combine CMFB and CMFF
VDD VX (from next stage) VDD VX (from next stage)

Vref M3 VX M3
M1 M 3' M3 M3 M 3'

VDD

Vout+ Vi+ Vi- Vout-

I1 M1 M1 I2

I1 I2
VY

VZ VY
M2 M 4' M4 M2 M2 M4 M 4'
M4 M4

VSS

R CMFB is arranged exploiting the direct connection of the OTAs

R Avoid using a separate common-mode detector
R Differential-mode signals and common-mode signals share
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 Small Signal Analysis

R The path from the differential signal to the ouput

encounters one pole
R The other path is a common-mode path

iod gm2 g m1 gm2

g m (s) = ≅ g m1 = ω nd =
vd g m 2 + sC Z 1 + s / ω nd CZ

Δφ ≅ − tan −1 (ω / ω nd 1 )

min VDD = max{(VTN + Vov1 + Vov 2 + V peak ), (VTP + Vov 3 + Vov 4 )}

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 Simulation Results

Icm
Vin+
+ +
Vo+
+ +
g m1 C g m2
_ _
Vin- _ Vo- _
Icm

CMFB
Information

Output voltage applying common-mode current step (Icm)

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 Sources of Nonlinearity

R Short Channel Effects

PMobility degradation
R Cross product of differential and common-
mode signals
PEven order harmonics
R Nonlinear mixing components due to CMFB
PDue to the nonlinear common-mode detection

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 μ0
Short Channel Effects μ=
1 + θ (VGS − VT )

θ .VPeak
2
θ .Vin2_ rms θ=
1
HD3 ≅ =
16Vov (1 + θVov ) (2 + θVov ) 8Vov (1 + θVov ) 2 (2 + θVov )
2 LE C

Tradeoff: Linearity-Frequency response

L HD3

⎡ ⎤ Maximize gm1
⎡Vin2_ rms ⎤ ⎢ ⎥
+ θ 2
+ θ
SNR = 10 log ⎢ 2 ⎥ ≅ 10 log ⎢ m1 ⎥
3 . HD .V
3 ov (1 Vov ) ( 2 Vov ). g
⎢⎣ Vn _ rms ⎥⎦ ⎢ ⎛ g m 2 + 2 g m3 + 2 g m 4 ⎞ ⎥
⎢ 2 . BW . KT θ ⎜⎜1 +
. ⎟⎟ ⎥
⎢⎣ ⎝ g m1 ⎠ ⎥⎦ Maximize Vov

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 Cross product of differential and
common-mode signals
β⎛ 2 ⎞
2
K ⎛W ⎞ ⎡ vd ⎤ vd2
i1 = P ⎜ ⎟ ⎢VDD − VICM − VTP + + vcm ⎥ = ⎜⎜Vov + vdVov + + 2Vov vcm + vcm + vd vcm ⎟⎟
2

2 ⎝ L ⎠1 ⎣ 2 ⎦ 2⎝ 4 ⎠

Differential second harmonic

β⎛ 2 ⎞
2
KP ⎛W ⎞ ⎡ vd ⎤ vd2
i2 = ⎜ ⎟ ⎢VDD − VICM − VTP − + vcm ⎥ = ⎜⎜Vov − vdVov + + 2Vov vcm + vcm − vd vcm ⎟⎟
2

2 ⎝ L ⎠1 ⎣ 2 ⎦ 2⎝ 4 ⎠

R Common-mode signal allowed at the input of the filter

must be low
R For example an HD2 of –50dB and Vov=0.6V, the
maximum tolerated common-mode signal is 3.8mVPeak
Previous stage should take care of this HD2
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 Nonlinear components due to CMFB
VDD

K ⎛W ⎞ ⎡ vd2 ⎤
i1 + i2 = 2. P ⎜ ⎟ ⎢(VDD − VICM − VTP ) + ⎥
2

2 ⎝ L ⎠1 ⎣ 4⎦ M3
2M3 M3
= β .V + 2γ .v
2
ov
2
d
VDD AI
A I DC + γvd2
I DC + I γvd2 1+ A
(i1+i2) 1+ A
id/2
Nonlinear CM detection Vo1
M1 M1
Vo2
-id/2

Z Z
i1 i2

M2 M2

VSS A = g m × Z × AI

⎡ A 1 ⎤
HD3CMFB ≅ HD3 ⎢1 + ⎥
⎣ 1 + A θVov (1 + 0.5θVov ) ⎦
= HD3 × F
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 How to use OTAs as CM Detector?
VBP1+

Vin+ VLP1+
+ + + +
_
+ + +
g m1 g m2 g m1 C g m1
_ C _ _
+
Vin -
_ _ _ _
VLP1 -

VBP1-
CMFB CMFB
Information Information

R A 2nd Order Filter is used as an example

R Exploit direct connection of the cascaded OTAs in the filter
R Differential OTA used as CM detector also
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 Filter Architecture
VBP1+
CMFF+CMFB VLP1+
CMFF+CMFB
C L1 CMFF C L1
Vin+
+ + + + CMFF
_ _
+ +
g m1 A gm2 A g m1 A g m1 A
_ _
+ +
Vin- _ _ _ _
C L1 C L1 VLP1-
VBP1-
Common Mode
Information

VBP2+
CMFF+CMFB CMFF+CMFB
CMFF CL 2 CMFF CL 2
VLP2+
+ + + +
_ _
+ +
g m1B g m1B gm2B g
_ _ m1B
+ +
_ VLP2- _ _ _
CL 2 CL 2
VBP2-

R Common-mode level sensed only once per output

R Common-mode level is fixed only once per node
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 Chip Micrograph

X=350μm, Y= 450μm
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 Measurement Results: Frequency response

Magnitude Response Phase Response

-3dB cutoff frequency is 100MHz
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 Measurement Setup: Frequency response

Vin CB C Vout
Rg Linear R
Bias
Phase
Rg Filter R

CB C

Network analyzer

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 Measurement Setup: Intermodulation distortion

Power
Signal generator combiner
VF1

Vin CB C Vout
Rg Linear R
Bias
Phase
VF2 Rg R
Filter
CB C

Spectrum analyzer

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 Measurement Results: Frequency response

Magnitude Response Phase Response

-3dB cutoff frequency is 100MHz
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 Measurement Results: Group delay

Group delay ripple <3% up to 100MHz

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 Measurement Results: IM3

IM3≤40 dB over the whole baseband for twin tones of 350mVp-p

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 Comparison with previously published work
JSSC-1997 JSSC-1999 This Work
Filter Type and Order 7th Order 0.050 7th Order 0.050 4th Order Bessel
Equirriple Equirriple +filter boost
Cut- Off Frequency 50 MHz 100 MHz 100 MHz
Ripple on Group Delay < 2% @ f < 1.5f3dB < 5% @ f < 2f3dB < 3% @ f < f3dB
Max Input Signal 200 mVp-p 100 mVp-p 350 mVp-p*
for 0.5% THD
THD -46 dB -46 dB -46 dB
Output Noise Level 1.7 mVrms N/A 700 μVrms
Dynamic Range 32 dB > 40 dB 45 dB
@ THD=-46dB
Supply Voltage 3V 3V 3.3 V
Current Consumption 27 mA 40 mA 26 mA
Technology 0.72 μm CMOS 0.29 μm BiCMOS 0.5 μm CMOS

* Maximum differential input is 500 mVp-p for 1% THD

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 Conclusions
R A pseudo differential fully symmetric fully balanced
OTA architecture has been presented
R The OTA has inherently the common-mode detector,
hence CMFB is economically implemented
R CMFF and CMFB are combined to exploit the direct
connection of the cascaded OTAs in a filter
R Design trade-offs have been demonstrated
R The OTA achieves -43dB THD@900mVpp and
9.8nV/√Hz noise spectral density
R The filter achieves group delay ripple of 3% up to
100MHz, 45dB of DR@THD=-46dB in 0.5μm CMOS
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