10 COMMON-COLLECTOR AMPLIFIER
A typical common-collector amplifier using an npn transistor is shown in Figure 46. This
circuit is also known as emitter-follower. Its small-signal analysis circuit is given in Figure 47. The
corresponding dc and ac load lines are depicted in Figure 48.
V
CC
R
1
i
i C
1
R +
S
v
i CE
in _
+
v +
s
_ R
R E v
2 R o
i i L
2 E i _
o
R
S
i
in
i r
+ b π i
c
i
+ a
v
s _
v i
in e
R +
B
R
E R v
i L o
_ o
_
IDCM
Q-Point
ICQ IBQ
DC Load Line
0 vCE (V)
0 VCEQ vACM VDCM
The dc resistance in the collector-emitter loop is RE/α. For small-signal analysis, the
effective resistance in the emitter branch is the parallel combination of RE and RL. Let us denote
the parallel combination as REL. Then, REL = RE || RL.
The forward diode resistance in the base branch is rπ . The effective resistance as seen
from the base terminal is RibL such that
RibL = rπ + (β + 1) REL = (β + 1)(re + REL)
where re = rπ / (β + 1)
is the equivalent forward diode resistance in the emitter branch. Note that we have included the
subscript L to highlight the fact that the effective resistance as seen from the base terminal
depends upon the load resistance RL. As long as REL >> re (which is usually the case), the
resistance as seen from the base terminal is
RibL ≈ (β + 1) REL
This is a relatively high resistance. For instance, if REL is in kilo-ohms and β is high (say
100), then RibL is in hundreds of kilo-ohms. Thus, an emitter follower (common collector amplifier)
usually offers high input resistance as seen from the base terminal.
β v in
ic = βib =
R ibL
(β + 1) v in v in
i e = (β + 1) i b = =
R ibL re + R EL
Thus, the output voltage is
R EL
v o = i e R EL = v in
re + R EL
From this equation, it should be clear that the output voltage is nearly equal to the input voltage as
long as REL >> re (This is usually true). Thus, the voltage gain is
vo R EL
AV = =
v in re + R EL
When we neglect re in comparison with REL, we find that the voltage gain is unity.
R EL R inL
vo = vs
re + R EL R S + R inL
vo R EL R inL
and A VS = =
vs re + R EL R S + R inL
From the voltage gain equation, it becomes evident that as long as re << REL and RS <<
RinL, the voltage gain approaches unity. Under these assumptions, we can label a common-emitter
configuration as unity gain amplifier. Since the voltage at the emitter is nearly equal to the
applied signal, it is for this reason the common-collector configuration is called the emitter
follower. The emitter voltage follows the base voltage.
From Figure 47, we see that the output resistance is a parallel combination of RE and the
total resistance in the base branch as seen from the emitter terminal. Note that the signal voltage
vs must be replaced with a short circuit. The total resistance in the base circuit is rπ + (RS || RB).
Thus, the output resistance is
RO = RE || [{rπ + (RS || RB)} / (β + 1)]
Let us assume that the input signal is ideal in the sense that its resistance is very small
and can be neglected, then RS → 0. The output resistance is now simply a parallel combination of
RE and re. Since re is very small in comparison with RE, the output resistance is nearly re. Thus, a
common-collector configuration has negligibly small output resistance. This fact enables us
to use the common-collector configuration as the output stage of an amplifier where the load
resistance is small (This is usually the case when the load is either a 4-Ω, an 8-Ω, or a 16-Ω
speaker).
We can summarize our findings for the common-collector or emitter follower circuit as follows:
(a) Its voltage gain is nearly unity.
(b) Its input resistance is usually quite high.
(c) Its output resistance is usually very low.
We have already discussed another circuit that has all of the above traits. Can you name
it? Well, it is an operational amplifier circuit called the buffer amplifier. Now you know that a single
transistor common-collector configuration behaves more like a buffer amplifier. However, it is not
as good as the buffer amplifier. But, what more can you expect from a single transistor?
Design philosophy:
Let us first examine if we can design this amplifier for the maximum peak-to-peak voltage
swing exactly like the common-emitter design. To determine the collector current at the dc
operating point, we need to know RDC and RAC. For the dc analysis, the only resistance in the
collector-emitter loop is RE. Thus, the equivalent dc resistance as seen by the collector current is
RDC = RE/α = 5 /0.98 = 5.102 kΩ
where α = β/(β + 1) = 49/50 = 0.98.
The ac resistance in the emitter branch is simply the parallel combination of RE and RL. Since RE
= RL = 5 Ω, the equivalent ac load resistance is REL = 2.5 kΩ. Thus, the ac resistance in the
collector-emitter loop is
RAC = REL/α = 2.5/0.98 = 2.551 kΩ
We can now compute the collector current at the Q-point using (34) as
VCC 10
I CQ = = = 1.307 mA
R AC + R DC 2.551 + 5.102
The emitter current and the collector-to-emitter voltage at the Q-point are
IEQ = ICQ/α = 1.334 mA
VCEQ = VCC – IEQ RE = 10 – (1.334 mA)(5 kΩ) = 3.33 V
The power dissipated by the transistor at the operating point, neglecting the power loss in the base
circuit, is
PT = VCEQ ICQ = (3.33V)(1.307 mA) = 4.35 mW
The power supplied by the dc source at the operating point is
PDC = VCC ICQ = (10 V)(1.307 mA) = 13.07 mW
In our case, RDC is 5.102 kΩ and VCC = 10 V. Thus, IC(max) = 0.98 mA.
The corresponding collector-to-emitter voltage is
VCE(max) = 10 – (0.98 mA)(5.102 kΩ) = 5 V
The maximum power dissipation occurs at a point where VCE is 5 V and IC is 0.98 mA. We
can call it as the maximum power dissipation point and represent it as (5 V, 0.98 mA). This
point is on the right side of the Q-point for the maximum undistorted peak-to-peak voltage swing
(3.334 V, 1.3067 mA) computed earlier.
As we said earlier, we need to decrease the collector current at the operating point in order
to reduce the power supplied by the dc voltage source. As we move the operating point to the right,
the power dissipation by the transistor is expected to increase. The question: Where should the
operating point be so that power supplied by the dc source is lower than 13.07 mW? Since
we expect the maximum value of the output voltage swing to be 2 V or so, we can select the
operating point such that vACM - VCEQ is about 2.5 V (using a safety factor of 1.25 to avoid going
into the cut-off region). This will give us a theoretical peak-to-peak output voltage swing of 5 V
whereas the expected peak-to-peak output voltage is only 4 V. This will surely keep us well above
the cut-off region. From Figure 48, it is clear that vACM – VCEQ must be equal to ICQ RAC. Since
RAC is 2.551 kΩ, the new Q-point collector current must be
ICQ = 2.5/2.551 = 0.98 mA.
It is merely a coincident that the new Q-point happens to be where the transistor dissipates
maximum power. Don’t always expect this to be the case. In fact, it would be nice if this really were
not the case so that the transistor does not have to operate at a point where it dissipates maximum
power.
The emitter and base currents at the new Q-point are
IEQ = ICQ / α = 0.98 / 0.98 = 1.0 mA
IBQ = ICQ / β = 0.98 / 49 = 0.02 mA
Substituting RB = 10.87 kΩ, VCC = 10 V and VBB = 5.92 V in the above equation, we get R1 =
18.36 kΩ. Let us select a standard resistor of 18 kΩ for R1.
10 V
IC
10.8 kΩ
IB
6 V +_ 5 kΩ
IE
Thus, the currents and voltages at the dc operating point are as follows:
ICQ ≈ 1 mA, IEQ = 1.02 mA, IBQ = 0.02 mA, and VCEQ = 4.93 V
v in
i e = (β + 1) i b = 50 i b = mA
2.525
Thus, the output voltage is
v in
v o = i e R EL = 2.5 = 0.99 v in V
2.525
Thus, the voltage gain is AV = 0.99. The output voltage is in phase with the input voltage.
We can also express vin in terms of vs as
R inL 9.95
v in = vs = vs
R S + R inL 10.95
Thus, the output voltage in terms of vs is
9.95
v o = 0.99 v s = 0 .9 v s
10.95
Thus, the overall voltage gain is AVS = 0.9.
As vs varies as 2 sin(10,000t) V, the output voltage varies as 1.8 sin(10,000t) V. The peak-
to-peak maximum swing of the output voltage is 3.6 V. It is well within the maximum undistorted
swing of 5.1 V.
We can, in fact, modify the design by redesigning the amplifier for a maximum peak-to-
peak swing of say 4.5 V using a safety factor of 1.25 (i.e. 1.25 × 3.6 V). This will certainly lower the
collector current at the new dc operating point and thereby further reduce the drain on the battery.
The new design is left as an exercise for you. Carry it out in order to build the necessary
confidence in designing the amplifiers.
The input and the output currents are
v in v
i in = = in mA
R inL 9.95
vo 0.99 v in
io = = = 0.198 v in mA
RL 5
A general single transistor common-base amplifier is given in Figure 50. In this case, the input is at
the emitter and the output is at the collector. The small-signal model of the common-base amplifier
is shown in Figure 51. The corresponding dc and ac load lines are depicted in Figure 52.
V
CC
R
R C
1
+
R
S R
L v
o
+
R R _ v _
2 E s
iC
IDCM
Q-Point
ICQ IBQ
DC Load Line
0 vCE
0 VCEQ vACM VDCM
In order to draw the dc and ac load lines, we need the dc and ac resistances in the
collector-emitter branch. The examination of Figure 50 reveals that the dc resistance is
RDC = RC + RE/α (48)
where α = β/(β + 1)
β R CL
The output voltage: v o = − i c R CL = v in (56)
rπ + R B
β R CL
Therefore, the voltage gain: AV = (57)
rπ + R B
Once again, it is clear from this equation that the voltage gain can be increased by bypassing RB is
with a capacitor. This circuit, therefore, can provide a high voltage gain.
vo β RC
The output current: io = = v in (58)
R L rπ + R B R C + R L
io β RC RE
The current gain: AI = = (59a)
i in RC + RL rπ + R B + (β + 1) R E
When RB is bypassed by a capacitor and rπ is small in comparison with (β + 1) RE, then the
current gain becomes
α RC
AI ≈ (59b)
RC + RL
Note that the output resistance for the common-base amplifier from Figure 51 is RC. If RC is
selected on the basis of maximum power transfer to the load, then RC = RL. In this case, the
current gain is less than 0.5 because α is usually less than 1.
rπ + R B
The input resistance: R in = R E || (60)
β +1
Once again, if RB is bypassed by a capacitor and RE is usually quite large in comparison with re,
then the input resistance is
rπ
R in ≈ = re (61)
β +1
V
CC
R
C
R
S
v
o
+
v R
s _ E R
L
- VEE
RC
RS +
RL vo
+ _
RE vs _
- VEE
The common-base amplifier is usually drawn as shown in Figure 53 in order to shown the input
signal on the left side and the output signal on the right side of the circuit. We can redraw this
circuit so that it appears familiar to us. Such a circuit is redrawn in Figure 54.
VCC
IC RC
+
IB
VCE
_
RE
IE
- VEE
I C = β I B = 1.4014 mA
In order to sketch the dc load line, let us first determine the dc resistance in the collector-emitter
loop. From Figure 55, it is clear that the dc resistance is
RDC = RC + RE/α
where α = β / (β + 1) = 49 / 50 = 0.98
Thus: RDC = 2.2 + 10/0.98 = 12.404 kΩ
The dc load line equation can now be written as
VCE = VCC – VEE – IC RDC = 30 – 12.404 IC
The two points on this line are (30 V, 0) and (0, 2.42 mA). The line joining the two points yields the
dc load line as depicted in Figure 56. The intersection of the dc load line with the transistor
characteristic for IB = 0.0286 mA yields the Q-point.
IDCM = 2.42
Q - Point
dc Load line
vCE (V)
0 12.62 30
VCEQ VDCM
i
r c
π
+
i
b
R v
R i C R o
S e L
i
i + o
in _
+
v R
s _ E
v
in i
RE
_
i c = β i b = 49 (− 1.144 v in ) = − 56.06 v in mA
i e = (β + 1) i b = − 57.20 v in mA
The current through RE is
v in v in
i RE = = = 0.1 v in mA
R E 10 kΩ
The output and the input currents are
RC 2 .2
io = − ic =− (− 56.06 v in ) = 28.03 v in mA
RC + RL 2 .2 + 2 .2
i o 28.03 v in
AI = = = 0.489
i in 57.3 v in
As expected, the voltage gain is high and the current gain is less than 0.5.
The power gain is
A P = A V A I = 61.67 × 0.489 = 30.16
Let us now represent the output voltage in terms of the voltage of the applied signal. The input
voltage vin can be expressed in terms of vs as
R in
v in = vs
R in + R s
Since Rin is simply the ratio of vin to iin, it can be computed from (62) as 17.45 Ω.
We could have also computed it as the parallel combination of RE and re. Since RE >> re, the input
resistance is almost equal to re (17.5 Ω). The signal resistance RS is given as 10 Ω.
Substituting these values in the above equation, we obtain
v in = 0.636 v s
We can now express the output voltage from (63) in terms of vs as
vo = 61.67 (0.636 vs) = 39.22 vs V
The overall voltage gain can now be computed as
vo
A VS = = 39.22 V
vs