HP Compaq Presario c700 - Compal La-4031 Jbl81 - Rev 1.0 - Presente de Zouave

A
Compal confidential
Schematics Document
Mobile Merom uFCPGA with Satna Rosa Platform
3
2007-07-30
REV:0.2
Compal Secret Data
Security Classification
2007/03/26
Issued Date
2006/07/26
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Compal Electronics, Inc.

Cover Sheet
Size Document Number

Custom LA-4031P
Date:
Rev
1.0
Wednesday, October 24, 2007
Sheet
E
of
42
Compal confidential
File Name : LA-4031P
ZZZ1
Spartan 1.1 (Merom +Crestline+ICH8)
PCB
1
Mobile Yonah/Merom
uFCPGA-478 CPU
Socket P
Fan Control
page 4
Thermal Sensor
ADM1032AR
page 4,5,6
Clock Generator
ICS9LPRS355
page 4
page 15
FSB
H_A#(3..31)
533/667/800MHz
H_D#(0..63)
CRT/TV-OUT
page 16
DDR2 -400/533/667
NB Crestline
LVDS Conn
DDR2-SO-DIMM X2
BANK 0, 1, 2, 3
page 13,14
Dual Channel
page 7,8,9,10,11,12
page 17
2
USB Card Reader
page 27
DMI
USB Conn
PCI BUS
USB2.0
PCI-E BUS
page 18,19,20,21
page 23
page 28
AC-LINK/Azalia
SB ICH8
MODEM AMOM
CX20548
Audio Conexant
CX20561-12Z
page 25
page 24
Realtek
RTL8100CL
LED
page 27
AMP & Audio Jack

ENE P3017 page 26
SATA
SATA HDD Connector
page 22
RTC CKT.
RJ45/11 CONN
Mini-Card
WLAN
page 22
page 23
page 19
PATA Master
IDE ODD Connector

page 22
LPC BUS
ENE KB926
Power On/Off CKT.
SPI
page 30
page 28
page 29
Int.KBD
Touch Pad CONN.
DC/DC Interface CKT.
SPI ROM
25LF080A
page 28
page 30
page 31
2007/03/26
Issued Date
Page 32,33,34,35,36,37,38
Compal Secret Data
Power Circuit DC/DC
2006/07/26
Deciphered Date
B
Title

Block Diagram

Custom LA-4031P
Date:
Rev
1.0
Sheet
E
of
42
Voltage Rails
+5VS
+3VS
power
plane
+B
D
+5VALW
+3VALW
+1.5VS
+1.8V
+1.25VS
+0.9V
State
+VCCP
+CPU_CORE
S0
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery

don't exist
Symbol Note :
: means Digital Ground
: means Analog Ground

@ : means just reserve , no build
DEBUG@ : means just reserve for debug.
External PCI Devices

DEVICE
IDSEL #
LAN
AD17
REQ/GNT #
0
PIRQ
A
SMBUS Control Table
I2C / SMBUS ADDRESSING
SOURCE
DEVICE
HEX
ADDRESS
DDR SO-DIMM 0
A0
10100000
DDR SO-DIMM 1
A4
10100100
CLOCK GENERATOR (EXT.)
D2
11010010
INVERTER
BATT
SERIAL
EEPROM
THERMAL
SENSOR
(CPU)
ADM1032
SODIMM
CLK CHIP
MINI CARD
LCD
X
X
V
X
V
X
X
V
X
X
X
X
X
X
X
X
ICH8
Crestline
SMB_EC_CK1
SMB_EC_DA1
KB925
SMB_EC_CK2
SMB_EC_DA2
KB925
SMB_CK_CLK1
SMB_CK_DAT1
LCD_CLK
LCD_DAT
BOM: 43152432L03(965GM) & 43152432L04(960GML) with card reader
BOM: 43152432L01(965GM) & 43152432L02(960GML) without card reader

Compal Secret Data
Jump-Short:
PJP?
2007/03/26
Issued Date
2006/07/26
Deciphered Date
5
Title

Notes List
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
1
of
42
H_A#[3..16]
H_ADSTB#1
H_A20M#
H_FERR#
H_IGNNE#
19
19
19
19
H_STPCLK#
H_INTR
H_NMI
H_SMI#
A6
A5
C4
A20M#
FERR#
IGNNE#
H_STPCLK#
H _INTR
H _NMI
H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
H_I ERR#
H_INIT#
LOCK#
H4
H_LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_T RDY#
G6
E4
H_HIT#
H_HITM#
HIT#
HITM#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
H_A20M#
H_F ERR#
H _IGNNE#
H_BR0#
D20
B3
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
H_ADS# 7
H_BNR# 7
H_BPRI# 7
H_BR0#
H_INIT#
R10
56_0402_5%
2
1
+VCCP
19
H_LOCK# 7
C2
0.1U_0402_16V4Z
2
XDP_TDI
R2
15_0402_5%
XDP_TMS
R3
39_0402_1%
XDP_TRST#
R7
560_0402_5%
XDP_TCK
R8
27_0402_5%
H_RESET# 7
H_RS#0 7
H_RS#1 7
H_RS#2 7
H_TRDY# 7
H_HIT# 7
H_HITM# 7
+3VS
R414
1
2
0_0402_5%
XDP_TCK
XDP_TDI
0.1U_0402_16V4Z
XDP_DBRESET#
XDP_DBRESET# 20
H_PROCHOT# 37
R13
2
1
68_0402_5%
+3VS
1
U1
+VCCP
VDD
SCLK
SMB_EC_CK2
H_THERMDA
D+
SDATA
SMB_EC_DA2
H_THERMDC
D-
ALERT#
THERM#
GND
C4
H_THERMDA_R1 R14
H_THERMDC_R1 R15
2 0_0402_5%
2 0_0402_5%
H_THERMDA
H_THERMDC
L_THERM#
2200P_0402_50V7K
H_THERMTRIP#
C7
H_THERMTRIP# 7,19
A22
A21
CLK_CPU_BCLK
CLK_CPU_BCLK#
R427
10K_0402_5%
@
ADM1032ARMZ-2REEL_MSOP8
10K_0402_5%
H CLK
R426
10K_0402_5%
@
R16
+3VS
BCLK[0]
BCLK[1]
C3
XDP_TMS
XDP_TRST#
DBRESET# 1 @ R413 2
0_0402_5%
H_PROCHOT#
D21
A24
B25
+VCCP
H_DEFER# 7
H_D RDY# 7
H_DBSY# 7
Thermal Sensor ADM1032ARMZ
THERMAL
ICH
7
19
19
19
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
F1
IERR#
INIT#
BR0#
ADDR GROUP 1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
H _DEFER#
H_D RDY#
H_DBSY#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
H5
F21
E1
K3
H2
K2
J3
L1
H_ADS#
H_ BNR#
H_BPRI#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
DEFER#
DRDY#
DBSY#
H1
E2
G5
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[17..35]
ADS#
BNR#
BPRI#
CONTROL
7
7
7
7
7
7
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
XDP/ITP SIGNALS
H_ADSTB#0
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP 0
JP2A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
Address:100_1100
CLK_CPU_BCLK 15
CLK_CPU_BCLK# 15
SMB_EC_DA2
SMB_EC_CK2
30 SMB_EC_DA2
30 SMB_EC_CK2
H_THERMDA, H_THERMDC routing together,

Trace width / Spacing = 10 / 10 mil
RESERVED
For Merom, R14 and R15 are 0ohm

For Penryn, R14 and R15 are 100ohm.
PWM Fan Control circuit
+5VS
SP02000D000 S W-CONN ACES 85204-02001 2P P1.25

ACES_85204-02001_2P
Merom Ball-out Rev 1a

CONN@
+3VS
D1
RB751V_SOD323
0_0402_5%
2
C5
4.7U_0805_10V4Z
ACES_85204-02001
CONN@
+3VS
L_THERM#
@ R415 0_0402_5%
1
2
THERM#
INB
INA
D Q1
@ D26
FAN_PWM
THERM#
O
3
20
RLZ5.1B_LL34
30
OCP#
1
2
5
6
2 2
3
1 OCP#
@ Q2
MMBT3904_SOT23
F AN
@ U2
TC7SH00FU_SSOP5
SI3456BDV-T1-E3_TSOP6
@ R416
10K_0402_5%
1
2
G1
G2
R17
1
2
3
4
C6
0.1U_0402_16V4Z
R405
1
@ 56_0402_5%
H_PROCHOT#
JP3
SP07000FP00 S SOCKET TYCO 2-1871873-2 478P H3 CPU

SP07000FD00 S SOCKET FOXCONN PZ4782A-274M-41 478P H3
+VCCP
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

Merom(1/3)-AGTL+/XDP
Size
Document Number
Custom LA-4031P
Date:
Rev
1.0
Sheet
1
of
42
+VCC_CORE
R20
R21
C8
AD26
C23
D25
C24
AF26
AF1
A26
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
B22
B23
C21
BSEL[0]
BSEL[1]
BSEL[2]
H_DSTBN#1
H_DSTBP#1
H_DINV#1
1
1
1
15
15
15
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H _DINV#3
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#
MISC

CONN@
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL
CPU_BSEL2
166
B
CPU_BSEL1
200
CPU_BSEL0
1
0
H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
H_DPRSTP# 7,19,37
H_DPSLP# 19
H_DPWR# 7
H_PWRGOOD 19
H_CPUSLP# 7
H_PSI#
37
Resistor placed within

0.5" of CPU pin.Trace
should be at least 25
mils away from any other
toggling signal.
COMP[0,2] trace width is
18 mils. COMP[1,3] trace
width is 4 mils.
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
+VCCP
R18
2
2
R19
0_0402_5%
1
1
0_0402_5%
+
C7
220U_6.3V_M
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE

CONN@
37
37
37
37
37
37
37
VCCSENSE 37
VSSSENSE 37
+1.5VS
0.01U_0402_16V7K
7
7
7
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
H_D#[48..63] 7
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
C9
V_CPU_GTLREF
TEST1
2 @ 1K_0402_5%
TEST2
2 @ 1K_0402_5%
TEST3
T1
TEST4
@ 0.1U_0402_16V4Z
TEST5
T2
TEST6
T3
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
JP2C
R25
27.4_0402_1%
2
1
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H _DINV#2
R24
54.9_0402_1%
2
1
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
DATA GRP 2
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H _DINV#1
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#[16..31]
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
R23
27.4_0402_1%
2
1
7
7
7
7
DATA GRP 1
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DATA GRP 0
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
+VCC_CORE
H_D#[32..47] 7
JP2B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H _DINV#0
R22
54.9_0402_1%
2
1
H_D#[0..15]
DATA GRP 3
10U_0805_6.3V6M
C10
Near pin B26

B
Length match within 25 mils.

The trace width/space/other is
20/7/25.
+VCCP
R27
1K_0402_1%
+VCC_CORE
R28
100_0402_1%
2
VCCSENSE
R30
100_0402_1%
1
2
VSSSENSE
V_CPU_GTLREF
R29
2K_0402_1%
Close to CPU pin AD26

within 500mils.
Close to CPU pin

within 500mils.
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

Merom(2/3)-AGTL+/PWR
Size
Document Number
Custom LA-4031P
Date:
Rev
1.0
Sheet
1
of
42
+VCC_CORE
1
Place these capacitors on L8
(North side,Secondary Layer)
C11
10U_0805_6.3V6M
C12
10U_0805_6.3V6M
C13
10U_0805_6.3V6M
C14
10U_0805_6.3V6M
C15
10U_0805_6.3V6M
C16
10U_0805_6.3V6M
C17
10U_0805_6.3V6M
C18
10U_0805_6.3V6M
D
JP2D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

CONN@
.
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
+VCC_CORE
1
(North side,Secondary Layer)
C19
10U_0805_6.3V6M
C20
10U_0805_6.3V6M
C21
10U_0805_6.3V6M
C22
10U_0805_6.3V6M
C23
10U_0805_6.3V6M
C24
10U_0805_6.3V6M
C25
10U_0805_6.3V6M
C26
10U_0805_6.3V6M
+VCC_CORE
1
(Sorth side,Secondary Layer)
C27
10U_0805_6.3V6M
C28
10U_0805_6.3V6M
C29
10U_0805_6.3V6M
C30
10U_0805_6.3V6M
C31
10U_0805_6.3V6M
C32
10U_0805_6.3V6M
C33
10U_0805_6.3V6M
C34
10U_0805_6.3V6M
+VCC_CORE
1
(Sorth side,Secondary Layer)
C35
10U_0805_6.3V6M
C36
10U_0805_6.3V6M
C37
10U_0805_6.3V6M
C38
10U_0805_6.3V6M
C39
10U_0805_6.3V6M
C40
10U_0805_6.3V6M
C41
10U_0805_6.3V6M
C42
C
10U_0805_6.3V6M
Mid Frequence Decoupling
ESR <= 1.5m ohm

Capacitor > 1980uF
Near CPU CORE regulator
+VCC_CORE
220U_D2_2V_Y_LESR9M
1000U 2.5V M H80 LESR8M

B
C45 +
220U_D2_2V_Y_LESR9M
C46
C47 +
C48
C49
220U_D2_2V_Y_LESR9M
220U_D2_2V_Y_LESR9M
Place these inside

socket cavity on L8
(North side
Secondary)
+VCCP
C50
0.1U_0402_16V4Z
C51
0.1U_0402_16V4Z
C52
0.1U_0402_16V4Z
C53
0.1U_0402_16V4Z
C54
0.1U_0402_16V4Z
C55
0.1U_0402_16V4Z
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

Merom(3/3)-GND&Bypass
Size
Document Number
Custom LA-4031P
Date:
Rev
1.0
Sheet
1
of
42
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
M14
E13
A11
H13
B12
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#_0
H_RS#_1
H_RS#_2
E12
D7
D8
H_RS#0
H_RS#1
H_RS#2
4
4
4
4
4
H_RS#0
H_RS#1
H_RS#2
4
4
4
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
BG20
BK16
BG16
BE13
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
BH18
BJ15
BJ14
BE16
M_ODT0
M_ODT1
M_ODT2
M_ODT3
SM_RCOMP
SM_RCOMP#
BL15
BK14
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BK31
BL31
SMRCOMP_VOH
SMRCOMP_VOL
SM_VREF_0
SM_VREF_1
AR49
AW4
MUXING
DDR
10K_0402_5%
R38
CLKREQ#_B
2 <>
5
5
5
5
T4
T5
T6
T7
T8
T9
T10
T11
T12
C FG5
C FG6
C FG7
C FG8
C FG9
CFG10
CFG11
CFG12
CFG13
T13
CFG16
T44
T14
T15
CFG18
CFG19
CFG20
20 PM_BMBUSY#
5,19,37 H_DPRSTP#
13 PM_EXTTS#0
14 PM_EXTTS#1
20,30 PM_PWROK
18,22 PLT_RST#
4,19 H_THERMTRIP#
20,37 DPRSLPVR
PM_BMBUSY#
G41
H_DPRSTP#
L39
PM_EXTTS#0
L36
PM_EXTTS#1
J36
PM_PWROK
AW49
PLT_RST#
AV20
H_THERMTRIP#
N20
DPRSLPVR
G36
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
+1.8V
2
1
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
K44
K45
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AN47
AJ38
AN42
AN46
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AM47
AJ39
AN41
AN45
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AJ46
AJ41
AM40
AM44
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AJ47
AJ42
AM39
AM43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
CLK_MCH_3GPLL 15
CLK_MCH_3GPLL# 15
DMI_TXN0 20
DMI_TXN1 20
DMI_TXN2 20
DMI_TXN3 20
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
20
20
20
20
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
20
20
20
20
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
20
20
20
20
T16
T17
T18
T19
T20
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
E35
A39
C38
B39
E36
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AM49
AK50
AT43
AN49
AM50
+1.25VM_AXD
CL_CLK0
CL_DATA0
M_PWROK
CL_RST#
CL_VREF
CL_CLK0 20
CL_DATA0 20
M_PWROK 20,30
CL_RST# 20
R41
1K_0402_1%
CL_VREF
0.1U_0402_16V4Z 1
R42
392_0402_1%
C60
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
H35
K36
G39
G40
TEST_1
TEST_2
A37
R32
2
CLKREQ#_B
MCH_IC H_SYNC#
R47
R48
CLKREQ#_B 15
MCH_ICH_SYNC# 20
0_0402_5%
A
0925_Stuff R43 and R46.
Compal Secret Data

2007/03/26
Issued Date
2006/03/10
Deciphered Date
4
CLK_MCH_DREFCLK 15
CLK_MCH_DREFCLK# 15
MCH_SSCDREFCLK 15
MCH_SSCDREFCLK# 15
CRESTLINE_1p0
Near B3 pin
+1.8V
30_0402_1%
1
1
30_0402_1%
2
2
V_DDR_MCH_REF
20K_0402_5%
13
13
14
14
R35
PEG_CLK
PEG_CLK#
R46
1K_0402_1%
0927_Change from 20 ohm to 30 ohm.
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
10K_0402_5%
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
13
13
14
14
DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13
DDR_CS2_DIMMB# 14
DDR_CS3_DIMMB# 14
R34
B42
C42
H48
H47
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
13
13
14
14
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
M_ODT0
M_ODT1
M_ODT2
M_ODT3
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
PM_EXTTS#1
15 MCH_CLKSEL0
15 MCH_CLKSEL1
15 MCH_CLKSEL2
V_DDR_MCH_REF
C61
0.1U_0402_16V4Z
13,14,35 V_DDR_MCH_REF
0.1U_0402_16V4Z
C63
1
R45
221_0603_1%
2
1
R51
100_0402_1%
C62
1
R44
1K_0402_1%
2
1
R49
2K_0402_1%
R50
24.9_0402_1%
2
1
5
C59
R37
R43
1K_0402_1%
BE29
AY32
BD39
BG37
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
10K_0402_5%
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
NC
within 100 mils from NB
C58
PM_EXTTS#0
+VCCP
R33
1K_0402_1%
+3VS
+VCCP
R36
H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5
Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.
H_SW NG
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
1
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0# 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 15
CLK_MCH_BCLK# 15
H_DPWR# 5
H_D RDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
Route H_SCOMP and H_SCOMP# with trace width, spacing and

impedance (55 ohm) same as FSB data traces
H_RCOMP
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
13 DDR_A_MA14
14 DDR_B_MA14
layout note:
0.01U_0402_16V7K
SMRCOMP_VOL
CRESTLINE_1p0
0.1U_0402_16V4Z
H_ VREF
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
R32
3.01K_0402_1%
NA lead free
H_AVREF
H_DVREF
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
AW30
BA23
AW25
AW23
M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR2 14
M_CLK_DDR3 14
L7
K2
AC2
AJ10
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
C57
M7
K3
AD2
AH11
0.01U_0402_16V7K
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
2.2U_0805_16V4Z
C56
H _DINV#0
H _DINV#1
H _DINV#2
H _DINV#3
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
PM
B9
A9
H_ VREF
K5
L2
AD13
AE13
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
DMI
HOST
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
1K_0402_1%
AV29
BB23
BA25
AV23
H_CPURST#
H_CPUSLP#
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_ BNR#
H_BPRI#
H_BR0#
H _DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_D RDY#
H_HIT#
H_HITM#
H_LOCK#
H_T RDY#
SMRCOMP_VOH
R31
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
B6
E5
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
+1.8V
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
H_SCOMP
H_SCOMP#
H_RESET#
H_CPUSLP#
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
H_SWING
H_RCOMP
W1
W2
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
GRAPHICS VID
B3
C2
H_SCOMP
H_SCOMP#
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
ME
R40
54.9_0402_1%
2
1
H_RESET#
H_CPUSLP#
H_SW NG
H_RCOMP
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
CFG
R39
54.9_0402_1%
2
1
+VCCP
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
For Crestline: 20ohm

For Calero: 80.6ohm
RSVD
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
U3B
2.2U_0805_16V4Z
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
4
5
H_A#[3..35] 4
U3A
H_D#[0..63]
MISC
Title

CRESTLINE(1/6)-AGTL+/DMI/DDR2

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
of
42
14 DDR_B_D[0..63]
SA_CAS#
BL17
DDR_A_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
SA_RAS#
SA_RCVEN#
BE18
AY20
DDR_A_RAS#
SA_RCVEN#
SA_WE#
BA19
DDR_A_WE#
U3E
D DR_B_D0
D DR_B_D1
D DR_B_D2
D DR_B_D3
D DR_B_D4
D DR_B_D5
D DR_B_D6
D DR_B_D7
D DR_B_D8
D DR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_A_BS0 13
DDR_A_BS1 13
DDR_A_BS2 13
DDR_A_CAS# 13
DDR_A_DM[0..7] 13
DDR_A_DQS[0..7] 13
DDR_A_DQS#[0..7] 13
DDR_A_MA[0..13] 13
DDR_A_RAS# 13
T22
DDR_A_WE# 13
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
CRESTLINE_1p0
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
MEMORY
SA_BS_0
SA_BS_1
SA_BS_2
BB19
BK19
BF29
SYSTEM
MEMORY
SYSTEM
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
DDR
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
U 3D
D DR_A_D0
D DR_A_D1
D DR_A_D2
D DR_A_D3
D DR_A_D4
D DR_A_D5
D DR_A_D6
D DR_A_D7
D DR_A_D8
D DR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR
13 DDR_A_D[0..63]
SB_BS_0
SB_BS_1
SB_BS_2
AY17
BG18
BG36
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
SB_CAS#
BE17
DDR_B_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
SB_RAS#
SB_RCVEN#
AV16
AY18
DDR_B_RAS#
SB_RCVEN#
SB_WE#
BC17
DDR_B_WE#
DDR_B_BS0 14
DDR_B_BS1 14
DDR_B_BS2 14
DDR_B_CAS# 14
DDR_B_DM[0..7] 14
DDR_B_DQS[0..7] 14
DDR_B_DQS#[0..7] 14
DDR_B_MA[0..13] 14
DDR_B_RAS# 14
T21
DDR_B_WE# 14
CRESTLINE_1p0
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

CRESTLINE((2/6)-DDR2 A/B CH

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
of
42
Strap Pin Table

010 = FSB 800MHz
CFG[2:0] FSB Freq select
011 = FSB 667MHz

Others = Reserved
CFG5 (DMI select)
For Crestline:2.4kohm
For Calero: 1.5Kohm
ENABLT
R53 1
R54 1
LCD_CLK
LCD_DATA
ENAVDD
ENABLT
+3VS
2
R55
1
2.4K_0402_1%
17
17
17
LVDSA0LVDSA1LVDSA2-
17
17
17
LVDSA0+
LVDSA1+
LVDSA2+
17
17
17
LVDSB0LVDSB1LVDSB2-
17
17
17
G51
E51
F49
G50
E50
F48
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSB0LVDSB1LVDSB2-
G44
B47
B45
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB0+
LVDSB1+
LVDSB2+
E44
A47
A45
2.2K_0402_5%
1
2
16
CRT_B
16
CRT_G
16
CRT_R
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA0+
LVDSA1+
LVDSA2+
TV_COMPS
TV_LUMA
TV_CRMA
TV_COMPS
TV_LUMA
TV_CRMA
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
CRT_B
CRT_G
CRT_R
3VDDCCL
3VDDCDA
CRT_HSYNC
16
CRT_VSYNC
CRT _VSYNC
E27
G27
K27
TVA_DAC
TVB_DAC
TVC_DAC
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
P33
TV_DCONSEL_0
TV_DCONSEL_1
H32
G32
K29
J29
F29
E29
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
K33
G35
F33
C32
E33
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
16
16
16
3VD DCCL
3VDD CDA
CRT_HSYNC
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
1.3K_0402_1%
R57
VGA
LVDSB0+
LVDSB1+
LVDSB2+
R56
+3VS
LVDSA0LVDSA1LVDSA2-
L41
L43
N41
N40
D46
C45
D44
E42
TV
16
16
16
LVDSACLVDSAC+
LVDSBCLVDSBC+
LVDSACLVDSAC+
LVDSBCLVDSBC+
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS
17
17
17
17
2 10K_0402_5%
2 10K_0402_5%
PCI-EXPRESS
17
17 LCD_CLK
17 LCD_DATA
17
ENAVDD
J40
H39
E39
E40
C37
D35
K40
GRAPHICS
U 3C
BKLT_CTRL
PEG_COMPI
PEG_COMPO
N43
M43
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
PEGCOMP
R52
24.9_0402_1%
1
2
0 = DMI x 2
1 = DMI x 4
+VCCP
Reserved
CFG6
PEGCOMP trace width

and spacing is 20/25 mils.
0 = Reserved
CFG7 (CPU Strap)
1 = Mobile CPU
CFG8 (Low power PCIE)
0 = Normal mode
1 = Low Power mode
0 = Reverse Lane
CFG9
(PCIE Graphics Lane Reversal)
1 = Normal Operation
Reserved
CFG[11:10]
CFG[13:12] (XOR/ALLZ)
CFG[15:14]
00
01
10
11
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation (Default)
*
C
Reserved
CFG16 (FSB Dynamic ODT)
0 = Disabled
1 = Enabled
CFG[18:17]
Reserved
0 = No SDVO Device Present
SDVO_CTRLDATA
1 = SDVO Device Present
CFG19 (DMI Lane Reversal)
0 = Normal Operation
(Lane number in Order)
1 = Reverse Lane
CFG20 (PCIE/SDVO concurrent)
0 = Only PCIE or SDVO is operational.
1 = PCIE/SDVO are operating simu.
CFG[17:3] have internal pull up

CFG[19:18] have internal pull down
CRESTLINE_1p0
For Crestline:1.3kohm
For Calero: 255ohm
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

CRESTLINE((3/6)-VGA/LVDS/TV

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
of
42
VCCSYNC
+3VS
+1.25VS_DPLLB
N28
VCCD_QDAC
AN2
VCCD_HPLL
250mA
+1.25VM_HPLL
100mA
AXD
AXF
A43
C77
C72
+1.25VS_DPLLA
+3VS_HV
VCC_HV_1
VCC_HV_2
100mA
C40
B40
1450mA
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VCC_RXR_DMI_1
VCC_RXR_DMI_2
+VCC_PEG
C97
0.1U_0402_16V4Z
+VCCP
C98
10U_0805_10V4Z
+1.25VM_MPLL
R73
R72
2
1
0_0805_5%
1
+
C105
10U_FLC-453232-100K_0.25A_10%
+VCC_PEG
20mils
A7
F2
AH1
CRESTLINE_1p0
2
1
MBK2012121YZF_0805
+1.25VS
0.1U_0402_16V4Z
AH50250mA
AH51
+1.25VS
2
1
MBK2012121YZF_0805
10U_0805_10V4Z
VTTLF1
VTTLF2
VTTLF3
AD511200mA
W50
W51
V49
V50
+1.25VS
R70
R69
+1.8V_TXLVDS
0.47U_0603_10V7K
C110
C112
+1.5VS
R67
1
2
0_0805_5%
+1.25VM_HPLL
0.47U_0603_10V7K
C109
VCC_TX_LVDS
0.1U_0402_16V4Z
C111
0.022U_0402_16V7K
VCCD_LVDS_1
VCCD_LVDS_2
+3VS
BLM18PG181SN1D_0603
2
1
R74
VCCD_PEG_PLL
J41
H42
+1.5VS_TVDAC
+1.8V_SM_CK
0.47U_0603_10V7K
C108
150mA
+1.8V_LVDS
U48
BK24
BK23
BJ24
BJ23
C104
220U_6.3V_M
+1.25VS_PEGPLL
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
VTTLF
+1.5VS_QDAC
VCCD_CRT
VCCD_TVDAC
D TV/CRT
50mAM32
25mAL29
5mA
75mA
100mA
LVDS
+3VS_TVDACC
+1.25VS_DMI
C96
40mA
VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2
+1.25VS
L1
BLM18PG121SN1D_0603
2
1
C95
C25
B25
C27
B27
B28
A28
40mA
+3VS_TVDACB
+1.25VS_PEGPLL
100mA
C103
40mA
+3VS_TVDACA
0.1U_0402_16V4Z
C102
0.1U_0402_16V4Z
C101
1U_0603_10V4Z
C100
+1.5VS_TVDAC
+3VS_TVDACC
A PEG
VCCA_SM_CK_1
VCCA_SM_CK_2
10U_0805_10V4Z
BC29
BB29
SM CK
2
1U_0603_10V4Z
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
120mA
HV
C93
100mA
10U_0805_10V4Z
C99
1U_0603_10V4Z
+1.25VS
+V1.25VS_AXF
AJ50
1U_WIM32251R0KZF_10%
1
0.1U_0402_16V4Z
+1.25VM_A_SM_CK
C92
VCC_DMI
B23
B21
A21
C88
2
1
0_0603_5%
C91
4.7U_0805_10V4Z
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
C89
0.022U_0402_16V7K
1
10U_0805_10V4Z
350mA
POWER
AT22
AT21
AT19
AT18
AT17
AR17
AR16
AR29
C87
R71
950mA
VCC_AXD_NCTF
1
2
0_0805_5%
1
10U_0805_10V4Z
1
C90 +
220U_6.3V_M
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
AT23
AU28
AU24
AT29
AT25
AT30
R63
0_0603_5%
C86
+1.25VS
VCCA_PEG_PLL
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
0.1U_0402_16V4Z
U51
AW18
AV19
AU19
AU18
AU17
+1.25VM_A_SM
R68
1
2
0_0805_5%
VSSA_PEG_BG
10U_0805_10V4Z
VCCA_PEG_BG
K49
+1.8V
R64
R65
200mA
C84
C85
+1.25VS_PEGPLL 20 mils
K50
+1.8V_SM_CK
+1.25VS
C83
0.1U_0402_16V4Z
5mA
1
+1.25VM_AXD
1U_0603_10V4Z
R66
2
1
0_0603_5%
+3VS
C76
VTT
A LVDS
+3VS_PEG_BG
PEG
VSSA_LVDS
DMI
B41
PLL
VCCA_LVDS
A SM
+1.8V_TXLVDS
A CK
VCCA_MPLL
A41
C80
1000P_0402_50V7K
1
C82
C79
VCCA_HPLL
AM2
150mA
+1.25VM_MPLL
10mA
C78
AL2
+1.25VS_DMI
2
R61
0_0603_5%
0.1U_0402_16V4Z
C81
+1.25VM_HPLL
0.1U_0402_16V4Z
VCCA_DPLLB
C70
VCCA_DPLLA
50mA
10U_0805_10V4Z
B49
H49
80mA
+1.25VS
10U_0805_10V4Z
+1.25VS_DPLLB
C71
220U_6.3V_M
2
10U_FLC-453232-100K_0.25A_10%
C69
+1.25VS_DPLLA
C68
VSSA_DAC_BG
2.2U_0805_16V4Z
B32
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
4.7U_0805_10V4Z
VCCA_DAC_BG
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
0.47U_0603_10V7K
A30
80mA
0.1U_0402_16V4Z
1
C74
C73
0.022U_0402_16V7K
+3VS_DAC_BG
+3VS
BLM18PG181SN1D_0603
2
1
R62
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
C67
+3VS_DAC_CRT
VCCSYNC
5mA
0925_Change C439 from 0.47uF to 4.7uF.

D
J32
A33
B33
4.7U_0805_10V4Z
80mA
+3VS_DAC_CRT
+1.25VS
+V1.25VS_AXF
R60
+VCCP
850mA
U3H
1U_0603_10V4Z
10U_0805_10V4Z
C75
1
C64
C439
4.7U_0603_6.3V6K
CRT
2
1
0_0603_5%
10U_0805_10V4Z
0.1U_0402_16V4Z
C66
10mA
R58
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C65
0.022U_0402_16V7K
+3VS
BLM18PG181SN1D_0603
2
1
R59
TV
+3VS_DAC_BG
C106
0.1U_0402_16V4Z
C107
10U_0805_10V4Z
+VCCP_D
D2
+VCCP
R75
1
2
1
10_0402_5%
CH751H-40PT_SOD323-2
R76
2
1
0_0402_5%
+3VS_HV
+3VS
+1.5VS_QDAC
+3VS_TVDACA
1
C114
0.1U_0402_16V4Z
+1.5VS
R77
C113
0.022U_0402_16V7K
C116
0.1U_0402_16V4Z
C115
0.022U_0402_16V7K
+3VS
BLM18PG181SN1D_0603
2
1
R78
2
1
100_0603_1%
+1.8V_TXLVDS
R79
1022_Change R64, R79 from 0 ohm to 1uH/400mA inductor.

1
+1.8V
1U_WIM32251R0KZF_10%
C118
1000P_0402_50V7K
C117
10U_0805_10V4Z
+1.8V_LVDS
A
+3VS_TVDACB
C120
1U_0603_10V4Z
R81
C119
10U_0805_10V4Z
C122
0.1U_0402_16V4Z
C121
0.022U_0402_16V7K
+3VS
BLM18PG181SN1D_0603
2
1
R80
2
1
0_0603_5%
+1.8V
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

CRESTLINE(4/6)-PWR

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
10
of
42
+VCCP
+VCCP
U3G
VCC_AXG=7700mA
U3F
C134
0.01U_0402_16V7K
C133
VCC AXM
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
VCC AXM NCTF
AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
10U_0805_10V4Z
C132
C146
0.1U_0402_16V4Z
C136
C145
0.1U_0402_16V4Z
C144
0.1U_0402_16V4Z
C143
0.22U_0402_10V4Z
C142
0.22U_0402_10V4Z
10U_0805_10V4Z
C135
10U_0805_10V4Z
A3
B2
C1
BL1
BL51
A51
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
VCC_AXM=970mA
VCC_AXM=970mA
1
C131
POWER
+VCCP
+1.8V
220U_6.3V_M
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VCC_13
POWER
3720mA
10U_0805_10V4Z
R30
+VCCP
VCC_AXG=7700mA
+VCCP
10U_0805_10V4Z
C138
1
C137
+
C139
0.1U_0402_16V4Z
1
C140
1U_0603_10V4Z
1
C141
2
10U_0805_10V4Z
220U_6.3V_M
CRESTLINE_1p0
C124
C125
D
2
4.7U_0805_10V4Z
0.22U_0603_10V7K
C153 1U_0603_10V4Z
C152 1U_0603_10V4Z
AW45VCCSM_LF1
BC39 VCCSM_LF2
BE39 VCCSM_LF3
BD17 VCCSM_LF4
BD4 VCCSM_LF5
AW8 VCCSM_LF6
AT6 VCCSM_LF7
1
C151 0.47U_0603_10V7K
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
1 C123
C150 0.22U_0603_10V7K
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
0.1U_0402_16V4Z
C149 0.22U_0603_10V7K
R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
C148 0.1U_0402_16V4Z
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
C147 0.1U_0402_16V4Z
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
VCC GFX NCTF
R82
1
2
0_0603_5%
VCC SM
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
VCC GFX
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS SCB
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VCC NCTF
C130
0.1U_0402_16V4Z
C129
0.22U_0603_10V7K
C128
0.22U_0402_10V4Z
C127
10U_0805_10V4Z
C126
220U_6.3V_M
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
VSS NCTF
VCC=1260mA
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC SM LF
+VCCP
D
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
VCC CORE
VCC=1260mA
CRESTLINE_1p0
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

CRESTLINE((5/6)-PWR/GND

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
11
of
42
U 3I
A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
U 3J
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
VSS
CRESTLINE_1p0
CRESTLINE_1p0
A
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

CRESTLINE((6/6)-PWR/GND

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
12
of
42
+1.8V
+1.8V
V_DDR_MCH_REF
8 DDR_A_DQS#[0..7]
V_DDR_MCH_REF 7,14,35
JP4
D DR_A_D2
D DR_A_D3
D DR_A_D8
DDR_A_D14
Layout Note:
Place near JP34
DDR_A_DQS#1
DDR_A_DQS1
D DR_A_D9
DDR_A_D15
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
D DR_A_D6
D DR_A_D0
DDR_A_DM0
D DR_A_D5
D DR_A_D7
C155
DDR_A_DQS#0
DDR_A_DQS0
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
D DR_A_D4
D DR_A_D1
8 DDR_A_DQS[0..7]
7,8 DDR_A_MA[0..14]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C154
8 DDR_A_DM[0..7]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2.2U_0805_16V4Z
8 DDR_A_D[0..63]
DDR_A_D13
DDR_A_D12
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 7
M_CLK_DDR#0 7
DDR_A_D11
DDR_A_D10
+1.8V
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D29
DDR_A_D24
DDR_A_DM3
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
7 DDR_CKE0_DIMMA
8
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_A_BS2
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
8
8
+0.9V
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
8 DDR_A_CAS#
7 DDR_CS1_DIMMA#
M_ODT1
M_ODT1
DDR_A_D37
DDR_A_D36
DDR_A_DQS#4
DDR_A_DQS4
C178
C177
C176
C175
C174
C173
C172
C171
C170
C169
C168
C167
C166
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D35
DDR_A_D32
DDR_A_D40
DDR_A_D44
DDR_A_DM5
DDR_A_D41
DDR_A_D46
DDR_A_D49
DDR_A_D48
+0.9V
4
3
4
3
56_0404_4P2R_5%
1 DDR_CKE0_DIMMA
2 DDR_A_BS2
56_0404_4P2R_5% RP4
4
4
3
3
56_0404_4P2R_5%
1 DDR_A_MA7
2 DDR_A_MA6
56_0404_4P2R_5% RP6
DDR_A_RAS#
1
4
4
DDR_CS0_DIMMA# 2
3
3
56_0404_4P2R_5%
1 DDR_A_MA12
2 DDR_A_MA9
RP3
DDR_A_MA8
DDR_A_MA5
1
2
RP5
RP7
DDR_A_MA1
DDR_A_BS0
1
2
56_0404_4P2R_5% RP8
4
4
3
3
1
2
56_0404_4P2R_5% RP10 56_0404_4P2R_5%

4
4
1 DDR_A_MA0
3
3
2 DDR_A_BS1
RP9
DDR_A_WE#
DDR_A_CAS#
A
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D50
DDR_A_D61
DDR_A_D60
DDR_A_DM7
DDR_A_D59
DDR_A_D58
56_0404_4P2R_5%
1 DDR_A_MA4
2 DDR_A_MA2
+3VS
RP11 56_0404_4P2R_5% RP12 56_0404_4P2R_5%

DDR_CS1_DIMMA# 2
3
4
1 M_ODT0
M_ODT1
1
4
3
2 DDR_A_MA13
DDR_A_MA11
1
R85
CLK_SMBDATA
CLK_SMBCLK
14,15 CLK_SMBDATA
14,15 CLK_SMBCLK
56_0404_4P2R_5% RP13 56_0404_4P2R_5%

4
1 DDR_CKE1_DIMMA
2
3
2 DDR_A_MA14
C180
2007/03/26
Issued Date
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
FOX_ASOA426-M4R-TR
CONN@
SO-DIMM A
DDR_A_D20
DDR_A_D21
DDR_A_D23
DDR_A_D22
DDR_A_D28
DDR_A_D25
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D31
DDR_A_D30
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA 7
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
DDR_A_MA13
DDR_A_BS1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 7
M_ODT0
DDR_A_D39
DDR_A_D38
DDR_A_DM4
DDR_A_D34
DDR_A_D33
DDR_A_D45
DDR_A_D43
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D47
DDR_A_D42
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 7
M_CLK_DDR#1 7
DDR_A_DM6
DDR_A_D51
DDR_A_D55
DDR_A_D57
DDR_A_D56
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
SP07F001720 S SOCKET FOXCONN AS0A426-N4RN-7F DR2R H4

FOX_AS0A426-M4R-TR_200P
2006/03/10
Deciphered Date
5
PM_EXTTS#0 7
DDR_A_DM2
Compal Secret Data
56_0402_5%
C179
0.1U_0402_16V4Z
RP2
1
2
2.2U_0805_16V4Z
RP1
DDR_A_MA3
DDR_A_MA10
Layout Note:
Place these resistor
closely JP34,all
trace length Max=1.5"
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
R84
10K_0402_5%
2
1
C444
C156
220U_6.3V_M
C443
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C165
0.1U_0402_16V4Z
C164
0.1U_0402_16V4Z
C163
C162
0.1U_0402_16V4Z
C161
0.1U_0402_16V4Z
2.2U_0805_16V4Z
C160
2.2U_0805_16V4Z
C159
C158
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C157
2.2U_0805_16V4Z
R83
10K_0402_5%
2
1
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203
DDR_A_D16
DDR_A_D17
Title

DDRII-SODIMM SLOT1

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
13
of
42
+1.8V
8 DDR_B_DQS#[0..7]
+1.8V
8 DDR_B_D[0..63]
V_DDR_MCH_REF
8 DDR_B_DM[0..7]
DDR_B_D10
DDR_B_D11
+1.8V
DDR_B_D17
DDR_B_D20
C191
0.1U_0402_16V4Z
C190
0.1U_0402_16V4Z
C189
0.1U_0402_16V4Z
C188
C187
0.1U_0402_16V4Z
2.2U_0805_16V4Z
C186
2.2U_0805_16V4Z
C185
2.2U_0805_16V4Z
C184
2.2U_0805_16V4Z
C183
2.2U_0805_16V4Z
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D28
DDR_B_D25
DDR_B_DM3
DDR_B_D30
DDR_B_D31
DDR_CKE2_DIMMB
7 DDR_CKE2_DIMMB
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_B_BS2
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
+0.9V
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
8 DDR_B_CAS#
7 DDR_CS3_DIMMB#
M_ODT3
M_ODT3
DDR_B_D32
DDR_B_D33
2
C204
C203
C202
C201
C200
C199
C198
C197
C196
C195
C194
C193
C192
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
8
8
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_MA1
DDR_B_MA3
RP14
1
2
DDR_B_BS0
DDR_B_MA10
RP16 56_0404_4P2R_5% RP17 56_0404_4P2R_5%

DDR_B_MA14
1
4
4
1
DDR_B_MA11
2
3
3
2
DDR_B_MA0
DDR_B_BS1
RP18 56_0404_4P2R_5% RP19 56_0404_4P2R_5%

DDR_B_MA5
1
4
4
1
DDR_B_MA8
2
3
3
2
4
3
4
3
RP15 56_0404_4P2R_5%
DDR_B_MA9
1
DDR_B_MA12
2
DDR_B_D51
DDR_B_D50
DDR_B_D56
DDR_B_D61
DDR_B_DM7
DDR_B_D59
DDR_B_D58
RP20 56_0404_4P2R_5% RP21 56_0404_4P2R_5%

DDR_B_RAS#
DDR_B_MA7
1
4
4
1
DDR_CS2_DIMMB# 2
DDR_B_MA6
3
3
2
1
2
2.2U_0805_16V4Z
56_0404_4P2R_5% RP26
4
3
DDR_B_BS2
DDR_CKE2_DIMMB
C206
C205
2007/03/26
Issued Date
M_CLK_DDR3
M_CLK_DDR#3
DDR_B_D21
DDR_B_D16
PM_EXTTS#1 7
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D26
DDR_B_D24
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D29
DDR_B_D27
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB 7
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_BS1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 7
M_ODT2
DDR_B_MA13
M_ODT2
DDR_B_D36
DDR_B_D37
DDR_B_D39
DDR_B_D38
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 7
M_CLK_DDR#2 7
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
FOX_AS0A426-N8RN-7F
CONN@
SO-DIMM B
SP07000BZ00 S SOCKET FOXCON AS0A426-N8RN-7F H8 DDR2R

FOX_AS0A426-N8RN-7F_200P
2006/03/10
Deciphered Date
DDR_B_DM4
5
M_CLK_DDR3 7
M_CLK_DDR#3 7
DDR_B_D14
DDR_B_D15
R86
+3VS
10K_0402_5%
A
Compal Secret Data
56_0404_4P2R_5%
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
GND
DDR_B_DM1
R87
RP22 56_0404_4P2R_5% RP23 56_0404_4P2R_5%

DDR_B_CAS#
DDR_B_MA4
1
4
4
1
DDR_B_WE#
DDR_B_MA2
2
3
3
2
RP24
56_0404_4P2R_5% RP25 56_0404_4P2R_5%
DDR_CS3_DIMMB# 2
M_ODT2
3
4
1
M_ODT3
DDR_B_MA13
1
4
3
2
DDR_CKE3_DIMMB 1
2
R88
56_0402_5%
CLK_SMBDATA
CLK_SMBCLK
13,15 CLK_SMBDATA
13,15 CLK_SMBCLK
+3VS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
10K_0402_5%
DDR_B_DQS#6
DDR_B_DQS6
0.1U_0402_16V4Z
+0.9V
DDR_B_D48
DDR_B_D49
Layout Note:
Place these resistor
closely JP10,all
trace length Max=1.5"
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
DDR_B_D12
DDR_B_D13
DDR_B_DQS#1
DDR_B_DQS1
D DR_B_D6
D DR_B_D7
D DR_B_D8
D DR_B_D9
DDR_B_DM0
C182
Layout Note:
Place near JP10
D DR_B_D5
D DR_B_D4
C181
D DR_B_D2
D DR_B_D3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
DDR_B_DQS#0
DDR_B_DQS0
D
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
2.2U_0805_16V4Z
D DR_B_D0
D DR_B_D1
7,8 DDR_B_MA[0..14]
V_DDR_MCH_REF 7,13,35
JP5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
8 DDR_B_DQS[0..7]
Title

DDRII-SODIMM SLOT2
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet

1
14
of
42
FSLA
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
CLKSEL2
CLKSEL1
133
100
33.3
200
100
33.3
166
100
33.3
R89
+3VS
+3VS
2
1
FBMA-L11-201209-221LMA30T_0805
C207
10U_0805_10V4Z
C208
0.1U_0402_16V4Z
1
C209
680P_0402_50V7K
C210
0.1U_0402_16V4Z
+1.25VS
1
C211
680P_0402_50V7K
C212
C213
R90
0.1U_0402_16V4Z
2.2K_0402_5%
Place close to U4
FSB Frequency Selet:
Q3
3 2N7002_SOT23-3
20,22 ICH_SMBDATA
R1135
R1083
2
1
FBMA-L11-201209-221LMA30T_0805
No Stuff
R1074
R1086
R1098
Stuff
R1086
R1139
R1135
No Stuff
R1083
R1107
R1128
R1113
R1074
R1128
667MHz
C214
2
10U_0805_10V4Z
R1135
800MHz
R1113
R1098
R1135
R1139
+3VS_CK505
Stuff
No Stuff
C216
2
680P_0402_50V7K
2
G
SB, MINI PCI
+3VS
2
2
680P_0402_50V7K
Q4
3 2N7002_SOT23-3
20,22 ICH_SMBCLK
R1083
R1086
R1098
R1074
R1107
R1113
R1128
30 CLK_LPC_DEBUG
1 R93
2
+VCCP
56_0402_5%
CLRP1
PAD-OPEN 2x2m
39
55
@ R412
VDD_PCI
VDD48
VDDPLL3
VDDREF
VDDSRC
VDDCPU
PCI2_TME
1
2
0_0402_5%
12
20
26
+1.25VS_CK505
36
49
CLRP4,CLRP5 for 667/800 FSB select

SHORT CLRP5, NO SHORT CLRP4 -- CPU option
SHORT CLRP4, NO SHORT CLRP5 -- FSB 667
5 CPU_BSEL0
CLK_LPC_DEBUG
VDDSRC_IO
VDDCPU_IO
MCH_CLKSEL0 7
R98
1K_0402_5%
475_0402_1% 1
2 R103
475_0402_1% 1
2 R104
39_0402_5% 1
2 R105
39_0402_5% 1
2 R106
30 CLK_PCI_EC
39_0402_5% 1
2 R107
18 CLK_PCI_ICH
39_0402_5% 1
2 R109
20 CLKSATAREQ#
@ 1K_0402_5%
CLKREQ#_B
22,29 CLK_DEBUG_PORT_L
CLK_DEBUG_PORT
PJP9
23 CLK_PCI_LAN
SHORT PAD
+VCCP
R111
PCI0/CR#_A
PCI_CLK1
PCI1/CR#_B
PCI2_TME
PCI2/TME
PCI3
27_SEL
PCI4/27_Select
ITP_EN
PCIF5/ITP_EN
PCI_LANCLK
Y1
@ 1K_0402_5%
CPU_BSEL1
1
R115
0_0402_5%
MCH_CLKSEL1 7
Routing the trace at

least 10mil
R114
1K_0402_5%
C230
18P_0402_50V8J
F SB
@ R116
B
CLK_XTAL_IN
60
X1
59
X2
14.31818MHZ_16P
CLK_XTAL_OUT
C231
18P_0402_50V8J
0_0402_5%
39_0402_5% 1
20 CLK_48M_ICH
R117
+VCCP
20 CLK_14M_ICH
R121
CPU_BSEL2
1
R126
0_0402_5%
30 CLK_14M_DEBUG
33_0402_1% 1
2 @ R400
@ 1K_0402_5%
R120
F SA
10
F SB
57
FSLB/TEST MODE
F SC
62
REF0/FSLC/TEST_SEL
+1.25VS_CK505
R124
10K_0402_5%
2
1
45
R125
1K_0402_5%
@ R129
C441
39P_0402_50V8J
GNDSRC
GNDPCI
11
GND48
15
GND
2
2
19
GND
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
52
GNDCPU
For 27_SEL, 0 = Enable DOT96 & SRC1,
23
GNDSRC
29
GNDSRC
58
GNDREF
1= Enable SRC0 & 27MHz

For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed
R_CPU_BCLK
R_CPU_BCLK#
R94
1
1
R95
2
2
0_0402_5%
0_0402_5%
CPU1_F
CPU1#_F
51
50
R_MCH_BCLK
R_MCH_BCLK#
R96
1
1
R99
2
2
0_0402_5%
0_0402_5%
SRC8/ITP
SRC8#/ITP#
47
46
SRC10#
SRC10
35
34
SRC11/CR#_H
SRC11#/CR#_G
33
32
SRC9
SRC9#
30
31
SRC7/CR#_F
SRC7#/CR#_E
44
43
R_CLKREQ#_G
SRC6
SRC6#
41
40
R112
R_CLK_PCIE_MCard 1
R_CLK_PCIE_MCard# 1
R113
2
2
27
28
R_MCH_3GPLL
R_MCH_3GPLL#
R118
1
1
R119
2
2
0_0402_5%
0_0402_5%
24
25
R_PC IE_ICH
R_ PCIE_ICH#
R122
1
1
R123
2
2
0_0402_5%
0_0402_5%
SRC2/SATA
SRC2#/SATA#
21
22
R_PCIE_SATA
R_PCIE_SATA#
R127
1
1
R128
2
2
0_0402_5%
0_0402_5%
SRC1/SE1/27MHz_NonSS
SRC1#/SE2/27MHz_SS
17
18
SSCDREFCLK
R130
SSCDREFCLK#
R131
1
1
2
2
0_0402_5%
0_0402_5%
SRC0/DOT96
SRC0/DOT96#
13
14
R132
R_MCH_DREFCLK
1
R_MCH_DREFCLK# 1
R133
2
2
0_0402_5%
0_0402_5%
CK_PWRGD/PD#
56
1
@ R137
ICS9LPRS355_TSSOP64
1
@ R367
1
R344
* Internal Pull-Up Resistor

** Internal Pull-Down Resistor
PCI2_TME
CLK_SMBCLK 13,14
CLK_SMBDATA 13,14
H_STP_PCI# 20
H_STP_CPU# 20
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
C220
C221
C222
C225
C227
C229
1 CLK_48M_ICH
@ 5P_0402_50V8C
1 CLK_14M_ICH
@ 4.7P_0402_50V8C
1 CL K_PCI_ICH
@ 4.7P_0402_50V8C
1 CLK_PCI_EC
@ 4.7P_0402_50V8C
1 CLK_PCI_LAN
@ 4.7P_0402_50V8C
1 CLK_DEBUG_PORT
@ 5P_0402_50V8C
For Layout request:

1. Change MINI_CLKREQ# from pin 32 to pin 43.
2. Change CLK_PCIE_MCARD from SRC9 to SRC6.
R108
475_0402_1%
1
MINI_CLKREQ# 22
R110 10K_0402_5%
1
2
+3VS
0_0402_5%
0_0402_5%
CLK_PCIE_MCARD 22
CLK_PCIE_MCARD# 22
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_ICH 20
CLK_PCIE_ICH# 20
CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19
MCH_SSCDREFCLK 7
MCH_SSCDREFCLK# 7
CLK_MCH_DREFCLK 7
CLK_MCH_DREFCLK# 7
0_0402_5%
VGATE
0_0402_5%
CLK_ENABLE 30
0_0402_5%
CK_PWRGD 20
20,37
Compal Secret Data
R140
10K_0402_5%
@
2007/03/26
Issued Date
R139
10K_0402_5%
R138
10K_0402_5%
@
CPU0
CPU0#
54
53
SRC3/CR#_C
SRC3#/CR#_D
1 = Overclocking of CPU and SRC NOT allowed
1
27_SEL
ITP_EN
R136
10K_0402_5%
38
37
SRC4
SRC4#
VDDSRC_IO
CLK_SMBCLK
CLK_SMBDATA
SCLK
SDATA
PCI_STOP#
CPU_STOP#
R135
10K_0402_5%
@
R134
10K_0402_5%
+3VS
+3VS
USB_48MHZ/FSLA
42
0_0402_5%
+3VS
48
64
63
CLK_DEBUG_PORT
MCH_CLKSEL2 7
F SC
33_0402_1% 1
NC
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
PAD-OPEN 2x2m
R102
CLK_SMBCLK
U4
2
9
16
61
1015_Change CLRP1 and CLRP2 type like the same as PJP4.
R97
2.2K_0402_5%
F SA 2
1
CLRP2
2
1
CLK_SMBDATA
D
0.1U_0402_16V4Z
1
C219
C218
C215
R1139
R1139
10U_0805_10V4Z
1
1
C217
*(Default)
0.1U_0402_16V4Z
1
2
G
R1107
Stuff
2.2K_0402_5%
+1.25VS_CK505
R92
CPU Driven
R91
0.1U_0402_16V4Z
+3VS_CK505
FSLB
FSLC
2006/03/10
Deciphered Date
4
Title

Clock generator
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
1
15
of
42
1
3
D6
@ DAN217_SC59
D5
DAN217_SC59
D4
DAN217_SC59
CRTL_B
CRTL_G
CRTL_R
+R_CRT_VCC , +CRTVDD (40mils)

+5VS
Place close to JP6
+R_CRT_VCC
F1
1
1
RB411D_SOT23
+CRTVDD
NZQA5V6AXV5T1_SOT533-5
+CRTVDD
D7
1.1A_6VDC_FUSE
1
2
CRT CONNECTOR
C232
0.1U_0402_16V4Z
2
1
1015_Change bead type for meet EMI request.
CRT _VSYNC_R
74AHCT1G125GW_SOT353-5
16
17
R147
2
G
1
CLOSE TO JP3
1
R149
2
0_0402_5%
3VDDCDA 9
2
0_0402_5%
3VDDCCL 9
R148
Q6
3 V_DDCCL
3 2N7002_SOT23-3
2
G
220P_0402_50V8J
U6
@ D3
SUYIN_070546FR015S200ZR
Q5
3 2N7002_SOT23-3 3V_DDCDA
R150
2
2.2K_0402_5%
+3VS
C243
C240
10P_0402_50V8J
5
P
2
CRT_ VSYNCRFL
1
2
L6
FBM-L11-160808-800LMT_0603
CRTVSYNC
2
0_0402_5%
CRT_VSYNC
CRT_HSYNCRFL
1
2
L5
FBM-L11-160808-800LMT_0603
74AHCT1G125GW_SOT353-5
OE#
R151
9
R145 4.7K_0402_5%
CRT_HSYNC_R
220P_0402_50V8J
C242
+CRTVDD
R144 4.7K_0402_5%
CRTL_B
C238
10P_0402_50V8J
U5
CRTL_G
C241 10P_0402_50V8J
CONN@ JP6
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRTL_R
C237
10P_0402_50V8J
5
P
2
C RTHSYNC
2
0_0402_5%
CRT_HSYNC
OE#
0.1U_0402_16V4Z
R146
9
C239
1
2
C236
10P_0402_50V8J
+5VS
R143
75_0402_5%
1
2
CRT_B
C235
10P_0402_50V8J
CRT_B
C234
10P_0402_50V8J
CRT_R
CRT_G
R142
75_0402_5%
1
2
CRT_G
C233
10P_0402_50V8J
CRT_R
R141
75_0402_5%
1
2
L2
FBMA-L10-201209-121LMT_0805
1
2
L3
FBMA-L10-201209-121LMT_0805
1
2
L4
FBMA-L10-201209-121LMT_0805
1
2
2.2K_0402_5%
TV-Out Connector
S-Video
TV_CRMA
2
0_0402_5%
TVLUMA
R153
9
2
0_0402_5%
TVCRMA
R154
C246
270P_0402_50V7K
C245
270P_0402_50V7K
TVCOMPS
C244
270P_0402_50V7K
2
0_0402_5%
R157
75_0402_5%
2
1
R156
75_0402_5%
2
1
TV_COMPS
R155
75_0402_5%
2
1
L7
MBC1608121YZF_0603
1
2
LUMA_CL
L8
MBC1608121YZF_0603
1
2
CRMA_CL
L9
MBC1608121YZF_0603
1
2
COMPS_CL
JP7
R158
1
2
3
4
5
6
7
C249
330P_0402_50V7K
C248
330P_0402_50V7K
TV_LUMA
C247
330P_0402_50V7K
R152
9
1
2
3
4
5
6
7
GND
GND
8
9
SUYIN_030107FR007G317ZR
CONN@
DC230001300 CONN SUYIN 030107FR007G317ZR 7P S_VIDEO
SUYIN_030107FR007G317ZR_7P
TVGND
0_0805_5%
Compal Secret Data
2007/03/26
Issued Date
2006/07/26
Deciphered Date
A
Title

CRT & TVout Connector
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
E
16
of
42
+5VALW
+5VS
@
J2
1
JOPEN
2
J3
1
JOPEN
2
LVDS CONN
Q35
SI2301BDS-T1-E3_SOT23-3
D
B+
+LCDVDD
INVPWR_B+
@
30 WEBCAM_ON/OFF#
L10
2 0_0805_5%
C250
L11
1
2
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
C251
0.1U_0402_16V4Z
+5V_WEBCAM
JP8
C254
C253
LVDSB0+
LVDSB0-
9
9
LVDSB1+
LVDSB1-
9
9
LVDSBC+
LVDSBC-
LVDSBC+
LVDSBC-
9
9
680P_0402_50V7K
680P_0402_50V7K
680P_0402_50V7K
2
1
C252
9
9
LVDSB0+
LVDSB0LVDSB1+
LVDSB1LVDSB2+
LVDSB2-
LVDSB2+
LVDSB2-
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
LVDSA2+
LVDSA2-
LVDSA2+ 9
LVDSA2- 9
LVDSA1+
LVDSA1-
LVDSA1+ 9
LVDSA1- 9
LVDSA0+
LVDSA0-
+3VS
LVDSA0+ 9
LVDSA0- 9
LVDSAC+
LVDSAC-
LVDSAC+ 9
LVDSAC- 9
INVTPWM
DI SPLAYOFF#
DAC_BRIG
LCD_CLK
LCD_DAT
USB20_R_P6
USB20_R_N6
ACES_88242-4001
CONN@
LVDS connector
R159
2.2K_0402_5%
INV_PWM 30
DAC_BRIG 30
LCD_CLK 9
LCD_DATA 9
C255
680P_0402_50V7K
+3VS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
+LCDVDD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GND
LCD_CLK
LCD_DATA
R160
2.2K_0402_5%
C
+5V_WEBCAM
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
INVPWR_B+
WCM-2012-900T_4P
USB20_P6 20
1
L23
USB20_N6 20
C256
680P_0402_50V7K
SP02000EA00 S W-CONN ACES 88242-4001 40P P1

ACES_88242-4001_40P
+LCDVDD
B
+LCDVDD
+3VS
Q7
+5VALW
+3VS
2
S
R162
R161
30
BKOFF#
D9
C259
Q9
2N7002_SOT23-3
100K_0402_5%
C260
0.22U_0402_10V4Z
0.047U_0402_16V7K
C258
C257
4.7U_0805_10V4Z
ENABLT
2
G
2
R164
4.7U_0805_10V4Z
100K_0402_5%
R308
100K_0402_5%
ENAVDD
DI SPLAYOFF#
2
2
G
R298
9
D8
2
1
D
Q8
2N7002_SOT23-3
4.7K_0402_5%
2
G
R163
47K_0402_5%
100_0402_5%
Avoid Panel display garbage after power on.
Compal Secret Data
2007/03/26
Issued Date
2006/07/26
Deciphered Date
5
Title

LCD CONN.
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet

1
17
of
42
PCI_GNT0#
+3VS
PCI_DEVSEL#
@ R165
1K_0402_5%
PCI_STOP#
PC I_TRDY#
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
23 PCI_AD[0..31]
U7B
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
+3VS
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
1
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
F9
B5
C5
A10
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI_PIRQG#
PCI_PIRQH#
PCI_PIRQA#
PCI_REQ0#
PCI_REQ1#
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
A4
D7
E18
C18
B19
F18
A11
C10
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
C17
E15
F16
E17
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PC I_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
AG24
B10
G7
PCI_REQ0# 23
PCI_GNT0# 23
PCI_REQ2#
PCI_REQ3#
PCI_GNT3#
PCI_PLTRST#
CL K_PCI_ICH
PCI_PME#
T23
PCI_CBE#0 23
PCI_CBE#1 23
PCI_CBE#2 23
PCI_CBE#3 23
PCI_IRDY# 23
PCI_PAR 23
R174
PCI_DEVSEL# 23
PCI_PERR# 23
PCI_RST#
1
0_0402_5%
PCI_SERR# 23,30
PCI_STOP# 23
PCI_TRDY# 23
PCI_FRAME# 23
2
CLK_PCI_ICH 15
PCI_PME# 23,30
R178
PLT_RST#
1
0_0402_5%
Place closely pin B10
Interrupt I/F
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
F8
G11
F12
B3
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_RST# 23,29,30
PLT_RST# 7,22
Boot BIOS Strap
CL K_PCI_ICH
PCI_GNT0#
R186
SPI_CS#1
Boot BIOS Location
ICH8M REV 1.0

PCI_REQ2#
10_0402_5%
1
R175
1
R176
1
R177
1
R179
1
R180
1
R181
1
R182
2
R183
1
R184
1
R185
1
R187
1
R188
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
1
R166
1
R167
1
R168
1
R169
1
R170
1
R171
1
R172
1
R173
PCI_REQ3#
SPI
PCI
LPC
1
C261
10P_0402_50V8J
A16 swap override Strap

*Low= A16 swap override Enble
PCI_GNT3# High= Default
PCI_PIRQA#
R419
1
PCI_PIRQF# 1
R420
0_0402_5%
2
@
2
0_0402_5%
PCI_PIRQ# 23
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

ICH8(1/4)-PCI/INT
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
1
18
of
42
+RTCVCC
ICH8M Internal VR Enable Strap

(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
330K_0402_1%
2 LAN100_SLP
330K_0402_1%
2 ICH_INTVRMEN
1M_0402_5%
2 SM_INTRUDER#
R193
1
+3VS
R190
@ R192
0_0402_5%
ICH_INTVRMEN
GATEA20
Low = Internal VR Disabled

High = Internal VR Enabled(Default)
@ R195
0_0402_5%
10K_0402_5%
R194
R191
1
R189
1
KB_RST#
ICH8M LAN100 SLP Strap

(Internal VR for VccLAN1.05 and VccCL1.05)
10K_0402_5%
D
ICH_LAN100_SLP
Low = Internal VR Disabled

High = Internal VR Enabled(Default)
+VCCP
R196
H_F ERR#
AF23
RTCRST#
SM_INTRUDER# AD22
CLRP3
SHORT PADS
ICH_INTVRMEN AF25
LAN100_SLP
AD21
IN
OUT
0925_Change C262 and C263 from 12pF to 15pF.

Y2
NC
24
24
24,30
24
24
28
INTVRMEN
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
B21
C22
LAN_RXD0
LAN_RXD1
LAN_RXD2
D21
E20
C20
LAN_TXD0
LAN_TXD1
LAN_TXD2
AH21
NC
32.768KHZ_12.5P_Q13MC30610018
+1.5VS
INTRUDER#
R202 1
2 24.9_0402_1%
GLAN_COMP
D25
C25
ACZ_BITCLK
ACZ_SYNC
R203 47_0402_5% 1
R205 33_0402_5% 1
2
2
HDA_BITCLK
H DA_SYNC
AJ16
AJ15
HDA_BIT_CLK
HDA_SYNC
ACZ_RST#
R206 33_0402_5% 1
HDARST#
AE14
HDA_RST#
AC Z_SDIN0
AJ17
AH17
AH15
AD13
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
ACZ_SDIN0
ACZ_SDOUT
SATA_LED#
22 SATA_RXN0_C
22 SATA_RXP0_C
22
SATA_TXN0
22
SATA_TXP0
R208 33_0402_5% 1
HDA_SDOUT
SATA_LED#
SATA_RXN0_C
SATA_RXP0_C
3900P_0402_50V7K
SATA_TXN0
C265 1
2
SATA_TXP0
C266 1
2
SATA_TXN0_C
SATA_TXP0_C
3900P_0402_50V7K
15 CLK_PCIE_SATA#
15 CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_SATA
R211
AE13
HDA_SDOUT
AE10
AG14
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
AF5
AH5
AH6
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AG3
AG4
AJ4
AJ3
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AF2
AF1
AE4
AE3
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AB7
AC6
SATA_CLKN
SATA_CLKP
AG1
AG2
SATARBIAS#
SATARBIAS
C4
LPC_FRAME#
LDRQ0#
LDRQ1#/GPIO23
G9
E6
LPC_DRQ0#
T25 PAD
27.4_0402_1%
LPC_FRAME# 22,29,30
AF13
AG26
GATEA20
H_A20M#
DPRSTP#
DPSLP#
AF26
AE26
H_DPRSTP_R#
FERR#
AD24
H_DPSLP#
H_F ERR#
H_DPRSTP#
56_0402_5%
@ R198
2
1
H_DPSLP#
56_0402_5%
@ R200
2
1
56_0402_5%
LPC_DRQ#0 30
GATEA20 30
H_A20M# 4
2
R201
H_DPRSTP#
1
0_0402_5%
H_DPRSTP# 5,7,37
H_DPSLP# 5
H_FERR# 4
AG29
H_PWRGOOD
IGNNE#
AF27
H _IGNNE#
INIT#
INTR
RCIN#
AE24
AC20
AH14
H_INIT#
H _INTR
KB_RST#
NMI
SMI#
AD23
AG28
H _NMI
H_SMI#
CPUPWRGD/GPIO49
GLAN_DOCK#/GPIO13
GLAN_COMPI
GLAN_COMPO
FWH4/LFRAME#
A20GATE
A20M#
IHDA
1U_0603_10V4Z
C264
IDE
20K_0402_5%
C263
15P_0402_50V8J
+RTCVCC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
H_PWRGOOD 5
H_IGNNE# 4
within 2" from R1557
H_INIT# 4
H_INTR 4
KB_RST# 30
+VCCP
C
ICH_RTCRST#
R199
10M_0402_5%
2
C262
15P_0402_50V8J
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
E5
F5
G8
F6
H_NMI 4
H_SMI# 4
STPCLK#
AA24
H_STPCLK#
THRMTRIP#
AE27
THRMTRIP_ICH#
TP8
AA23
R204
56_0402_5%
H_STPCLK# 4
R207
RTCX1
RTCX2
RTC
LPC
ICH_RTCX2
AG25
AF24
SATA
LPC_AD[0..3] 22,29,30
U7A
ICH_RTCX1
ICH_RTCX2
LAN / GLAN
CPU
ICH_RTCX1
R197
1
24_0402_1%
H_THERMTRIP# 4,7
IDE_HDD[0..15] 22
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
IDE_ HDD0
IDE_ HDD1
IDE_ HDD2
IDE_ HDD3
IDE_ HDD4
IDE_ HDD5
IDE_ HDD6
IDE_ HDD7
IDE_ HDD8
IDE_ HDD9
ID E_HDD10
ID E_HDD11
ID E_HDD12
ID E_HDD13
ID E_HDD14
ID E_HDD15
DA0
DA1
DA2
AA4
AA1
AB3
I DE_HDA0
I DE_HDA1
I DE_HDA2
DCS1#
DCS3#
Y6
Y5
I DE_HDCS1#
I DE_HDCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
W4
W3
Y2
Y3
Y1
W5
IDE_HDIOR#
I DE_HDIOW#
ID E_HDACK#
IDE_ HIRQ
I DE_HIORDY
IDE_HDREQ
placed within 2" from ICH8M
+3VS
IDE_HDA0 22
IDE_HDA1 22
IDE_HDA2 22
I DE_HIORDY
IDE_ HIRQ
R209 1
R210 1
2 4.7K_0402_5%
2 8.2K_0402_5%
B
IDE_HDCS1# 22
IDE_HDCS3# 22
IDE_HDIOR# 22
IDE_HDIOW# 22
IDE_HDACK# 22
IDE_HIRQ 22
I DE_HIORDY 22
IDE_HDREQ 22
ICH8M REV 1.0
Within 500 mils
+3VL
C442
4.7U_0603_6.3V6K
+RTCVCC
BATT1.1
D10
R212 W=20mils
2
R213
1
2
1
W=20mils
W=20mils
3
1
2
W=20mils
0_0402_5%
1K_0402_5%
DAN202U_SC70
2
A
2007/03/26
2006/03/10
Deciphered Date
5
SUYIN_060003FA002TX00NL~D
CONN@
Compal Secret Data
Issued Date
C267
1U_0603_10V4Z
JBATT1
Title

ICH8(2/4)_LAN,HD,IDE,LPC
Size
Document Number
Custom LA-4031P
Date:
Rev
1.0
Sheet
1
19
of
42
1 ICH_LOW_BAT#
8.2K_0402_5%
R214
R215
Place closely pin AG9
R216
CLK_14M_ICH
R217
2 LINKALERT#
10K_0402_5%
1
+3VALW
+3VALW
PM_PWROK
2.2K_0402_5%
R230
1
@ R231
GPIO20
2
8.2K_0402_5%
CLKRUN#
2
8.2K_0402_5%
R394
OCP#
2
10K_0402_5%
MCH_IC H_SYNC#
2
10K_0402_5%
@ R237
1
0_0402_5%
1
R239
OCP#
EC_SMI#
EC_SCI#
CLKSATAREQ#
2
10K_0402_5%
IDE_RESET#
2
8.2K_0402_5%
R242
1
R244
15 CLKSATAREQ#
1
R241
22
IDE_RESET#
24
SB_SPKR
AE20
AG18
STP_PCI#/GPIO15
STP_CPU#/GPIO25
CLKRUN#
AH11
CLKRUN#/GPIO32
WAKE#
SERIRQ
THRM#
VGATE
AJ20
VRMPWRGD
SST_CTL
AJ22
TP7
AJ8
AJ9
AH9
AE16
AC19
AG8
GPIO18 AH12
GPIO20 AE11
GPIO22 AG10
GPIO27 AH25
AD16
CLKSATAREQ# AG13
GPIO38 AF9
GPIO39 AJ11
IDE_RESET# AD10
SB_SPKR
AD9
MCH_IC H_SYNC# AJ13
7 MCH_ICH_SYNC#
PM_BMBUSY#
2
8.2K_0402_5%
H_STP_PCI#
R_STP_CPU#
EC_SMI#
EC_SCI#
PAD T31
SI RQ
2
10K_0402_5%
SMBALERT#/GPIO11
OCP#
4
30
30
BMBUSY#/GPIO0
AG22
ICH_PCIE_WAKE#AE17
SI RQ
AF12
THERM_SCI#
AC13
PAD T29
1
@ R236
2
R229
22 ICH_PCIE_WAKE#
30
SIRQ
30 THERM_SCI#
2
1
R395 100K_0402_5%
15,37
VGATE
GPIO22
2
8.2K_0402_5%
@ R235
H_STP_PCI#
H_STP_CPU#
GPIO18
2
8.2K_0402_5%
1
R232
+3VS
15
15
AG12
EC_LID_OUT#
ICH_R SVD
2
1
@ R246 1K_0402_5%
AJ21
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
SPKR
MCH_SYNC#
TP3
ICH8M REV 1.0
SLP_S3#
SLP_S4#
SLP_S5#
AG23
AF21
AD18
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#/GPIO26
AH27
S4_STATE#
PWROK
AE23
PM_PWROK
DPRSLPVR/GPIO16
AJ14
DPRSLPVR
BATLOW#
AE21
ICH_LOW_BAT#
PWRBTN_OUT#
PWRBTN#
LAN_RST#
AH20
RSMRST#
AG27
EC_RMRST#
CK_PWRGD
E1
CK_PWRGD
CLPWROK
E3
M_PWROK
AJ25
PM_SLP_M#
SLP_M#
2 SB_SPKR
@ 10K_0402_5%
2
1
1
2
0_0402_5%
ALW_PWRGD 34
2 10K_0402_5%
EC_RSMRST#
EC_RSMRST# 30
CK_PWRGD 15
M_PWROK 7,30
T30 PAD
F23
AE18
CL_CLK0
CL_DATA0
CL_VREF0
CL_VREF1
D24
AH23
CL_VREF0_ICH
CL_VREF1_ICH
AJ23
R428
EC_RMRST#
PWRBTN_OUT# 30
1
2 R234
100_0402_5%
F22
AF19
AJ27
AJ24
AF22
AG19
2
100K_0402_5%
R238 3.24K_0402_1%
1
2
+3VS
CL_CLK0 7
CL_DATA0 7
CL_RST# 7
WL_OFF#
WL_OFF# 22
1
R245
R396
2
10K_0402_5%
C270
R240
453_0402_1%
0.1U_0402_16V4Z
+3VALW
C271
R243
1
3.24K_0402_1%
2
+3VALW
100K_0402_5%
R247
453_0402_1%
1
R248
DPRSLPVR 7,37
1
@ R398
R233 1
low-->default
+3VS
PM_PWROK 7,30
CL_CLK0
CL_CLK1
CL_RST#
30
30
30
T28 PAD
CL_DATA0
CL_DATA1
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
T27 PAD
SLP_S3#
SLP_S4#
SLP_S5#
C2
C269
@ 4.7P_0402_50V8C
GPIO39
2
10K_0402_5%
PM_BMBUSY#
SUSCLK
GPIO38
2
10K_0402_5%
1
R228
EC_LID_OUT#
CLK_14M_ICH 15
CLK_48M_ICH 15
IC H_SUSCLK
+3VS
30
SUS_STAT#/LPCPD#
SYS_RESET#
CLK_14M_ICH
CLK_48M_ICH
AG9
G5
D3
@ 10_0402_5%
R422
10K_0402_5%
7 PM_BMBUSY#
CLK14
CLK48
T45 PAD
T46 PAD
T47 PAD
T48 PAD
0.1U_0402_16V4Z
@ R227
10K_0402_5%
RI#
AJ12
AJ10
AF11
AG11
2
@ R226
10K_0402_5%
AF17
SUS_STAT#
F4
XDP_DBRESET# AD15
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA
GPIO
2
1ME_EC_CLK1
10K_0402_5%
PAD T26
4 XDP_DBRESET#
ICH_R I#
SMB
R225
+3VS
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
Clocks
2
1ME_EC_DATA1
10K_0402_5%
AJ26
AD19
AG21
AC17
AE19
SYS
GPIO
2 XDP_DBRESET#
10K_0402_5%
R224
R220
U 7C
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1
Power MGT
R223
2.2K_0402_5%
15,22 ICH_SMBCLK
15,22 ICH_SMBDATA
MISC
GPIO
Controller Link
2 ICH_R I#
10K_0402_5%
2 ICH_PCIE_WAKE#
1K_0402_5%
1
R221
1
R218
High -->No boot

U7D
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
PCIE_RXN1
PCIE_RXP1
1 C272 PCIE_C_TXN1
1 C273 PCIE_C_TXP1
0.1U_0402_16V4Z 2
0.1U_0402_16V4Z 2
+3VALW
1
1
1
1
1
1
1
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
+3VALW
@ R250
10K_0402_5%
USB_OC#3
R392
USB_OC#4
R385
USB_OC#5
R386
USB_OC#6
R387
USB_OC#7
R388
USB_OC#8
R389
USB_OC#9
R390
USB_OC#2
R391
A
USB_OC#0
1
2
R380 10K_0402_5%
1
2 USB_OC#1
R381 0_0402_5%
27
USB_OC#0
27
USB_OC#2
P27
P26
N29
N28
PERN1
PERP1
PETN1
PETP1
M27
M26
L29
L28
PERN2
PERP2
PETN2
PETP2
K27
K26
J29
J28
PERN3
PERP3
PETN3
PETP3
H27
H26
G29
G28
PERN4
PERP4
PETN4
PETP4
F27
F26
E29
E28
PERN5
PERP5
PETN5
PETP5
D27
D26
C29
C28
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
PAD T40
PAD T41
PAD T42
SPICLK C23
SPI_CS0# B23
SPI_CS1# E22
PAD T43
SPI_MOSI D23
SPI_MISO F21
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V27
V26
U29
U28
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
DMI_CLKN
DMI_CLKP
T26
T25
CLK_PCIE_ICH#
C LK_PCIE_ICH
DMI_ZCOMP
DMI_IRCOMP
Y23
Y24
PCI-Express
Direct Media Interface
22
22
22
22
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI
WLAN
SPI_MOSI
SPI_MISO
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
USB
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USBRBIAS#
USBRBIAS
F2
F3
USBRBIAS
CLK_PCIE_ICH# 15
CLK_PCIE_ICH 15
R249 24.9_0402_1%
1
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
Within 500 mils

+1.5VS
27
27
27
27
27
27
USB20_N4
USB20_P4
USB20_N6
USB20_P6
27
27
17
17
To USB/B.
To USB/B.
To MB.
To Card Reader/B.
To WEBCAM.
1
R251
2
22.6_0402_1%
ICH8M REV 1.0
Within 500 mils

Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
Title

ICH8(3/4)_PM,USB,GPIO

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
20
of
42
U7E
+VCCP
1U_0603_10V4Z
1170mA
U7F
VCCRTC
A16
T7
V5REF[1]
V5REF[2]
R252
MBV2012301YZF_0805
1
2
+1.5VS
3mA
40 mils
ICH_V5REF_SUS
10U_0805_10V4ZICH_VCC1_5 770mA
C278
220U_6.3V_M
C280
C281
10U_0805_10V4Z
2.2U_0805_16V4Z
+3VS
+5VS
C279
D11
R254
100_0402_5%
20 mils
ICH_V5REF_RUN
C284
1U_0603_10V4Z
2
1
C297
10U_0805_10V4Z
C296
1U_0603_10V4Z
C298
1U_0603_10V4Z
AC1
AC2
AC3
AC4
AC5
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
AC10
AC9
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A=1120mA
+1.5VS
B
C300
1U_0603_10V4Z
AA5
AA6
VCC1_5_A[13]
VCC1_5_A[14]
C305
0.1U_0402_16V4Z
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
W23
VCC1_5_A[25]
F17
G18
VCCLAN1_05[1]
VCCLAN1_05[2]
F19
G20
VCCLAN3_3[1]
VCCLAN3_3[2]
A24
VCCGLANPLL
A26
A27
B26
B27
B28
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
B25
VCCGLAN3_3
VCC1_5_A=1120mA
+1.5VS
T36
T37
+3VS
VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2
12mA
R257
1
0.1U_0402_16V4Z
+1.5VS
10U_0805_10V4Z
CHB1608U301_0603
27mA
ICH_VCCGLANPLL
2
@ R258
74mA
2ICH_VCCGLAN1_5
1
1 +1.5VS 1
CHB1608U301_0603
1
C308
C309
@ C310
2
2
4.7U_0805_10V4Z
1mA
2
1
2ICH_VCCGLAN3_3
+3VS
@ R2590_0402_5%
2.2U_0805_16V4Z
C307
GLAN POWER
F1
L6
L7
M6
M7
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
0.1U_0402_16V4Z
C292
+3VS
VCC3_3=310mA
1
24mA
VCCHDA
AC12
VCCSUSHDA
AD11
VCCSUS1_05[1]
VCCSUS1_05[2]
J6
AF20
0.1U_0402_16V4Z
4mA
T32
T33
AC16 VCCSUS1_5_ICH_1
T34
VCCSUS1_5_ICH_2
J7
T35
C3 0.1U_0402_16V4Z
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
A22
VCCCL3_3[1]
VCCCL3_3[2]
F20
G21
C299
2
2
+3VALW
VCCSUS3_3=141mA
+3VALW
VCCSUS3_3=141mA
1
G22 VCCCL1_05_ICH
VCCCL1_5
+3VALW
C301
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06]
+3VS
0.1U_0402_16V4Z
1
AC18
AC21
AC22
AG20
AH28
VCCCL1_05
+3VS
(DMI)
C289
VCC3_3=310mA
C303
VCCUSBPLL
USB CORE
C304
0.1U_0402_16V4Z
D1
0.1U_0402_16V4Z +3VS
(SATA)
1
+3VS
VCC3_3=310mA
AA3
U7
V7
W1
W6
W7
Y7
VCCSUS1_5[2]
0.1U_0402_16V4Z +3VS
1
VCC3_3=310mA
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCCSUS3_3[01]
+VCCP
0.1U_0402_16V4Z
VCC1_5_A[18]
VCC1_5_A[19]
VCC3_3=310mA
C302
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
AC7
AD7
VCC1_5_A=1120mA
+1.5VS
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
AC8
AD8
AE8
AF8
VCCSUS1_5[1]
G12
G17
H7
10mA
+1.5VS
ATX
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
AD2
C295
VCCSATAPLL
AE7
AF7
AG7
AH7
AJ7
VCC1_5_A=1120mA
+1.5VS
AF29
VCC3_3[02]
C294
ARX
VCC3_3[01]
14mA
C293
0.1U_0402_16V4Z
CHB1608U301_0603
AJ6
2
10U_0805_10V4Z
+1.25VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.5VS
50mA
ICH_VCCSATAPLL
2
0.01U_0402_16V7K
C288
R256
V_CPU_IO[1]
V_CPU_IO[2]
CHB1608U301_0603
2
+1.5VS
1
C283
0.1U_0402_16V4Z
C287
0.1U_0402_16V4Z
1
C282
40mA
AE28
AE29
AC23
AC24
R253
1
ICH_VCCDMIPLL
26mA
VCC_DMI[1]
VCC_DMI[2]
0.1U_0402_16V4Z
C286
C291
0.1U_0402_16V4Z
20 mils
1
R29
C277
4.7U_0805_10V4Z
ICH_V5REF_SUS
VCCDMIPLL
C276
C285
VCCA3GP
D12
R255
C
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
10U_0805_10V4Z
+5VALW +3VALW
10_0402_5%
V5REF_SUS
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25
1
+
G4
0.1U_0402_16V4Z
CORE
ICH_V5REF_RUN
VCCP_CORE
1004_Change R252 from 0603 to 0805 package.
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
C306
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
4.7U_0805_10V4Z
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
ICH8M REV 1.0
T38
1U_0603_10V4Z 1
12mA
+3VS
2 @
ICH8M REV 1.0
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
5
A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
C311
AD25
6mA
C290
IDE
C445
PCI
VCCPSUS
20 mils
VCCPUSB
C275
0.1U_0402_16V4Z
C274
0.1U_0402_16V4Z
+RTCVCC
Title

ICH8(4/4)_POWER&GND

Custom LA-4031P
Date:
Rev
1.0
Sheet
1
21
of
42
+5VS
Placea caps. near ODD CONN.
HDD Connector
CD-ROM Connector
C320
0.1U_0402_16V4Z
C317
10U_0805_10V4Z
2
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
Pleace near HD CONN (JP23)

+3VS_HDD
0.1U_0402_16V4Z
1
@ C323
@ C324
1
1
+
@ C325
2
2
2
2
1000P_0402_50V7K 1U_0603_10V4Z
1 C316 SATA_RXN0_C
1 C321 SATA_RXP0_C
SATA_RXN0_C 19
SATA_RXP0_C 19
Near CONN side.
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
GND
23
24
+3VS_HDD
+5VS
+5VS
19
19
19
19
19
19
IDE_HDIOW #
ID E_HIORDY
IDE_ HIRQ
IDE_HDA1
IDE_HDA0
IDE_HDCS1#
IDE_ACT#
IDE_HDIOW #
ID E_HIORDY
IDE_HIRQ
IDE_HDA1
IDE_HDA0
IDE_HDCS1#
2
1
R264 10K_0402_5%
+5VS
SEC_CSEL
54
2
ID E_HDD8
ID E_HDD9
IDE_HDD10
IDE_HDD11
IDE_HDD12
IDE_HDD13
IDE_HDD14
IDE_HDD15
IDE_HDREQ
IDE _HDIOR#
IDE_HDACK#
C315
10U_0805_10V4Z
1
IDE_HDREQ 19
IDE_HDIOR# 19
IDE_HDACK# 19
PDIAG# R262 1
IDE_HDA2
IDE_HDCS3#
100K_0402_5%
+5VS
IDE_HDA2 19
IDE_HDCS3# 19
+5VS
C322
330U_V_2.5VK_R9
+3VS
@ R2630_0805_5%
2
1
0.01U_0402_16V7K
SATA_RXN0
2
SATA_RXP0
2
0.01U_0402_16V7K
PLT_RST#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
C314
1
C319
7,18
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
10U_0805_10V4Z
1
C318
SATA_TXP0 19
SATA_TXN0 19
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
C313
SATA_TXP0
SATA_TXN0
JP10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1U_0603_10V4Z
GND
A+
AGND
BB+
GND
@ R260 0_0402_5%
1
2
R261
33_0402_5%
1
2
ID E_HDD7
ID E_HDD6
ID E_HDD5
ID E_HDD4
ID E_HDD3
ID E_HDD2
ID E_HDD1
ID E_HDD0
20 IDE_RESET#
C312
1
2
3
4
5
6
7
0.1U_0402_16V4Z
IDE_HDD[0..15] 19
JP9
+5VS
Pleace near HD CONN
53
R265
470_0402_5%
SUYIN_800194MR050S102ZU
CONN@
DC030001P00 WAFER OCTEK CDR-50JD1 50P P0.822P SATA
OCTEK_CDR-50JD1_50P
CONN@
SUYIN_127043FR022G204ZL_NR
DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA
SUYIN_127043FR022G204ZL_22P_NR
Mini-Express Card---WLAN
+3VS_MINI
C326 1
0.01U_0402_16V7K
C327
0.1U_0402_16V4Z
C328
+1.5VS_MINI
C329
0.01U_0402_16V7K
4.7U_0805_10V4Z 2
C330
0.1U_0402_16V4Z
C331
4.7U_0805_10V4Z
+3VALW
C332
@ 0.1U_0402_16V4Z
+1.5VS_MINI
JP11
15 CLK_PCIE_MCARD#
15 CLK_PCIE_MCARD
1
2 MINI_CLKREQ#_MC
R266
0_0402_5%
CLK_PCIE_MCARD#
CLK_PCIE_MCARD
PLT_RST#
20
20
PCIE_RXN1
PCIE_RXP1
20
20
PCIE_TXN1
PCIE_TXP1
1
2
R272
DEBUG@ 0_0402_5%
R273 0_0402_5%
PCIE_RXN1
PCIE_C_RXN1
1
2
PCIE_RXP1
PCIE_C_RXP1
1
2
R274
0_0402_5%
PCIE_TXN1
PCIE_TXP1
7/13 Update HX footprint

4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
LPC_FRAME# 19,29,30
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
LPC_AD[0..3] 19,29,30
W L_OFF# 20
ICH_SMBCLK 15,20
ICH_SMBDATA 15,20
+3VS
15 MINI_CLKREQ#
+3VS
+1.5VS
L12
FBMA-L11-201209-102LMA10T
1
2
1
2
L13
FBMA-L11-201209-102LMA10T
R267
1
2 DEBUG@ 0_0402_5%
R268
1
2 DEBUG@ 0_0402_5%
R269
1
2 DEBUG@ 0_0402_5%
R270
1
2 DEBUG@ 0_0402_5%
R271
1
2 DEBUG@ 0_0402_5%
D31
W L_D_OFF#
2
1
PLT_RST#
+3VALW
WL_LED#
R411
100K_0402_5%
WL_LED# 28
ICH_PCIE_WAKE#
20 ICH_PCIE_WAKE#
+3VS_MINI
WL_LED#
4
FOX_AS0B226-S40N-7F~D
Mini Card STANDOFF

H19
HOLEA
SP01000P700 S H-CONN ACES 88914-5204 52P P0.8
H20
HOLEA
Issued Date
2007/03/26
2007/08/29
Deciphered Date
C
Compal Secret Data
EC029000100 MINICARD_STANDOFF_8
Title
HDD/ODD/Mini Card CONN.

Size
Document Number
Rev
1.0
LA-4031P
Date:
W ednesday, October 24, 2007

G
Sheet
22
H
of
42
Cloase to JP12.
L21
MDO0- 1
R_MDO0-
R_MDO0+
+3VALW
MDO0+ 4
JP12
R275
300_0603_5%
1
2 ACTIVE#
WCM-2012-900T_4P
ACTIVITY#
11
Yellow LED+
12
Yellow LED-
L22
MDO1+ 1
R_MDO1+
MDO1- 4
R_MDO1-
R_MDO1-
WCM-2012-900T_4P
PCI_AD[0..31]
R276
3.6K_0402_5%
1
2
1
R285
18
PCI_PAR
18 PCI_FRAME#
18
PCI_IRDY#
18
PCI_TRDY#
18 PCI_DEVSEL#
18
PCI_STOP#
18
PCI_PERR#
18,30 PCI_SERR#
18
18
B
PCI_REQ0#
PCI_GNT0#
18 PCI_PIRQ#
18,30
PCI_PME#
18,29,30 PCI_RST#
15 CLK_PCI_LAN
CLK_PCI_LAN
R292
10_0402_5%
C356
10P_0402_50V8J
2
A
C/BE#0
C/BE#1
C/BE#2
C/BE#3
LAN_IDSEL
100_0402_5%
PCI_PAR
PCI_FRAME#
PCI_IRDY#
PC I_TRDY#
PCI_DEVSEL#
PCI_STOP#
46
IDSEL
76
61
63
67
68
69
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PCI_PERR#
PCI_SERR#
70
75
PERR#
SERR#
PCI_REQ0#
PCI_GNT0#
30
29
REQ#
GNT#
25
INTA#
31
PME#
PCI_RST#
27
CLK_PCI_LAN
1
2
R289
10K_0402_5%
28
65
TX2+
RX1+
R_MDO0-
5
6
7
8
TX1-
R_MDO0+
R277
300_0603_5%
1
2 LINK#
0.1U_0402_16V4Z
LINK_100#
+3VALW
TX1+
For EMI,
locate close
to LAN chip
C336
1
27P_0402_50V8J
2
21
38
51
66
81
91
101
119
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
2 1K_0402_5%
2 15K_0402_5%
2 5.6K_0603_1%
1
1
1
88
NC/AVDDH
NC/HV
10
120
NC/HSDAC+
NC/HG
NC/LG2
NC/LV2
11
123
124
126
9
13
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
22
48
62
73
112
118
RJ45 / LED
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
26
41
56
71
84
94
107
RJ11_2
RJ11
TXD+/MDI0+
TXD-/MDI0C339
0.1U_0402_16V4Z
1
2
RXIN+/MDI1+
RXIN-/MDI1C340
1U_0603_10V4Z
1
2
Q10
CTRL25
8
7
6
TDTD+
CT
TXTX+
CT
9
10
11
MDO0+
MDO0MCT0
R280
75_0402_5%
2
1
3
2
1
CT
RDRD+
CT
RXRX+
14
15
16
MCT1
MDO1+
MDO1-
2
1
R284
75_0402_5%
NS0013_16P
TXD+/MDI0+
2SB1188T100R_SC62-3
V2.5_LAN
+3VA_LAN
C342 4.7U_0805_10V4Z
1
2
1
C343
0.1U_0402_16V4Z
1
C344
0.1U_0402_16V4Z
1
C345
0.1U_0402_16V4Z
R288
2
1
0_0603_5%
1
C346
0.1U_0402_16V4Z
+3VALW
2
32
54
78
99
1
C349
0.1U_0402_16V4Z
1000P_1206_2KV7K
R286
49.9_0402_1%
2
1
C341
0.01U_0402_16V7K
2
1
2
1
R287
49.9_0402_1%
close to magnetic
C347
0.1U_0402_16V4Z
RXIN+/MDI1+
3
7
20
16
C338
R J45_GND 2
close to chip
RXIN-/MDI1-
R290
49.9_0402_1%
2
1
C348
0.01U_0402_16V7K
2
1
2
1
R291
49.9_0402_1%
1
C350
0.1U_0402_16V4Z
C351
0.1U_0402_16V4Z
Footprint can not match part number.

V2.5_LAN
1
C352
0.1U_0402_16V4Z
1
C353
0.1U_0402_16V4Z
1
C354
0.1U_0402_16V4Z
SP020008Y00 S W-CONN ACES 88266-02001 2P P1.25

ACES_88266-02001_2P
C355
0.1U_0402_16V4Z
JP13
R ING
TIP
24
45
64
110
116
V_12P
1
C359
12
RTL8100CL_LQFP128
R293
0_0402_5%
1
2
C357
V2.5_LAN
1
2
1
2
3
4
G1
G2
RJ11
C358
ACES_88266-02001
CONN@
0.1U_0402_16V4Z
Compal Secret Data

2007/03/26
Issued Date
2007/08/29
Deciphered Date
4
220P_1808_3KV
220P_1808_3KV
RJ11_1
14
@ D28
8
125
AVDD25/HSDAC-
13
R ING
+3VS
+3VALW
RTT3/CRTL18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
TIP
JM34F2*-N5125-7F
JM34F2A-M5125-7F
TXD-/MDI0-
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
16
U10
NC/VSS
NC/VSS
AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL
Green LED+
15
SGND2
ACTIVE#
LINK#
27P_0402_50V8J
2
PACDN042Y3R_SOT23-3
NC/M66EN
CLK
CLKRUN#
GND/VSS
GND/VSS
GND/VSS
R281
R282
R283
SGND1
CONN@ JM34F2-M5125-7F
105
23
127
72
74
LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA
C337
1
Green LED-
@ D27
PACDN042Y3R_SOT23-3
Y3
25MHZ_20P_1BG25000CK1A
LAN_X1
LAN_X2
10
+3VALW
1
2
C334 680P_0402_50V7K
LINK_100# 1
2
C335 680P_0402_50V7K
C333
2
ACTIVITY#
GND
NC
NC
VCC
AT93C46-10SU-2.7_SO8
ACTIVITY#_R1
2
R278 0_0603_5%
LINK_100#_R1
2
R279 0_0603_5%
14
15
18
19
121
122
RST#
GND
GND
GND
GND
DO
DI
SK
CS
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
1
2
5
6
X1
X2
CTRL25
4
17
128
35
52
80
100
4
3
2
1
92
77
60
44
PCI_PME#
117
115
114
113
NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_PIRQ#
LED0
LED1
LED2
NC/LED3
LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS
TX2-
PCI_AD17
108
109
111
106
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
EEDO
AUX/EEDI
EESK
EECS
TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-
LAN I/F
18
18
18
18
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI I/F
104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33
RX1-
R_MDO1+
+3VA_LAN
U9
Power
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
RX2+
U8
RX2-
18 PCI_AD[0..31]
Title

LAN-8100CL
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
1
23
of
42
CODEC POWER
R423
1
2
0_0805_5%
@
R299
1
ACZ_SYNC
ACZ_SDIN0
ACZ_SDOUT
25
25
DIB_P
DIB_N
R302
2
20
SB_SPKR
SB_SPKR
1
2 MONO_IN1
620_0402_5%
C370
10U_0805_10V4Z
ACZ_BITCLK
33_0402_5%
2
RESET#
6
10
8
5
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
R301 0_0402_5%
1
2 DI BP_C 43
1
2 DIBN _C 42
R305 0_0402_5%
C373
12
1
2 MONO_INR
DIB_P
DIB_N
PC_BEEP
SHDN#
BP
1
2
HP_OUTL
HP_OUTR
PORTA_L
PORTA_R
34
35
19
20
21
MIC_INL
MIC _INR
C371
C372
MICBIASC
PORTC_L
PORTC_R
18
16
17
MIC_EXTL
MIC_EXTR
+MICBIASC
C375
1
C376
1
PORTD_L
PORTD_R
27
28
C361
0.1U_0402_16V4Z
1
0925_Add LPF to reduce INT. MIC noise.
C452
+MICBIASC
10U_0805_10V4Z
R296
4.7K_0402_5%
HP_OUTL 26
HP_OUTR 26
@ R303
2.2K_0402_5%
2 2.2U_0805_10V6K
2 2.2U_0805_10V6K
1
1
+VDDA_CODEC
R429
1K_0402_5%
MICBIASB
MIC_L
MIC_R
(3.33V)
250mA
11
AVDD_26
AVDD_40
AVEE
U21
26
40
36
9
4
3
44
C448
10U_0805_10V4Z
30,31,33,35,36 SUSP#
OUT
APE8805A-33Y5P_SOT23-5
C362
0.1U_0402_16V4Z
C447
0.1U_0402_16V4Z
C369
0.1U_0402_16V4Z
C368
0.1U_0402_16V4Z
10U_0805_10V4Z
+VDDA_CODEC
+VDDA_CODEC
U11
1
1
2
C360 0.1U_0402_16V4Z VIN
2 GND
R304
2.2K_0402_5%
MIC_IN_R 26
19
19
19
+3VAMP_CODEC
R295
2
1
MBV2012301YZF_0805
1
1
ACZ_RST#
19,30 ACZ_RST#
ACZ_BITCLK
VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44
C367
0.1U_0402_16V4Z
2
2
C446
19
C363
0.1U_0402_16V4Z
+3VDD_CODEC
@R300
47_0402_5%
@C374
33P_0402_50V8K
C366
0.1U_0402_16V4Z
ACZ_BITCLK
C365
0.1U_0402_16V4Z
2
1
MBV2012301YZF_0805
10U_0805_10V4Z
C364
+3VS
+5VALW
W=40Mil
+3VDD_CODEC
R294
For Layout:
Place decoupling caps near the
power pins of SmartAMC
device.
AUDIO CODEC
In order for the modem wake on ring feature to function,

the CODEC must be powered by a rail that is not
removed when the system is in standby.
2 2.2U_0805_10V6K
2 2.2U_0805_10V6K
MIC_EXT_L 26
MIC_EXT_R 26
0.01U_0603_16V7K
T39
EAPD
S/PDIF
45
46
47
GPIO2
GPIO1
EAPD/GPIO0
0927_Modify PC Beep circuit.
AVSS_25
AVSS_38
25
38
7
41
MONO
STEREO_L
STEREO_R
29
30
31
SENSEA
13
LINE_OUTL
LINE_OUTR
LINE_OUTL 26
LINE_OUTR 26
24
VC_REFA
FLY_P
FLY_N
39
37
VREF_HI
VREF_LO
RESERVED_22
RESERVED_23
RESERVED_32
RESERVED_33
22
23
32
33
+3VAMP_CODEC
1
2
R309 5.1K_0402_1%
1
2
R310 5.1K_0402_1%
1
2
R337 20K_0402_1%
SENSE
VREF_FILT
DMIC_CLOCK
DMIC_1/2
DVSS_7
DVSS_41
1
2
PORTB_L
PORTB_R
14
15
C450
1U_0603_10V4Z
EXTMIC_DET# 26
VC_REFA
C377 1U_0603_10V4Z
CX20561-12Z_LQFP48_7X7
HP_DET# 26
C451
1U_0603_10V4Z
C378
10U_0805_10V4Z
@ R311 10K_0402_5%
1
2
1
2
@ R42110K_0402_5%
48
C449
0.1U_0402_16V4Z
R306 1
2
143_0402_1%
C379
0.1U_0402_16V4Z
1
2
C380
0.1U_0402_16V4Z
1
2
C381
0.1U_0402_16V4Z
1
2
C382
0_0402_5%
1
2
C383
0.1U_0402_16V4Z
1
2
R312
0_1206_5%
1
2
R313
0_1206_5%
1
2
HP_DET#
MIC_DET
0(LOW)
0(LOW)
NC
0(LOW)
GNDA
NC
26
LINEOUT
0(LOW)
NC
NC
PORT-A
<Earphone OUT>
MIC
EQ
OFF
ON
ON
Disable
OFF
ON
OFF
Disable
ON
OFF
ON
Enable
ON
OFF
OFF
Enable
GND
GNDA
Compal Secret Data
2007/03/26
Issued Date
2006/03/10
Deciphered Date
A
Title

AMOM_codec
Size
Document Number
Custom LA-4031P
Date:
Rev
1.0
Sheet
E
24
of
42
5335R13-005
RAC1_RING
MU1
CX20548
RING_1
MFB2
MMBD3004S
MBR1
MR3
12
TAC
RAC1
AGND_LSD
TEST
MR1
DIBN
EIC
2
1
ML1
@ Optional
6.81M
11
EIC
MC11
@ MJ1
5335R13-005
TIP_1
2
1
MFB1
0.1uF
cap_0402_01uf
MC8
470 pF
MC10
MC7
@ Omit
MC9
470 pF
Note: MC8 and MC9 can be optionally

populated here or behind the RJ-11
connector.
24
24
15
cap_0603_001uf
R810 and C810 must be placed near pin 6 (RXI)

and there should be no vias on the(RXI)net.
PWR
AGND_LSD
G ND
DIB_P
D IB_N
AVdd
MC5
0.1uF
cap_0402_01uf
MT1
G ND
150pF
CAP_0402_150PF
2
3
@ MJ4
DIBN_HS
DIBP_HS
2
1
AVDD
RXI
RXI
MC6
47P_0402_50V8J
CAP_0402_47PF
RX1_1
MC1
BRIDGE_CC
0.047uF
100.0V
237K
MC3
0.1uF
cap_0402_01uf
1
4
MODEM-SMAR
MR2
MC12
MR9
MR5
MR6
MR10
280
280
280
280
RES_1206_280RES_1206_280
RES_1206_280 RES_1206_280
BRIDGE_CC2
AGND_LSD
DIBP
14
DIBP
MR13
EIO
10
EIF
EIF
TXO
TXO
TXF
TXF
GPIO
13
MC13
100_0402_5%
MQ1
MMBTA42
RES_0402_100
QBASE
150pF
CAP_0402_150PF
DVdd
G ND
DVDD
GND
Description
EP
MQ3
MMBTA42
MQ4
MMBTA42
MR11
3.01
res_0402_301
MR12
3.01
res_0402_301
MR7
9.1
res_1206_91
AGND_LSD
MC2
0.1uF
cap_0402_01uf
Revision History
REV
MR4
110
5%
VC_LSD
AGND_LSD
MR8
56
5%
@ RES_0603_56
MQ2
MMBTA42
17
1
2
VC
MC4
0.1uF
cap_0402_01uf
@ MJ5
B
@ MJ3
0.01uF
AGND_LSD
PWR+
@ MJ2
2
1
MBR2
MMBD3004S
TAC1_TIP
16
TAC1
res_0805_681m
DI BN
MRV1
RAC
6.81M
Date
Initial Release
April 26, 2005
No changes to schematic. PCB updated to -003.

Updated footprints and corrected via spacing errors.
August 18, 2005
Changed MC8 and MC9 pads.

PCB updated to -005.
Added MR11 and MR12.
Added MR13.
4.01
AVL update only.
No schematic changes.
AGND_LSD
November 3, 2005
November 18, 2005
Compal Secret Data
Issued Date
January 3, 2006
2007/03/26
Deciphered Date
2007/07/26
April 20, 2006
Title

AMOM-CX20548
Size
Document Number
R ev
1.0
LA-4031P
D ate:

1
Sheet
25
of
42
+5VAMP
R314
0_1206_5%
1
2
0.1U_0402_16V4Z
JP15
R_SPKL+
R_SPKLR_SPKR+
R_SPKR-
1
C386
16 dB
1
16
15
6
C396 1
LINE_OUTL
2 0.047U_0603_16V7K LINE_C_OUTL
EC_MUTE#
19
2
1
L16
1
MBC1608121YZF_0603
SPKR+
2
14
L_SPKR-
L17
1
MBC1608121YZF_0603
SPKR2
LOUT+
L_SPKL+
L18
1
MBC1608121YZF_0603
SPKL+
2
LOUT-
L_SPKL-
L19
1
MBC1608121YZF_0603
SPKL2
LIN-
2
L_SPKR+
NC
12
BYPASS
10
R318
100K_0402_5%
@
R319
100K_0402_5%
AGND
24
@ C394 47P_0402_50V8J
2
1
R320
1
MIC_IN_R
MIC INT In-R
0_0603_5%
2
JP28
MICIN_R
1
2
3
4
L20
1
AGND
MBC1608121YZF_0603
ACES_85204-02001
CONN@
24
EXTMIC_DET#
EXTMIC_DET#
CONN@
2
C397
0.47U_0603_10V7K
470P_0402_50V7K
2
6
5
C398
1
21
20
13
11
1
P3017THF D0 TSSOP 20P
24
MIC_EXT_R
24
MIC_EXT_L
MIC_EXT_R
R424 1
MIC_EXT_L
R425 1
R321
2 100_0402_5%
1
MBC1608121YZF_0603
2
2 100_0402_5%
1
R322
2
MBC1608121YZF_0603
2
470P_0402_50V7K
L24
1
MBC1608121YZF_0603
R_SPKR+
2
SPKR-
L25
1
MBC1608121YZF_0603
R_SPKR2
SPKL+
L26
1
MBC1608121YZF_0603
R_SPKL+
2
SPKL-
L27
1
MBC1608121YZF_0603
R_SPKL2
MICEXT_L
2
1
JP16
1
C399
@ D13
SM05_SOT23
SPKR+
MICEXT_R
D30
D29
2
1
2
G1
G2
MIC EXT In
Keep 10 mil width
SHUTDOWN
GND5
GND1
GND2
GND3
GND4
EC_MUTE#
ROUT+
LIN+
30
3
18
ROUT-
E&T_3801-04
CONN@
1
GAIN1
RIN-
4
3
2
1
24
2 0.047U_0603_16V7K
GAIN0
C395 1
RIN+
LINE_OUTR
2 0.047U_0603_16V7K LINE_C_OUTR 17
24
C393 1
2 0.047U_0603_16V7K
@
R316
100K_0402_5%
VDD
PVDD1
PVDD2
C391 1
+5VS
@ R315
100K_0402_5%
C390
47P_0402_50V8J
0.1U_0402_16V4Z
U13
4
3
2
1
C389
47P_0402_50V8J
C385
SPEAKER
C388
47P_0402_50V8J
C384
10U_0805_10V4Z
+5VS
C387
47P_0402_50V8J
2
1
3
SM05_SOT23
@
SM05_SOT23
HeadPhone Out/Line Out
24
CONN@
HP_DET#
HP_DET#
470P_0402_50V7K
6
5
C401
2
1
4
24
HP_OUTL
R417
1
2
110_0402_1%
1
2
HP_OUTR
HP_OUTL
OUT_R
OUT_L
R325
1
MBC1608121YZF_0603
2
1
R326
2
MBC1608121YZF_0603
R418
110_0402_1%
2
470P_0402_50V7K
PR
PL
2
1
JP17
HP_OUTR
24
C404
@ D14
SM05_SOT23
0302_Change Audio Jack.
Compal Secret Data
2007/03/26
Issued Date
Deciphered Date
2007/08/29
A
Title

AMP & Audio Jack
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
E
26
of
42
JP29
20
20
1
3
5
7
9
11
USB20_P4
USB20_N4
USB Port
+5VALW
+USB_VCCA
SYSON#
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
2
4
6
8
10
12
+3VS
ACES_88020-12101
CONN@
13
14
15
16
17
18
U14
1
2
3
4
2
4
6
8
10
12
GND
GND
GND
GND
GND
GND
+5VALW
+5VS
1
3
5
7
9
11
USB_OC#2
USB_OC#2 20
RT9711PS_SO8
+USB_VCCA
C406
220U_6.3V_M
1
+
C407
+5VALW
C408
C
1000P_0402_50V7K
JP18
JP19
0.1U_0402_16V4Z
USB20_N2
USB20_P2
20
20
@D15
PSOT24C_SOT23-3
1
2
3
4
5
6
7
8
1
2
3
4
GND
GND
GND
GND
SUYIN_020133MB004S580ZL-C
CONN@
20
20
USB20_N0
USB20_P0
20
20
20
31,35
USB20_N1
USB20_P1
USB_OC#0
SYSON#
1
2
3
4
5
6
7
8
9
10
SYSON#
11
12
DC233000U00 CONN SUYIN 020173MR004S558ZL 4P USB

SUYIN_020173MR004S558ZL_4P
1
2
3
4
5
6
7
8
9
10
GND1
GND2
ACES_87213-1000G
CONN@
SP02000DX00 S W-CONN ACES 87213-1000G 10P P1.0

ACES_87213-1000G_10P
Compal Secret Data
2007/03/26
Issued Date
2006/07/26
Deciphered Date
5
Title

USB CONN.
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
1
27
of
42
POWER LED(Left 1)
BLUE
M/BtoS/B
+3VALW
R329
D16
ON/OFFBTN_LED# 1
1015_Remove U22 and U23.
+3VALW
JP20
1
2
3
4
5
6
7
8
9
10
11
12
ON/OFFBTN#
29,30 NUM_LED#
30 WL_BTN#
29,30 ON/OFFBTN_LED#
30
WL_BTN#
ON/OFFBTN_LED#
WL_LED#
LID_SW#
LID_SW#
LTST-C191TBKT-5A_BLUE_0603 75_0402_5%
+3VS
Battery Charge LED(Left 2)
1
2
3
4
5
6
7
8
9
10
GND
GND
R331
D18
30
BAT_LED#
+3VALW
BLUE
2
LTST-C191TBKT-5A_BLUE_0603 75_0402_5%
HDD LED(Left 3)
+3VS
ACES_85201-1005N
CONN@
BLUE
R333
D20
SP01000H400 S H-CONN ACES 85201-1005N 10P P1.0
ACES_85201-1005N_10P
19 SATA_LED#
LTST-C191TBKT-5A_BLUE_0603 75_0402_5%
Power ON/OFF
0426_Change all LED power source from 5V to 3V.
Wireless ON/OFF LED(Left 4)

+3VS
M/B to SB(Caps Lock LED)

R330
+3VALW
R334
330_0402_5%
R335
33_0402_5%
2
WL_LED#_LIGHT
Q19
2
G
2N7002_SOT23-3
S
ACES_85204-02001_2P
On (WL_ON#=L)-> Blue
Off (WL_ON#=H)-> Amber
EC_ON
EC_ON
R332
4.7K_0402_5%
30
2 2
D
ACES_85204-02001
CONN@
2 C409
1000P_0402_50V7K
22
WL_LED#
WL_LED#
I
2
LTST-C195TBKFKT_BLUE/ORG
1
2
G1
G2
+3VALW
R336
10K_0402_5%
1
2
3
4
29,30 CAPS_LED#
Q18
DTC124EK_SC59
+3VS
BLUE
D21
JP21
DAN202U_SC70
AMBER
+3VS
34
51ON#
ON/OFF 30
51ON#
Blue
ON/ OFF
Orange
2
1
D17
ON/OFFBTN#
4 2
4.7K_0402_5%
Q20
2N7002_SOT23-3
2
G
D21, D25, D23 Footprint can not match part number.
1
3
SN100000F00 S TACT SW SMT1-05-A SPST HCH H1.5 4P

SW_SMT1-05-A_4P
30
2
TP_DATA 30
TP_CLK 30
ACES_85201-0405N
CONN@
@C413
100P_0402_50V8J
TP_LED#
0.1U_0402_16V4Z
1
2
3
4
5
6
SYSON
30,31,35 SYSON
1
2
3
4
G1
G2
On (TP_LED#=L)-> Blue
Off (TP_LED#=H)-> Amber
JP22
Q22
TP_LED#
2
G
2N7002_SOT23-3
1
TP_BTN# 30
2
4
R384
10K_0402_5%
1
@ C412
TP_BTN#
5
6
Orange
Blue
LTST-C195TBKFKT_BLUE/ORG
1
2
SW1
SMT1-05-A_4P
AMBER
+5V
Q33
S
TP_LED#_LIGHT
+5VALW
D24
PACDN042Y3R_SOT23-3
R340
10K_0402_5%
D23
Q21
2N7002_SOT23-3
2
G
3
+5V
R339
330_0402_5%
BLUE
R341
10K_0402_5%
TP_DATA
TP_CLK
+5V
R338
33_0402_5%
+3VS
T/P Board
TP ON/OFF
TouchPAD ON/OFF LED

1
+3VS
Q34
2N7002_SOT23-3
2
G
@C414
100P_0402_50V8J
SP01000H300 S H-CONN ACES 85201-0405N 4P P1.0

ACES_85201-0405N_4P
Compal Secret Data
2007/03/26
Issued Date
Deciphered Date
2006/07/26
Title

LED/SW
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
1
28
of
42
+3VALW
+3VALW
R342
100K_0402_5%
U16
8
7
6
5
30,38 SMB_EC_CK1
30,38 SMB_EC_DA1
C415
0.1U_0402_16V4Z
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
LPC Debug Port

1
AT24C16AN-10SI-2.7_SO8
R343
100K_0402_5%
B+
JP23
SPI ROM
19,22,30 LPC_FRAME#
18,23,30 PCI_RST#
+3VALW
19,22,30
19,22,30
19,22,30
19,22,30
U17
20mils
C416
0.1U_0402_16V4Z
FSEL#
30
SPI_CLK
30
FW R#
1
R345
1
R346
F WR# 1
R347
VCC
HOLD
2
30
HOLD#
SPI_FSEL#
2
0_0402_5%
SPI_CLK_R
2
0_0402_5%
SPI_FWR#
2
0_0402_5%
VSS
SPI_SO 1
2F RD#
D
Q 2
R348
0_0402_5%
@
WIESON G6179 8P SPI
SP07000F500 S SOCKET WIESON G6179-100000 8P SPIFLASH
WIESO_G6179-100000_8P
F RD#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
ON/OFFBTNLED#
CAPSLED#
NUMLED#
VCC1PWRGD
SPI_CLK_JP52
SPI_CS#_JP52
SPI_SI_JP52
SPI_SO_JP52
SPI_HOLD#_0
30
&U17
Connect pin3 & 23

together and pin 24
to GND in 6/29.
SST25LF080B_SO8-200mil
+3VALW
@ R349
1
0_0402_5%
2
SPI_CLK_JP52
FSEL#
@ R350
1
0_0402_5%
2
SPI_CS#_JP52
F WR#
@ R351
1
0_0402_5%
2
HOLD#
@ R352
1
0_0402_5%
2
F RD#
@ R353
1
0_0402_5%
2
3.3K_0402_5%
28,30 ON/OFFBTN_LED#
28,30 CAPS_LED#
@ R222
1
0_0402_5%
2
28,30 NUM_LED#
@ R356
1
0_0402_5%
2
30 VCC1_PWRGD
@ R357
1
0_0402_5%
2
@ R399
0_0402_5%
SPI_SI_JP52
SPI_HOLD#_0
SPI_SO_JP52
ON/OFFBTNLED#
CAPSLED#
NUMLED#
VCC1PWRGD
Compal Secret Data
Issued Date
Ground
LPC_PCI_CLK
Ground
LPC_FRAME#
+V3S
LPC_RESET#
+V3S
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
VCC_3VA
PWR_LED#
CAPS_LED#
NUM_LED#
VCC1_PWRGD
SPI_CLK
SPI_CS#
SPI_SI
SPI_SO
SPI_HOLD#
Reserved
Reserved
Reserved
ACES_87216-2404_24P
@
SPI_CLK
R410
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2007/03/26
Deciphered Date
2006/07/26
Title

BIOS ROM
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
29
of
42
+3VALW_EC
Board ID
SI : 3 (Same as IBL80 spartan 1.0)
C420
C421
+EC_AVCC
R382
2
1
0_0805_5%
M/B_ID
@ R358
1
GATEA20
1
KB_RST#
2
SI RQ
3
LPC_LFRAME# 4
LPC_LAD3
5
LPC_LAD2
7
LPC_LAD1
8
LPC_LAD0
10
19
GATEA20
19
KB_RST#
20
SIRQ
19,22,29 LPC_FRAME#
19,22,29 LPC_AD3
19,22,29 LPC_AD2
19,22,29 LPC_AD1
19,22,29 LPC_AD0
15P_0402_50V8J 33_0402_5%
CLK_PCI_EC
PCI_RST#
ECRST#
EC_SCI#
15 CLK_PCI_EC
18,23,29 PCI_RST#
2 R359
1
47K_0402_5%
+3VALW
20
C425
2
2
0.1U_0402_16V4Z
R404
10K_0402_5%
WL_BTN#
SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2
29,38
29,38
4
4
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
20
SLP_S3#
20
SLP_S5#
20
EC_SMI#
28
LID_SW#
24,31,33,35,36 SUSP#
20 PWRBTN_OUT#
18,23 PCI_PME#
SUSP#
R402
10K_0402_5%
28
PCI_SERR#
ON/OFF
SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
SUSP#
PWRBTN_OUT#
PCI_PME#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
NUM_LED#
28,29 NUM_LED#
EC DEBUG port
77
78
79
80
TP_BTN#
UTX
URX
ON/ OFF
TP_BTN#
28
18,23 PCI_SERR#
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
AD
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
AVCC
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
63
64
65
66
75
76
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
PSCLK1/GPIO4A
KSI4/GPIO34
PSDAT1/GPIO4B
KSI5/GPIO35
PSCLK2/GPIO4C
PS2 Interface
KSI6/GPIO36
PSDAT2/GPIO4D
KSI7/GPIO37
TP_CLK/PSCLK3/GPIO4E
KSO0/GPIO20
TP_DATA/PSDAT3/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
SDICS#/GPXOA00
KSO4/GPIO24
SDICLK/GPXOA01
KSO5/GPIO25 Int. K/B
SDIDO/GPXOA02
KSO6/GPIO26 Matrix
SDIDI/GPXID0
SPI
Device
Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/RD#
KSO10/GPIO2A
SPIDO/WR#
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
CIR_RX/GPIO40
KSO16/GPIO48
CIR_RLC_TX/GPIO41
KSO17/GPIO49
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO BATT_LOW_LED#/GPIO54
SCL1/GPIO44
SDA1/GPIO45
SUSP_LED#/GPIO55
SM Bus
SCL2/GPIO46
SYSON/GPIO56
SDA2/GPIO47
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
GPI
C426
@ JP24
NC
IN
Y4 32.768KHZ_12.5P_1TJS125DJ2A073
C R Y1
1
2
15P_0402_50V8J
+EC_AVCC
+3VS
Rb
DAC_BRIG
BATT_TEMP 38
BATT_OVP 33
ADP_I
33
IR EF
97
98
99
109
WL_BTN#
2
R360
100K+/-5%
Board ID
DAC_BRIG 17
I REF
33
EC_MUTE# 26
ACZ_RST# 19,24
TP_LED# 28
TP_CLK 28
TP_DATA 28
CLK_ENABLE
1
4.7K_0402_5%
AIR_AC
100K_0402_5%
3.3V+/-5%
Ra
2 ECAGND
0.01U_0402_16V7K
R355
V AD_BID min
Rb
V AD_BID typ
V AD_BID max
0V
0V
0V
8.2K+/-5%
0.216V
0.250V
0.289V
18K+/-5%
0.436V
0.503V
0.538V
33K+/-5%
0.712V
0.819V
0.875V
56K+/-5%
1.036V
1.185V
1.264V
100K+/-5%
1.453V
1.650V
1.759V
200K+/-5%
1.935V
2.200V
2.341V
NC
2.500V
3.300V
3.300V
33,38
CLK_ENABLE 15
WL_BTN# 28
+5V
119
120
126
128
73
74
89
90
91
92
93
95
121
127
F RD#
F WR#
SPI_CLK
FSEL#
F RD#
FW R#
SPI_CLK
FSEL#
VCC1_PWRGD
FSTCHG
CAPS_LED#
BAT_LED#
ON/OFFBTN_LED#
SYSON
VR_ON
AC IN
EC_RSMRST#
100
101 R397 1 0_0402_5%
2
EC_ON
102
103
PM_PWROK
104
BKOFF#
105
M_PWROK
106
107
108
V18R
124
AGND
1
KB926QFB1_LQFP128_14X14
AC IN
TP_CLK
2
10K_0402_5%
1
R361
TP_DATA
2
1
10K_0402_5% R362
VCC1_PWRGD 29
FSTCHG 33
C440
100P_0402_50V8J
CAPS_LED# 28,29
BAT_LED# 28
ON/OFFBTN_LED# 28,29
SYSON
28,31,35
VR_ON
37
AC IN
33
2
1
R393 10K_0402_5%
For EMI
CP1
JP25
EC_RSMRST# 20
EC_LID_OUT# 20
EC_ON 28
WEBCAM_ON/OFF# 17
PM_PWROK 7,20
BKOFF#
17
M_PWROK 7,20
SLP_S4#
THERM_SCI#
29
29
29
29
SLP_S4# 20
THERM_SCI# 20
C@
C438
0.1U_0402_16V4Z
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
KSO14
KSO11
KSO10
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
CP2
1
8
2
7
3
6
4
5
KSO6
KSO3
KSO12
KSO13
100P_1206_8P4C_50V8
CP3
KSO2
KSO4
KSO7
KSO8
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
CP4
1
8
2
7
3
6
4
5
KSI3
KSO5
KSO1
KSI0
100P_1206_8P4C_50V8
C427
+5VS
BATT_TEMP
BATT_OVP
AD P_IN
M/B_ID
VCC
33
1
C423
25
26
+3VALW_EC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
@ 20M_0402_5%
R368
ACES_85205-0400
FOR LPC SIO DEBUG PORT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
15P_0402_50V8J
3 NC
OUT 4
ACOFF
ECAGND
+5VALW
URX
UTX
GND
GND
GND
GND
GND
1
2
3
4
INV_PWM 17
FAN_PWM 4
AC OFF
EC_MUTE#
ACZ_RST#
AI R_AC
TP_LED#
TP_CLK
TP_DATA
110
112
114
115
116
117
118
L14
0_0603_5%
GND1
GND2
CP5
ACES_85201-24051
CONN@
KSI4
KSI5
KSO0
KSI2
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
PCI_RST#
CLK_LPC_DEBUG
SI RQ
ACES_85201-2005
CLK_14M_DEBUG 15
SP01000FF00 85201-24051 24P P1.0

ACES_85201-24051_24P
L15
1
2
3
4
INV_PWM
FAN_PWM
83
84
85
86
87
88
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
XCLK1
XCLK0
@ JP26
122
123
69
C R Y2
11
24
35
94
113
21
23
26
27
PWM Output
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
LID_SW#
R363
R364
4.7K_0402_5%
4.7K_0402_5%
+5VALW
R365 R366
4.7K_0402_5%
4.7K_0402_5%
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
1
R403
10K_0402_5%
+3VS
J1
0.1U_0402_16V4Z
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
JOPEN
+3VS
+3VALW
EC_SCI#
12
13
37
20
38
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
C422
VCC
VCC
VCC
VCC
VCC
VCC
U18
@ C424
1
2
100K_0402_5%
+3VALW_EC
C419
2
2
1000P_0402_50V7K
R354
+3VALW
C418
1000P_0402_50V7K
67
C417
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
9
22
33
96
111
125
0.1U_0402_16V4Z
1
1
Ra
+3VALW_EC
1
C428
2
0_0603_5%
CP6
KSI1
KSI7
0.1U_0402_16V4Z
@ R383
LPC_DRQ#0 19
10K_0402_5%
2
1
CLK_LPC_DEBUG 15
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
Compal Secret Data
Issued Date
2007/03/26
Deciphered Date
2006/07/26
Title

EC KB926/KB conn
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
30
of
42
+5VALW to +5VS Transfer
+5VALW
+3VALW to +3VS Transfer
+5VS
+3VALW
+3VS
B+
U19
C429
S
S
S
G
U20
1
2
3
4
8
7
6
5
D
D
D
D
R369
AO4422_SO8
2 10U_0805_10V4Z
C431
C432
C430
D
D
D
D
330K_0402_5%
10U_0805_10V4Z
S
S
S
G
10U_0805_10V4Z
1
2
3
4
AO4422_SO8
2 10U_0805_10V4Z
8
7
6
5
C433
C434
RU NON
RU NON
0.1U_0402_16V4Z
0.1U_0402_16V4Z
470_0402_5%
1
SUSP
R370
D
Q23
2N7002_SOT23-3
2
G
C435
0.01U_0402_16V7K
+5VALW
+5VALW
C436
100K_0402_5%
100K_0402_5%
+VCCP
0.1U_0402_16V4Z
R372
+VCC_CORE
R371
C437
SYSON#
SYSON
Q24
2N7002_SOT23-3
2
G
3
28,30,35 SYSON
SUSP
SUSP
+1.5VS
0.1U_0402_16V4Z
SUSP# 2
G
24,30,33,35,36 SUSP#
+VCCP
35
D
Q25
2N7002_SOT23-3
SYSON#
27,35
FM9
FM10
H9
HOLEA
H10
HOLEA
H8
HOLEA
H6
H7
HOLEA HOLEA
H5
HOLEA
H15
H16
H17
H18
H21
H23
HOLEC HOLEC HOLEC HOLEC HOLEC HOLEC
H12
HOLEA
H11
HOLEA
H27
HOLEA
H25
H26
HOLEA HOLEC
Q32
2N7002_SOT23-3
2
1
H24
HOLEA
Q31 SUSP 2
G
2N7002_SOT23-3
S
H3
HOLEA
470_0402_5%
2
S
H2
HOLEA
R379
Q30 SUSP 2
G
2N7002_SOT23-3
Q29 SUSP 2
G
2N7002_SOT23-3
S
Q28 SUSP 2
G
2N7002_SOT23-3
S
470_0402_5%
R378
470_0402_5%
R377
470_0402_5%
R376
470_0402_5%
H1
HOLEA
+0.9V
R375
Q27
SYSON# 2
G
2N7002_SOT23-3
S
+VCCP
470_0402_5%
2
1
2
S
+1.25VS
R373
Q26 SUSP 2
G
2N7002_SOT23-3
2
G
3
SUSP
+1.5VS
R374
470_0402_5%
+1.8V
+3VS
+5VS
FM8
FM7
Discharge circuit
FM1
For Card reader/B stand off.
FM2
FM4
FM5
FM6
C F5
1
C F1
Compal Secret Data
2007/03/26
Issued Date
2006/07/26
Deciphered Date
A
Title
C F2
1
CF3
CF4
CF6
C F7
C F8

DC/DC Interface
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet
E
31
of
42
VIN
PL1
SMB3025500YA_2P
PCN1
PC1
ACES_88334-057N
2
100P_0402_50V8J PC2
1000P_0402_50V7K
PC4
1000P_0402_50V7K
2
1
PC3
100P_0402_50V8J
2
1
ADPIN
1
2
3
4
5
1
2
3
4
5
+3VALW
3
PQ38
TP0610K-T1-E3_SOT23
AC_LED 33
PR157
1
2
100_0402_5%
Compal Secret Data
Issued Date
<Issued_Date>
Deciphered Date
<Deciphered_Date>
A
Title
Custom
Date:
DC CONN
Rev
LA-4031P

D
Sheet
32
of
42
P2
VIN
PQ1
FDS6675BZ_SO8
4
1
PD4
34
RT
17
+INE1
-INE3
16
10
OUTC1 FB123
15
11
SEL
CTL
14
12
-INC1
+INC1
13
2
1
PC10
4.7U_1206_25V6K
PL3
16UH_SIL1045R-160_4.1A_30%
1
2
PC25
10P_0402_50V8J
1
2
1
3
BATT
0.02_1206_1%
FSTCHG
RB751V-40_SOD323-2
PD3
1
2
SUSP#
24,30,31,35,36
RB751V-40_SOD323-2
2
1
PH1
PR163
15K_0402_1%
1
2
150K_0402_1%
1
2
PR164
+5VALW
PR161
PC133
2.55K_0402_1%
0.22U_0603_10V7K
PR162
150K_0402_1%
PC132
1000P_0402_50V7K
8
S
P
2
G
D
PQ39
RHU002N06_SOT323-3
PQ12
RHU002N06_SOT323-3
PU4B
LM358ADT_SO8
34 MAINPWON
PU4A
LM358ADT_SO8
CPU
+5VALW
BATT_DET
2
G
10K_TH11-3H103FT_0603_1%
38
D
@ PQ37
RHU002N06_SOT323-3
+5VS
PR167
47K_0402_1%
1
2
@ PR159
100K_0402_5%
PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 47 +-3 degree C
+3VALW
PC27
47P_0402_50V8J
1
2
PQ13
RHU002N06_SOT323-3
3
PR17
1
PC23
1500P_0402_50V7K
21
2
2
G
PC9
4.7U_1206_25V6K
2
1
1
2
3
1
PR13
PR26
33K_0402_1%
MB39A126 1
30
PR20
47K_0402_1%
1
2
2
+
1
3
18
-INE1
2
8
P
1
CS
PR35
10K_0402_5%
1
2
1
PR33
47K_0402_1%
30 BATT_OVP
PC16
0.1U_0603_25V7K
1
2
@ PR158
100K_0402_5%
NC
ACIN XACOK
+3VALW
PC30
0.01U_0402_25V7K
NC
1
2
1
PR32
PR31
499K_0402_1% 340K_0402_1%
CATHODE
1
PR34
105K_0402_1%
ANODE
REF
+5VALW
1.24VREF
PC29
0.01U_0402_25V7K
ACOFF
PC21
10U_1206_25V6M
2
1
19
DTC115EUA_SC70-3
PC20
10U_1206_25V6M
2
1
20
VH
PQ7
RHU002N06_SOT323-3
OUT
VREF
ACOK
CV=12.6V (6/12 CELLS LI-ION)

CC=3.08A (6/12 CELLS LI-ION)
BATT
PU3
PQ11
FDS4435BZ_SO8
2
PC28
22P_0402_25V8K
2
1
30,38
21
RLZ4.3B_LL34
1
2
49.9K_0402_1%
2
G
FSTCHG
VCC
PQ10
PC13
0.22U_0603_16V7K
1
2
PC14
0.1U_0603_25V7K
1
2
2
G
PQ9
S
RHU002N06_SOT323-3
PR29
10K_0402_5%
P2
+3VALW
30
-INE2
PC19
10U_1206_25V6M
2
1
PR168
PACIN
P ACIN
1
P
G
3.2V
LM393DG_SO8
LMV431ACM5X_SOT23-5
CS
PR10
100K_0402_5%
2
1
2
G
PD2
1K_0402_5%
PU2A
PR25
10K_0402_1%
2
1
0_0402_5%
30
ACIN
PC22
0.1U_0402_10V7K
PR19
PC18
1K_0402_1% 2200P_0402_50V7K
2
1
2
PR30
22
+3VLP
1
MB39A126 1
PR21
150K_0402_1%
2
8
PR22
10K_0402_1%
PC24
0.1U_0603_25V7K
30
VREF
PR24
100K_0402_1%
PR146
O
4
100K_0603_1%
PR23
2
1
PR28
2
10K_0603_0.1%
PC26
0.047U_0402_16V7K
2
1
IREF
PR160
47_1206_5%
CS
AC_LED
PD1
EC31QS04
VIN
23
+INE2
32
1
2
681K_0402_1%
P2
OUTC2 GND
PR18
PR2
10K_0402_5%
5
6
7
8
PC17
PR16
0.22U_0603_16V7K 28.7K_0603_1%~D
1
PR15
10K_0402_1%
2
1
2
1
2
PC15
0.01U_0402_25V7K
PR27
2.15K_0402_1%
1
2
ADP_I_A
MB39A126
1SS355_SOD323-2
VIN
VIN
ACOFF#
P ACIN
PR1
100K_0402_1%
PC12
PR14
4700P_0402_25V7K 100K_0402_1%
1
2
2
1
PC8
2200P_0402_50V7K
2
1
1
2
PR12
10K_0402_1%
1
2
PQ8
RHU002N06_SOT323-3
3
CHG_B+
PU1
MB39A126PFV-ER_SSOP24
1 -INC2 +INC2 24
2
G
PD5
ACOFF#
PR9
10K_0402_5%
PR11
1
2
3K_0402_5%
CHG_B+
PC7
0.1U_0603_25V7K
2
1
ADP_I
30
PC11
0.22U_0603_16V7K
P ACIN
0.02_2512_1%
PR8
150K_0402_5%
S PQ6
RHU002N06_SOT323-3
PR5
1
2
47K_0402_5%
PL2
SMB3025500YA_2P
1
2
PR7
1
PQ5
DTC115EUA_SC70-3
8
7
6
5
PR4
200K_0402_5%
0_0402_5%
PC6
1
2
P4
2
G
BATT
PQ3
FDS6675BZ_SO8
1
2
3
DTA144EUA_SC70-3
2
1
B+
PQ4
0.22U_0603_16V7K
8
7
6
5
PR6
47K_0402_1%
1
2
1
2
3
PC5
47P_0402_50V8J
1
2
PR3
47K_0402_5%
2
1
PQ2
FDS6675BZ_SO8
1
2
3
8
7
6
5
Compal Secret Data
AIR_AC
Issued Date
Deciphered Date
A
Title

Charger

Custom
D ate:

D
R ev
Sheet
33
of
42
5
6
7
8
3
2
1
5
6
7
8
PR47
0_0402_5%
2
1
PL6
3
2
1
1
2
1
PR46
@499K_0402_1%
BST_3.3V
DH_3.3V
DL_3.3V
LX_3.3V
10U_LF919AS-100M-P3_4.5A_20%
2
28
26
24
27
22
PR45
@499K_0402_1%
BST3
DH3
DL3
LX3
OUT3
1
7
2
2
MAX8734AEEI+_QSOP28
1
+3VLP
ALW_PWRGD 20
PR57
0_0402_5%
1
+
PR54
@3.57K_0402_1%
PRO#
+3VALWP
23
1
2
2
17
20
V+
11
PQ36
AO4468_SO8
VL
PC43
220U_6.3VM_R15
PR58
0_0402_5%
1
2
PC46
0.047U_0603_16V7K
ILIM5
FB3
PGOOD
REF
10
SKIP#
PC44
0.22U_0603_10V7K
MAINPWON 33
PR55
2
1
499K_0603_1%
PR43
0_0402_5%
SHDN#
ON5
ON3
12
8
PR56
300K_0402_5%
2
1
MAINPWON
13
18
6
4
3
2VREF_1999
VL
ILIM3
DH_3.3V_B
0_0402_5%
PR44
PR50
1
2
@0_0402_5%
1
2
PR52
@10K_0402_5%
25
PR49
2
0_0402_5%
2VREF_1999
VCC
LX5
DL5
OUT5
FB5
N.C.
TON
DH5
15
19
21
9
1
LD05
PC40
4.7U_0805_10V4Z
1
16
LX_5V
DL_5V
PC45
4.7U_0805_10V4Z
2VREF_1999
DH_5V
GND
B++
PR51
47K_0402_5%
2
1
2
1
PC42
0.1U_0603_25V7K
PR53
0_0402_5%
2
1
2
220U_6.3VM_R15
PC41 1
PR48
@10.2K_0402_1%
+5VALWP
BST5
PQ16
AO4468_SO8
PR42
0_0402_5%
PU5
BST_5V 14
PC35
0.1U_0603_16V7K
2VREF_1999
PC39
1U_0805_16V7K
1
2
1
2
3
PL5
10U_LF919AS-100M-P3_4.5A_20%
LDO3
1
2
3
8
7
6
5
1
VL
PC38
2
1
0.1U_0603_50V4Z
B++
PR41
0_0402_5%
PR39
0_0402_5%
2
PR40
47_0402_5%
4DH_5V_B
PC37
4.7U_1206_25V6K
VL
PQ35
AO4468_SO8
B++
PD6
CHP202UPT_SOT323-3
PQ15
AO4468_SO8
PC32
0.1U_0603_50V4Z
1
2
BST_3.3V_B
8
7
6
5
2
1
PC34
10U_1206_25V6M
2
1
PC33
2200P_0402_50V7K
B+
1
BST_5V_B
PC36
2200P_0402_50V7K
PC31
0.1U_0603_50V4Z
1
2
B++
1
PL4
FBM-L11-322513-151LMAT_1210
2
PR59
100K_0402_5%
PQ17
2
G
PQ19
RHU002N06_SOT323-3
+3VLP
2
33
2
PACIN
G
PQ18
RHU002N06_SOT323-3
PQ26
TP0610K-T1-E3_SOT23
2
G
S RHU002N06_SOT323-3
D
PR156
100K_0402_5%
1
PR154
100K_0402_5%
28
51ON#
Compal Secret Data
<Issued_Date>
Issued Date
Deciphered Date
<Deciphered_Date>
A
Title

3.3VALWP / 5VALWP
Size
Date:
Document Number
Rev
Sheet
E
34
of
42
PL7
FBMA-L11-322513-151LMA50T_1210
1.8V_B+
2
1
5
6
7
8
1
PC52
0.1U_0402_16V7K
PC51
0.1U_0402_16V7K
PC58
@680P_0603_50V7K
1
PC59
1U_0603_10V6K
PC50
220U_6.3VM_R15
+
PR68
@4.7_1206_5%
DL
PGND
VSSA
LX_1.8V
PR69
1
2
18.2K_0402_1%
SC411MLTRT_MLPQ16_4X4
TP
NC
17
5
6
7
8
3
2
1
BOOT_1.8V 1
14
NC
13
11
10
VDDP
PQ22
FDS6690AS_NL_SO8
12
LX
PGD
DH
ILIM
+1.8VP
1
FB
PL8
1UH_MPLC0730L1R0_10.6A_20%
1
2
3
2
1
VCCA
VOUT
PC56
0.1U_0402_16V7K
BST
16
15
EN/PSV
BOOT1_1.8V
2
0_0402_5%
TON
PU6
UG_1.8V
PR65
PR66
100K_0402_5%
PC55
@2200P_0402_25V7K
PC57
1U_0603_10V6K
2
1
PR64
0_0402_5%
PD7
1SS355_SOD323-2
PC54
1000P_0402_50V7K
28,30,31 SYSON
PQ21
AO4468_SO8
PR62
1M_0402_5%
PR61
10_0402_5%
2
1
PC49
10U_1206_25V6M
PC47
680P_0402_50V7K
+5VALW
PC48
2200P_0402_50V7K
2
1
B+
LG_1.8V
1
VOUT
FB
+1.25VSP
(3A,120mils ,Via NO.= 6)
PR150
59K_0402_1%
+1.8V
2
+VCCP
(6A,240mils ,Via NO.=12)
+1.5VS
(6A,240mils ,Via NO.=12)
7,13,14 V_DDR_MCH_REF
@ PR169
2
0_0603_5%
VIN
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
+5VALW
PR72
1K_0402_1%
PC63
10U_0805_10V4Z
1005_Add PR169 to separate V_DDR_MCH_REF from PU8.
+3VL
(100mA,20mils ,Via NO.= 1)
PAD-OPEN 4x4m
PC128
47P_0402_50V8J
PU8
1
PAD-OPEN 2x2m
+1.8V
PJP6
1
+3VLP
+1.05V_VCCP
,Via NO.= 1)
PJP4
PAD-OPEN 4x4m
PJP5
2
+1.25VS(500mA,40mils
PAD-OPEN 3x3m
PAD-OPEN 4x4m
PJP3
2
+3VALW
+1.25VSP
PC64
10U_0805_10V4Z
+1.8VP
(4.5A,180mils ,Via NO.= 9)
+5VALW
+3VALWP
PJP2
2
PC130
22U_1206_6.3V6M
PJP1
1
PR149
33.2K_0402_1%
APL5913-KAC-TRL_SO8
B
+5VALWP
PC129
10U_1206_6.3V6M
9
3
VIN
EN
VIN
VOUT
PC127
@ 0.01U_0402_16V7K
+1.5VS
PC126
1U_0603_6.3V6M
2
PR148
0_0402_5%
24,30,31,33,36 SUSP#
GND
PR71
10K_0603_0.1%
POK
1
2
PR147
@ 0_0402_5%
2
PC60
33P_0402_50V8J
PU13
VCNTL
PR70
1
2
27K_0603_0.1%
+5VALW
PC65
1U_0603_16V6K
G2992F1U_SO8
+0.9V
SUSP
1
PR60
0_0402_5%
+0.9VP
1
2
G
31
PR67
1K_0402_1%
PC67
10U_1206_6.3V7K
PAD-OPEN 3x3m
PC68
@0.1U_0402_16V7K
+0.9VP
PQ20
RHU002N06_SOT323-3
PJP8
1
2
PR73
@0_0402_5%
2
PAD-OPEN 4x4m
27,31 SYSON#
PJP7
+1.5VSP
2
1
PC66
0.1U_0402_16V7K
PAD-OPEN 4x4m
Compal Secret Data
Issued Date
<Issued_Date>
Deciphered Date
<Deciphered_Date>
5
Title

1.8VP/0.9VSP/2.5VSP
Size
Document Number
R ev
1.0
LA-4031P
D ate:

1
Sheet
35
of
42
PR76
75K_0402_1%
PR75
75K_0402_1%
1
2
PR77
29.4K_0402_1%
PR74
73.2K_0402_1%
1
2
5
6
7
8
PR78
0_0402_5%
PC131
PQ24
AO4468_SO8
3
2
1
DR VH1
21
DR VL2
PGND2
17
LL1
20
DR VL1
19
LX_1.05V
+1.05V_VCCP
LG_1.05V
PC74
4.7U_0805_6.3V6K
+
2
4
PQ25
FDS6690AS_NL_SO8
TPS51124RGER_QFN24_4x4
16
15
14
13
LL2
12
PL10
2.2UH_PCMC063T-2R2MN_8A_20%
<BOM Structure>
1
2
PC78
1
0.1U_0603_25V7K
11
PR84
0_0402_5%
1
2
BST_1.05V
UG_1.05V
PC73
220U_6.3VM_R15
VBST1
DR VH2
PR81
2
1
0_0402_5%
5
6
7
8
VBST2
PR85
16.5K_0402_1%
1
2
PR86
18.2K_0402_1%
1
PR88
3.3_0402_5%
2
PC80
1U_0603_10V6K
PC79
@1000P_0402_50V7K
PR87
0_0402_5%
2
1
VO1
GND
VFB1
23
22
PC76
4.7U_0805_6.3V6K
24,30,31,33,35 SUSP#
24
EN1
+
2
PGOOD1
3
2
1
10
VFB2
EN2
LX_1.5V
VO2
PGOOD2
220U_6.3VM_R15
PC75
UG_1.5V
VCCP_POK
PR82
0_0402_5%
1
2UG1_1.05V
PGND1
0.1U_0603_25V7K
BST_1.5V
18
SP8K10S FD5 2N SOP8
LG_1.5V
PR80
1
2
0_0402_5%
TRIP1
PR83
0_0402_5%
1 1
2
PC77
2
V5IN
UG1_1.5V
8
7
6
5
V5FILT
PL14
3.3UH_SIQB74B-3R3PF_5.9A_20%
+1.5VSP
D2
G2
D2
D1/S2/K
G1 D1/S2/K
S1/A D1/S2/K
TRIP2
PQ23
1
2
3
4
P PAD
TONSEL
PU9
25
0.1U_0603_16V7K
PR79
0_0402_5%
1
2
PC69
@2200P_0402_50V7K
2
1
PC70
10U_1206_25V6M
1
2
PC72
4.7U_1206_25V6K
B+++
PL9
FBMA-L11-322513-151LMA50T_1210
1
2
PC71
@2200P_0402_50V7K
2
1
B+
1
1
+5VALWP
PC81
4.7U_0805_10V6K
SUSP#
0_0402_5%
PR89
PC82
@1000P_0402_50V7K
Compal Secret Data
Issued Date
2006/11/23
Deciphered Date
2007/11/23
5
Title

1.2V_VP/1.5VSP/1.05VP
Size
Document Number
R ev
1.0
LA-4031P
D ate:

1
Sheet
36
of
42
CPU_B+
REF
39
DPRSLPVR
40
DPRSTP
10
CC1_CPU
21
DH2_CPU
BST2
20
BST2_CPU
PSI
LX2
22
LX2_CPU
PWRGD
DL2
24
DL2_CPU
CLKEN
PGND2
23
38
PR117
2K_0402_1%
SHDN
CSP2
14
VRHOT
CSN2
15
POUT
GNDS
13
PC105
2
1
1
2
1
PR129
2
10K_0402_5%
VSSSENSE
1
PR115
2
@3K_0603_1%
1
PR118
2
3.65K_0402_1%
NTC PR120
@3K_0603_1%
2
PR109
3.48K_0402_1%
10KB_0603_5%_ERTJ1VR103J
PC102
0.22U_0603_16V7K
1
PC103
PR121
@3K_0603_1%
1
PR124
20K_0402_1%
1
PR116
VCCSENSE
2
@0.022U_0402_16V7K
VCCSENSE 5
2
100_0402_5%
PC104
4700P_0402_25V7K
2
CPU_B+
PC106
470P_0402_50V8J
4
PQ30
VSSSENSE
SI7840DP-T1-E3_SO8
PR130
1
2.2_0603_5%
2
PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
PC111
0.1U_0402_16V7K
1
2
PD12
B340A_SMA2
1
2
PR131
4.7_1206_5%
PC112
680P_0603_50V7K
PQ32
FDS6676AS_SO8
1
2
1
PQ31
FDS6676AS_SO8
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8
POUT
2
@0_0402_5%
PR127
100_0402_5%
1
PR128
5
6
7
8
TP
MAX8770GTL+_TQFN40
H_PROCHOT#
3
2
1
CSP2_CPU
CSN2_CPU
PR126
@10K_0402_5%
CCI
DH2
11
NTC
PH2
PC110
2200P_0402_50V7K
2
1
FB1_CPU
CSN1_CPU
12
PD11
B340A_SMA2
1
16
FB
PC108
10U_1206_25V6M
2
1
CSN1
CCV
PR107
4.7_1206_5%
TIME
+VCC_CORE
PR105
2.1K_0603_1%
CSP1_CPU
PC101
680P_0603_50V7K
17
CSP1
PQ29
FDS6676AS_SO8
1
2
1
GND
D6
1
2
CLK_EN#
30 VR_ON
B
1
2
PR123 0_0402_5%
1
2
PR122 0_0402_5%
1
2
PR125
0_0402_5%
PC98
2
D5
1
15,20 VGATE
DL1_CPU
37
+3VS
PR119
1.91K_0402_1%
26
D
D
D
D
27
18
G
S
S
S
PGND1
H_PSI#
DL1
D4
36
D3
35
PC107
10U_1206_25V6M
2
1
5,7,19 H_DPRSTP#
34
+VCC_CORE
7,20 DPRSLPVR
D2
PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
3
2
1
LX1
28
33
SI7840DP-T1-E3_SO8
PR101 2.2_0603_5%
1
2
DH11_CPU
LX1_CPU
5
6
7
8
CPU_VID6
29
D
D
D
D
CPU_VID5
DH1
PR132
2.1K_0603_1%
NTC
PH3
PR133
3.48K_0402_1%
10KB_0603_5%_ERTJ1VR103J
A
1
PC113
2
0.22U_0603_16V7K

Title
+CPU_CORE
5
PQ27
G
S
S
S
D1
1
0_0402_5%
4
3
2
1
CPU_VID4
32
BST1_CPU 2
PR99
DL1_CPU
CPU_VID3
30
4
3
2
1
BST1
DL2_CPU
CPU_VID2
D0
PQ28
FDS6676AS_SO8
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8
31
BSTM2 CPU
CPU_VID1
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
2
1
PR108
88.7K_0402_1%
1
2
PC99
470P_0402_50V8J
1
2
PC100 0.22U_0603_16V7K
1
2
PR110
499_0402_1%
1
2
PR112
0_0402_5%
1
2
PR111
0_0402_5%
1
2
PC109
0.22U_0603_16V7K
2
PR98
2
PR100
2
PR97
2
PR102
2
PR104
2
PR103
2
PR106
25
TON
1000P_0402_50V7K
2
CPU_VID0
VDD
THRM
41
Vcc
0.22U_0603_16V7K
19
2
0_0402_5%
V CC
1
PR114
@470KB_0402_5%_ERTJ0EV474J
PH4
2
1
BSTM1 CPU
PU12
PC94
2200P_0402_50V7K
2
1
PC93
10U_1206_25V6M
2
1
PC95
100U_25V_M
PC92
10U_1206_25V6M
2
1
1
2
1
1
2
PC97
1U_0603_16V6K
2.2U_0603_6.3V6K
PR96
200K_0402_5%
PC90
PR95
13K_0402_5%
PR94
10_0402_5%
PC91
0.01U_0402_25V7K
B+
PL11
FBMA-L18-453215-900LMA90T_1812
+5VS
PC96
1000P_0402_50V7K
PC134
100U_25V_M
Size
Document Number
Custom
Date:
R ev
1.0
Sheet

1
37
of
42
BATT
BATT_DET 33
PR151
2
1
@1K_0402_5%
PD8
1
TYCO_C-1746706_6P
@SM05_SOT23
PC122
1000P_0402_50V7K
GND
EC_SMD
EC_SMC
5
4
3
2
SMD
SMC
RES
TS
BATT+
PCN2
PC123
0.01U_0402_50V4Z
PR152
6.49K_0402_1%
1
2
PD9
@SM24.TC_SOT23-3
+3VL
PR153
1K_0402_5%
2
PR138
100_0402_5%
BATT_TEMP 30
PR139
100_0402_5%
SMB_EC_DA1
SMB_EC_DA1 29,30
SMB_EC_CK1
SMB_EC_CK1 29,30
1
1
AIR_AC
AIR_AC 30,33
LM393DG_SO8
PR144
10K_0603_0.1%
PD10
RLZ4.3B_LL34
2
PR166
10K_0402_5%
PC124
0.047U_0402_16V7K
PU2B
1.24VREF
PR141
10K_0402_1%
PR165
VIN
133K_0402_1%
VIN
Compal Secret Data
Issued Date
<Issued_Date>
Deciphered Date
<Deciphered_Date>
A
Title

BATTERY CONN

Custom LA-4031P
Date:
Rev

D
Sheet
42
of
38
Version change list (P.I.R. List)
Item
Reason for change
Power section
Page 1 of 1
PG#
Modify List
Date
Phase
1
2
3
4
5
6
7
C
8
9
10
11
12
13
14
B
Compal Secret Data
Issued Date
2006/02/28
2007/02/28
Deciphered Date
5
Title

Changed-List History-1
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet

1
39
of
42
Version Change List ( P. I. R. List ) for HW Circuit
Item
Change item
Page
Date
Phase
Change R296 2.2K to 4.7K and Reserved R303
24
Follow conexant new design rule
8/6
SI-->PV
Add R424 R425 100ohm on MIC_EXT_R and MIC_EXT_L
26
Follow conexant new design rule
8/6
SI-->PV
Fine tune R298 C260 value
17
Reduce surge current on power on
8/6
SI-->PV
Change PIRQ from F to A
18
SI-->PV
Connect PCI_SERR# to EC GPIO pin.
Modify PC BEEP circuit.

For support Intel Penryn CPU.
18
20
04
8/31
8/31
9/3
SI-->PV
Choose R419 then control PIRQ A

Connect PCI_SERR# to EC GPIO pin.
Modify PC BEEP circuit.
Reserve R426 and R427 for support Intel Penryn CPU.
8/14
For ESD request.
28
Add U22 and U23 for ESD request.
9/3
SI-->PV
For EMI request.
26
Add L24~L27
9/5
SI-->PV
10
Change C391, C393, C395, C396 from 0.47uF to 0.047uF.

Add R417 and R418 to fine-tune Vp-p.
For ESD request.
26
26
20
9/7
9/7
9/7
SI-->PV
11
12
Change C391, C393, C395, C396 from 0.47uF to 0.047uF.

Add R417 and R418 to fine-tune Vp-p.
Add U22 and U23 for ESD request.
SI-->PV
SI-->PV
SI-->PV
SI-->PV
13
C
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
B
29
Compal Secret Data
Issued Date
2007/03/26
2007/02/28
Deciphered Date
5
Title

HW Changed-List History-1
Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet

1
40
of
42
Item
D
Change item
Page
Date
Phase
Solve Vref miss when entry S3 mode.
Stuff R43 and R46.
9/25
PV-->MV
Solve wave ripple on CRT and TV.
10
Change C439 from 0.47uF to 4.7uF.
9/25
PV-->MV
Solve RTC timing too exceed.
18
Change C262 and C263 from 12pF to 15pF.
9/25
PV-->MV
Reduce INT.MIC noise.
24
Add LPF (R429 and C452).
Solve S3 resume fail when use Micron DDR module.
35
Add PR169 to separate V_DDR_MCH_REF from PU8.
10/05
PV-->MV
Solve pop noise when entry or resume from S3.
24
Modify PC Beep (C373, R302, R306) circuit.
9/27
PV-->MV
Solve EMI fail for Memory module.
Change R34/R35 from 20 ohm to 30 ohm.
9/27
PV-->MV
ICH 1.5V power rail 700mA current requirement.
21
Change R252 package from 0603 to 0805.
10/04
PV-->MV
Remove U22 and U23.
28
Remove U22 and U23.
10/15
PV-->MV
10
For EMI request.
16
Change L2, L3, L4 to FBMA-L10-201209-121LMT_0805.
10/15
PV-->MV
11
To avoid too easy to open solder for CLRP2.
15
Change CLRP1 and CLRP2 type like the same as PJP4.
10/15
PV-->MV
12
Solve acoustic noise issue.
10
Change R64, R79 from 0 ohm to 1uH/400mA inductor.
10/22
PV-->MV
9/25
PV-->MV
13
14
15
C
16
17
18
19
20
21
22
23
24
25
26
27
28
B
29
30
31
32
33
34
35
36
37
38
Compal Secret Data
Issued Date
2007/03/26
2007/02/28
Deciphered Date
5
Title

Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet

1
41
of
42

Item
D
Change item
Page
Date
Phase
2
3
4
5
6
7
8
9
10
11
Compal Secret Data
Issued Date
2007/03/26
2007/02/28
Deciphered Date
5
Title

Size
Document Number
Rev
1.0
LA-4031P
Date:
Sheet

1
42
of
42

HP Compaq Presario c700 - Compal La-4031 Jbl81 - Rev 1.0 - Presente de Zouave

Diunggah oleh

Informasi Dokumen

Deskripsi Asli:

Judul Asli

Hak Cipta

Format Tersedia

Bagikan dokumen Ini

Bagikan atau Tanam Dokumen

Opsi Berbagi

Apakah menurut Anda dokumen ini bermanfaat?

Apakah konten ini tidak pantas?

Hak Cipta:

Format Tersedia

HP Compaq Presario c700 - Compal La-4031 Jbl81 - Rev 1.0 - Presente de Zouave

Diunggah oleh

Hak Cipta:

Format Tersedia

A

Compal Secret Data

Compal Electronics, Inc.

Size Document Number

Wednesday, October 24, 2007

Spartan 1.1 (Merom +Crestline+ICH8)

USB Card Reader

AMP & Audio Jack

SATA HDD Connector

IDE ODD Connector

Power On/Off CKT.

Touch Pad CONN.

DC/DC Interface CKT.

Compal Secret Data

Power Circuit DC/DC

Compal Electronics, Inc.

Size Document Number

Wednesday, October 24, 2007

S5 S4/ Battery only

S5 S4/AC & Battery

: means Analog Ground

External PCI Devices

SMBUS Control Table

I2C / SMBUS ADDRESSING

CLOCK GENERATOR (EXT.)

BOM: 43152432L03(965GM) & 43152432L04(960GML) with card reader

BOM: 43152432L01(965GM) & 43152432L02(960GML) without card reader

Compal Electronics, Inc.

Wednesday, October 24, 2007

Thermal Sensor ADM1032ARMZ

H_THERMDA, H_THERMDC routing together,

For Merom, R14 and R15 are 0ohm

PWM Fan Control circuit

SP02000D000 S W-CONN ACES 85204-02001 2P P1.25

Merom Ball-out Rev 1a

SP07000FP00 S SOCKET TYCO 2-1871873-2 478P H3 CPU

Compal Secret Data

Compal Electronics, Inc.

Wednesday, October 24, 2007

Merom Ball-out Rev 1a

Resistor placed within

Merom Ball-out Rev 1a

Near pin B26

Length match within 25 mils.

Close to CPU pin AD26

Close to CPU pin

Compal Secret Data

Compal Electronics, Inc.

Wednesday, October 24, 2007

Merom Ball-out Rev 1a

Mid Frequence Decoupling

ESR <= 1.5m ohm

Near CPU CORE regulator

1000U 2.5V M H80 LESR8M

Place these inside

Compal Secret Data

Compal Electronics, Inc.

Wednesday, October 24, 2007

0925_Stuff R43 and R46.

Compal Secret Data

0927_Change from 20 ohm to 30 ohm.

within 100 mils from NB