Scribd Logo
Unggah

Selamat datang di Scribd!

  • Assignment 4

    Diunggah oleh

    api-3864016
    20 tayangan1 halaman
    This document outlines an assignment for a VLSI design course. Students are asked to use L-Edit to layout two stick diagrams showing transistor arrangements, minimizing the area between transistors. They must determine the minimum area for each layout. Students also must draw Elmore Delay models for the n-type sections of each layout. The assignment is due on Saturday April 9th, 2005 at the beginning of lecture.

    Deskripsi Asli:

    Hak Cipta

    © Attribution Non-Commercial (BY-NC)

    Format Tersedia

    PDF, TXT atau baca online dari Scribd

    Apakah menurut Anda dokumen ini bermanfaat?

    Apakah konten ini tidak pantas?

    Laporkan Dokumen Ini
    This document outlines an assignment for a VLSI design course. Students are asked to use L-Edit to layout two stick diagrams showing transistor arrangements, minimizing the area between transistors. They must determine the minimum area for each layout. Students also must draw Elmore Delay models for the n-type sections of each layout. The assignment is due on Saturday April 9th, 2005 at the beginning of lecture.

    Hak Cipta:

    Attribution Non-Commercial (BY-NC)
    Unduh sebagai PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    20 tayangan1 halaman

    Assignment 4

    Diunggah oleh

    api-3864016
    This document outlines an assignment for a VLSI design course. Students are asked to use L-Edit to layout two stick diagrams showing transistor arrangements, minimizing the area between transistors. They must determine the minimum area for each layout. Students also must draw Elmore Delay models for the n-type sections of each layout. The assignment is due on Saturday April 9th, 2005 at the beginning of lecture.

    Hak Cipta:

    Attribution Non-Commercial (BY-NC)
    Unduh sebagai PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    dari 1

    Assignment 4

    Fall 2004 / 2005


    Part 1:
    In the lab, use L-Edit to produce design rule correct layout for each of the following two stick
    diagrams. Determine the minimum area needed to produce each of the two layouts.

    Make sure that the area between adjacent transistors is the minimum possible.

    VDD

    B C A B C A D

    OUT

    B C A B D A C

    GND

    VDD

    B C A B C A D

    OUT

    B C A B C A D

    GND

    Part 2:
    Draw the Elmore Delay model for the n-type section of each of the two layouts.

    Make sure your solution is neatly prepared and easy to follow and read.

    Due date: Saturday April 9th, 2005 at the beginning of the lecture.

    VLSI Design Dr. Bassel Soudan 1

    Anda mungkin juga menyukai