Appendix I

8085 Instruction Set in Op-Code Sequence d8 = 8-bit data value d16 = 16-bit data value a16 = 16-bit memory address p8 = 8-bit I/O port address Op Code 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F Op Code 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F Op Code 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F Op Code 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F

Mnemonic NOP LXI B,d16 STAX B INX B INR B DCR B MVI B,d8 RLC DAD B LDAX B DCX B INR C DCR C MVI C,d8 RRC LXI D,d16 STAX D INX D INR D DCR D MVI D,d8 RAL DAD D LDAX D DCX D INR E DCR E MVI E,d8 RAR

Mnemonic RIM LXI H,d16 SHLD a16 INX H INR H DCR H MVI H,d8 DAA DAD H LHLD a16 DCX H INR L DCR L MVI L,d8 CMA SIM LXI SP,d16 STA a16 INX SP INR M DCR M MVI M,d8 STC DAD SP LDA a16 DCX SP INR A DCR A MVI A,d8 CMC

Mnemonic MOV B,B MOV B,C MOV B,D MOV B,E MOV B,H MOV B,L MOV B,M MOV B,A MOV C,B MOV C,C MOV C,D MOV C,E MOV C,H MOV C,L MOV C,M MOV C,A MOV D,B MOV D,C MOV D,D MOV D,E MOV D,H MOV D,L MOV D,M MOV D,A MOV E,B MOV E,C MOV E,D MOV E,E MOV E,H MOV E,L MOV E,M MOV E,A

Mnemonic MOV H,B MOV H,C MOV H,D MOV H,E MOV H,H MOV H,L MOV H,M MOV H,A MOV L,B MOV L,C MOV L,D MOV L,E MOV L,H MOV L,L MOV L,M MOV L,A MOV M,B MOV M,C MOV M,D MOV M,E MOV M,H MOV M,L HLT MOV M,A MOV A,B MOV A,C MOV A,D MOV A,E MOV A,H MOV A,L MOV A,M MOV A,A

d8 = 8-bit data value d16 = 16-bit data value a16 = 16-bit memory address p8 = 8-bit I/O port address Op Code 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F Op Code A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF Op Code C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF Op Code E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF

Mnemonic ADD B ADD C ADD D ADD E ADD H ADD L ADD M ADD A ADC B ADC C ADC D ADC E ADC H ADC L ADC M ADC A SUB B SUB C SUB D SUB E SUB H SUB L SUB M SUB A SBB B SBB C SBB D SBB E SBB H SBB L SBB M SBB A

Mnemonic ANA B ANA C ANA D ANA E ANA H ANA L ANA M ANA A XRA B XRA C XRA D XRA E XRA H XRA L XRA M XRA A ORA B ORA C ORA D ORA E ORA H ORA L ORA M ORA A CMP B CMP C CMP D CMP E CMP H CMP L CMP M CMP A

Mnemonic RNZ POP B JNZ a16 JMP a16 CNZ a16 PUSH B ADI d8 RST 0 RZ RET JZ a16 CZ a16 CALL a16 ACI d8 RST 1 RNC POP D JNC a16 OUT p8 CNC a16 PUSH D SUI d8 RST 2 RC JC a16 IN p8 CC a16 SBI d8 RST 3

Mnemonic RPO POP H JPO a16 XTHL CPO a16 PUSH H ANI d8 RST 4 RPE PCHL JPE a16 XCHG JPR a16 XRI d8 RST 5 RP POP PSW JP a16 DI CP a16 PUSH PSW ORI d8 RST 6 RM SPHL JM a16 EI CM a16 CPI d8 RST 7

Appendix II
8085 Instruction Set by Functional Groups d8 = 8-bit data value d16 = 16-bit data value a16 = 16-bit memory address p8 = 8-bit I/O port address Data Transfer Instructions Op Mnemonic Code Mnemonic
MOV A,A MOV A,B MOV A,C MOV A,D MOV A,E MOV A,H MOV A,L MOV A,M MOV B,A MOV B,B MOV B,C MOV B,D MOV B,E MOV B,H MOV B,L MOV B,M MOV C,A MOV C,B MOV C,C MOV C,D MOV C,E MOV C,H MOV C,L MOV C,M 7F 78 79 7A 7B 7C 7D 7E 47 40 41 42 43 44 45 46 4F 48 49 4A 4B 4C 4D 4E MOV D,A MOV D,B MOV D,C MOV D,D MOV D,E MOV D,H MOV D,L MOV D,M MOV E,A MOV E,B MOV E,C MOV E,D MOV E,E MOV E,H MOV E,L MOV E,M MOV H,A MOV H,B MOV H,C MOV H,D MOV H,E MOV H,H MOV H,L MOV H,M

Op Code
57 50 51 52 53 54 55 56 5F 58 59 5A 5B 5C 5D 5E 67 60 61 62 63 64 65 66

Mnemonic
MOV L,A MOV L,B MOV L,C MOV L,D MOV L,E MOV L,H MOV L,L MOV L,M MOV M,A MOV M,B MOV M,C MOV M,D MOV M,E MOV M,H MOV M,L MVI A,d8 MVI B,d8 MVI C,d8 MVI D,d8 MVI E,d8 MVI H,d8 MVI L,d8 MVI M,d8

Op Code
6F 68 69 6A 6B 6C 6D 6E 77 70 71 72 73 74 75 3E 06 0E 16 1E 26 2E 36

Mnemonic
LXI B,d16 LXI D,d16 LXI H,d16 LXI SP,d16 LDA a16 LDAX B LDAX D LHLD a16 STA a16 STAX B STAX D SHLD a16 XCHG

Op Code
01 11 21 31 3A 0A 1A 2A 32 02 12 22 EB

Arithmetic Instructions Op Mnemonic Code Mnemonic ADD A 87 SUB A ADD B 80 SUB B ADD C 81 SUB C ADD D 82 SUB D ADD E 83 SUB E ADD H 84 SUB H ADD L 85 SUB L ADD M 86 SUB M ADI d8 C6 SUI d8 ADC A 8F SBB A ADC B 88 SBB B ADC C 89 SBB C ADC D 8A SBB D ADC E 8B SBB E ADC H 8C SBB H ADC L 8D SBB L ADC M 8E SBB M ACI d8 CE SBI d8

Op Code 97 90 91 92 93 94 95 96 D6 9F 98 99 9A 9B 9C 9D 9E DE

Mnemonic INR A INR B INR C INR D INR E INR H INR L INR M DCR A DCR B DCR C DCR D DCR E DCR H DCR L DCR M

Op Code 3C 04 0C 14 1C 24 2C 34 3D 05 0D 15 1D 25 2D 35

Mnemonic INX B INX D INX H INX SP DCX B DCX D DCX H DCX SP DAD B DAD D DAD H DAD SP DAA

Op Code 03 13 23 33 0B 1B 2B 3B 09 19 29 39 27

Logic and Bit Manipulation Instructions Op Op Mnemonic Code Mnemonic Code

ANA A ANA B ANA C ANA D ANA E ANA H ANA L ANA M ANI d8 ORA A ORA B ORA C ORA D ORA E ORA H ORA L ORA M ORI d8 A7 A0 A1 A2 A3 A4 A5 A6 E6 B7 B0 B1 B2 B3 B4 B5 B6 F6 XRA A XRA B XRA C XRA D XRA E XRA H XRA L XRA M XRI d8 CMP A CMP B CMP C CMP D CMP E CMP H CMP L CMP M CPI d8 AF A8 A9 AA AB AC AD AE EE BF B8 B9 BA BB BC BD BE FE

Mnemonic
RLC RRC RAL RAR CMA STC CMC

Op Code
07 0F 17 1F 2F 37 3F

Branching Instructions Op Mnemonic Code Mnemonic

JMP a16 JNZ a16 JZ a16 JNC a16 JC a16 JPO a16 JPE a16 JP a16 JM a16 PCHL C3 C2 CA D2 DA E2 EA F2 FA E9 CALL a16 CNZ a16 CZ a16 CNC a16 CC a16 CPO a16 CPE a16 CP a16 CM a16

Op Code
CD C4 CC D4 DC E4 EC F4 FC

Mnemonic
RET RNZ RZ RNC RC RPO RPE RP RM

Op Code
C9 C0 C8 D0 D8 E0 E8 F0 F8

Mnemonic
RST 1 RST 2 RST 3 RST 4 RST 5 RST 6 RST 7

Op Code
C7 CF DF E7 EF F7 FF

Stack, I/O, and Machine Control Instructions Op Op Mnemonic Code Mnemonic Code Mnemonic
PUSH B PUSH D PUSH H PUSH PSW XTHL SPHL C5 D5 E5 F5 E3 F9 POP B POP D POP H POP PSW C1 D1 E1 F1 OUT p8 IN p8 DI EI

Op Code
D3 DB F3 FB

Mnemonic
RIM SIM NOP HLT

Op Code
20 30 00 76