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A

DBQ01 Rev0.1 Schematics Document

Intel Prescott uFCPGA-478 / P4 Northwood


with Springdale / ICH5 / nVIDIA NV34M/31M chipset
2003/07/01
3

Title
Size
B
D ate:
A

Compal Electronics, Inc.


Cover Sheet

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
E

of

56

Compal Confidential

Desktop Prescott uFCPGA-478 CPU


Desktop Northwood uFCPGA-478 CPU

Fan Control

File Name : DBQ01

page 45

Thermal Sensor
ADM1032AR

page 4,5,6

page 5

CRT Connector

H_A#(3..31)

page 22

LVDS Interface

page 22

TV OUT Connector
(4Pin Reverse)
page 22

VGA
AGP BUS(8X)
NV31M/34M

PSB

Clock Generator
ICS 952623
page 15

H_D#(0..63)

400/533/667/800MHz

Memory BUS(DDR)
DDR-SO-DIMM X2

Intel Springdale MCH

BANK 0, 1, 2, 3page 12,13,14

FCBGA-932

page 16,17,
PIRQA# 18,19

page 7,8,9,10,11

2.5V DDR- 200/266

USB2.0

USB Conn *4
page 37

VRAM DDR
32MB/64MB (FBGA)

Hub-Link

MDC & BT Conn

page 20,21

IDSEL: AD18
PIRQC#, PIRQD#
GNT1#, REQ1#

IEEE 1394
TSB43AB21

Mini PCI
socket

page 30

page 29

RTC CKT.

AC97 Codec

3.3V 33 MHz

IDSEL: AD16
PIRQA#, GNT0#, REQ0#

page 38

Intel ICH5

AC-LINK
ATA-100
Primary IDE

mBGA-460

CardBus Controller
Toshiba TC6385XB

Audio AMP
page 32

Secondary IDE
ATA-100

page 23,24,25

master

page 27,28

page 26

page 32

page 31

IDSEL: AD17
IDSEL: AD20
PIRQB#, GNT3#, REQ3# PIRQB#, SIRQ, GNT2#, REQ2#

LAN
RTL 8101L

HW EQ CKT

ALC202

PCI BUS

RJ45/11 CONN

Slot 0,1

SD Conn.

page 26

page 28

page 27

HDD
Connector
page

35

master/slave

LPC BUS

Audio DJ
OZ-168
page 34

Power OK CKT.

SMsC LPC47N227

EC NS87591L

page 41

Super I/O

page 39

page 36

Module Conn.

Module Conn.

(Main Module)

Power On/Off CKT.

Int.KBD

Touch Pad

PARALLEL

page 39

page 44

EC I/O Buffer

BIOS (1MB)

page 40

page 35

Floppy

page 38

DC/DC Interface CKT.

(2nd Module)

page 35

FIR

page 40

page 37

Power Circuit DC/DC


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Compal Electronics, Inc.


Document Number

Block Diagram

R ev
0.1

LA-2041
Date:

, 09, 2003

Sheet

of

56

Voltage Rails

SIGNAL

STATE

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+CPU_VID

1.2V switched power rail for CPU AGTL Bus

ON

OFF

OFF

+VTT_GMCH

+1.225V (Prescott) / +1.45V (Northwood)

ON

OFF

OFF

+VGA_CORE

1.3V switched power rail for VGA chip

ON

OFF

OFF

+1.25VS

1.25V switched power rail

ON

OFF

OFF

+1.5VS

AGP 4X/8X

ON

OFF

OFF

+2.5V

2.5V power rail

ON

ON

OFF

+2.5VS

2.5V switched power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3V

3.3V power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5V

5V power rail

ON

ON

OFF

+5VS

5V switched power rail

ON

OFF

OFF

+12VALW

12V always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

+VALW

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

Full ON

Board ID Table for AD channel


Vcc
Ra
Board ID

0
1
2
3
4
5
6
7

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

External PCI Devices


Device

IDSEL#

REQ#/GNT#

Interrupts
PIRQA

VGA
C ardB us

AD20

PIRQA/PIRQB
PI RQB

LAN

A D17

Mini-PCI

AD18

1/4

PIRQC/PIRQD

1 3 94

AD16

PIRQA

SD

AD22

Board ID
0
1
2
3
4
5
6
7

EC SM Bus1 address

EC SM Bus2 address

Device

Address

Device

Address

Smart Battery

0001 011X b

ADM1032

1001 110X b

EEPROM(24C16/02)

1010 000X b

OZ168

0011 0100 b

(24C04)

PCB Revision
0.1

1011 000Xb

ICH5 SM Bus address


4

Device

Address

Clock Generator
( ICS 952623)

1101 001Xb

DDR DIMM0

1001 000Xb

DDR DIMM2

1001 001Xb

Title

Compal Electronics, Inc.


Notes

Size
B
D ate:
A

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
E

of

56

+ CPU_CORE

A10
A12
A14
A16
A18
A20
A8
AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19
B7
B9
C10
C12
C14
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
7 H _ADS#

R 43
1
1
R103

+ CPU_CORE
+ CPU_CORE
7
7
7
7

@62_0402_5%
2
2
200_0402_5%

H _ IERR#

AC1
V5
AA3
AC3
H6
D2
G2
G4

H_BR0#
H _BPRI#
H _ BNR#
H_LOCK#

15 CLK_BCLK
15 CLK_BCLK#

J1
K5
J4
J3
H3
G1

CLK_BC LK
CLK_BC LK#

AF22
AF23

F3
E3
E2

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#
AP#0
AP#1
BINIT#
IERR#
BR0#
BPRI#
BNR#
LOCK#
BCLK0
BCLK1

HIT#
HITM#
DEFER#

AMP_3-1565030-1_Prescott

H1
H4
H23
H26
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8

VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55

7 H_HIT#
7 H_HITM#
7 H _DEFER#

Prescott

VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_80
VCC_79
VCC_78
VCC_77
VCC_76
VCC_75
VCC_74

7 H_REQ#[0..4]

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

BOOTSELECT

K2
K4
L6
K1
L3
M6
L2
M3
M4
N1
M1
N2
N4
N5
T1
R2
P3
P4
R3
T2
U1
P6
U3
T4
V2
R6
W1
T5
U4
V3
W2
Y1
AB1

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8
D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

B21
B22
A23
A25
C21
D22
B24
C23
C24
B25
G22
H21
C26
D23
J21
D25
H22
E24
G23
F23
F24
E25
F26
D26
L21
G26
H24
M21
L22
J24
K23
H25
M23
N22
P21
M24
N23
M26
N26
N25
R21
P24
R25
R24
T26
T25
T22
T23
U26
U24
U23
V25
U21
V22
V24
W26
Y26
W25
Y23
Y24
Y21
AA25
AA22
AA24

H _D#0
H _D#1
H _D#2
H _D#3
H _D#4
H _D#5
H _D#6
H _D#7
H _D#8
H _D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[0..63] 7

F13
F15
F17
F19
F9
F11
E8
E20
E18
E16
E14
E12

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

AD1

7 H_A#[3..31]

VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73

J C PU1A

+CPU_CORE

53 BOOTSELECT

Reference Intel document


Desktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0

1
2
R 33
0_0402_5%

BOOTSEL

R_C

1
2
R 34
0_0402_5%

Pop: Northwood
Depop: Prescott

Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5


Pin number Northwood
Pin name
B6

FERR#

Commend

Pull-up 62ohm
to +VCC_CORE

Prescott
Pin name

Commend
Northwood

FERR#/PBE# Pull-up 62ohm


to +VCC_CORE

Prescott

P op

P op

AA20

ITPCLKOUT0 Pull-up56ohm
to +VCC_CORE

TESTHI6

Pull-up 62ohm
to +VCC_CORE

P op

P op

AB22

ITPCLKOUT1 Pull-up 56ohm


to +VCC_CORE

TESTHI7

Pull-up 62ohm
to +VCC_CORE

P op

P op

NC

VIDPWRGD

Pull-up 8.2Kohm
to +VCCVID

Depop

P op

Depop

P op

Depop

P op

A D2
A D3

NC

float
float

VID5

A F3

NC

float

VCCVIDLB

Pull-up1Kohm to
+3VRUN & connect
to PWRIC
Connect to +VCCVID

AD20

VCCA

Connect to CPU
Filter

VCCIOPLL

Connect to CPU
Filter

AF23

VCCIOPLL

Connect to CPU
Filter

VCCA

Connect to CPU
Filter

A D1

V SS

Connect to GND

BOOTSELECT CPU determine

P op

Depop

AE26

V SS

Connect to GND

OPTIMIZED/ float
COMPAT#

P op

Depop

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Compal Electronics, Inc.


Prescott Processor in uFCPGA478 (1/2)

Size
C
Date:

Document Number

R ev
0.1

LA-2041
T, 09, 2003

Sheet

of

56

+ CPU_CORE

Place near ICH

2 H _ FERR#
62_0402_5%

R 17

23 H_A20M#
23 H _ FERR#
23 H _IGNNE#
23 H_SMI#
23 H _P WRGOOD
23 H_STPCLK#
23
23
23
7

H _ FERR#
H _P WRGOOD

H_INTR
H_NMI
H_INIT#
H_RESET#

C6
B6
B2
B5
AB23
Y4
D1
E5
W5
AB25

H_RESET#

H5
H2
AD6
AD5

7 H _D BSY#
7 H _D R D Y#
15 CPU_CLKSEL0
15 CPU_CLKSEL1
H_THER MDA
H_THERM DC
+ CPU_CORE

R 305
R 307
R 308
R 306
R 309
R 310

A2

1
1
1
1
1
1

2
2
2
2
2
2

62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%

I TP_BPM#0
I TP_BPM#1
I TP_BPM#2
I TP_BPM#3
I TP_BPM#4
I TP_BPM#5

Note: Please change to 10uH, DC current


of 100mA parts and close to cap

Pop: Prescott
Depop: Northwood

1.Place cap within 600 mils of


the VCCA and VSSA pins.

A5
A4
AF3
AD22

CLK_ITP AC26
CLK_ITP# AD26

15 CLK_ITP
15 CLK_ITP#

COM P0
COM P1

R106
61.9_0603_1%
2

2.H_VCCIOPLL,HVCCA,HVSSA trace wide


12 mils(min)

2 V CCVIDLB
@0_0402_5%

L24
P1

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

AF26

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

TCK
TDI
TDO
TMS
TRST#

ADSTB#0
ADSTB#1
DBI#0
DBI#1
DBI#2
DBI#3

VCCIOPLL
VCCA
VCCSENSE
VSSSENSE
VCCVIDLB
VSSA
ITP_CLK0
ITP_CLK1
COMP0
COMP1

R 94
61.9_0603_1%

0_0402_5%

+CPU_CORE

H_T ESTHI0
H_T ESTHI1

R 21
R 65

1
1

2 62_0402_5%
2 62_0402_5%

H_T ESTHI2_7

R 20

2 62_0402_5%

H_T ESTHI8
H_T ESTHI9
H_T ESTHI10
H_T ESTHI11
H_T ESTHI12

R 52
R 57
R 61
R149
R 22

1
1
1
1
1

2
2
2
2
2

R1481
R 23 1

E22
K22
R22
W22

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

7
7
7
7

F21
J23
P23
W23

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

7
7
7
7

L5
R5

H_ADSTB#0 7
H_ADSTB#1 7

E21
G25
P26
V21

H _DINV#0
H _DINV#1
H _DINV#2
H _DINV#3

R150

62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%
62_0402_5%

@300_0402_5%

2 @0_0402_5%
2 @0_0402_5%

H _ CPUPERF# 24
H_DPSLP# 23

Pop: P4 Protability
Depop: Prescott/Northwood

7
7
7
7

AE25

DBR#

C3
V6
AB26

PROCHOT#
MCERR#
SLP#

F8
G21
G24
G3
G6
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
P2
P22
P25
P5
R1
R23
R26
R4
T21
T24
T3
T6
U2
U22
U25
U5
V1
V23
V26
V4
W21
W24
W3
W6
Y2
Y22
Y25
Y5

33U_D2_8M_R35

R 28

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

Prescott

THERMTRIP#

PLL Layout note :

53 V CCSENSE
53 VSSSENSE
+ CPUVID
2 Trace >= 25mils H_VSSA

LQG21F4R7N00_0805

THERMDA
THERMDC

R_G

R 18
1

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22
U6
W4
Y3
A6
AD25

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9
TESTHI10
TESTHI11
TESTHI12

DBSY#
DRDY#
BSEL0
BSEL1

Pop: Northwood
Depop: Prescott

AE26

OPTIMIZED/COMPAT#

LINT0
LINT1
INIT#
RESET#

+CPU_GTLREF

AA21
AA6
F20
F6

GTLREF0
GTLREF1
GTLREF2
GTLREF3

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

L8

AD20
AE23

H _ VCCA

C 22
2

D4
C1
D5
F7
E6

ITP_TMS
ITP_TRST#

LQG21F4R7N00_0805
2

AC6
AB5
AC4
Y6
AA5
AB4

I TP_TCK
I TP_TDI

+ CPU_CORE
L9
1

B3
C4

24 H_THERMTRIP#

J26
K25
K26
L25

DP#0
DP#1
DP#2
DP#3

7 H _ TRDY#

RS#0
RS#1
RS#2
RSP#
TRDY#

F1
G5
F4
AB2
J6

H_PROCHOT#

NC1
NC2
NC3
NC4
NC5

H_PROCHOT# 7,52
H_CPUSLP# 23

A22
A7
AF25
AF24
AE21

1
2
R 66
62_0402_5%

+ CPU_CORE

VCCVID

H_RS#0
H_RS#1
H_RS#2

0_0402_5%

AF4

2 H_RESET#
62_0402_5%

VIDPWRGD

1
R 63

7 H_RS#[0..2]

AD2

2 H _P WRGOOD
300_0402_5%

VID0
VID1
VID2
VID3
VID4
VID5

1
R 64

Place near CPU

VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128

2 H_PROCHOT#
130_0402_5%

AE5
AE4
AE3
AE2
AE1
AD3

1
R147

SKTOCC#

J C PU1B

AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B20
B23
B26
B4
B8
C11
C13
C15
C17
C19
C2
C22
C25
C5
C7
C9
D10
D12
D14
D16
D18
D20
D21
D24
D3
D6
D8
E1
E11
E13
E15
E17
E19
E23
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5

VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181

1
R255

AMP_3-1565030-1_Prescott

+3VS

Trace >= 25mils


1
2

+ CPUVID
C4
0.1U_0402_10V6K

R_E

H _VID5

RE
Pop: Prescott
Depop: Northwood
+ CPUVID

53
53
53
53
53
53

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5

H _VID0
H _VID1
H _VID2
H _VID3
H _VID4
H _VID5

R 19
@2.43K_0603_1%
1
2

H _VID4

1
R 24
1
R 27

H _VID3
H _VID2
H _VID1
H _VID0

5
6
7
8

H _V ID_PWRGD

2
1K_0402_5%
2
1K_0402_5%
R P5

4
3
2
1

1K_8P4R_1206_5%

+3V

R 654
10K_0402_5%
2

+3VS
VI D _PWRGD 53

+CPU_CORE

2. Place R_A and R_B near CPU.


3. Place decoupling cap 220PF near CPU.
+CPU_GMCH_GTLREF trace
wide 12mils(min),Space
15mils

1
2
C 83

SN74LVC125APWLE_TSSOP14
+3V POWER

2200P_0402_50V7K

R_A

+CPU_GTLREF

200_0603_1%
2

1K_8P4R_1206_5%
R 38

R_B

169_0603_1%

2
1

C8
0.1U_0402_10V6K

R 37
0_0603_5%

U1
2

H_THER MDA

3
8

34,39 EC_SMB_DA2

R 77
@10K_0402_5%

D+

VDD1

D-

ALERT#

SCLK

THERM#

SDATA

GND

1
6
4
5

ADM1032ARM_RM8
C7
220P_0402_50V8K

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

34,39 EC_SMB_CK2

Close to the CPU

0.1U_0402_16V4Z

1
2

C 73

E NLL 50,53

H_THERM DC

R 51

ITP_TMS
ITP_TRST#
I TP_TCK
I TP_TDI

8
7
6
5

R P88
1
2
3
4

1. +CPU_GTLREF Trace wide


12mils(min),Space 15mils

2
0_0402_5%

+CPU_GMCH_GTLREF

H _V ID_PWRGD 6

U 51B

Layout note :

OE#

GTL Reference Voltage

1
R 655

Compal Electronics, Inc.


Prescott Processor in uFCPGA478 (2/2)

Size
C
Date:

Document Number

R ev
0 .1

LA-2041
T, 09, 2003

Sheet

of

56

Place 11 North of Socket(Stuff 8)


+CPU_CORE

1
C448
22U_1206_16V4Z

1
C 451
22U_1206_16V4Z

1
C466
22U_1206_16V4Z

1
C 86
22U_1206_16V4Z

1
C103
22U_1206_16V4Z

1
C 69
22U_1206_16V4Z

1
C 45
22U_1206_16V4Z

1
C116
22U_1206_16V4Z

1
C134
22U_1206_16V4Z

1
C141
22U_1206_16V4Z

C124
22U_1206_16V4Z

Place 12 Inside Socket(Stuff all)


+CPU_CORE

1
C483
22U_1206_16V4Z

1
C 482
22U_1206_16V4Z

1
C481
22U_1206_16V4Z

1
C480
22U_1206_16V4Z

1
C491
22U_1206_16V4Z

1
C494
22U_1206_16V4Z

1
C 493
22U_1206_16V4Z

1
C492
22U_1206_16V4Z

1
C488
22U_1206_16V4Z

C487
22U_1206_16V4Z

+CPU_CORE

1
C513
22U_1206_16V4Z

(H_1.78)

C 514
22U_1206_16V4Z

22uF depop reference


Springdale Customer Schematic R1.2 page82

Place 9 South of Socket(Unstuff all)

+CPU_CORE

1
C158
22U_1206_16V4Z

1
C 164
22U_1206_16V4Z

1
C 33
22U_1206_16V4Z

1
C 93
22U_1206_16V4Z

1
C 18
22U_1206_16V4Z

1
C 94
22U_1206_16V4Z

1
C 34
22U_1206_16V4Z

1
C 95
22U_1206_16V4Z

C 35
22U_1206_16V4Z

470uF _ERS10m ohm* 15,

ESR=0.5m ohm

+ CPU_CORE

1
C 204
470U_D4_2.5VM

1
C203
470U_D4_2.5VM

1
C205
470U_D4_2.5VM

1
C206
@470U_D4_2.5VM

1
C210
470U_D4_2.5VM

C 208
470U_D4_2.5VM

+ CPU_CORE

1
C 207
470U_D4_2.5VM

1
C209
470U_D4_2.5VM

1
C202
470U_D4_2.5VM

1
C518
470U_D4_2.5VM

+
2

1
C187
@470U_D4_2.5VM

C 188
@470U_D4_2.5VM

+CPU_CORE

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page239

1
+

1
C218
@470U_D4_2.5VM

+
2

1
C517
470U_D4_2.5VM

C524
@470U_D4_2.5VM

Decoupling Reference Requirement:


560uF Polymer, ESR:5m ohm(each) * 10
22uF X5R * 32

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Compal Electronics, Inc.


CPU Decoupling

Size
C
Date:

Document Number

R ev
0.1

LA-2041
T, 09, 2003

Sheet
1

of

56

U36A

4 H_A#[3..31]
+VTT_GMCH

D26
D30
L23
E29
B32
K23
C30
C31
J25
B31
E30
B33
J24
F25
D34
C32
F28
C34
J27
G27
F29
E28
H27
K24
E32
F31
G30
J26
G26

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

5 H_ADSTB#0
5 H_ADSTB#1

B29
J23
L22
C29
J21
B30
D28

HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADSTB0#
HADSTB1#

15 CLK_HCLK
15 CLK_HCLK#

B7
C7

1
2

R365
301_0603_1%
HD_S W ING

R369
102_0603_1%

C159
0.01U_0402_16V7K

HDR COMP

R362
24.9_0603_1%

4 H_REQ#[0..4]

5
5
5
5
5
5
5
5
5
5
5
5

+VTT_GMCH
+GMCH_GTLREF

+CPU_GMCH_GTLREF

R359

200_0603_1%

1
R647

2
0_0603_5%

GTL Reference Voltage


Layout note :
B

1
2

C160
220P_0402_50V8K

1. +GMCH_GTLREF Trace wide


12mils (min),Space 15mils.
2. Place decoupling cap 220PF near GMCH.

5 H_RS#[0..2]

H_D#[0..63] 4

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

Trace width 10mils,Space


7mils

H_DSTBP#0
H_DSTBN#0
H_DINV#0
H_DSTBP#1
H_DSTBN#1
H_DINV#1
H_DSTBP#2
H_DSTBN#2
H_DINV#2
H_DSTBP#3
H_DSTBN#3
H_DINV#3

4 H_ADS#
5 H_TRDY#
5 H _ D R DY#
4 H_DEFER#
4 H_HITM#
4 H_HIT#
4 H_LOCK#
4 H_BR0#
4 H_BNR#
4 H_BPRI#
5 H_DBSY#

H_RS#0
H_RS#1
H_RS#2

5 H_RESET#
24,42 SYS_PW ROK
HDR COMP
HD_S W ING
+GMCH_GTLREF

HCLKP
HCLKN

B19
C19
C17
L19
K19
L17
G9
F9
L14
D12
E12
C15

HDSTBP0#
HDSTBN0#
DINV0#
HDSTBP1#
HDSTBN1#
DINV1#
HDSTBP2#
HDSTBN2#
DINV2#
HDSTBP3#
HDSTBN3#
DINV3#

F27
D24
G24
L21
E23
K21
E25
B24
B28
B26
E27
G22
C27
B27
E8
AE14

ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BREQ0#
BNR#
BPRI#
DBSY#
RS0#
RS1#
RS2#
CPURST#
PWROK#

E24
C25
F23

HDRCOMP
HDSWING
HDVREF

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8

PROCHOT#

L20

BSEL0
BSEL1

L13
L12

SPRINGDALE_UFCBGA932

H _D#0
H _D#1
H _D#2
H _D#3
H _D#4
H _D#5
H _D#6
H _D#7
H _D#8
H _D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_PROCHOT#

H_PROCHOT# 5,52
MCH_CLKSEL0 15
MCH_CLKSEL1 15

U36F

AR32
AR29
AR27
AR25
AR23
AR20
AR16
AR13
AR11
AR9
AN32
AN30
AN28
AN26
AN24
AN22
AN20
AN18
AN16
AN14
AN12
AN10
AM35
AM29
AM27
AM25
AM23
AM21
AM19
AM17
AM15
AM13
AM11
AM9
AL32
AL1
AK28
AK26
AK24
AK22
AK20
AK18
AK16
AK14
AK12
AK10
AK8
AK3
AJ35
AJ32
AJ9
AJ4
AJ1
AH33
AH30
AH24
AH22
AH20
AH18
AH16
AH14
AH12
AH10
AH6
AH3
AG35
AG32
AG28
AG26
AG24
AG22
AG20
AG18
AG16
AG14
AG8
AG4
AF33
AF30
AF25
AF24
AF22
AF20
AF18
AF16
AF14
AF11
AF9
AF6
AF3
AE35
AE32
AE26
AE25
AE13
AE12

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U36G

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AE11
AE10
AE4
AE1
AD33
AD30
AD28
AD10
AD9
AD8
AD6
AD3
AC35
AC32
AC4
AC1
AB33
AB30
AB28
AB27
AB26
AB10
AB9
AB8
AB6
AB3
AA32
AA4
AA1
Y35
Y33
Y30
Y28
Y27
Y26
Y10
Y9
Y8
Y6
Y3
W32
W18
W17
W4
V33
V30
V28
V27
V26
V19
V17
V10
V9
V8
V6
V3
U32
U19
U18
U4
T35
T33
T30
T28
T27
T26
T10
T9
T8
T6
T3
T1
R32
R4
R1
P33
P30
P28
P27
P26
P9
P8
P6
P3
N35
N32
N4
N1
M33
M30
M28
M27
M26
M6
M3
L35

L31
L26
L25
L24
K33
K29
K27
K25
K22
K20
K18
K16
K14
K12
K11
J35
J32
J28
J22
J20
J18
J16
J14
J12
J10
H33
H30
H26
H24
H22
H20
H18
H16
H14
H12
H9
H8
H5
H2
G35
G31
G28
F26
F24
F22
F20
F18

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

GND

FSB

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

F16
F14
F12
F10
F8
F5
F3
F1
E3
E1
D35
D33
D31
D29
D27
D25
D23
D21
D19
D17
D15
D13
D11
D9
D1
C28
C26
C24
C22
C20
C18
C16
C14
C12
C10
C8
C4
A32
A29
A27
A25
A23
A20
A16
A13
A11
A9
A7

SPRINGDALE_UFCBGA932

SPRINGDALE_UFCBGA932

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Springdale-Host/GND (1/4)
Size
B
D ate:

Compal Electronics, Inc.


Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
1

of

56

DDR A_SMA[0..12]

AP15
AP16

AL34
AM34
AP32
AP31
AM26

SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5

12,14 DDRA_SW E#
12,14 DDRA_SCAS#
12,14 DDRA_SRAS#

AB34
Y34
AC33

SWE_A#
SCAS_A#
SRAS_A#

SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15

AP14
AM14
AL18
AP19
AL14
AN15
AP18
AM18

12,14 DDRA_SBS0
12,14 DDRA_SBS1

AE33
AH34

SBA_A0
SBA_A1

SDQS_A2
SDM_A2

AP23
AM24

SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_A23

AP22
AM22
AL24
AN27
AP21
AL22
AP25
AP27

SDQS_A3
SDM_A3

AM30
AP30

SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31

AP28
AP29
AP33
AM33
AM28
AN29
AM31
AN34

SDQS_A4
SDM_A4

AF34
AF31

SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39

AH32
AG34
AF32
AD32
AH31
AG33
AE34
AD34

SDQS_A5
SDM_A5

V34
W33

SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47

AC34
AB31
V32
V31
AD31
AB32
U34
U33

SDQS_A6
SDM_A6

M32
M34

SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55

T34
T32
K34
K32
T31
P34
L34
L33

SDQS_A7
SDM_A7

H31
H32

SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63

J33
H34
E33
F33
K31
J34
G34
F34

12
12
12
12

2
1

DDRA_CLK1
DDRA_CLK1#
DDRA_CLK2
DDRA_CLK2#

+SM_VREF_A trace width of 12mils and space


12mils(min)

C528
2.2U_0805_16V4Z

SCMDCLK_A0
SCMDCLK_A0#
SCMDCLK_A1
SCMDCLK_A1#
SCMDCLK_A2
SCMDCLK_A2#
SCMDCLK_A3
SCMDCLK_A3#
SCMDCLK_A4
SCMDCLK_A4#
SCMDCLK_A5
SCMDCLK_A5#
SMVREF_A

AK9

SMXRCOMP

C522

SMXRCOMPVOH

AN9

SMXRCOMPVOH

0.1U_0402_16V4Z

SMXRCOMPVOL

AL9

SMXRCOMPVOL

+2.5V

Trace width of 12mils and space


10mils(min)
R151
40.2_0603_1%

Change to 42.2_1%
SMXRCOMP

C201
2.2U_0805_16V4Z

AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AM16
AL16
P31
P32

SMXRCOMP

SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3

E34

Close to GMCH(E34)

AL20
AN19
AM20
AP20

R152
40.2_0603_1%

Place resistors within


1.0 inch of GMCH (AK9)

Change to 42.2_1%
A

DD RA_SDQ8
DD RA_SDQ9
D DRA_SDQ10
D DRA_SDQ11
D DRA_SDQ12
D DRA_SDQ13
D DRA_SDQ14
D DRA_SDQ15

2
2
DDRA_SDQS2 12,14
DDRA_SDM2 12,14

D DRA_SDQ16
D DRA_SDQ17
D DRA_SDQ18
D DRA_SDQ19
D DRA_SDQ20
D DRA_SDQ21
D DRA_SDQ22
D DRA_SDQ23

Trace width of 12mils and space


10mils(min)

+2.5V

C523

2.2U_0805_16V4Z

R390
10K_0603_1%

C777
0.1U_0402_16V4Z

1
2

SMXRCOMPVOH

C533
1U_0603_10V6K

R391
30.9K_0603_1%

C196
0.01U_0402_16V7K

Close to Pin AN9


C

Close to GMCH <1"

DDRA_SDQS3 12,14
DDRA_SDM3 12,14

* Change to 31.12K

D DRA_SDQ24
D DRA_SDQ25
D DRA_SDQ26
D DRA_SDQ27
D DRA_SDQ28
D DRA_SDQ29
D DRA_SDQ30
D DRA_SDQ31

Follow Intel design guide


R1.11(12474) page124,125

DDRA_SDQS4 12,14
DDRA_SDM4 12,14
D DRA_SDQ32
D DRA_SDQ33
D DRA_SDQ34
D DRA_SDQ35
D DRA_SDQ36
D DRA_SDQ37
D DRA_SDQ38
D DRA_SDQ39
DDRA_SDQS5 12,14
DDRA_SDM5 12,14
D DRA_SDQ40
D DRA_SDQ41
D DRA_SDQ42
D DRA_SDQ43
D DRA_SDQ44
D DRA_SDQ45
D DRA_SDQ46
D DRA_SDQ47

+2.5V

2
DDRA_SDQS6 12,14
DDRA_SDM6 12,14
D DRA_SDQ48
D DRA_SDQ49
D DRA_SDQ50
D DRA_SDQ51
D DRA_SDQ52
D DRA_SDQ53
D DRA_SDQ54
D DRA_SDQ55

C217

Trace width of 12mils and space


10mils(min)

SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#

DDRA_SDQS1 12,14
DDRA_SDM1 12,14

2.2U_0805_16V4Z

R153
30.9K_0603_1%

*
2

DD RA_CKE0
DD RA_CKE1

12,14 DDRA_CKE0
12,14 DDRA_CKE1

AA34
Y31
Y32
W34

DDRA_SDQS7 12,14
DDRA_SDM7 12,14

SMXRCOMPVOL

D DRA_SCS#0
D DRA_SCS#1

DDRA_SDQ[0..63] 12,14

SDQS_A1
SDM_A1

DDRA_SD Q[0..63]

DDRA_SDQS0 12,14
DDRA_SDM0 12,14

DD RA_SDQ0
DD RA_SDQ1
DD RA_SDQ2
DD RA_SDQ3
DD RA_SDQ4
DD RA_SDQ5
DD RA_SDQ6
DD RA_SDQ7

AN11
AP12
AP10
AP11
AM12
AN13
AM10
AL10
AL12
AP13

SDQS_A0
SDM_A0
SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7

SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12

DDR Channel A

AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24
AJ33
AN23
AN21

12,14 DDRA_SCS#0
12,14 DDRA_SCS#1

U36B
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12

C220
1U_0603_10V6K

R154
10K_0603_1%

1
2

12,14 DDRA_SMA[0..12]

+SM_VREF_A

C190
0.01U_0402_16V7K

Close to Pin AL9

D DRA_SDQ56
D DRA_SDQ57
D DRA_SDQ58
D DRA_SDQ59
D DRA_SDQ60
D DRA_SDQ61
D DRA_SDQ62
D DRA_SDQ63

Close to GMCH <1"

SPRINGDALE_UFCBGA932

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B
D ate:

Compal Electronics, Inc.


Springdale-DDR Interface-A(2/5)

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
1

of

56

DDR B_SMA[0..12]

13,14 DDRB_CKE0
13,14 DDRB_CKE1

U26
T29
V25
W25

SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#

DD RB_CKE0
DD RB_CKE1

AK19
AF19
AG19
AE18

SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3

SM_VREF_B and SM_VREF_A


are connected inside GMCH.

DDRB_CLK1
DDRB_CLK1#
DDRB_CLK2
DDRB_CLK2#

+SM_VREF_B

+2.5V

2
1

R392

+SM_VREF_B trace width of


12mils and space
12mils(min)
C539

AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30

SM YRCOMP

2.2U_0805_16V4Z

AP9

SMVREF_B

AA33

SMYRCOMP

SM YRCOMPVOH

R34

SMYRCOMPVOH

SMYRCOMPVOL

R33

SMYRCOMPVOL

150_0603_1%

2
R396

C547
2.2U_0805_16V4Z

C200
0.1U_0402_16V4Z

150_0603_1%

Close to GMCH(AP9)

+2.5V

2
R399
40.2_0603_1%

Change to 42.2_1%

Change to 42.2_1%

C553
2.2U_0805_16V4Z

Trace width of 12mils


and space 10mils(min)

SM YRCOMP

R400
40.2_0603_1%

SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#

Place resistors within


1.0 inch of GMCH (AA33)

SDQS_B2
SDM_B2

AG21
AE21

SDQ_B16
SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_B21
SDQ_B22
SDQ_B23

AE19
AE20
AG23
AK23
AL19
AK21
AJ24
AE22

SDQS_B3
SDM_B3

AH27
AJ28

DDRB_SDQS1 13,14
DDRB_SDM1 13,14
DD RB_SDQ8
DD RB_SDQ9
D DRB_SDQ10
D DRB_SDQ11
D DRB_SDQ12
D DRB_SDQ13
D DRB_SDQ14
D DRB_SDQ15

+2.5V

D DRB_SDQ16
D DRB_SDQ17
D DRB_SDQ18
D DRB_SDQ19
D DRB_SDQ20
D DRB_SDQ21
D DRB_SDQ22
D DRB_SDQ23

2
1

AK25
AH26
AG27
AF27
AJ26
AJ27
AD25
AF28

SDQS_B4
SDM_B4

AD29
AC31

SDQ_B32
SDQ_B33
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39

AE30
AC27
AC30
Y29
AE31
AB29
AA26
AA27

SDQS_B5
SDM_B5

U30
U31

SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47

AA30
W30
U27
T25
AA31
V29
U25
R27

SDQS_B6
SDM_B6

L27
M29

SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55

P29
R30
K28
L30
R31
R26
P25
L32

SDQS_B7
SDM_B7

J30
J31

SDQ_B56
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63

K30
H29
F32
G33
N25
M25
J29
G32

2.2U_0805_16V4Z

2
1

C778

Trace width of 12mils and space


10mils(min)
R394
10K_0603_1%

0.1U_0402_16V4Z

1
DDRB_SDQS3 13,14
DDRB_SDM3 13,14

SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_B31

C541

DDRB_SDQS2 13,14
DDRB_SDM2 13,14

D DRB_SCS#0
D DRB_SCS#1

13
13
13
13

SBA_B0
SBA_B1

SDQ_B8
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15

AE17
AL13
AK17
AL17
AK13
AJ14
AJ16
AJ18

DDRB_SDQ[0..63] 13,14

D DRB_SDQ24
D DRB_SDQ25
D DRB_SDQ26
D DRB_SDQ27
D DRB_SDQ28
D DRB_SDQ29
D DRB_SDQ30
D DRB_SDQ31

SM YRCOMPVOH

Y25
AA25

13,14 DDRB_SBS0
13,14 DDRB_SBS1

AG13
AG15

DDRB_SD Q[0..63]

C546
1U_0603_10V6K

R398
30.9K_0603_1%

SWE_B#
SCAS_B#
SRAS_B#

SDQS_B1
SDM_B1

DDRB_SDQS0 13,14
DDRB_SDM0 13,14

DD RB_SDQ0
DD RB_SDQ1
DD RB_SDQ2
DD RB_SDQ3
DD RB_SDQ4
DD RB_SDQ5
DD RB_SDQ6
DD RB_SDQ7

0.01U_0402_50V7K

Close to Pin R14

DDRB_SDQS4 13,14
DDRB_SDM4 13,14
D DRB_SDQ32
D DRB_SDQ33
D DRB_SDQ34
D DRB_SDQ35
D DRB_SDQ36
D DRB_SDQ37
D DRB_SDQ38
D DRB_SDQ39
DDRB_SDQS5 13,14
DDRB_SDM5 13,14
D DRB_SDQ40
D DRB_SDQ41
D DRB_SDQ42
D DRB_SDQ43
D DRB_SDQ44
D DRB_SDQ45
D DRB_SDQ46
D DRB_SDQ47

+2.5V

2
1

C219

Trace width of 12mils and space


10mils(min)

2.2U_0805_16V4Z

DDRB_SDQS6 13,14
DDRB_SDM6 13,14
D DRB_SDQ48
D DRB_SDQ49
D DRB_SDQ50
D DRB_SDQ51
D DRB_SDQ52
D DRB_SDQ53
D DRB_SDQ54
D DRB_SDQ55

R163
30.9K_0603_1%

SMYRCOMPVOL

1
2

R164
10K_0603_1%

C223
1U_0603_10V6K

C211
0.01U_0402_50V7K

Close to Pin R33


Close to GMCH <1"

DDRB_SDQS7 13,14
DDRB_SDM7 13,14
D DRB_SDQ56
D DRB_SDQ57
D DRB_SDQ58
D DRB_SDQ59
D DRB_SDQ60
D DRB_SDQ61
D DRB_SDQ62
D DRB_SDQ63

SPRINGDALE_UFCBGA932

Title

C213

Close to GMCH <1"

W27
W31
W26

AF15
AG11
AJ10
AE15
AL11
AE16
AL8
AF12
AK11
AG12

SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5

SDQS_B0
SDM_B0
SDQ_B0
SDQ_B1
SDQ_B2
SDQ_B3
SDQ_B4
SDQ_B5
SDQ_B6
SDQ_B7

AE27
AD26
AL29
AL27
AE23
13,14 DDRB_SW E#
13,14 DDRB_SCAS#
13,14 DDRB_SRAS#

13,14 DDRB_SCS#0
13,14 DDRB_SCS#1

SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12

U36C
DDRB_SMA0 AG31
DDRB_SMA1
AJ31
DDRB_SMA2
AD27
DDRB_SMA3
AE24
DDRB_SMA4
AK27
DDRB_SMA5 AG25
DDRB_SMA6
AL25
DDRB_SMA7
AF21
DDRB_SMA8
AL23
DDRB_SMA9
AJ22
DDRB_SMA10 AF29
DDRB_SMA11 AL21
DDRB_SMA12 AJ20

DDR Channel B

13,14 DDRB_SMA[0..12]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Size
B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D ate:

Compal Electronics, Inc.


Springdale-DDR Interface-B(3/5)

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
1

of

56

+1.5VS

Change to 43.2_1%

Change to 52.3_1%

U36D

R116

R121
@10K_0402_5%

GRCOMP

HI_RCOMP_MCH

AGP_PAR

1: External AGP
0: Internal Graphics
+1.5VS

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

R353

16 AGP_RBF#
16 AGP_WBF#
16 AGP_DBIHI
16 AGP_DBILO
16 AGP_ST[0..2]

2
1

HI_SW ING_MCH

R368

147_0603_1%

C499

2 0.1U_0402_16V4Z

Close to GMCH(AE3)
C498
0.01U_0402_16V7K

GRCOMP
AGP_SW ING
+AGP_VREF

+AGP_VREF

226_0603_1%

AGP_ST0
AGP_ST1
AGP_ST2

23 HUB_HL[0..10]

R372

113_0603_1%

C500
0.1U_0402_16V4Z

Close to GMCH(AE2)
C503
0.01U_0402_16V7K

Close to GMCH ball <250mils

23 HUB_HLSTRF
23 HUB_HLSTRS

CLK_MCH_66M

+1.5VS

R337
@10_0402_5%

226_0603_1%

Note:
CI_SWING_MCH, CI_VREF_MCH
trace width of 10mils and
space 20mils

R122

0.8V

1
C147

R127

0.1U_0402_16V4Z

147_0603_1%

1
2

Close to GMCH(AF2)
C155
0.01U_0402_16V7K

change to 52.3_1%

Close to GMCH ball <250mils


CI_V REF_GMCH

1
C166

R130

0.1U_0402_16V4Z

+1.5VS

0.35V

113_0603_1%

1
B

C486
@10P_0402_50V8K

R375

Close to GMCH(AF4)
C165
0.01U_0402_16V7K

R92
+3VS
24 IC H _ SYNC#
13,23,26,27,29,30,36,39 PCIRST#

2
1
R692

54.9_0603_1%
CI_S W ING_GMCH
CI_V REF_GMCH

1
2
2
R134

0_0402_5%
10K_0402_5%
1
0_0402_5%

Close to GMCH ball <250mils

AGP

AC2
AC3
AD2

GRCOMP/DVOBCGCOMP
GVSWING
GVREF

R10
R9
M4
M5

GRBF
GWBF
DBI_HI
DBI_LO

N3
N5
N2

GADSTBF1
GADSTBS1#

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HISTRF
HISTRS

AD4
AE3
AE2

HI_RCOMP
HI_SWING
HI_VREF
CI0
CI1
CI2
CI3
CI4
CI5
CI6
CI7
CI8
CI9
CI10
CISTRF
CISTRS

AG2
AF2
AF4

CI_RCOMP
CI_SWING
CI_VREF

G4
AP8
AJ8
AK4

DREFCLK
EXTTS#
ICH_SYNC#
RSTIN#

AG10
AG9
AN35
AP34
AR1

0.1U_0402_16V4Z

2
1

1
2

+AGP_VREF = 0.3535

100_0603_1%

C127
0.01U_0402_16V7K

AGP_AD_STBF1 16
AGP_AD_STBS1 16
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

GSBA0#
GSBA1#
GSBA2#
GSBA3#
GSBA4#
GSBA5#
GSBA6#
GSBA7#
DDCA_DATA
DDCA_CLK

H3
F2

R88 2
R84 2

1 0_0402_5%
1 0_0402_5%

RED
RED#
GREEN
GREEN#
BLUE
BLUE#

F4
E4
H6
G5
H7
G6

R91 2

1 0_0402_5%

R1012

1 0_0402_5%

R1042

1 0_0402_5%

HSYNC
VSYNC

G3
E2

REFSET

D2

R3222

1 0_0402_5%

RESERVED_1
RESERVED_2
RESERVED_3
RESERVED_4
RESERVED_5

0.01U_0402_16V7K

Follow Springdale Chipset Platform Design guide Rev1.11(12474)


R55

V4
V5

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

C113

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20

A3
A33
A35
AF13
AF23
AJ12
AN1
AP2
AR3
AR33
AR35
B2
B25
B34
C1
C23
C35
E26
M31
R25

AGP_SB_STBF 16
AGP_SB_STBS 16
AGP_SBA[0..7] 16

Analog RGB/CRT guidelines for Springdale-P

Note:
Springdale Customer Schematic R1.2 page18
AGP_SWING only had 0.1u cap ; But Springdale
Chipset Platform Design guide Rev1.11(12474)
page138 had a 0.01uf cap. need confirm with
Intel.

Close GMCH ball (AD2)


less than 250mils

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SPRINGDALE_UFCBGA932

+AGP_VREF

1
2
R56
44.2_0603_1%

AGP_AD[0..31] 16

R6
P7
R3
R5
U9
U10
U5
T7

C9

U11
T11

Close GMCH ball (AC3) less than 250mils

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15

GSBSTBF
GSBSTBS#

AGP_SW ING
R32
39.2_0603_1%

AE6
AC11
AD5
AE5
AA10
AC9
AB11
AB7
AA9
AA6
AA5
W10
AA11
W6
W9
V7

AGP_AD_STBF0 16
AGP_AD_STBS0 16

GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

R31
60.4_0603_1%

AC6
AC5

AA2
Y4
Y2
W2
Y5
V2
W3
U3
T2
T4
T5
R2
P2
P5
P4
M2

GST0
GST1
GST2

AF5
AG3
AK2
AG5
AK5
AL3
AL2
AL4
AJ2
AH2
AJ3
AH5
AH4

AK7
AH7
AD11
AF7
AD7
AC10
AF8
AG7
AE9
AH9
AG6
AJ6
AJ5

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15

GFRAME
GCLKIN
GDEVSEL
GIRDY
GTRDY
GSTOP
GPAR/ADD_DETECT
GREQ
GGNT

+1.5VS

GADSTBF0
GADSTBS0#

CSA

CI_S W ING_GMCH

HI_RCOMP_MCH
HI_SW ING_MCH
HI_V REF_MCH

GCBE0
GCBE1
GCBE2
GCBE3

HUB

H UB_HL0
H UB_HL1
H UB_HL2
H UB_HL3
H UB_HL4
H UB_HL5
H UB_HL6
H UB_HL7
H UB_HL8
H UB_HL9
HUB_HL10

Close to GMCH ball <250mils


HI_V REF_MCH

Y7
W5
AA3
U2

U6
CLK_MCH_66M H4
AB4
V11
AB5
W11
AGP_PAR
AB2
N6
M7

16 AGP_FRAME#
15 CLK_MCH_66M
16 AGP_DEVSEL#
16 AGP_IRDY#
16 AGP_TRDY#
16 AGP_STOP#
16 AGP_PAR
16 AGP_REQ#
16 AGP_GNT#

51.1_0603_1%

2
D

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

16 AGP_C/BE#[0..3]
R123
43_0402_5%

+1.5VS

VGA

+1.5VS

Springdale-AGP/HUB/VGA/CSA (4/5)
Size
B
D ate:

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

10

of

56

+2.5V

Note:
Placed less than 100 mils from ball
Route to GMCH ball without via

+1.5VS

C174
22U_1206_10V4Z

C186
4.7U_0805_10V4Z

C169
0.1U_0402_10V6K

C238
0.1U_0402_10V6K

C191
0.1U_0402_10V6K

C198
0.1U_0402_10V6K

C172
0.1U_0402_10V6K

C195
0.1U_0402_10V6K

C199
0.1U_0402_10V6K

U36E

C490
0.47U_0603_16V7K

C496
0.47U_0603_16V7K

+VTT_GMCH

2
1

+2.5V
C535
0.1U_0402_10V6K

2
C552

C548
0.1U_0402_10V6K
VCC_D DR_DCAP5
2
1
VCC_D DR_DCAP4
1
0.22U_0603_10V7K

2
C532

C520
0.47U_0603_16V7K
VCC_D DR_DCAP1
2
1
1
0.22U_0603_10V7K

+3VS

C163
0.1U_0402_10V6K
VCC_AGP_DCAP2
2
1
+1.5VS

Trace 14mils

VTT_DCAP3
1
0.1U_0402_10V6K
V CCA_FSB
VCCA_DPLL
1 0_0402_5%
VCC A_DAC
1
0_0402_5%
VCC_D DR_DCAP2
1
2
C242
0.1U_0402_10V6K

2
C168
R321 2
2
R316
B

VCCA1P5_DDR_SM

(1A)

AA35
AL6
AL7
AM1
AM2
AM3
AM5
AM6
AM7
AM8
AN2
AN4
AN5
AN6
AN7
AN8
AP3
AP4
AP5
AP6
AP7
AR15
AR21
AR31
AR4
AR5
AR7
E35
R35

VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR

G1
G2

VCC_DAC
VCC_DAC

AG1
Y11

VCCA_AGP
VCCA_AGP

A31
B4
B3
C2

VCCA_FSB
VCCA_FSB
VCCA_DPLL
VCCA_DAC

AL35
AB25
AC25
AC26

VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

+1.5VS

+2.5V

J6
J7
J8
J9
K6
K7
K8
K9
L6
L7
L9
L10
L11
M8
M9
M10
M11
N9
N10
N11
P10
P11
R11
T16
T17
T18
T19
T20
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
Y20

1
2

C189
0.1U_0402_10V6K

J1
J2
J3
J4
J5
K2
K3
K4
K5
L1
L2
L3
L4
L5
Y1

VSSA_DAC

D3

0.1U_0402_10V6K

C222
0.1U_0402_10V6K

C175
0.1U_0402_10V6K

C99
0.1U_0402_10V6K

+1.5VS

1
2

C171
0.1U_0402_10V6K

C112
0.1U_0402_10V6K

C135
0.1U_0402_10V6K

+1.5VS

+ C72

C125
0.1U_0402_10V6K

C106
0.1U_0402_10V6K

C181
0.1U_0402_10V6K

C167
0.1U_0402_10V6K

C143
0.1U_0402_10V6K

C184
0.1U_0402_10V6K

+VTT_GMCH

470U_D4_2.5VM

C157

C156

4.7U_0805_10V4Z

10U_1206_16V4Z

+ C28

470U_D4_2.5VM

C70
0.1U_0402_16V4Z

C47
4.7U_0805_10V4Z

C60
4.7U_0805_10V4Z

1
2

C42
1U_0603_6.3V6M

C26
0.47U_0603_16V4Z

Place at the output of the 1.5V VR


+1.5VS

+VTT_GMCH

+2.5V

1
C92
0.1U_0402_10V6K

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

C185

1
C126
0.1U_0402_10V6K

Place near ball


Y11,routing trace
from cap to ball

Place near GMCH

C183
0.1U_0402_10V6K

Place near GMCH

Note: Please change to 0.82uH, DC current


of 30mA parts and close to cap
+1.5VS
L21

Trace 14mils
VCC_AGP_DCAP1

2
R315
0_0603_5%

C117
0.1U_0402_10V6K

VCCA_FSB1

Trace 14mils
V CCA_FSB

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

LQG21F4R7N00_0805

SPRINGDALE_UFCBGA932

C32

A15
A21
A4
A5
A6
B5
B6
C5
C6
D5
D6
D7
E6
E7
F7

POWER

VTT_DCAP1
VTT_DCAP2

150U_D2_6.3VM

2
1

C475
0.1U_0402_16V4Z

Close to GMCH

Note:
Placed less than 100 mils from ball
Route to GMCH ball without via

Note: Please change to 1uH(0.54uH-D-IN), DC current


of 1000mA parts and close to cap

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page246,248

+1.5VS

Trace 50mils
Trace 35mils (under GMCH ball field)
Trace 35mils

2
R144

1 VCCA_ DDR
0_0603_5%

(1A)

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page84

1
L16

VCCA1P5_DDR_SM
2
0_0603_5%
(1A)
1

C197
22U_1206_16V4Z

2
1

C212
0.1U_0402_16V4Z

Close to GMCH
A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Compal Electronics, Inc.


Springdale-Decoupling (5/5)

Size
B
D ate:

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
1

11

of

56

DD RA_SDQS0
DD RA_SDQ6
DD RA_SDQ2
D DRA_SDQ12

DD RA_SDQ8
DD RA_SDQS1
D DRA_SDQ10
D DRA_SDQ15
8 DDRA_CLK1
8 DDRA_CLK1#

D DRA_SDQ20
D DRA_SDQ16
DD RA_SDQS2
D DRA_SDQ18
D DRA_SDQ19
D DRA_SDQ28
D DRA_SDQ29
DD RA_SDQS3
D DRA_SDQ30
D DRA_SDQ27
C

8,14 DDRA_CKE1

DD RA_CKE1
DDRA_SMA12
DDRA_SMA9
DDRA_SMA7
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

8,14 DDRA_SBS0
8,14 DDRA_SW E#
8,14 DDRA_SCS#0

DDRA_SMA10
DDRA_SBS0
DDRA_SW E#
D DRA_SCS#0
D DRA_SDQ36
D DRA_SDQ37

DD RA_SDQS4
D DRA_SDQ34
D DRA_SDQ35
D DRA_SDQ44
D DRA_SDQ41
DD RA_SDQS5
D DRA_SDQ43
D DRA_SDQ46

D DRA_SDQ48
D DRA_SDQ53
DD RA_SDQS6
D DRA_SDQ54
D DRA_SDQ55
D DRA_SDQ60
D DRA_SDQ61
DD RA_SDQS7
D DRA_SDQ62
D DRA_SDQ59

13,15,23 ICH_SMB_DATA
13,15,23 ICH_SMB_CLK
+3VS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

JP26

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

KEYLINK_5762-3-111

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDRA _VREF
DD RA_SDQ5
DD RA_SDQ4
DDRA_SDM0
DD RA_SDQ7

1
2

+2.5V

C305
0.1U_0402_16V4Z

R204

DD RA_SDQ3
DD RA_SDQ9

DDR A_SMA[0..12]

8,14 DDRA_SMA[0..12]

DDRA_S DM[0..7]

8,14 DDRA_SDM[0..7]

D DRA_SDQ13
DDRA_SDM1

R203
75_0603_1%

D DRA_SDQ14
D DRA_SDQ11

D DRA_SDQ21
D DRA_SDQ17

System Memory Decoupling caps

+2.5V

DDRA_SDM2
D DRA_SDQ22

D DRA_SDQ23
D DRA_SDQ24

D DRA_SDQ25
DDRA_SDM3

C331
22U_1206_10V4Z

C314
0.1U_0402_10V6K

C339
0.1U_0402_10V6K

1
2

C312
0.1U_0402_10V6K

C337
0.1U_0402_10V6K

1
2

C311
0.1U_0402_10V6K

C336
0.1U_0402_10V6K

D DRA_SDQ26
D DRA_SDQ31
+2.5V

1
2

DD RA_CKE0

C310
0.1U_0402_10V6K

1
2

C335
0.1U_0402_10V6K

C334
0.1U_0402_10V6K

C308
0.1U_0402_10V6K

1
2

C333
0.1U_0402_10V6K

C307
0.1U_0402_10V6K

1
2

C332
0.1U_0402_10V6K

C306
0.1U_0402_10V6K

DDRA_CKE0 8,14

DDRA_SMA11
DDRA_SMA8
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1
D DRA_SRAS#
D DRA_SCAS#
D DRA_SCS#1

DDRA_SBS1 8,14
DDRA_SRAS# 8,14
DDRA_SCAS# 8,14
DDRA_SCS#1 8,14

D DRA_SDQ32
D DRA_SDQ33

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*14
B

DDRA_SDM4
D DRA_SDQ38

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)pag 271 each DIMM(two) requirement 0.1uF*42

D DRA_SDQ39
D DRA_SDQ40
D DRA_SDQ45
DDRA_SDM5
D DRA_SDQ42
D DRA_SDQ47
DDRA_CLK2# 8
DDRA_CLK2 8
D DRA_SDQ49
D DRA_SDQ52
DDRA_SDM6
D DRA_SDQ51
D DRA_SDQ50
D DRA_SDQ56
D DRA_SDQ57
DDRA_SDM7
D DRA_SDQ63
D DRA_SDQ58

SO-DIMM 0
REVERSE

Compal Electronics, Inc.


Title

H = 5.2mm
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DDRA_SD QS[0..7]

8,14 DDRA_SDQS[0..7]

75_0603_1%

Close to SO-DIMM

DDRA_SD Q[0..63]

8,14 DDRA_SDQ[0..63]

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

DDRA_VREF trace width of


12mils and space 12mils(min)

DD RA_SDQ0
DD RA_SDQ1

+2.5V

+2.5V

DDR-SODIMM SLOT1
Size
D ate:

Document Number

LA-2041

P , 09, 2003

R ev
0.1
Sheet

12

of

56

DD RB_SDQS0
DD RB_SDQ7
DD RB_SDQ5
DD RB_SDQ9

D DRB_SDQ12
DD RB_SDQS1
D DRB_SDQ10
D DRB_SDQ14
9 DDRB_CLK1
9 DDRB_CLK1#

D DRB_SDQ20
D DRB_SDQ21
DD RB_SDQS2
D DRB_SDQ22
D DRB_SDQ17
D DRB_SDQ24
D DRB_SDQ25
DD RB_SDQS3
D DRB_SDQ26
D DRB_SDQ30
R_LAD0
R_LAD1

R_LFRAME#
R_LAD2
R_LAD3
R_PCLK_80H

9,14 DDRB_CKE1

DD RB_CKE1
DDRB_SMA12
DDRB_SMA9
DDRB_SMA7
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

9,14 DDRB_SBS0
9,14 DDRB_SW E#
9,14 DDRB_SCS#0

DDRB_SMA10
DDRB_SBS0
DDRB_SW E#
D DRB_SCS#0
D DRB_SDQ33
D DRB_SDQ34

DD RB_SDQS4
D DRB_SDQ37
D DRB_SDQ38
D DRB_SDQ40
D DRB_SDQ44
DD RB_SDQS5
D DRB_SDQ43
D DRB_SDQ42

D DRB_SDQ52
D DRB_SDQ49
DD RB_SDQS6
D DRB_SDQ55
D DRB_SDQ50
D DRB_SDQ60
D DRB_SDQ56
DD RB_SDQS7
A

D DRB_SDQ58
D DRB_SDQ57
12,15,23 ICH_SMB_DATA
12,15,23 ICH_SMB_CLK
+3VS

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

KLINK_5746-3-111

H= 9.2mm
5

DDRB _VREF
DD RB_SDQ2
DD RB_SDQ6
DDRB_SDM0
DD RB_SDQ1

DDR B_SMA[0..12]

9,14 DDRB_SMA[0..12]

75_0603_1%

C300
0.1U_0402_16V4Z

DDRB_SD QS[0..7]

9,14 DDRB_SDQS[0..7]
R197

DDRB_SD Q[0..63]

9,14 DDRB_SDQ[0..63]

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+2.5V
DDRB_VREF trace width of
12mils and space 12mils(min)

DDRB_S DM[0..7]

9,14 DDRB_SDM[0..7]

DD RB_SDQ4
DD RB_SDQ0

+2.5V
JP24

+2.5V

DD RB_SDQ3
D DRB_SDQ13

R196
75_0603_1%

D DRB_SDQ11
DDRB_SDM1

D DRB_SDQ15
DD RB_SDQ8

System Memory Decoupling caps


+2.5V
D DRB_SDQ19
D DRB_SDQ16

DDRB_SDM2
D DRB_SDQ18

C299
0.1U_0402_10V6K

C270
0.1U_0402_10V6K

C298
0.1U_0402_10V6K

C269
0.1U_0402_10V6K

C297
0.1U_0402_10V6K

C267
0.1U_0402_10V6K

1
2

C296
0.1U_0402_10V6K

C266
0.1U_0402_10V6K

D DRB_SDQ23
D DRB_SDQ28
D DRB_SDQ29
DDRB_SDM3

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 0.1uF*24

D DRB_SDQ27
D DRB_SDQ31
+2.5V
R _PCIRST#

1
2

DD RB_CKE0

C294
0.1U_0402_10V6K

C292
0.1U_0402_10V6K

C264
0.1U_0402_10V6K

C263
0.1U_0402_10V6K

C291
0.1U_0402_10V6K

C262
0.1U_0402_10V6K

1
2

C290
0.1U_0402_10V6K

C261
0.1U_0402_10V6K

+2.5V
DDRB_CKE0 9,14

DDRB_SMA11
DDRB_SMA8

DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1
D DRB_SRAS#
D DRB_SCAS#
D DRB_SCS#1

C338
0.1U_0402_10V6K

DDRB_SBS1 9,14
DDRB_SRAS# 9,14
DDRB_SCAS# 9,14
DDRB_SCS#1 9,14

D DRB_SDQ32
D DRB_SDQ36

C313
0.1U_0402_10V6K

24,36,39
24,36,39
15
10,23,26,27,29,30,36,39

LPC_AD2
LPC_AD3
CLK_80H
PCIRST#

C295
0.1U_0402_10V6K

LAD2
LAD3
PCLK_80H
P CIRST#

C265
0.1U_0402_10V6K

1
2
3
4

8
7
6
5

RP147

DDRB_SDM4
D DRB_SDQ39

24,36,39 LPC_AD0
24,36,39 LPC_AD1
24,36,39 LPC_FRAME#

D DRB_SDQ35
D DRB_SDQ46

LAD0
LAD1
LFRAME#

D DRB_SDQ45
DDRB_SDM5

1
2
3
4

P CIRST#
DDRB_CLK2# 9
DDRB_CLK2 9

LFRAME#
LAD3
LAD2
LAD1
LAD0

D DRB_SDQ48
D DRB_SDQ53
DDRB_SDM6
D DRB_SDQ51

PCLK_80H
+3VS

D DRB_SDQ54
D DRB_SDQ62

0.1U_0402_10V6K

C309
0.1U_0402_10V6K

1
2

C293
0.1U_0402_10V6K

C268
0.1U_0402_10V6K

R_LAD2
R_LAD3
R_PCLK_80H
R _PCIRST#

@0_1206_8P4R_5%

RP148

D DRB_SDQ41
D DRB_SDQ47

C271

8
7
6
5

R_LAD0
R_LAD1
R_LFRAME#
@0_1206_8P4R_5%

1
2
3
4
5
6
7
8
9
10

JP36

1
2
3
4
5
6
7
8
9
10
E&T_96212-1011S

D DRB_SDQ61
DDRB_SDM7

DEBUG PORT
A

D DRB_SDQ59
D DRB_SDQ63

+3VS

SO-DIMM 2

Compal Electronics, Inc.

REVERSE

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

DDR-SODIMM SLOT2
Size
D ate:

Document Number

LA-2041

P , 09, 2003

R ev
0.1
Sheet

13

of

56

Channel A(DIMM0) Termination resistors & Decoupling caps


+1.25VS

DD RA_SDQ5
DD RA_SDQ4

1
2

DD RA_SDQ1
DD RA_SDQ0

1
2

4
3

4
3

56_0404_4P2R_5%
RP114
4
3

4
3

+1.25VS

D DRA_SDQ28
D DRA_SDQ19

1
2

56_0404_4P2R_5%
RP68
1 D DRA_SDQ26
2 D DRA_SDQ31

4
3

1
2

RP80

4 D DRA_SCS#0
3 D DRA_SCS#1

DDRA_SCS#0 8,12
DDRA_SCS#1 8,12

56_0404_4P2R_5%
RP66
1 DDRA_SMA8
2 DDRA_SMA6

DDRA_SD Q[0..63]

8,12 DDRA_SDQ[0..63]

56_0404_4P2R_5%
RP132
4
1 D DRA_SDQ53
3
2 D DRA_SDQ48

56_0404_4P2R_5%
RP67
4
1 DDRA_SMA12
3
2 DDRA_SMA11

56_0404_4P2R_5%
RP76
1
4
2
3

56_0404_4P2R_5%
RP79
4
1 D DRA_SDQ57
3
2 DDRA_SDM7

56_0404_4P2R_5%
RP125
4
1 DDRA_SMA3
3
2 DDRA_SMA5

DDRA_SD QS[0..7]

8,12 DDRA_SDQS[0..7]

DDR A_SMA[0..12]

8,12 DDRA_SMA[0..12]

DDRA_S DM[0..7]

8,12 DDRA_SDM[0..7]

DD RB_SDQ2
DD RB_SDQ6

1
2

DD RB_SDQ0
DD RB_SDQ4

1
2

RP92

+1.25VS

4
3

4
3

56_0404_4P2R_5%
RP52
4
3

4
3

RP45

DD RB_SDQS3
D DRB_SDQ25

4
3

56_0404_4P2R_5%
RP44
1 D DRB_SDQ30
2 D DRB_SDQ26

4
3

1
2

RP37

1
2

D DRB_SCS#0
DDRB_SW E#

56_0404_4P2R_5%
RP51
DD RB_SDQ7 1
4
DD RB_SDQS0 2
3

56_0404_4P2R_5%
RP24
4
1 D DRB_SDQ62
3
2 D DRB_SDQ59

56_0404_4P2R_5%
RP41
4
1 DDRB_SMA12
3
2 DDRB_SMA9

56_0404_4P2R_5%
RP93
1
4
2
3

56_0404_4P2R_5%
RP30
4
1 D DRB_SDQ55
3
2 DD RB_SDQS6

56_0404_4P2R_5%
RP89
1
4 DDRB_SMA8
2
3 DDRB_SMA11

DDRB_SDM0
DD RB_SDQ1

56_0404_4P2R_5%
RP74
4
3

4
3

56_0404_4P2R_5%
RP78
1 D DRA_SDQ63
2 D DRA_SDQ58

4
3

56_0404_4P2R_5%
RP126
1 DDRA_SMA10
2 DDRA_SMA1

DD RB_SDQ3 1
D DRB_SDQ13 2

56_0404_4P2R_5%
RP94
4
3

4
3

56_0404_4P2R_5%
RP25
1 D DRB_SDQ63
2 D DRB_SDQ61

DD RA_SDQ3
DD RA_SDQ9

1
2

56_0404_4P2R_5%
RP75
4
3

4
3

56_0404_4P2R_5%
RP135
1 DD RA_SDQS7
2 D DRA_SDQ61

4
3

56_0404_4P2R_5%
RP65
1 DDRA_SMA4
2 DDRA_SMA2

D DRB_SDQ15 1
DD RB_SDQ8 2

56_0404_4P2R_5%
RP96
4
3

4
3

56_0404_4P2R_5%
RP29
1 D DRB_SDQ60
2 D DRB_SDQ50

4
3

56_0404_4P2R_5%
RP91
1 DDRB_SMA6
2 DDRB_SMA4

D DRA_SDQ14 1
D DRA_SDQ11 2

56_0404_4P2R_5%
RP73
4
3

4
3

56_0404_4P2R_5%
RP133
1 D DRA_SDQ54
2 DD RA_SDQS6

4
3

56_0404_4P2R_5%
RP124
1 DDRA_SMA7
2 DDRA_SMA9

DD RB_SDQ9
DD RB_SDQ5

1
2

56_0404_4P2R_5%
RP50
4
3

4
3

56_0404_4P2R_5%
RP43
1 D DRB_SDQ14
2 D DRB_SDQ10

4
3

56_0404_4P2R_5%
RP40
1 DDRB_SMA5
2 DDRB_SMA7

D DRA_SDQ12 1
DD RA_SDQ2 2

56_0404_4P2R_5%
RP116
4
3

4
3

56_0404_4P2R_5%
RP62
1 D DRA_SDQ32
2 D DRA_SDQ33

4
3

56_0404_4P2R_5%
RP64
1 DDRA_SMA0
2 DDRA_SBS1

DDRA_SBS1 8,12

D DRB_SDQ11 1
DDRB_SDM1 2

56_0404_4P2R_5%
RP95
4
3

4
3

56_0404_4P2R_5%
RP35
1 D DRB_SDQ37
2 DD RB_SDQS4

4
3

56_0404_4P2R_5%
RP102
1 DDRB_SMA2
2 DDRB_SMA0

DD RA_SDQS1 1
DD RA_SDQ8 2

56_0404_4P2R_5%
RP117
4
3

4
3

56_0404_4P2R_5%
RP61
1 DDRA_SDM4
2 D DRA_SDQ38

4
3

56_0404_4P2R_5%
RP63
1 D DRA_SRAS#
2 D DRA_SCAS#

DDRA_SRAS# 8,12
DDRA_SCAS# 8,12

DD RB_SDQS1 1
D DRB_SDQ12 2

56_0404_4P2R_5%
RP49
4
3

4
3

56_0404_4P2R_5%
RP104
1 DDRB_SDM4
2 D DRB_SDQ39

4
3

56_0404_4P2R_5%
RP42
1 DD RB_CKE1
2 DD RB_CKE0

56_0404_4P2R_5%
RP118
D DRA_SDQ15 1
4
D DRA_SDQ10 2
3

56_0404_4P2R_5%
RP127
4
1 D DRA_SDQ37
3
2 D DRA_SDQ36

56_0404_4P2R_5%
RP81
1
4 DD RA_CKE0
2
3 DD RA_CKE1

56_0404_4P2R_5%
RP119
D DRA_SDQ16 1
4
D DRA_SDQ20 2
3

56_0404_4P2R_5%
RP128
4
1 D DRA_SDQ34
3
2 DD RA_SDQS4

56_0404_4P2R_5%
RP137
1
4 DDRA_SBS0
2
3 DDRA_SW E#

D DRA_SDQ21 1
D DRA_SDQ17 2

56_0404_4P2R_5%
RP72
4
3

4
3

D DRA_SDQ18 1
DD RA_SDQS2 2

56_0404_4P2R_5%
RP120
4
3

56_0404_4P2R_5%
RP60
4
1 D DRA_SDQ39
3
2 D DRA_SDQ40

56_0404_4P2R_5%
RP71
DDRA_SDM2 1
4
D DRA_SDQ22 2
3

56_0404_4P2R_5%
RP58
4
1 D DRA_SDQ42
3
2 D DRA_SDQ47

56_0404_4P2R_5%
RP70
4
3

56_0404_4P2R_5%
RP69
D DRA_SDQ25 1
4
DDRA_SDM3 2
3

4
3

56_0404_4P2R_5%
RP59
1 D DRA_SDQ45
2 DDRA_SDM5

56_0404_4P2R_5%
RP129
1 D DRA_SDQ44
2 D DRA_SDQ35

56_0404_4P2R_5%
RP57
4
1 D DRA_SDQ49
3
2 D DRA_SDQ52

DD RA_SDQS5 1
D DRA_SDQ41 2

56_0404_4P2R_5%
RP130
4
3

4
3

56_0404_4P2R_5%
RP122
1 DD RA_SDQS3
2 D DRA_SDQ29

DDRA_SDM6 1
D DRA_SDQ51 2

56_0404_4P2R_5%
RP56
4
3

4
3

56_0404_4P2R_5%
RP123
1 D DRA_SDQ27
2 D DRA_SDQ30

D DRA_SDQ46 1
D DRA_SDQ43 2

56_0404_4P2R_5%
RP131
4
3

4
3

56_0404_4P2R_5%
RP136
1 D DRA_SDQ59
2 D DRA_SDQ62

56_0404_4P2R_5%
RP55
D DRA_SDQ50 1
4
D DRA_SDQ56 2
3
56_0404_4P2R_5%

56_0404_4P2R_5%
RP134
4
1 D DRA_SDQ60
3
2 D DRA_SDQ55
56_0404_4P2R_5%

0.1U_0402_10V6K
1
C630

C621

2
0.1U_0402_10V6K
+1.25VS

0.1U_0402_10V6K
1
C627

2
0.1U_0402_10V6K
+1.25VS
1

DDRB_SRAS# 9,13
DDRB_SBS1 9,13

2
0.1U_0402_10V6K
+1.25VS
1

2
0.1U_0402_10V6K

56_0404_4P2R_5%
RP47
4
3

56_0404_4P2R_5%
RP108
4
1 D DRB_SDQ48
3
2 D DRB_SDQ53

56_0404_4P2R_5%
RP46
D DRB_SDQ24 1
4
D DRB_SDQ17 2
3

56_0404_4P2R_5%
RP34
4
1 D DRB_SDQ40
3
2 D DRB_SDQ38

56_0404_4P2R_5%
RP99
4
3

56_0404_4P2R_5%
RP98
DDRB_SDM2 1
4
D DRB_SDQ18 2
3

0.1U_0402_10V6K
1
C328

DDRB_SDM6 1
D DRB_SDQ51 2

56_0404_4P2R_5%
RP109
4
3

56_0404_4P2R_5%
RP32

4.7U_0805_10V4Z
1
C619
C618

D DRB_SDQ42 1
D DRB_SDQ43 2

56_0404_4P2R_5%
RP26
1
2

DDRB_SDM7
D DRB_SDQ54

56_0404_4P2R_5%
RP31
D DRB_SDQ49 1
D DRB_SDQ52 2

0.1U_0402_10V6K
1
C319
C317

2
0.1U_0402_10V6K

D DRB_SDQ22 1
DD RB_SDQS2 2

D DRB_SDQ23 1
D DRB_SDQ28 2

C321

2
4.7U_0805_10V4Z

0.1U_0402_10V6K
1
C320
C318

0.1U_0402_10V6K
1
1
C624
C625

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C325
C324

0.1U_0402_10V6K
1
C633

C632

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C316

2
0.1U_0402_10V6K

C628

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C323
C322

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C629

C631

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C326
C329

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page22
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*28
5

DDRA_SBS0 8,12
DDRA_SW E# 8,12

0.1U_0402_10V6K
1
1
C327
C564

DDRB_CKE1 9,13
DDRB_CKE0 9,13

DDRB_SCAS# 9,13
DDRB_SCS#1 9,13

2
0.1U_0402_10V6K

C626

56_0404_4P2R_5%
RP90
1
4 D DRB_SRAS#
2
3 DDRB_SBS1

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
1
C634
C622

2
0.1U_0402_10V6K
+1.25VS

56_0404_4P2R_5%
RP39
4
1 DDRB_SMA1
3
2 DDRB_SMA3

56_0404_4P2R_5%
RP105
4
1 D DRB_SDQ35
3
2 D DRB_SDQ46

4
3

56_0404_4P2R_5%

4
3

56_0404_4P2R_5%
RP106
1 D DRB_SDQ45
2 DDRB_SDM5

56_0404_4P2R_5%
RP107
1 D DRB_SDQ41
2 D DRB_SDQ47

56_0404_4P2R_5%
RP33
4
1 DD RB_SDQS5
3
2 D DRB_SDQ44

4
3

56_0404_4P2R_5%
RP103
1 D DRB_SDQ32
2 D DRB_SDQ36

4
3

4
3

56_0404_4P2R_5%
RP101
1 D DRB_SDQ27
2 D DRB_SDQ31

4
3

4
3

56_0404_4P2R_5%
RP28
1 DD RB_SDQS7
2 D DRB_SDQ56

4
3

56_0404_4P2R_5%
RP27
4
1 D DRB_SDQ57
3
2 D DRB_SDQ58

DDRB_S DM[0..7]

9,13 DDRB_SDM[0..7]

56_0404_4P2R_5%
RP48
1
4
2
3
56_0404_4P2R_5%
RP100
4
3

DDR B_SMA[0..12]

9,13 DDRB_SMA[0..12]

DDRA_CKE0 8,12
DDRA_CKE1 8,12

D DRB_SDQ29 1
DDRB_SDM3 2

DDRB_SD QS[0..7]

9,13 DDRB_SDQS[0..7]

56_0404_4P2R_5%
RP110
4
1 D DRB_SCAS#
3
2 D DRB_SCS#1

56_0404_4P2R_5%

DDRB_SD Q[0..63]

9,13 DDRB_SDQ[0..63]

56_0404_4P2R_5%
RP36
4
1 D DRB_SDQ34
3
2 D DRB_SDQ33

D DRB_SDQ21
D DRB_SDQ20

DDRB_SBS0 9,13

56_0404_4P2R_5%
RP97
D DRB_SDQ19 1
4
D DRB_SDQ16 2
3

+1.25VS

DDRB_SCS#0 9,13
DDRB_SW E# 9,13

56_0404_4P2R_5%
RP38
1 DDRB_SMA10
2 DDRB_SBS0

D DRA_SDQ13 1
DDRA_SDM1 2

D DRA_SDQ23 1
D DRA_SDQ24 2

RP121

Channel B(DIMM1) Termination resistors & Decoupling caps

+1.25VS

56_0404_4P2R_5%
RP115
DD RA_SDQ6 1
4
DD RA_SDQS0 2
3

DDRA_SDM0
DD RA_SDQ7

RP77

56_0404_4P2R_5%
+1.25VS

2
0.1U_0402_10V6K
+1.25VS
1

2
2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C565

C623

4.7U_0805_10V4Z
1
C572

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C280

C281

0.1U_0402_10V6K
1
C278

C279

2
B

0.1U_0402_10V6K
1
1
C272
C562

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C567

0.1U_0402_10V6K
1
C571

C573

2
0.1U_0402_10V6K

C566

2
0.1U_0402_10V6K

2
4.7U_0805_10V4Z

0.1U_0402_10V6K
1
1
C274
C273

2
0.1U_0402_10V6K

2
2
0.1U_0402_10V6K

C570

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
1
C276
C275

C563

2
0.1U_0402_10V6K
+1.25VS

0.1U_0402_10V6K
1
C282

C283

2
2
0.1U_0402_10V6K

C277

2
0.1U_0402_10V6K
+1.25VS
1

C284

0.1U_0402_10V6K
1
C569

C568

2
0.1U_0402_10V6K

0.1U_0402_10V6K
1
C258

C259

2
0.1U_0402_10V6K

Decoupling Reference Document:


Springdale Customer Schematic R1.2 page26
each Channel(two DIMMs) requirement 4.7u*2 ; 0.1uF*26

56_0404_4P2R_5%
Title

DDR Termination Resistors

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Size
B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D ate:

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
1

14

of

56

SEL0

SEL1

CPU

REF0

REF1 SRC

100

3V66[0..3]
66

14.3

14.3

100/200

MID

REF

REF

REF

REF

REF

200

66

14.3

14.3

100/200

USB/Dot
+3VS

Place near each pin


W>40 mil

+3VS_CLK

48
L29
1
2
BLM21A601SPT_0805
L28
1
2
BLM21A601SPT_0805

REF
48

133

66

14.3

14.3

100/200

48

166

66

14.3

14.3

100/200

48

MID

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Trace wide=40 mils


1
2

1
C591
10U_1206_6.3V7K

C583
0.1U_0402_10V6K

Hi-Z

U42
C LKREF1
C LKREF0

C602
@10P_0402_50V8K
2
1

CLK_XTAL_IN

R462 2
R425 2
R424 2

24 PM_SLP_S1#
24 STP_PCI#
24,53 STP_CPU#

1 @0_0402_5%
1 @0_0402_5%
1 @0_0402_5%

C603
@10P_0402_50V8K
2
1

+3VS

XTAL_IN

C581
0.1U_0402_10V6K

1
2

1
2

CLKSEL0 51
CLKSEL1 56

2 1K_0402_5%
2 1K_0402_5%
2 1K_0402_5%

52 CK409_PW RGD#

XTAL_OUT

0.1U_0402_10V6K

SLP_S1#
STPPCI#
STPCPU#

21
49
50

PWRDWN#
PCI_STP#
CPU_STP#

CLK_VTT_PG#

35

VTT_PWRGD#

R444

1K_0603_1%

1K_0603_1%

1 @0_0402_5%

CLKSEL0

R186 2

1 0_0402_5%

CPU_CLKSEL0 5

CLKSEL1

R188 2

1 0_0402_5%

CPU_CLKSEL1 5

R189 2

1 @0_0402_5%

2
R420

R443
2K_0603_1%

38

CLK48M_OUT0
1
33_0402_5%

2
R438

24 CLK_ICH_48M

2K_0603_1%

SCLK
SDATA

VSS_CPU

45

CPUCLKT2

47

C LK_CPU2

CPU_CLKC2

46

CLK_CPU2#

CPUCLKT1

44

C LK_CPU1

CPUCLKC1

43

CLK_CPU1#

CPUCLKT0

41

C LK_CPU0

SRCLKN_100MHZ

USB_48MHZ

1
R428

32

DOT_48MHZ

2.49K_0603_1%

1
R437

Check SPEC (250mA,300 ohm)

+3VS

L27
BLM11A601S_0603
1
2

2
475_0603_1%

CLK_VDD_PLL

1
2

C578
10U_1206_6.3V7K

52

55
1
2

0.1U_0402_16V4Z

54

VSS_PLL

1
R429
1
R430

1
49.9_0603_1%
2
33_0402_5%
2
33_0402_5%
1
49.9_0603_1%

2
R414

1
R431
1
R432

1
49.9_0603_1%
2
33_0402_5%
2
33_0402_5%
1
49.9_0603_1%

2
R416

2
R418

0.1U_0402_10V6K

CLK_HCLK# 7
CLK_ITP 5

2
R415

CLK_ITP#

CLK_ITP# 5

CLK_BCLK

2
R417

CLK_BCLK 4

Place near CK409

CLK_AGP_66M 16

1
R456
1
R455
1
R452

2
33_0402_5%
2
33_0402_5%
2
33_0402_5%

CLK_MCH_66M 10

1
R461
1
R460
1
R454
1
R459
1
R458
1
R453
1
R708

2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%
2
33_0402_5%

CLK_PCI_MINI 29

66MHZ_OUT2/3V66_2

26

66MHZ_OUT1/3V66_1

23

CLK66M_OUT1

66MHZ_OUT0/3V66_0

22

CLK66M_OUT0

PCICLK_F2

PCICLK_F2

PCICLK_F1

PCICLK_F0

39
53

6
11
17
25
33

CLK_HCLK#
CLK_ITP

PCICLK6

20

PCICLK6

PCICLK5

19

PCICLK5

PCICLK4

18

PCICLK4

PCICLK3

15

PCICLK3

PCICLK2

14

PCICLK2

PCICLK1

13

PCICLK1

PCICLK0

12

PCICLK0

CLK_BCLK#

CLK_BCLK# 4

CLK_ICH_66M 23
CLK_PCI_ICH 23

CLK_PCI_PCM 27
CLK_PCI_LPC 39
CLK_PCI_1394 30
CLK_PCI_LAN 26
CLK_PCI_SIO 36
CLK_80H 13

ICS952623BG_TSSOP56

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

C580

Title

0.1U_0402_10V6K

CLK_HCLK 7

2
33_0402_5%

27

C LK_HCLK

1
R457

66MHZ_OUT3/3V66_3

VDD_PLL

C579

C594

2
R413

CLK66M_OUT3

29

IREF

2
33_0402_5%
1
49.9_0603_1%

1
R433

40

VSS_SRC
VSS_IREF

R190
2.49K_0603_1%

VSS_REF
VSS_PCI
VSS_PCI
VSS_3V66
VSS_48

R185

0.1U_0402_10V6K

1
49.9_0603_1%
2
33_0402_5%

CPUCLKC0

SRCLKP_100MHZ

31

C595

CLK_CPU0#

48/66MHZ_OUT/3V66_4

MCH_CLKSEL0 7
MCH_CLKSEL1 7

28
30

37

R187 2

R421

CK_SCLK
CK_SDATA

0.1U_0402_10V6K

4.7U_0805_10V4Z

+3VS
12,13,23 ICH_SMB_CLK
12,13,23 ICH_SMB_DATA

C596

C592

CK409

SEL0
SEL1

C597

14.31818MHz_20P_1BX14318CC1A~L
CLK_XTAL_OUT

R463 1
R412 1
R411 1

REF_0
REF_1

0.1U_0402_10V6K

X3

Place crystal within


500 mils of CK409

SLP_S1#
STPPCI#
STPCPU#

1
2

C582

42
48

1
33_0402_5%

VDD_CPU
VDD_CPU

2
R451

34
36

36 CLK_14M_SIO

VDD_48
VDD_SRC

1
33_0402_5%

VDD_REF
VDD_PCI
VDD_PCI
VDD_3V66

2
R450

3
10
16
24

2
24 CLK_ICH_14M

Size
D ate:

Compal Electronics, Inc.


Clock Generator
Document Number

LA-2041

P , 09, 2003

R ev
0.1
Sheet
1

15

of

56

VDD1

D-

ALERT#

I2CC _SCL

SCLK

THERM#

I2CC _SDA

SDATA

GND

@0.1U_0402_16V4Z

AGP_SBA[0..7]
AGP _C/BE#[0..3]

10 AGP_C/BE#[0..3]

AGP_ST[0..2]

10 AGP_ST[0..2]

C16
1

@10P_0402_50V8K

+3VS
R35
10K_0402_5%
STP_AGP#
1
2
AG P_BUSY#
1
2
R36
10K_0402_5%

+SVDD

C31

C30

L10

+3VS

0.1U_0402_10V6K

AGP_AD_STBS1

Selection Table For W180


B

Modulation
Setting

SS%

SST
Ratio

1.25%

3.75%

Close VGA ball (AK29)


less than 250mils
+AGP_VREF

R42

C13
0.1U_0402_10V6K
22 CRMA
22 LUMA
22 COMPS

1
R70

+SVDD

PLACE COLSE TO VGA


Pin AJ5, AJ7,

VDD

U31

FS1

X2

FS2

SS%

2 XTALSSIN
22_0402_5%

1
R323

4SPREAD_RATE
2

7
8

CLKOUT

W180-01GT_SO8

1
2
R341
@1K_0402_5%
R345

+3VS

R343

AJ24
AH19
AF25
AG22

C/BE#0
C/BE#1
C/BE#2
C/BE#3

CLK_AGP_66M
B_PCIRST#
AGP_REQ#
AGP_GNT#
AGP_PAR
AGP_STOP#
AGP_DEVSEL#
AG P_TRDY#
AGP_IRDY#
AGP_FRAME#
PCI_ PIRQA#

AG12
AF15
AF13
AE15
AK18
AH17
AJ16
AJ17
AG16
AK16
AG15
AE10

PCICLK
PCIRST#
PCIREQ#
PCIGNT#
PCIPAR
PCISTOP#
PCIDEVSEL#
PCITRDY#
PCIIRDY#
PCIFRAME#
PCIINTA#
NC

AGP_SB_STBF
AGP_SB_STBS
AGP_AD_STBF0
AGP_AD_STBS0
AGP_AD_STBF1
AGP_AD_STBS1

AK13
AJ13
AK24
AJ25
AG21
AF21

AGPSB_STB/ ADSTBF
AGPSB_STB#/ ADSTBS
AGPADSTB0/ ADSTBF0
AGPADSTB0#/ADSTBS0
AGPADSTB1/ ADSTBF1
AGPADSTB1#/ADSTBS1

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_ST0
AGP_ST1
AGP_ST2

AJ11
AH11
AJ12
AH12
AJ14
AH14
AJ15
AH15
AG13
AE16
AE13

AGPSBA0
AGPSBA1
AGPSBA2
AGPSBA3
AGPSBA4
AGPSBA5
AGPSBA6
AGPSBA7
AGPST0
AGPST1
AGPST2

+AGP_REF
1 10K_0402_5%
AG P_BUSY#
STP_AGP#

AK29
AF16
AF12
AG11

AGPVREF
NC/AGPMBDET#
AGP_BUSY#
STP_AGP#

CRMA
LUMA
COMPS
D ACB_HSYNC
DACB_VSYNC
DACB_RSET
2
63.4_0603_1%

AE2
AD2
AD1
AF3
AE3
AD3
AE7
AF6
AD4
Y5
AC4

DACB_RED/CHROMA
DACB_GREEN/LUMA
DACB_BLUE/COMPOSITE
DACB_HSYNC
DACB_VSYNC
DACB_RSET
I2CB_SCL
I2CB_SDA
SWAPRDY_B
STEREO
DACB_IDUMP

XTALIN
XTALOUT

AJ6
AH6

XTALIN
XTALOUT

XTALSSIN
XTALOUTBUFF
NV_THERMDA
NV_THERMDC

AJ7
AJ5
H2
H3
C2
C1
D1
E2
D2

XTALSSIN
XTALOUTBUFF
THERMDA
THERMDC
JTAG[0]
JTAG[1]
JTAG[2]
JTAG[3]
JTAG[4]

1
10K_0402_5%

SWAPRDY_B
NV31,NV34 use.
NV18 not use.

+SVDD

10K_0402_5%

AGPRBF#
AGPPIPE/ DBI_HI
NC/ DBI_LO

G5
F4
G4
H5
H4
J4
J5
J6
K4
K6

FPBCLKOUT#
FPBCLKOUT

M2
M3

ROMA14
ROMA15
ROMCS#

R2
R1
AF2

VIPPCLK
VIPHCTL
VIPHCLK

L4
M4
M5

VIPHAD0
VIPHAD1

P3
P2

VIPD0
VIPD1
VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

J3
J2
K2
K1
L3
L2
N2
N1

DVOD0
DVOD1
DVOD2
DVOD3
DVOD4
DVOD5
DVOD6
DVOD7
DVOD8
DVOD9
DVOD10
DVOD11

AG2
AH1
AG3
AJ1
AH2
AK1
AJ3
AK3
AH4
AK4
AJ4
AH5

DVOHSYNC
DVOVSYNC
DVODE
DVOCLKOUT
DVOCLKOUT#
I2CC_SCL
I2CC_SDA
BUFRST#
DVOCLKIN

AD5
AD6
AE4
AJ2
AK2
AG6
AG7
B1
AG1

STRAP0
STRAP1
STRAP2
STRAP3

NV34M_EPBGA701

PROPRIETARY NOTE

AGP4X/8X
AGPWBF#

AG17
AG14
AJ18
AJ19

1
2
R317
1K_0402_5%

X1/CLK

GND

XTALOUTBUFF
+3VS R318
1K_0402_5%
1
2

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

PCI/AGP

AGP_WBF#
AGP_RBF#

AGP_WBF#
AGP_RBF#
AGP_DBIHI
AGP_DBILO

10 AGP_SB_STBF
10 AGP_SB_STBS
10 AGP_AD_STBF0
10 AGP_AD_STBS0
10 AGP_AD_STBF1
10 AGP_AD_STBS1

AGP_AD_STBS0

2
220K_0402_5%
2
220K_0402_5%

@10_0402_5%

10
10
10
10

C478

4.7U_0805_10V4Z

1
R67
1
R69

R68

15 CLK_AGP_66M
23,35 B_PCIRST#
10 AGP_REQ#
10 AGP_GNT#
10 AGP_PAR
10 AGP_STOP#
10 AGP_DEVSEL#
10 AGP_TRDY#
10 AGP_IRDY#
10 AGP_FRAME#
23,27,30 PCI_PIRQA#

1
2
FCM2012C-800_0805
1

4.7U_0805_10V4Z

0.1U_0402_10V6K

C148

AG P_AD[0..31]

10 AGP_SBA[0..7]

NV_THERCTL#

ZV PORT / EXT TMDS / GPIO / ROM

D+

LVDS

NV_THERMDC

10 AGP_AD[0..31]

C479

U33

@ADM1032ARM_RM8

+3VS

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

nVIDIA
NV31/34

DAC2

@2.2K_0402_5%

2.2K_0402_5%
@2200P_0402_50V7K
1
C145
NV_THERMDA

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

DAC1

R124

AJ28
AK28
AH27
AK27
AJ27
AH26
AJ26
AH25
AH23
AJ23
AH22
AJ22
AJ21
AK21
AH20
AJ20
AG26
AE24
AG25
AG24
AF24
AG23
AE22
AF22
AE21
AG20
AG19
AF19
AE19
AF18
AG18
AE18

SSC
CLK

R128

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

TMDS

Place close
to pin
H2 & H3

U35A

+3VS +3VS

IFPATXDO#
IFPATXDO
IFPATXD1#
IFPATXD1
IFPATXD2#
IFPATXD2
IFPATXD3#
IFPATXD3
IFPATXC#
IFPATXC
IFPBTXD4#
IFPBTXD4
IFPBTXD5#
IFPBTXD5
IFPBTXD6#
IFPBTXD6
IFPBTXD7#
IFPBTXD7
IFPBTXC#
IFPBTXC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_HSYNC
DACA_VSYNC

G1
G2
F2
F3
T4
U4
AA1
Y2
W3
V3
V4
U5
V1
W2
V5
W4
AB2
AB3
W6
Y6
AC2
AC3
Y3
AA2

AG8

I2CA_SCL
I2CA_SDA
SWAPRDY_A
DACA_IDUMP

AG5
AF7
AF9
AG10
T2
R3
T3
U2
V2
U3
P4
P5

SPREAD_RATE

1
0_0402_5%

DV ODE

ENBKL 22,39
ENVDD 22

ENBKL

1
2
R691
@10K_0402_5%
ONLY FOR NV18M
1
2
R682
10K_0402_5%

VGA_GPIO5
R374 2
1 @0_0402_5%
VAG_GPIO6
R129 2
POW ER_SEL 1
1 10K_0402_5% (SUS_STAT#) +3VS
POW ER_SEL_F R701 2
R683
1 0_0402_5%
POW ER_SEL 51
NV_THERCTL#
Only for
R133 2
1 @10K_0402_5% +3VS
NV34MU, NV31
Power Mizer

ROMA14
ROMA15

2
@10K_0402_5%

R377 2

1 10K_0402_5%

STRAP1

RAM_CFG[3:0]
(1101 = 4Mx32 DDR,0000 =8Mx32 DDR Samsung, 0001 =8Mx32 DDR Hynix, DQS per byte)
R378 2

1 @10K_0402_5%

STRAP2

R379 2

1 @10K_0402_5%

R334 2

1 @10K_0402_5%

D VOD2

R335 2

1 10K_0402_5%

R380 2

1 @10K_0402_5%

STRAP3

R381 2

1 @10K_0402_5%

R329 2

1 10K_0402_5%

D VOD3

R330 2

1 @10K_0402_5%

5
2

R49

1 @10K_0402_5% DACA_VSYNC R29

1 10K_0402_5%

R50

1 @10K_0402_5% D ACA_HSYNC R30

1 10K_0402_5%

CRYSTAL: (10)-27MHz

Low

R373 2

High

Low

VIPD2
VIPD3
VIPD4
VIPD5
VIPD6
VIPD7

NV18M
NV31M:NV34M

4
1

NV18M
NV31M:NV34M

D VOD2
D VOD3
High
D VOD8
D VOD9

D VO_HSYNC
Low
DV ODE

+3VS
High

I2CC _SCL
I2CC _SDA

2
R693 2
R694

1
12.2K_0402_5%
2.2K_0402_5%

TXOUT0TXOUT0+
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXOUT3TXOUT3+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZOUT3TZOUT3+
TZCLKTZCLK+

VIPD2
VIPD6

R357 2

1 10K_0402_5%

DACB_VSYNC R340 2

1 10K_0402_5%

TVMODE: (01)-NTSC

0
1

R339 2

AGP8X/4X: (0)-8X / (1)-4X


R48

STRAP0
STRAP1
STRAP2
STRAP3

1 10K_0402_5%

1 10K_0402_5%

D ACB_HSYNC

1 10K_0402_5%

D VOD9

AGP_SIDEBAND: (0)-ENABLE
R360 2

1 10K_0402_5%

VIPD7

R361 2

1 @10K_0402_5%

R320 2

1 @10K_0402_5%

10 AGP_FASTWRITE: (0)-ENABLE
R319 2

TXOUT0- 22
TXOUT0+ 22
TXOUT1- 22
TXOUT1+ 22
TXOUT2- 22
TXOUT2+ 22
TXOUT3- 22
TXOUT3+ 22
TXCLK- 22
TXCLK+ 22
TZOUT0- 22
TZOUT0+ 22
TZOUT1- 22
TZOUT1+ 22
TZOUT2- 22
TZOUT2+ 22
TZOUT3- 22
TZOUT3+ 22
TZCLK- 22
TZCLK+ 22

1 10K_0402_5%

D VOD8

11 PCI_DEVID[3:0] (0100 NV34M 0101 NV34MU 1010 NV31M)


Low

High

R366 2

1 @10K_0402_5%

VIPD4

R367 2

1 10K_0402_5%

R363 2

1 10K_0402_5%

VIPD5

R364 2

1 @10K_0402_5%

R370 2

1 @10K_0402_5%

VIPD3

R371 2

1 10K_0402_5%

R346 2

1 10K_0402_5%

D VO_HSYNC R347 2

12 BUS_TYPE: (1)-AGP

V IPHCTL

1 @10K_0402_5%

R126 2

1 10K_0402_5%

ROM TYPE: (00)-PARALLEL


Low

R354 2

1 10K_0402_5%

ROMA14

R355 2

1 @10K_0402_5%

High

R351 2

1 10K_0402_5%

ROMA15

R352 2

1 @10K_0402_5%

R 22
G 22
B 22
D ACA_HSYNC 22
DACA_VSYNC 22

DACA_RSET 1
2
R39
130_0603_1%
DDC_ CLK
DDC_CLK 22
D DC_DATA
DDC_DATA 22
2
1
+3VS
R41
10K_0402_5%

XTALIN

Y2

XTALOUT

27MHZ_16PF
1
2
R311
@2M_0402_5%

SWAPRDY_A
NV31,NV34 use.
NV18 not use.

C468
22P_0402_50V8J

C469
22P_0402_50V8J
A

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

1 10K_0402_5%

SUB_VENDOR: 0-SYSTEM BIOS 1-ADAPTER BIOS


R376 2

+3VS

PCI_AD_SWAP: 0-RVSERSED 1-NORMAL


STRAP0

V IPHCTL

R
AK10
G
AJ10
B
AJ9
AH9 D ACA_HSYNC
AJ8 DACA_VSYNC

DACA_RSET

IFPCTXD0#
IFPCTXD0
IFPCTXD1#
IFPCTXD1
IFPCTXD2#
IFPCTXD2
IFPCTXC#
IFPCTXC

VGA_GPIO0 2
R132
ENBKL
ENVDD

D ate:

nVIDIA NV31M (AGP BUS)


Document Number

R ev
0.1

LA-2041
P , 10, 2003

Sheet

16

of

56

R_NDQ MA[0..7]

21 R_NDQMB[0..7]

R_NDQS A[0..7]

21 R_NDQSB[0..7]

NM AA[0..11]

21 NMAB[0..11]

R_NM DA[0..63]

21 R_NMDB[0..63]

R_NDQS B[0..7]
NM AB[0..11]

U35C

V30
U28
U29
T28
T29
T27
T30
T26
T25
R27
R25
R30
U24

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

L27
K29
G25
E28
AF28
AD27
AA30
Y27

R_NDQMA0
R_NDQMA1
R_NDQMA2
R_NDQMA3
R_NDQMA4
R_NDQMA5
R_NDQMA6
R_NDQMA7

FBADQS0
FBADQS1
FBADQS2
FBADQS3
FBADQS4
FBADQS5
FBADQS6
FBADQS7

M27
K30
G27
D30
AG30
AD26
AA29
W27

R _NDQSA0
R _NDQSA1
R _NDQSA2
R _NDQSA3
R _NDQSA4
R _NDQSA5
R _NDQSA6
R _NDQSA7

FBARAS#

P28

NMRASA#

FBACAS#

P29

NMCASA#

FBAWE#

R28

NMWEA#

FBACS0#

U27

NMCSA0#

FBACS1#

P27

NMCSA1#

NMCLKA0
NMCLKA0#

FBACLK1
FBACLK1#

N21
P21

NMCLKA1
NMCLKA1#

FBABA0
FBABA1

R26
R29

NMA_BA0
NMA_BA1

FB_VREF

C28

A _REF

NMCSA0# 20
NMCLKA0 20

NMCSA1# 20

R89
@120_0402_5%

NMCKEA 20

NMCLKA0# 20

NMCKEA

U21
V21

NMWEA# 20

NMCLKA1 20

N30

NMCASA# 20

R105
@120_0402_5%
NMA_BA0 20
NMA_BA1 20

NMCLKA1# 20

FBACKE
FBACLK0
FBACLK0#

NMRASA# 20

+2.5VS

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBAA12

(10 mil)

R138

R_NMDB0
R_NMDB1
R_NMDB2
R_NMDB3
R_NMDB4
R_NMDB5
R_NMDB6
R_NMDB7
R_NMDB8
R_NMDB9
R_NMDB10
R_NMDB11
R_NMDB12
R_NMDB13
R_NMDB14
R_NMDB15
R_NMDB16
R_NMDB17
R_NMDB18
R_NMDB19
R_NMDB20
R_NMDB21
R_NMDB22
R_NMDB23
R_NMDB24
R_NMDB25
R_NMDB26
R_NMDB27
R_NMDB28
R_NMDB29
R_NMDB30
R_NMDB31
R_NMDB32
R_NMDB33
R_NMDB34
R_NMDB35
R_NMDB36
R_NMDB37
R_NMDB38
R_NMDB39
R_NMDB40
R_NMDB41
R_NMDB42
R_NMDB43
R_NMDB44
R_NMDB45
R_NMDB46
R_NMDB47
R_NMDB48
R_NMDB49
R_NMDB50
R_NMDB51
R_NMDB52
R_NMDB53
R_NMDB54
R_NMDB55
R_NMDB56
R_NMDB57
R_NMDB58
R_NMDB59
R_NMDB60
R_NMDB61
R_NMDB62
R_NMDB63

1K_0603_1%

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

FBCA0
FBCA1
FBCA2
FBCA3
FBCA4
FBCA5
FBCA6
FBCA7
FBCA8
FBCA9
FBCA10
FBCA11
FBCA12

A18
C17
B17
C16
B16
D16
A16
E16
F16
D15
F15
A15
G17

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

D11
B10
D7
C5
C26
F24
B21
D20

R_NDQMB0
R_NDQMB1
R_NDQMB2
R_NDQMB3
R_NDQMB4
R_NDQMB5
R_NDQMB6
R_NDQMB7

FBCDQS0
FBCDQS1
FBCDQS2
FBCDQS3
FBCDQS4
FBCDQS5
FBCDQS6
FBCDQS7

D12
A10
E7
A4
A27
D24
A21
D19

R _NDQSB0
R _NDQSB1
R _NDQSB2
R _NDQSB3
R _NDQSB4
R _NDQSB5
R _NDQSB6
R _NDQSB7

FBCRAS#

C14

NMRASB#

FBCCAS#

B14

NMCASB#

FBCWE#

C15

NMWEB#

FBCCS0#

D17

NMCSB0#

FBCCS1#

D14

NMCSB1#

FBCCKE

A13

NMCKEB

FBCCLK0
FBCCLK0#

K18
K17

NMCLKB0
NMCLKB0#

FBCCLK1
FBCCLK1#

K13
K14

NMCLKB1
NMCLKB1#

FBCBA0
FBCBA1

E15
B15

NMRASB# 21
NMCASB# 21
NMWEB# 21
NMCSB0# 21
NMCSB1# 21

NMCLKB0 21
R111
@120_0402_5%

NMCKEB 21

NMCLKB0# 21
NMCLKB1 21

NMB_BA0
NMB_BA1

NMB_BA0 21
NMB_BA1 21

NMCLKB1# 21

NV34M_EPBGA701

C173

R135

0.1U_0402_10V6K

1K_0603_1%

1
R358

2
1K_0402_5%

NMCKEA

1
R389

2
1K_0402_5%

NMCKEB
A

Title

Compal Electronics, Inc.


nVIDIA NV31M (DDR)

Size

Document Number

R ev
0.1

LA-2041
5

R110
@120_0402_5%

NV34M_EPBGA701

F13
D13
E13
F12
E10
D10
D9
D8
B13
B12
C12
B11
B9
C9
B8
A7
F10
E9
F9
F7
C6
E6
D5
C4
C8
B7
B6
B5
A3
B3
A2
B2
B29
A29
B28
A28
B26
B25
B24
C23
E26
D26
E25
C25
E24
F22
E22
F21
A24
B23
C22
B22
B20
C19
B19
B18
D23
D22
D21
E21
F19
E18
D18
F18

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

MEMORY INTERFACE
A

N25
N27
N26
M25
K26
K27
J27
H27
N29
M29
M28
L29
J29
J28
H29
G30
K25
J26
J25
G26
F28
F26
E27
D27
H28
G29
F29
E29
C30
C29
B30
A30
AJ29
AJ30
AH29
AH30
AF29
AE29
AD29
AC28
AG28
AF27
AE26
AE28
AD25
AB25
AB26
AA25
AD30
AC29
AB28
AB29
Y29
W28
W29
V29
AC27
AB27
AA27
AA26
W25
V26
V27
V25

U35B
R_NMDA0
R_NMDA1
R_NMDA2
R_NMDA3
R_NMDA4
R_NMDA5
R_NMDA6
R_NMDA7
R_NMDA8
R_NMDA9
R_NMDA10
R_NMDA11
R_NMDA12
R_NMDA13
R_NMDA14
R_NMDA15
R_NMDA16
R_NMDA17
R_NMDA18
R_NMDA19
R_NMDA20
R_NMDA21
R_NMDA22
R_NMDA23
R_NMDA24
R_NMDA25
R_NMDA26
R_NMDA27
R_NMDA28
R_NMDA29
R_NMDA30
R_NMDA31
R_NMDA32
R_NMDA33
R_NMDA34
R_NMDA35
R_NMDA36
R_NMDA37
R_NMDA38
R_NMDA39
R_NMDA40
R_NMDA41
R_NMDA42
R_NMDA43
R_NMDA44
R_NMDA45
R_NMDA46
R_NMDA47
R_NMDA48
R_NMDA49
R_NMDA50
R_NMDA51
R_NMDA52
R_NMDA53
R_NMDA54
R_NMDA55
R_NMDA56
R_NMDA57
R_NMDA58
R_NMDA59
R_NMDA60
R_NMDA61
R_NMDA62
R_NMDA63

R_NM DB[0..63]

20 R_NMDA[0..63]

R_NDQ MB[0..7]

20 NMAA[0..11]

20 R_NDQSA[0..7]

MEMORY INTERFACE B

20 R_NDQMA[0..7]

D ate:

P , 09, 2003

Sheet

17

of

56

U35D

G14
H6
H7
2AGP_VDD2 M6
0_0402_5%
P24
U6
U7
AC6
AC7
AD12
AD15
AD19
AD22
AD16

+3VS

1
R113

+1.5VS
R40
1
1
R82

N4
+5VS
AE9
AGPCALPD_VDDQ AA13
AGPCALPU_GND
AA14
+AGP_PLLVDD
AE12

49.9_0603_1%
2
2
49.9_0603_1%

+2.5VS
B

FBCAL_PD_VDDQ
NV31,NV34 use.
NV18 not use.
FBCAL_PUK_GND
NV31,NV34 use.
NV18 not use.
FBCAL_TERM_GND
NV31 use (tie to GND).
NV18,NV34 not use.
FBCAL_CLK_GND
NV31 use.
NV18,NV34 not use.

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VD50CLAMP0
VD50CLAMP1
AGPCALPD_VDDQ
AGPCALPU_GND
AGP_PLLVDD

F8
F11
F14
F17
F20
F23
G8
G11
G20
G23
H24
H25
L24
L25
P25
U25
Y24
Y25
AC24
AC25

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

AA6
AC5
AF10
AG29
AE27
G9
Y28

NC
NC
NC
NC
NC
NC
NC

IFPABPLLVDD
IFPABPLLGND

U10
V10

+IFPABPLLVDD

IFPAIOVDD
IFPAIOGND

T5
T6

+IFP ABIOVDD

IFPBIOVDD
IFPBIOGND

Y4
W5

IFPCVPROBE
IFPCRSET

AA3
R4

IFP CVPROBE

IFPCPLLVDD
IFPCPLLGND

P10
N10

+IF PCPLLVDD

IFPCIOVDD
IFPCIOGND

R5
R6

+IFPCIO VDD

VIPVDDQ
VIPVDDQ
VIPVDDQ

L6
L7
M7

VIPCAL_PD_VDDQ
VIPCAL_PU_GND

P6
P7

C44

0.1U_0402_10V6K
2
2
1K_0402_5%

1
1
R109

1
2

C55

1
1
R112
1
R107

0.1U_0402_10V6K
2
2
1K_0402_5%
2
10K_0402_5%

1
R114

2
10K_0402_5%

+5VS

C61
4.7U_0805_10V4Z

C36
0.1U_0402_16V4Z

C40
0.022U_0402_16V7K

C39
0.022U_0402_16V7K

DVOVDDQ
DVOVDDQ
DVOVDDQ

+VIP/DVOVDDQ

NV31 use only.


NV18,NV34 not use.
VIPCAL_1
VIPCAL_2

R120 2
R125 1

C49
0.022U_0402_16V7K

C53
4.7U_0805_10V4Z

C41
0.1U_0402_10V6K

C110
0.1U_0402_10V6K

+3VS
L11
1
2
KC FBM-L11-201209-221LMAT_0805
1
C24

C65
4700P_0402_25V7K

470P_0402_50V8J

NV31 use only.


NV18,NV34 not use.

+VIP/DVOVDDQ

1
C474

4.7U_0805_10V4Z

1
C15

4700P_0402_25V7K

+3VS
L20
1
2
KC FBM-L11-201209-221LMAT_0805

470P_0402_50V8J

DVOCAL_PD_VDDQ
DVOCAL_PU_GND
DVO_VREF

AB6
AB7
AF4

DVOCAL_1
DVOCAL_2

R349 1
R348 1

2
2

@49.9_0603_1%
@49.9_0603_1%

R76
1K_0603_1%

+DVO_VREF

TESTMODE
TESTMECLK

AE5
G24

R342 1

2 10K_0402_5%

R117 1

2 10K_0402_5%

DACB_VDD
DACB_VREF

AB4
AB5

+DA CA/BVDD
DAC AVREF

DACA_VDD
DACA_VREF

AG9
AH8

DAC BVREF
1
C10

2
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FBCAL_CLK_GND

C27
AK7

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

B4
B27
C11
C20
D6
D25
D29
E12
E19
F27
L28
M26
N5
W7
W26
Y7

TESTMECLK
NV31,NV34 use.
NV18 not use.
1
2

49.9_0603_1%
49.9_0603_1%
@0_0402_5%
@549_0603_1%

R71

0.1U_0402_10V6K

1K_0603_1%

1
2

C87
470P_0402_50V8J

C88
4700P_0402_25V7K

0.01U_0402_50V7K
+2.5VS

2
2
2
2

+3VS
L13
2
1
KC FBM-L11-201209-221LMAT_0805

+IFPABPLLVDD

C23

C67

0.01U_0603_50V7K

F5
E4
D3
E3

FB_DLLVDD
PLLVDD

1
1
1
1

R136
R139
R385
R137

+IFP ABIOVDD

1
2

C100
470P_0402_50V8J

1
2

C62
4700P_0402_25V7K

+3VS
L14
2
1
KC FBM-L11-201209-221LMAT_0805
1
C131

4.7U_0805_10V4Z

+3VS
L12
1
2
KC FBM-L11-201209-221LMAT_0805

+VIP/DVOVDDQ

1
2

C50
470P_0402_50V8J

C114

+FB_DLLVDD
+PLLVDD

+FB_DLLVDD

1
2

C176
4700P_0402_25V7K

+3VS

+3VS
L15
1
2
KC FBM-L11-201209-221LMAT_0805
1
C182

+AGP_PLLVDD

C471

470P_0402_50V8J

4.7U_0805_10V4Z

L19

2
KC FBM-L11-201209-221LMAT_0805
1
C43

C37
4700P_0402_25V7K

470P_0402_50V8J

+FB_DLLVDD
NV31,NV34 use.
NV18 not use.

+AGP_PLLVDD
NV31,NV34 use.
NV18 not use.
A

Compal Electronics, Inc.


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

4700P_0402_25V7K

Title

@49.9_0603_1%
@49.9_0603_1%

1
2

+PLLVDD
1 C472

AD8
AD9
AE8

+DA CA/BVDD

NV34M_EPBGA701

+1.5VS

1
R108

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

IFABVPROBE
IFPABREST

+VGA_CORE

AA4
V6

L11
L13
L14
L17
L18
L20
2AGP_VDD1 N6
0_0402_5% N11
N20
P11
P20
U11
U20
V11
V20
Y11
Y13
Y14
Y17
Y18
Y20
AA17
AA18

IFPABVPROBE
IFPABRSET

AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ
AGPVDDQ

I/O POWER

AD11
AD14
AD17
AD20
AD23
AE11
AE14
AE17
AE20
AE23

+1.5VS

nVIDIA NV31M POWER)


Size

Document Number

R ev
0.1

LA-2041
D ate:

P , 09, 2003

Sheet

18

of

56

+VGA_CORE

R24
T24
W24
AB24
A1
AK30
G6
R7
T7

NC
NC
NC
NC
NC1
NC2
NC3
NC4
NC5

T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
T_GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
NC
NC
NC

M12
M13
M14
M15
M16
M17
M18
M19
N12
N13
N14
N15
N16
N17
N18
N19
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V12
V13
V14
V15
V16
V17
V18
V19
W12
W13
W14
W15
W16
W17
W18
W19

1
2

C129
4.7U_0805_10V4Z

C75
4.7U_0805_10V4Z

C71
4.7U_0805_10V4Z

C74
1U_0603_10V6K

C130
1U_0603_10V6K

C102
1U_0603_10V6K

C96
1U_0603_10V6K

C115
0.1U_0402_10V6K

C111
0.1U_0402_10V6K

C84
0.1U_0402_10V6K

C123
0.1U_0402_10V6K

+VGA_CORE

1
2

C119
470P_0402_50V8J

C109
470P_0402_50V8J

C89
470P_0402_50V8J

C90
470P_0402_50V8J

C118
4700P_0402_25V7K

C78
4700P_0402_25V7K

C77
4700P_0402_25V7K

+2.5VS

1
2

C58
1U_0603_10V6K

1
2

C97
1U_0603_10V6K

C79
1U_0603_10V6K

C91
0.1U_0402_10V6K

C105
0.1U_0402_10V6K

C137
0.1U_0402_10V6K

C66
0.1U_0402_10V6K

C120
0.1U_0402_10V6K

1
2

C121
0.1U_0402_10V6K

C138
0.1U_0402_10V6K

1
2

C153

0.1U_0402_10V6K

+2.5VS

1
2

C136
4700P_0402_25V7K

C152
4700P_0402_25V7K

C151
4700P_0402_25V7K

C150
0.022U_0402_16V7K

C146
0.022U_0402_16V7K

C149
0.022U_0402_16V7K

+3VS

1
2

C54
1U_0603_10V6K

1
2

C59
1U_0603_10V6K

C85
0.1U_0402_10V6K

C48
0.1U_0402_10V6K

C52
0.1U_0402_10V6K

1
2

C38
0.1U_0402_10V6K

1
2

C51
0.022U_0402_16V7K

C142
0.022U_0402_16V7K
B

AH13
AH16
AH18
AH21
AH24
AH28
AK6
AK9
AK12
AK15
AK19
AK22
AK25

+3VS

1
2

G12
G15
G16
G19
G22
J24
M24

C140
0.022U_0402_16V7K

1
2

C104
4700P_0402_25V7K

C101
4700P_0402_25V7K

C128
4700P_0402_25V7K

+VGA_CORE

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R118
@470_0402_5%

A9
A12
A19
A22
A25
C3
C7
C10
C13
C18
C21
C24
D4
D28
E5
E8
E11
E14
E17
E20
E23
F1
F6
F25
F30
G3
G28
H11
H20
H26
J1
J7
J30
K3
K5
K28
L5
L8
L23
L26
M1
M30
N3
N28
P26
T1
U26
V28
W1
W30
Y8
Y23
Y26
AA5
AA28
AB1
AB30
AC11
AC20
AC26
AD28
AE1
AE6
AE25
AE30
AF5
AF8
AF11
AF14
AF17
AF20
AF23
AF26
AG4
AG27
AH3
AH7
AH10
A6

GROUND

U35E

NV34M_EPBGA701

Q8
@2N7002
2 SUSP
G

SUSP 41,52

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

nVIDIA NV31M (DECOUPLING CAP)


Size

Document Number

R ev
0.1

LA-2041
D ate:

P , 09, 2003

Sheet

19

of

56

As close as ppossible to related pin


0.1U_0402_10V6K

C178

C133

22U_1206_10V4Z

1
2

0.1U_0402_10V6K

C132

0.1U_0402_10V6K

C144

C162

0.1U_0402_10V6K

C161

R _NDQSA0
R _NDQSA3
R _NDQSA1
R _NDQSA2

R119
R142
R102
R140

1
1
1
1

2
2
2
2

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

(25mil)
R386

1K_0603_1%

1
2

C510
0.1U_0402_10V6K

17
17
17
17

B3
H12
H3
B12

DM0
DM1
DM2
DM3

N DQSA0
N DQSA3
N DQSA1
N DQSA2

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_1 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

NMCKEA

NMCLKA0

17 NMCLKA0

NMCLKA0#

17 NMCLKA0#

NMCSA1#

17 NMCSA1#
RP10

9
10
11
12
13
14
15
16

8
7
6
5
4
3
2
1

R_NMDA9
R_NMDA11
R_NMDA10
R_NMDA8
R_NMDA13
R_NMDA12
R_NMDA14
R_NMDA15

22_16P8R_1206_5%
RP12
NMDA22
NMDA23
NMDA21
NMDA20
NMDA17
NMDA19
NMDA16
NMDA18

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9

R_NMDA22
R_NMDA23
R_NMDA21
R_NMDA20
R_NMDA17
R_NMDA19
R_NMDA16
R_NMDA18

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

N12

CKE

M11
M12
R131
@120_0402_5%

NDQMA0
NDQMA3
NDQMA1
NDQMA2

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

NMRASA#
NMCASA#
NMWEA#
NMCSA0#

17 NMCKEA

NMDA9
NMDA11
NMDA10
NMDA8
NMDA13
NMDA12
NMDA14
NMDA15

0.1U_0402_10V6K

C29

C19

0.1U_0402_10V6K

0.01U_0402_16V7K

C57

C56

0.1U_0402_10V6K

1
R709

2CSA1#
@0_0402_5%

Reserved for
Hynix 8Mx32

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA54
NMDA53
NMDA55

16
15
14
13
12
11
10
9

R96
1K_0603_1%

RP9

R_NMDA48
R_NMDA49
R_NMDA50
R_NMDA51
R_NMDA52
R_NMDA54
R_NMDA53
R_NMDA55

1
2
3
4
5
6
7
8

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

R_NDQMA5
R_NDQMA6
R_NDQMA4
R_NDQMA7

R75
R86
R53
R90

1
1
1
1

2
2
2
2

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

NDQMA5
NDQMA6
NDQMA4
NDQMA7

B3
H12
H3
B12

DM0
DM1
DM2
DM3

R _NDQSA5
R _NDQSA6
R _NDQSA4
R _NDQSA7

R73
R93
R54
R95

1
1
1
1

2
2
2
2

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

N DQSA5
N DQSA6
N DQSA4
N DQSA7

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_2 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

(25mil)

R98
1K_0603_1%

C68
0.1U_0402_10V6K

NMRASA#
NMCASA#
NMWEA#
NMCSA0#
NMCKEA

NMCLKA1

17 NMCLKA1

R81
@120_0402_5%

17 NMCLKA1#

+2.5VS

NMCLKA1#
CSA1#

RP4
NMDA39
NMDA38
NMDA37
NMDA36
NMDA35
NMDA34
NMDA33
NMDA32

16
15
14
13
12
11
10
9

1
2
3
4
5
6
7
8

R_NMDA39
R_NMDA38
R_NMDA37
R_NMDA36
R_NMDA35
R_NMDA34
R_NMDA33
R_NMDA32

22_16P8R_1206_5%
NMDA56
NMDA59
NMDA60
NMDA58
NMDA57
NMDA61
NMDA62
NMDA63

K4D263238A-GC_FBGA144

16
15
14
13
12
11
10
9

2
D

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

U29

22_16P8R_1206_5%

+2.5VS

C21

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

R_NMDA45
R_NMDA47
R_NMDA42
R_NMDA40
R_NMDA41
R_NMDA44
R_NMDA43
R_NMDA46

1
2
3
4
5
6
7
8

22_16P8R_1206_5%

NMDA7
NMDA6
NMDA5
NMDA4
NMDA0
NMDA3
NMDA2
NMDA1
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA8
NMDA10
NMDA9
NMDA11
NMDA13
NMDA12
NMDA15
NMDA14
NMDA21
NMDA22
NMDA20
NMDA23
NMDA19
NMDA18
NMDA17
NMDA16

C46

0.01U_0402_16V7K

RP8

1
2
3
4
5
6
7
8

R_NMDA56
R_NMDA59
R_NMDA60
R_NMDA58
R_NMDA57
R_NMDA61
R_NMDA62
R_NMDA63

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

N12

CKE

M11
M12

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

2
2
2
2

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

1
1
1
1

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

1K_0603_1%

R115
R143
R97
R141

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

R382

17 NMA_BA0
17 NMA_BA1

R_NDQMA0
R_NDQMA3
R_NDQMA1
R_NDQMA2

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMA_BA0
NMA_BA1

16
15
14
13
12
11
10
9

+2.5VS

C20

0.01U_0402_16V7K

RP7

9
10
11
12
13
14
15
16

R_NMDA31
R_NMDA30
R_NMDA29
R_NMDA28
R_NMDA27
R_NMDA26
R_NMDA25
R_NMDA24

22_16P8R_1206_5%

0.1U_0402_10V6K

NMDA47
NMDA46
NMDA45
NMDA44
NMDA40
NMDA43
NMDA41
NMDA42
NMDA49
NMDA48
NMDA50
NMDA51
NMDA54
NMDA52
NMDA55
NMDA53
NMDA32
NMDA33
NMDA35
NMDA34
NMDA36
NMDA37
NMDA39
NMDA38
NMDA62
NMDA61
NMDA60
NMDA63
NMDA58
NMDA57
NMDA59
NMDA56

+2.5VS

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

U32

NMDA45
NMDA47
NMDA42
NMDA40
NMDA41
NMDA44
NMDA43
NMDA46

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

R_NMDA5
R_NMDA1
R_NMDA0
R_NMDA2
R_NMDA4
R_NMDA3
R_NMDA7
R_NMDA6

RP13

8
7
6
5
4
3
2
1

C473

22U_1206_10V4Z

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

16
15
14
13
12
11
10
9

22_16P8R_1206_5%

NMDA31
NMDA30
NMDA29
NMDA28
NMDA27
NMDA26
NMDA25
NMDA24

C14

0.01U_0402_16V7K

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

1
2
3
4
5
6
7
8

C139

0.01U_0402_16V7K

RP11
NMDA5
NMDA1
NMDA0
NMDA2
NMDA4
NMDA3
NMDA7
NMDA6

22U_1206_10V4Z

C154

+2.5VS

0.01U_0402_16V7K

1
2

R_NM DA[0..63]

17 R_NMDA[0..63]

C122

NM AA[0..11]

17 NMAA[0..11]

R_NDQS A[0..7]

17 R_NDQSA[0..7]

22U_1206_10V4Z

+2.5VS
R_NDQ MA[0..7]

17 R_NDQMA[0..7]

K4D263238A-GC_FBGA144

22_16P8R_1206_5%

22_16P8R_1206_5%

Compal Electronics, Inc.


Title

VGA DDR FOR CHANNEL A


Size

Document Number

R ev
0.1

LA-2041
5

D ate:

P , 09, 2003

Sheet

20

of

56

As close as ppossible to related pin

R_NDQS B[0..7]

R_NM DB[0..63]

C559

17 NMB_BA0
17 NMB_BA1

2
2
2
2

1
1
1
1

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

NDQMB0
NDQMB3
NDQMB1
NDQMB2

B3
H12
H3
B12

DM0
DM1
DM2
DM3

R _NDQSB0
R _NDQSB3
R _NDQSB1
R _NDQSB2

R158
R169
R170
R155

2
2
2
2

1
1
1
1

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

N DQSB0
N DQSB3
N DQSB1
N DQSB2

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_3 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

C244
0.1U_0402_10V6K

17
17
17
17

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

17 NMCKEB

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

NMCKEB

N12

CKE

M11
M12
R409
@120_0402_5%

NMCLKB0#

17 NMCLKB0#

NMCSB1#

17 NMCSB1#

1
R710

2CSB1#
@0_0402_5%

Reserved for
NMDB15
NMDB14
NMDB13
NMDB12
NMDB11
NMDB8
NMDB9
NMDB10

8
7
6
5
4
3
2
1

RP21

R_NMDB15
R_NMDB14
R_NMDB13
R_NMDB12
R_NMDB11
R_NMDB8
R_NMDB9
R_NMDB10

9
10
11
12
13
14
15
16

22_16P8R_1206_5%
RP15

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

NMCLKB0

17 NMCLKB0

NMDB16
NMDB17
NMDB18
NMDB19
NMDB20
NMDB21
NMDB22
NMDB23

16
15
14
13
12
11
10
9

R_NMDB16
R_NMDB17
R_NMDB18
R_NMDB19
R_NMDB20
R_NMDB21
R_NMDB22
R_NMDB23

1
2
3
4
5
6
7
8

C221

0.01U_0402_16V7K

22U_1206_10V4Z

C560

C229

0.1U_0402_10V6K

C235

C228

0.1U_0402_10V6K

0.01U_0402_16V7K

C234

C241

0.1U_0402_10V6K

C224

C239

0.01U_0402_16V7K
0.01U_0402_16V7K

Hynix 8Mx32

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

NMDB7
NMDB5
NMDB6
NMDB4
NMDB0
NMDB3
NMDB2
NMDB1
NMDB25
NMDB24
NMDB27
NMDB26
NMDB29
NMDB28
NMDB31
NMDB30
NMDB9
NMDB8
NMDB11
NMDB10
NMDB13
NMDB12
NMDB14
NMDB15
NMDB21
NMDB22
NMDB20
NMDB23
NMDB19
NMDB17
NMDB18
NMDB16

R_NMDB40
R_NMDB41
R_NMDB42
R_NMDB43
R_NMDB44
R_NMDB45
R_NMDB46
R_NMDB47

1
2
3
4
5
6
7
8

U39

22_16P8R_1206_5%
RP22
NMDB55
NMDB53
NMDB54
NMDB52
NMDB50
NMDB51
NMDB49
NMDB48

9
10
11
12
13
14
15
16

R_NMDB55
R_NMDB53
R_NMDB54
R_NMDB52
R_NMDB50
R_NMDB51
R_NMDB49
R_NMDB48

8
7
6
5
4
3
2
1

22_16P8R_1206_5%

+2.5VS

R181
1K_0603_1%

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

R_NDQMB5
R_NDQMB6
R_NDQMB4
R_NDQMB7

R161
R167
R168
R160

2
2
2
2

1
1
1
1

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

NDQMB5
NDQMB6
NDQMB4
NDQMB7

B3
H12
H3
B12

DM0
DM1
DM2
DM3

R _NDQSB5
R _NDQSB6
R _NDQSB4
R _NDQSB7

R162
R171
R172
R159

2
2
2
2

1
1
1
1

15_0402_5%
15_0402_5%
15_0402_5%
15_0402_5%

N DQSB5
N DQSB6
N DQSB4
N DQSB7

B2
H13
H2
B13

DQS0
DQS1
DQS2
DQS3

VR_VREF_4 N13
M13
L9
M10

VREF
MCL
RFU1
RFU2

(25mil)

R179
1K_0603_1%

C245
0.1U_0402_10V6K

NMRASB#
NMCASB#
NMWEB#
NMCSB0#

M2
L2
L3
N2

RAS#
CAS#
WE#
CS#

NMCKEB

N12

CKE

M11
M12

CK
CK#

C4
C11
H4
H11
L12
L13
M3
M4
N3

NC
NC
NC
NC
NC
NC
NC
NC
NC

E7
E8
E10
K6
K7
K8
K9
L5
L10
E5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NMCLKB1

17 NMCLKB1

R183
@120_0402_5%

NMCLKB1#

17 NMCLKB1#

+2.5VS

NMDB32
NMDB33
NMDB34
NMDB35
NMDB36
NMDB37
NMDB38
NMDB39

16
15
14
13
12
11
10
9

RP23

CSB1#

1
2
3
4
5
6
7
8

R_NMDB32
R_NMDB33
R_NMDB34
R_NMDB35
R_NMDB36
R_NMDB37
R_NMDB38
R_NMDB39

22_16P8R_1206_5%
RP17
NMDB56
NMDB57
NMDB59
NMDB58
NMDB60
NMDB63
NMDB61
NMDB62

K4D263238A-GC_FBGA144

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

16
15
14
13
12
11
10
9

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

NMDB40
NMDB41
NMDB42
NMDB43
NMDB44
NMDB45
NMDB46
NMDB47

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

R157
R165
R166
R156

1K_0603_1%

N5
N6
M6
N7
N8
M9
N9
N10
N11
M8
L6
M7
N4
M5

R_NDQMB0
R_NDQMB3
R_NDQMB1
R_NDQMB2

(25mil)
R178

NMAB0
NMAB1
NMAB2
NMAB3
NMAB4
NMAB5
NMAB6
NMAB7
NMAB8
NMAB9
NMAB10
NMAB11
NMB_BA0
NMB_BA1

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

2
1K_0603_1%

R180

C225

16
15
14
13
12
11
10
9

1
2
3
4
5
6
7
8

R_NMDB56
R_NMDB57
R_NMDB59
R_NMDB58
R_NMDB60
R_NMDB63
R_NMDB61
R_NMDB62

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B7
C6
B6
B5
C2
D3
D2
E2
K13
K12
J13
J12
G13
G12
F13
F12
F3
F2
G3
G2
J3
J2
K2
K3
E13
D13
D12
C13
B10
B9
C9
B8

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

D7
D8
E4
E11
L4
L7
L8
L11

NMDB47
NMDB46
NMDB45
NMDB44
NMDB40
NMDB43
NMDB41
NMDB42
NMDB53
NMDB55
NMDB52
NMDB54
NMDB51
NMDB50
NMDB48
NMDB49
NMDB38
NMDB39
NMDB36
NMDB37
NMDB34
NMDB35
NMDB33
NMDB32
NMDB62
NMDB61
NMDB60
NMDB63
NMDB58
NMDB57
NMDB59
NMDB56

+2.5VS

VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH
VSS TH

22_16P8R_1206_5%
C

+2.5VS

0.1U_0402_10V6K

C227

0.1U_0402_10V6K

F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
J6
J7
J8
J9

U40

R_NMDB31
R_NMDB30
R_NMDB29
R_NMDB28
R_NMDB27
R_NMDB26
R_NMDB25
R_NMDB24

1
2
3
4
5
6
7
8

0.1U_0402_10V6K

C232

22U_1206_10V4Z

RP20

C236

16
15
14
13
12
11
10
9

C237

RP18

22_16P8R_1206_5%

NMDB31
NMDB30
NMDB29
NMDB28
NMDB27
NMDB26
NMDB25
NMDB24

C240

0.01U_0402_16V7K

R_NMDB0
R_NMDB2
R_NMDB1
R_NMDB3
R_NMDB4
R_NMDB5
R_NMDB6
R_NMDB7

1
2
3
4
5
6
7
8

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

RP16

+2.5VS

0.01U_0402_16V7K

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

16
15
14
13
12
11
10
9

C226

22U_1206_10V4Z
NMDB0
NMDB2
NMDB1
NMDB3
NMDB4
NMDB5
NMDB6
NMDB7

0.1U_0402_10V6K

17 R_NMDB[0..63]

C246

NM AB[0..11]

17 NMAB[0..11]

0.1U_0402_10V6K

17 R_NDQSB[0..7]

22U_1206_10V4Z

R_NDQ MB[0..7]

+2.5VS
17 R_NDQMB[0..7]

K4D263238A-GC_FBGA144

22_16P8R_1206_5%

22_16P8R_1206_5%

Compal Electronics, Inc.


Title

VGA DDR FOR CHANNEL B


Size

Document Number

R ev
0.1

LA-2041
5

D ate:

P , 09, 2003

Sheet

21

of

56

CRT, TV-OUT & LVDS CONNECTOR


TV-OUT Conn.
3

P
O

CHB2012U170_0805

B_INVT_PWM

11

SN74LVC32APWLE_TSSOP14
+3VALW POWER

39 DAC_BRIG

JP20

1
2
3
4

LUMA_1

330P_0402_50V7K

Y
C
Y
C

ground
ground
(luminance+sync)
(crominance)

+LCDVDD

SUYIN_030008FR004T101ZL

C502
330P_0402_50V7K

R686
@100K_0402_5%

C12

C17

0.1U_0603_50V4Z

10U_1210_35V4Z

270P_0402_50V7K

16
16
16
16

TXOUT0+
TXOUT0TXOUT1+
TXOUT1-

16
16
16
16

TXOUT2+
TXOUT2TXOUT3+
TXOUT3-

TXOUT0+
TXOUT0TXOUT1+
TXOUT1TXOUT2+
TXOUT2TXOUT3+
TXOUT3TXCLK+
TXCLK-

16 TXCLK+
16 TXCLK+3VS

+3VS

1
3

R25

C5

1 2

R6
10K_0402_5%

100_0402_5%

ENVDD

16 ENVDD

22K

1000P_0402_50V7K

200K_0402_5%

RP6

8
7
6
5

16
16
16
16

TZOUT0+
TZOUT0TZOUT1+
TZOUT1-

16
16
16
16

TZOUT2+
TZOUT2TZOUT3+
TZOUT3-

SI2302DS-T1_SOT23

36
36
36
36

22K

Q4
DTC124EK_SOT23

C107
0.1U_0402_16V4Z

TZCLK+
TZCLKPID0
PID1
PID2
PID3

PID0
PID1
PID2
PID3

JP1

4.7U_0805_10V4Z

IPEX_20323-040E-01
D41

22K

@DAN217_SOT23

+3VS

3
2

Q2
DTC124EK_SOT23

TZOUT2+
TZOUT2TZOUT3+
TZOUT3-

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

C108

22K

TZOUT0+
TZOUT0TZOUT1+
TZOUT1-

16 TZCLK+
16 TZCLK-

+LCDVDD

1
1

1
2
R5
47K_0402_5%

4.7U_0805_10V4Z

1
2
3
4

10K_8P4R_1206_5%

2
G
Q1
2N7002

PID3
PID2
PID1
PID0

C6

Q3

2
G

R16

100K_0402_5%

R26

+5V

+LCDVDD

+12VALW

L7 2INVPW R_B+
L6 2
CHB2012U170_0805
DAC_B RIG
B_INVT_PWM
DISPOFF#

B+

C511

1.
2.
3.
4.

1
2
3
4

1
1

B+

U13D

270P_0402_50V7K

12

75_0603_1%

75_0603_1%

C497

C515

R356

R387

R74
75_0603_1%

DAN217_SOT23

CRMA_1

1
2
C512
22P_0402_50V8J

16 COMPS

D26

13

39 INVT_PWM

+3VS

16 CRMA

2
16 LUMA

C501 1
2 22P_0402_50V8J
L24
1
2
FBM-11-160808-121T_0603
L26
1
2
FBM-11-160808-121T_0603

LVDS Conn.

+3VALW

14

D25
DAN217_SOT23

D32
RB751V_SOD323
1
2

DISPOFF#

39 BKOFF#

JP15
CRT-15P

@2N7002
Q57

2
G

16,39 ENBKL

0.1U_0402_16V4Z

R551
10K_0402_5%

+CRT_VCC

CH491D_SOT23 FUSE_1A
C455

+R_CRT_VCC
F1
1
1

2
+3VS

D20

CRT Conn.

+5VS

D22
DAN217_SOT23

D23
DAN217_SOT23

D24
DAN217_SOT23

C680
220P_0402_50V8K

220P_0402_50V8K

2
4.7K_0402_5%

DDC_DATA 16

2
G
3

DDC_CLK 16

@68P_0402_50V8K
220P_0402_50V8K

Compal Electronics, Inc.

4 DACA_V SYNC_1
Y U26
SN74AHCT1G125GW_SOT353-5

Title

CRT,TV-OUT & LVDS Connector


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.7K_0402_5%

3
Q35
2N7002
1

DD C_CLK_1

R10

100K_0402_5%

C453

R1

Q34
2N7002
1
D

1
2

C459

C456

R11

4.7K_0402_5%

+5VS

2
G

2
1
2

@68P_0402_50V8K

4.7K_0402_5%

+5VS

C457

+5VS

R13

DDC_DATA_1

DACA_V SYNC_2

2
0_0603_5%

R12

100P_0402_50V8K

L2

5
1

C2

P
OE#

R4
1K_0402_5%

C454

DACA_HSYNC_2

+CRT_VCC

15P_0402_50V8J

+CRT_VCC

C458

5
1
P
OE#

0.1U_0402_16V4Z
2

16 DACA_VSYNC

15P_0402_50V8J

C460

L1
15P_0402_50V8J
1
2
0_0603_5%

18P_0402_50V8K
DACA_HSYNC_1

+CRT_VCC

U27
SN74AHCT1G125GW_SOT353-5

16 D ACA_HSYNC

C461

1
2

18P_0402_50V8K

C1
0.1U_0402_16V4Z
4

C464

75_0603_1% 75_0603_1%
+CRT_VCC

CRT_B

75_0603_1%

C463

C462

R9

R8

18P_0402_50V8K
R7

CRT_G

1
2
FCM2012C-800_0805
L4
1
2
FCM2012C-800_0805
L5
1
2
FCM2012C-800_0805

16 G
16 B

C RT_R

16 R

6
11
1
7
12
2
8
13
3
CR T_VCC 9
14
4
10
15
5

L3

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet
E

22

of

56

+3VS

RP140

4
3
2
1

5
6
7
8

P CI_REQ#2
ICH_GPIO3_PIRQF#
P CI_REQ#B
ICH_G PIO2_PIRQE#

8.2K_8P4R_1206_5%
+3VS

RP146

4
3
2
1

5
6
7
8

P C I_ I RDY#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#

8.2K_8P4R_1206_5%
+3VS

RP143

4
3
2
1

5
6
7
8

PCI_STOP#
P CI_FRAME#
P CI_REQ#0
PCI_PIRQD#

8.2K_8P4R_1206_5%
C

+3VS

26,27,29,30
26,27,29,30
26,27,29,30
26,27,29,30

RP142

4
3
2
1

5
6
7
8

ICH_GPIO5_PIRQH#
PCI_ PIRQA#
PCI_PIRQC#

8.2K_8P4R_1206_5%
+3VS

DISABLE "TOP BLOCK SWAP"

1
R232

(GNTA#)
PIDERST#
2
8.2K_0402_5%

1
R512

PCI_PLOCK#
2
8.2K_0402_5%

2
R483

P CI_REQ#A
1
10K_0402_5%

1
R222

P CI_REQ#4
2
10K_0402_5%

1
R503

P CI_REQ#1
2
10K_0402_5%

1
R479

P CI_REQ#3
2
10K_0402_5%

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

30
29
27
26

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

15 CLK_PCI_ICH
26,27,29,30 PCI_FRAME#
26,27,29,30 PCI_DEVSEL#
26,27,29,30 P C I_ IRDY#
26,27,29,30 PCI_PAR
26,27,29,30 PCI_PERR#

+1.5VS

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

E3
J1
N3
M2

C/BE0#
C/BE1#
C/BE2#
C/BE3#

P CI_REQ#0
P CI_REQ#1
P CI_REQ#2
P CI_REQ#3
P CI_REQ#4

D5
C1
C5
B6
C6

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#/GPI40

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

D4
A3
B7
C7
A4

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#/GPO48

CLK_PCI_ICH

N1

PCICLK

P CI_FRAME#
PCI_DEVSEL#
P C I_ I RDY#
PCI_PAR
PCI_PERR#
PCI_PLOCK#
P CIRST#
PCI_SERR#
PCI_STOP#
PCI_TRD Y#

D2
L3
M3
F1
K2
L2
V2
V4
L4
E5
E4

FRAME#
DEVSEL#
IRDY#
PAR
PERR#
PLOCK#
PME#
PCIRST#
SERR#
STOP#
TRDY#

P CI_REQ#A
P CI_REQ#B

A5
E7

REQA#/GPI0
REQB#REQ5#/GPI1

PIDERST#

E8
B4

GNTA#/GPO16
GNTB#/GNT5#/GPO17

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

30
29
27
26

10,13,26,27,29,30,36,39
26,27,29,30
26,27,29,30
26,27,29,30

J4
J5
G3
K4
H5
H2
J3
J2
K5
F2
M4
H4
L5
G2
K1
G5
G4
L1
B2
P5
H3
N5
C4
N4
E6
P3
D3
N2
F5
P4
F4
P2

PCIRST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

Y12
AD3
AA2
V5
AD2
AD1
AC3

A20GATE
A20M#
NC
FERR#
IGNNE#
CPU I/F
INIT#
INTR
NMI
CPUPWRGD/GPO49
RCIN#
CPUSLP#
SMI#
STPCLK#
NC/(DPSLP#)

T22
V23
A11
U24
R21
R23
U23
R22
P24
P23
P22
V24
T24
R24

SMI# 2
R537 2
R531

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HI11

H20
H21
J20
H23
M23
M21
N21
M20
L22
J22
K21
G22

H UB_HL0
H UB_HL1
H UB_HL2
H UB_HL3
H UB_HL4
H UB_HL5
H UB_HL6
H UB_HL7
H UB_HL8
H UB_HL9
HUB_HL10
HUB_HL11

CLK66

N22

HI_STBF
HI_STBS

K23
J24

HIRCOMP
HIREF
HI_VSWING

N24
L24
L20

HI_RCOM P_ICH
HI_VREF_ICH
HI_SW ING_ICH

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5
IRQ14
IRQ15
SERIRQ

B3
E1
A2
C2
D7
A6
E2
B1
Y17
Y24
F23

PCI_ PIRQA#
PCI_ PIRQB#
PCI_PIRQC#
PCI_PIRQD#
ICH_G PIO2_PIRQE#
ICH_GPIO3_PIRQF#
ICH_G PIO4_PIRQG#
ICH_GPIO5_PIRQH#
IDE_IRQ14
IDE_IRQ15
IRQ_SER IRQ

EEPROM I/F EE_CS

EE_DIN
EE_DOUT
EE_SHCLK

B10
B11
B9
A12

NC_EE_DOUT

LAN_RXD0
LAN_RXD1
LAN_RXD2
I/F LAN_TXD0
LAN_TXD1
LAN_TXD2
LAN_CLK
LAN_RSTSYNC
LAN_RST#

C10
C9
C11
D9
E9
B12
E10
D10
AA1

PCI I/F
HUB I/F

Interrupt I/F

LAN

35 PIDERST#

R515

Note:
HI_SWING_MCH, HI_VREF_MCH
trace width of 10mils and
space 7mils

226_0603_1%

0.1U_0402_16V4Z

1
2

2
C679

CLK_PCI_ICH

Close to ICH(L20)
C377
0.01U_0402_16V7K

R520
@10_0402_5%

Close to ICH ball <250mils

113_0603_1%

2
1

C379
0.1U_0402_16V4Z

1
2

Close to ICH(L24)

I
G

C667
@10P_0402_50V8K

1
R241

P CIRST#

HI_VREF_ICH
A

2
10K_0402_5%

ICH _SMLINK1

1
R547

2
10K_0402_5%

H_FERR# 5
H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_NMI 5
H_PW RGOOD 5
KBRST# 39
H_CPUSLP# 5
1
H_SMI# 5
0_0402_5%
1
H_STPCLK# 5
0_0402_5%
H_DPSLP# 5

LINK_ALERT#

1
R261

2
10K_0402_5%

GPI_11

1
R652

2
10K_0402_5%

ICH_SMB_CLK

1
R565

2
2.7K_0402_5%

ICH_SMB_DATA 1
R559

2
2.7K_0402_5%

+3VS

CLK_ICH_66M
R249

2
R234

@10_0402_5%

1
62_0402_5%

CLK_ICH_66M 15

HUB_HLSTRF 10
HUB_HLSTRS 10

2
R522

1
54.9_0603_1%

C383
@10P_0402_50V8K

+1.5VS

change to 52.3_1%
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

16,27,30
26,27
27,29
27,29

+3VS

IDE_IRQ14 35
IDE_IRQ15 34,35
SERIRQ 27,36,39

IDE_IRQ15
1
R543

2
8.2K_0402_5%

IDE_IRQ14
1
R262

2
8.2K_0402_5%

IRQ_SER IRQ 1
R511

2
10K_0402_5%

2
1
R220
@1K_0402_5%

2
1
R544
10K_0402_5%

+3V

14

C371

1
R566

1
0.1U_0402_16V4Z

1
2

147_0603_1%

ICH_SMB_CLK 12,13,15
ICH_SMB_DATA 12,13,15

CLK_ICH_66M

LAN_RST#

ICH _SMLINK0

+3VALW

GATEA20 39
H_A20M# 5

IC H5

HI_SW ING_ICH

R513

INTRUD ER#
ICH _SMLINK0
ICH _SMLINK1
LINK_ALERT#
ICH_SMB_CLK
ICH_SMB_DATA
GPI_11

INTRUDER#
SMLINK0
SMLINK1
SMB I/F LINKALERT#
SMBCLK
SMBDATA
SMBALERT#/GPI11

ICH5/(ICH5-M)

2
10K_0402_5%

8.2K_8P4R_1206_5%

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PC I_AD10
PC I_AD11
PC I_AD12
PC I_AD13
PC I_AD14
PC I_AD15
PC I_AD16
PC I_AD17
PC I_AD18
PC I_AD19
PC I_AD20
PC I_AD21
PC I_AD22
PC I_AD23
PC I_AD24
PC I_AD25
PC I_AD26
PC I_AD27
PC I_AD28
PC I_AD29
PC I_AD30
PC I_AD31

1
R264

HUB_HL [0..10]

10 HUB_HL[0..10]
PCI_TRD Y#
ICH_G PIO4_PIRQG#
PCI_ PIRQB#

INTRUD ER#

5
6
7
8

+RTCVCC

4
3
2
1

U49A

OE#

RP144

PCI_AD[0..31]

26,27,29,30 PCI_AD[0..31]
+3VS

U51A

O 3
+3V POWER

B_PCIRST# 16,35
A

SN74LVC125APWLE_TSSOP14

C374
0.01U_0402_16V7K

Close to ICH ball <250mils

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH5-PCI/HUB/LAN
Size

Document Number

R ev
0.1

LA-2041
D ate:

P , 09, 2003

Sheet

23

of

56

+3VALW

H_C PUPERF#
ICH_VGATE
2
0_0402_5%
ICH _AC_BITCLK
IC H_AC_RST_R#
ICH_AC_SD IN0
ICH_AC_SD IN1

1
R528

D8
C12
E12
D12
A13
ICH_ AC_SDOUT_R A9
I CH_AC_SYNC_R B8

31,38 ICH_AC_BITCLK
+3VS

2
R477

1 ICH _AC_SDOUT
@8.2K_0402_5%

2
R225
2
R230
2
R229

1 ICH _AC_BITCLK
@10K_0402_5%
1 ICH_AC_SD IN0
@10K_0402_5%
1 ICH_AC_SD IN1
@10K_0402_5%

31 ICH_AC_SDIN0
38 ICH_AC_SDIN1

LPC_A D[0..3]

13,36,39 LPC_AD[0..3]

36 LPC_DRQ#1
13,36,39 LPC_FRAME#
+3VALW

4
3
2
1

USB_OC3#
USB_OC5#
USB_OC7#
USB_OC1#

5
6
7
8

37
37
35
35
37
37
38
38
37
37
35
35

10K_8P4R_1206_5%

+RTCVCC

2
R577
2
R576

ICH_INTVRMEN

1
330K_0402_5%
1
@10K_0402_5%

T5
R4
R3
U4
U5
R2
T4

LPC_DRQ1#
LPC_FRAME#

USBP2+
USBP2USBP3+
USBP3USBP4+
USBP4USBP5+
USBP5USBP6+
USBP6USBP7+
USBP7USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

37 USB_OC0#
37 USB_OC2#
37 USB_OC4#
37 USB_OC6#

Note:
USBRBIAS keep less than 500mils

1
2
R500
22.6_0603_1%

+3VS
SPKR
1
@1K_0402_5%

2
R504

35 SIDERST#

33 SPKR

CLK_ICH_48M

CLK_ICH_14M

R508
@10_0402_5%

R231

5 H_THERMTRIP#

H_THERMTRIP# 1
R258

15 CLK_ICH_14M

T21
2
0_0402_5%

CLK_ICH_14M

C353
@4.7P_0402_50V8C

C650
@10P_0402_50V8K

15 CLK_ICH_48M

CLK_ICH_48M

IDE I/F

I/F

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

AB16
Y13
Y14
AC14
AA14
AC15
AD14
AB14
AD15
Y15
AD16
AA15
AC16
Y16
AA16
AB17

IDE_ PDD0
IDE_ PDD1
IDE_ PDD2
IDE_ PDD3
IDE_ PDD4
IDE_ PDD5
IDE_ PDD6
IDE_ PDD7
IDE_ PDD8
IDE_ PDD9
IDE _PDD10
IDE _PDD11
IDE _PDD12
IDE _PDD13
IDE _PDD14
IDE _PDD15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

W22
W23
W21
V22
V20

ID E_SDA0
ID E_SDA1
ID E_SDA2
ID E_SDCS1#
ID E_SDCS3#

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY

Y20
W20
Y23
Y22
Y21

IDE_S DDREQ
IDE_ SDDACK#
IDE_SD IOR#
IDE_ SDIOW #
ID E _ SDIORDY

AA22
AB23
AD23
AD24
AB21
AC21
AB20
AC20
Y19
AD22
AC22
AA20
AB22
AC24
AB24
AA23

IDE_ SDD0
IDE_ SDD1
IDE_ SDD2
IDE_ SDD3
IDE_ SDD4
IDE_ SDD5
IDE_ SDD6
IDE_ SDD7
IDE_ SDD8
IDE_ SDD9
IDE _SDD10
IDE _SDD11
IDE _SDD12
IDE _SDD13
IDE _SDD14
IDE _SDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

USB I/F

USBRBIAS
USBRBIAS#
GPIO32
GPIO33
GPIO34

SATA I/F
GPIO

INTVRMEN

MISC

SPKR
THRMTRIP#

F20

CLK14

F24

CLK48

@10_0402_5%

OC0#
OC1#
OC2#
OC3#
OC4#/GPI9
OC5#/GPI10
OC6#/GPI14
OC7#/GPI15

E24

I/F

LAD0
LAD1
LAD2
LPC
LAD3
LDRQ0#
LDRQ1#/GPI41
LFRAME#

C15
D15
D14
C14
B14
A14
D13
C13

T1
G23
F21

SPKR

AC_BIT_CLK
AC_RST#
AC_SDIN0
AC97
AC_SDIN1
AC_SDIN2
AC_SDOUT
AC_SYNC

USBP0P
USBP0N
USBP1P
USBP1N
USBP2P
USBP2N
USBP3P
USBP3N
USBP4P
USBP4N
USBP5P
USBP5N
USBP6P
USBP6N
USBP7P
USBP7N

US BRBIAS A24
B24

SIDERST#

GPO23/(SSMUXSEL)
IST
GPO22/(CPUPERF#)
VRMPWRGD/(VGATE)

C23
D23
A22
B22
C21
D21
A20
B20
C19
D19
A18
B18
C17
D17
A16
B16

ICH_INTVRMEN AD10

Disable timer timeout

2 1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

37 USBP0+
37 USBP0-

RP141

F22
U20
R20

CLOCK

SATA0TXP
SATA0TXN
SATA0RXN
SATA0RXP

AA8
AB8
AD7
AC7

SATA1TXP
SATA1TXN
SATA1RXN
SATA1RXP

AA10
AB10
AD9
AC9

IDE_PDDREQ 35
IDE_PDDACK# 35
IDE_PDIOR# 35
IDE_PDIOW # 35
ID E _ PDIORDY 35

IN1

PM_SLPS5#

IN2

ICH_SYNC#

SYS_PWROK

ICH_PWROK
+3VS
ID E _ PDIORDY

2
R572

1
4.7K_0402_5%

ID E _ SDIORDY

2
R546

1
4.7K_0402_5%

+3VS
IDE_SDA0 34,35
IDE_SDA1 34,35
IDE_SDA2 34,35
IDE_SDCS1# 34,35
IDE_SDCS3# 34,35

SATABIAS 2
R260

CLK100P
CLK100N

AC5
AD5

RTCRST#

AA12

IC H_RTCRST#

RTCX1

AC11

ICH_RTCX1

RTCX2

AB12

ICH_RTCX2

R580
@1K_0402_5%

R571
@220_0402_5%

IDE_SDDREQ 34,35
IDE_SDDACK# 34,35
IDE_SDIOR# 34,35
IDE_SDIOW # 34,35
ID E _ SDIORDY 34,35

2
Q60
@MMBT3904_SOT23

R582
@220_0402_5%

2
Q59
@MMBT3904_SOT23

10 IC H _SYNC#

IDE_PDD[0 ..15]

2 ICH _PW ROK


0_0402_5%

1
R570

7,42 SYS_PW ROK

IDE_PDD[0..15] 35

IDE_SDD[0 ..15]

IDE_SDD[0..15] 34,35

2
1
R476
4.7K_0402_5%

2
1
J1
JOPEN

2
1ICH_V BIAS
R569
@10M_0603_5%

1
24.9_0603_1%
ICH_RTCX1

R573

+RTCVCC

200K_0402_5%
C686
1U_0805_25V4Z

Note:
SATABIAS keep less than 500mils

Y11
Y9

PM_SLP_S5# 39

SN74AHC1G08HDCK_TSSOP5

IC H_RTCRST#

SATARBIAS
SATARBIAS#

U17

5 H_CPUPERF#
50,52,53 VGATE

IDE_P DDREQ
IDE_ PDDACK#
IDE_PD IOR#
IDE_ PDIOW #
ID E _ PDIORDY

EC_THRM#

39 EC_THRM#

AC17
AC18
AD18
AA17
AA18

PM_SLPS4#

1
0.1U_0402_16V4Z

SUSCLK
1
@10K_0402_5%
EC_RSMRST#
1
10K_0402_5%

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY

2
C392

IDE_PDA0 35
IDE_PDA1 35
IDE_PDA2 35
IDE_PDCS1# 35
IDE_PDCS3# 35

2
R542
2
R265

15,53 STP_CPU#
15 STP_PCI#
27 SUSCLK

ID E_PDA0
ID E_PDA1
ID E_PDA2
ID E_PDCS1#
ID E_PDCS3#

H_C PUPERF#
1
10K_0402_5%

AA19
AD19
AC19
AB19
Y18

+3VALW

USB_EN# 37

2
R257

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

A C IN 39,44,46

+CPU_CORE

PM

A C IN

1
D36

EC_RSMRST#
PM_SLP_S1#
PM_SLP_S3#
PM_SLPS4#
PM_SLPS5#
STP_CPU#
STP_PCI#
SUSCLK

RB751V_SOD323

39 EC_SW I#
39,45 EC_RSMRST#
15 PM_SLP_S1#
39 PM_SLP_S3#

GPI

IC H _ACIN

+3VS
EC_SMI# 39
EC_SCI# 39
EC_LID_OUT# 39
EC_FLASH# 40

ICH _PW ROK

U3
Y2
W4
W5
W3
V3
W2

PM_DPRSLPVR

53 PM_DPRSLPVR
39 PBTN_OUT#

R536
100K_0402_5%
IC H _ACIN 1
2
EC_SMI#
EC_ SCI#
EC_LID_OUT#

GPI7
GPI8
GPI12
GPI13
GPIO25
GPIO27
GPIO28

ICH5/(ICH5-M)

GPI6/(AGPBUSY#)
SYS_RESET#
TP0/(BATLOW#)
GPO21/(C3_SAT#)
GPIO24/(CLKRUN#)
NC/(DPRSLPVR)
PWRBTN#
PWROK
RI#
RSMRST#
GPO19/(SLP_S1#)
SLP_S3#
SLP_S4#
SLP_S5#
GPO20/(STP_CPU#)
GPO18/(STP_PCI#)
SUSCLK
SUS_STAT#/LPCPD#
THRM#

+3VS

U49B

R5
U1
AB2
R1
AC1
P20
Y4
AC12
AB3
AB13
T20
W1
U2
AA3
U22
U21
Y1
AB1
T2

SYS_RESET#
TP0_PU

ICH_VGATE
1
10K_0402_5%
EC_THRM#
1
4.7K_0402_5%
PM_CLKRUN#
1
10K_0402_5%

R251
10K_0402_5%
1
2

1
R578

C691
@0.047U_0402_16V4Z
2
1
R575
@1K_0402_5%
2
@22M_0603_5%

R568

ICH_RTCX2

2
R567

1
10M_0402_5%

@2.4M_0603_1%

2
R253
2
R530
2
R653

+3VS

TP0_PU
1
10K_0402_5%
SYS_RESET#
1
8.2K_0402_5%

2
R550
2
R540

X6
32.768KHZ_12.5PF_CM155
C697

IC H5

12P_0402_50V8J

C698
12P_0402_50V8J

ICH _AC_BITCLK

+CPU_CORE

31,38 ICH_AC_RST#

1
R254

2 H_THERMTRIP#
62_0402_5%

31,38 IC H _AC_SYNC

Near ICH

31,38 ICH_AC_SDOUT

2
R486
2
R485
2
R484

1 IC H_AC_RST_R#
33_0402_5%
1 I CH_AC_SYNC_R
33_0402_5%
1 ICH_ AC_SDOUT_R
33_0402_5%

R223

2
1

26,27,29,30,36,39 PM_CLKRUN#

C354
@10P_0402_50V8K

PM_CLKRUN#

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@10_0402_5%

Compal Electronics, Inc.


ICH5-IDE/LPC/PM/GPIO/USB

Size

Document Number

R ev
0.1

LA-2041
D ate:

P , 09, 2003

Sheet

24

of

56

1
1
2

C373
0.1U_0402_16V4Z

C397
0.1U_0402_16V4Z

C385
0.1U_0402_16V4Z

C363
0.1U_0402_16V4Z

C381
0.1U_0402_16V4Z

1
2

C389

0.1U_0402_16V4Z

Place near
ball T22

0.1U_0402_16V4Z

+1.5VS

1
+3VALW

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

K10
K12
K13
L19
P19
R10
R6
H24
J19
K19
M15
N15
N23
E15
F15
F14
W19
R12
W9
W10
W11
W6
W7
W8
E22

+1.5VS

VCCSUS1_5_A
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_B
VCCSUS1_5_C
VCCSUS1_5_C

F19
Y5
AA4
AB4
F7
F8

VCCSUS15_A
VCCSUS15_B

V5REF
V5REF

A8
W14

ICH_V 5REF

V5REF_SUS

E16

ICH_ V5REF_SUS

V_CPU_IO
V_CPU_IO
V_CPU_IO

R15
R19
T19

+CPU_CORE

VCCSATAPLL
VCCSATAPLL

AA6
AB6

+1.5VS

VCCUSBPLL

C24

1
2

C393
0.1U_0402_16V4Z

C401
0.1U_0402_16V4Z

C386
0.1U_0402_16V4Z

C368
0.1U_0402_16V4Z

C395
0.1U_0402_16V4Z

1
2

C360
0.1U_0402_16V4Z

C372

C382
0.1U_0402_16V4Z

0.01U_0402_16V7K

C384
0.01U_0402_16V7K

Place near ball D24

Place0.1u near ball(VSS)


G24,H24,K24,M24,AD4
and AD18; 0.01u near to
ball AD8.

+1.5VS

+3VALW

1
1
2

C356
0.01U_0402_16V7K

C361
0.1U_0402_16V4Z

C357
0.1U_0402_16V4Z

C391
0.1U_0402_16V4Z

C387

C378
0.1U_0402_16V4Z

1U_0603_10V6K

C394

0.01U_0402_16V7K

Place near ball AD6

Place0.1u near ball(VSS)


A17,A23,V1.Addition cap near
A15,A19
+5VS

+3VS

Decoupling Reference Document:


Springdale Chipset Platform Design guide Rev1.11
(12474)page278

D30
RB751V_SOD323

R482

1K_0402_5%

ICH_V 5REF

V CCSUS15_C

1
2

C362
0.01U_0402_16V7K

Place near
ball (VSS)A7

C398
0.01U_0402_16V7K

Place near
ball (VSS)AD4

C390
0.1U_0402_16V4Z

C349
0.1U_0402_16V4Z

C636
1U_0603_10V6K
B

C359
0.01U_0402_16V7K

Place near ball A8

Place near
ball (VSS)A19

+3VALW +5VALW

D12
RB751V_SOD323
+5VS

+1.5VS

AD11

+RTCVCC

P14
P15
P21
R11
R14
T23
T3
T6
U19
V1
V21
W16
W18
Y3
Y6
Y7
Y8
Y10

C402

0.1U_0402_10V6K

ICH_ V5REF_SUS

1
C796
1000P_0402_50V7K

1
C797
1000P_0402_50V7K

C358
0.1U_0402_16V4Z

R233
1K_0402_5%

C355
0.1U_0402_16V4Z

1
2

C364
1U_0603_10V6K

Place near ball(VSS) A17


Place near ball AD11
A

Compal Electronics, Inc.


Title

IC H5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

C388

+1.5VS

E18
B15
E11
F10
F11
E13
E14
U6
V6
F16
F17
F18
K15

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Place near ball(VSS)


D1,A7,H1,P1,W24 and A21

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCRTC

GND

B5
F6
G1
H6
K6
L6
M10
N10
P6
R13
V19
W15
W17
W24
AD13
AD20
G19
G21

Power

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

ICH5/(ICH5-M) VCC3_3

+CPU_CORE
+3VS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+3VS

U49C

A1
A7
A10
A15
A17
A19
A21
A23
AA5
AA7
AA9
AA11
AA13
AA21
AA24
AB5
AB7
AB9
AB11
AB15
AB18
AC2
AC4
AC6
AC8
AC10
AC13
AC23
AD4
AD6
AD8
AD17
AD21
AD12
B13
B17
B19
B21
B23
C3
C8
C16
C18
C20
C22
D1
D6
D11
D16
D18
D20
D22
D24
E17
E19
E20
E21
E23
F3
F9
G6
G20
G24
H1
H19
H22
J6
J21
J23
K3
K11
K14
K20
K22
K24
L10
L11
L12
L13
L14
L15
L21
L23
M1
M5
M11
M12
M13
M14
M22
M24
N11
N12
N13
N14
N20
P1
P10
P11
P12
P13

Size
D ate:

ICH5 Power & Decoupling

Document Number

LA-2041

P , 09, 2003

Sheet
1

25

R ev
0.1
of

56

LAN Realtek RT8101L

0.1U_0402_16V4Z

TRACE=20mil

EEDO
EEDI
EESK
EECS

52
53
54
55

LAN_EEDO
LA N_EEDI
LAN_EECLK
LAN_EECS

LED0
LED1
LED2

78
77
76

ACTIVITY#
LINK10_100#

TXD+
TXD-

72
71

LAN_TD+
LAN_TD-

RXIN+
RXIN-

68
67

LAN_RD+
LA N_RD-

X1

61

LAN_X1

X2

60

LAN_X2

LWAKE

64

ISOLATE#

74

RTSET

65

RTT3

63

VCTRL

56

6
22
37
49
90
95

VDD
VDD
VDD
VDD
VDD
VDD

GPIO0
GPIO1

DGND1
DGND2
DGND3
DGND4
DGND5
AGND1
AGND2
AGND3

2
16
31
44
88
62
66
73

Power

Layout Note
H0013 pls close to
conn.

0.1U_0402_16V4Z

Closed to PULSE H0013

U28

10K

R313
75_0402_5%

C476

R312
75_0402_5%

0.1U_0402_16V4Z

R J45_PR

C485
0.1U_0402_16V4Z

@22U_1206_10V4Z

+3V

Y1
25MHZ_20PF_6X25000017
LAN_X1
LAN_X2
C180
27P_0402_50V8J

ACTIVITY#

Amber LED+

11

Amber LED-

PR4+

PR2-

PR3-

PR3+

RJ45_RX+

PR2+

RJ45_TX-

PR1-

RJ45_TX+

PR1+

10K

R15
75_0402_5%

2
3

NC

SHLD4

16

SHLD3

15

10

Green LED-

Green LED+

SHLD2

14

SHLD1

13

AMP 440470-4 RJ45 with LED

LINK10_100#

NC

PR4-

Q36
DTA114YKA_SOT23
1
1
2
R314
300_0402_5%

NC

47K

NC

SANTA_130403-1

JP16

12

RJ45_RX-

C179
27P_0402_50V8J

+3V
JP30

Q38
DTA114YKA_SOT23
1
1
2
R331
300_0402_5%

RJ11

+2.5V_LAN
C177

1 2
2

C540
@10P_0402_50V8K

RJ45_TX+
RJ45_TX-

reserve transistor for ver.C

RTL8101L_LQFP100

R393
@10_0402_5%

RJ45_RX+
RJ45_RX-

16
15
14
13
12
11
10
9

RX+
RXCT
NC
NC
CT
TX+
TX-

Pulse H0013
(NS0013)

49.9_0603_1%

RD+
RDCT
NC
NC
CT
TD+
TD-

0.1U_0402_16V4Z

R327

47K

R326
49.9_0603_1%

C484

Q9
@2SB1197K_SOT23

LAN_TD+
LAN_TD-

+3V

Closed to RT8101L

2
15K_0402_5%
2
5.6K_0603_1%

1
R146
1
R383

+3VS

2
1K_0402_5%

R325
49.9_0603_1%

1
R145

R324
49.9_0603_1%

1
2
3
4
5
6
7
8

+3V

C504

LAN_RD+
LA N_RD-

100
99
51
69

+3V

1
2
R384
5.6K_0402_5%

AT93C46-10SI-2.7_SO8

1
3
4
5
7

ROMCS/OEB
NC

5
6
7
8

GND
NC
NC
VCC

R14
75_0402_5%

R J45_PR

@0.1U_0402_16V4Z LAN GND

C470
1000P_1206_2KV7K

Termination plane should be copled to chassis ground

RST#
PCICLK
CLKRUN#

DO
DI
SK
CS

C449

C450
4.7U_0805_10V4Z

81
97
50

AC_RST#
AC_SYNC
AC_DOUT
AC_DIN
AC_BCK

TRACE=30mil

U34

4
3
2
1

+3V_LAN_VDD3

+3V

INTA#
INTB#
PME#

75

AVDD

80
79
57

TRACE=20mil

10K

REQ#
GNT#

+3V_LAN_VDD2

+2.5V_LAN

1
2
L25
LQG21N4R7K10_0805

83
82

AVDD

70

RTL8101L has internal


+2.5V generator at pin58

47K

23 PCI_REQ#3
23 PCI_GNT#3

C LK_PCI_LAN

+3V_LAN_VDD1

C505

PERR#
SERR#

+3V

59

C506

25
26

AVDD

0.1U_0402_16V4Z
TRACE=20mil

TRACE=20mil

23,27,29,30 PCI_PERR#
23,27,29,30 PCI_SERR#

C LK_PCI_LAN

+2.5V_LAN

C507

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

10,13,23,27,29,30,36,39 PCIRST#
15 CLK_PCI_LAN
24,27,29,30,36,39 PM_CLKRUN#

58

0.1U_0402_16V4Z

IDSEL

98
24
18
19
20
21
23

23,27 PCI_PIRQB#

AVDD25

Power

C/BE#0
C/BE#1
C/BE#2
C/BE#3

23,27,29,30 PCI_PAR
23,27,29,30 PCI_FRAME#
23,27,29,30 P C I_ IRDY#
23,27,29,30 PCI_TRDY#
23,27,29,30 PCI_DEVSEL#
23,27,29,30 PCI_STOP#

27,29,30,39 LAN_PME#

48
94

2 L AN_IDSEL
100_0402_5%

38
27
17
84

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

C509

VDD25
VDD25

PC I_AD17 1
R395

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C508

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

22U_1206_16V4Z

IDSEL:PCI_AD17

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

C534

23,27,29,30
23,27,29,30
23,27,29,30
23,27,29,30

C519

Place closed to
RTL8101L pin58

+2.5V_DLAN

U37

PCI I/F
LAN I/F

PCI_AD[0..31]

23,27,29,30 PCI_AD[0..31]

47
46
45
43
42
41
40
39
36
35
34
33
32
30
29
28
15
14
13
12
11
10
9
8
96
93
92
91
89
87
86
85

0_0603_5%

AC-Link

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PC I_AD10
PC I_AD11
PC I_AD12
PC I_AD13
PC I_AD14
PC I_AD15
PC I_AD16
PC I_AD17
PC I_AD18
PC I_AD19
PC I_AD20
PC I_AD21
PC I_AD22
PC I_AD23
PC I_AD24
PC I_AD25
PC I_AD26
PC I_AD27
PC I_AD28
PC I_AD29
PC I_AD30
PC I_AD31

R388

TRACE=20mil
+2.5V_LAN

+3V

C527

C516

C550

C549

C536

C529

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Title

Compal Electronics, Inc.


LAN REALTEK RTL8101L

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

R ev
0.1

LA-2041
D ate:

P , 09, 2003

Sheet

26

of

56

U5A

R404

100_0402_5%

SERIRQ
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCM_PME#

IDSELSM
IDSELSD
IDSELVI
IDSELFL

IRQ_SER IRQ
PCI_ PIRQA#
PCI_ PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCM_PME#

T14
W15
V14
V15
U15
U12

IRQDT#
INTA#
INTB#
INTC#
INTD#
PME#

T4

PCICLK

39 PCM_SUSP#
R410

PCM_FCMODE
100_0402_5%
+3V

2
@0_0402_5%

P CIRST#

2
0_0402_5%

1
R688

P CLR#

CLK_PCI_PCM
R445
33_0402_5%

CLK32
PCLR#
SUSPEND#
FCMODE

H6
P6
P15
R5
R6
R7
R15
R16
T6
T15

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

L9
L10
L11
L12
M9
M10
M11
M12

GND
GND
GND
GND
GND
GND
GND
GND

SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7

M1
N4
N5
P4
N1
N2
P2
N3

SMD0
SMD1
SMD2
SMD3
SMD4
SMD5
SMD6
SMD7

SMCLE
SMALE
SMCE#
SMWE#
SMRE#
SMWP#

M3
M2
L1
L3
L2
K3

SMRB#
SMCD#
SMLVD
SMWPD#
SMEJSW#

M4
L5
L4
K4
K5

SMLED#
SMLOCK#
SMEJCT#

M5
K2
K1

SMVC3EN

P3

GPIO Interface

C ARD_RST 1
R687

W3
Y11
Y6
U13

S DPW R

System
Interface

SUSCLK
P CLR#

24 SUSCLK

R1

Power Supply

RSV0
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
RSV11
RSV12
RSV13
RSV14
RSV15
RSV16
RSV17
RSV18
RSV19
RSV20

V12
W12
Y12
W11
U6
Y4
U9
U10
V9
U4
U5
W4
W2
V2
U3
U2
V6
P5
V1
V5
V4

RSV#0
RSV#1
RSV#2
RSV#3
RSV#4
RSV#5
RSV#6
RSV#7
RSV#8

V11
Y5
V8
V7
U7
U8
U11
Y3
W7

GPO0
GPO1
GPO2
GPO3
GPO4
GPO5
GPO6
GPO7
GPO8
GPO9

V10
Y10
T10
T9
W9
Y9
W8
Y8
Y7
W6

GND
GND
GND
GND
GND
GND

T5
T16
W1
W20
Y2
Y19

C589

C561

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

SDLED 43

U41

+3V

S DPW R

VIN

FLG#

VOUT

GND

CE

+SD3_VCC
C554

RT9702_SOT23-5

R401
20K_0402_5%

4.7U_0805_10V4Z

+3V

+3V

R397

SDW P#
10K_0402_5%
SD C_D1
SD C_D0

12

SD CMD
SD C_D3

8
7
6
5
4
3
2
1

SD C_D2

S DCLK
+SD3_VCC

JP2

Wr_Pt

Com
SD I/O

SD4
SD3
Vss2
SDCLK
Vdd
Vss1
SD2
SD1
SD5

11
13

1
R674
+3V

2
@0_0402_5%

N16
M16
L16
K16

CLK_PCI_PCM

15 CLK_PCI_PCM

IDSELSM
IDS ELSD
IDSE LVI
IDS ELFL

SDPWR

C574

0.1U_0402_10V6K

R191
10K_0402_5%

CARD_DET#

100_0402_5%

FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
REQ#
GNT#
CLKRUN#
PCIRST#

SDC D#
SDW P#
S DLED

C584

0.1U_0402_10V6K

10

SDC D#

ALPS_SCDA1A0301

+3V
R441

100K_0402_5%

R436

100K_0402_5%

RP111
SMD3
SMD2
SMD1
SMD7

1
2
3
4

8
7
6
5

+3V

100K_8P4R_1206_5%
RP53
SMD6
SMD4
SMD5
SMD0

+3V
R419
R423
R434
R435

100K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%

+3V

1
2
3
4

C776
1U_0805_25V4Z

TC6385XB_PBGA328

8
7
6
5

+3V

100K_8P4R_1206_5%

+3V

R689
100K_0402_5%

RP54

13

14

10K_0402_5%

23,36,39
16,23,30
23,26
23,29
23,29
26,29,30,39

R405

W18
W17
Y18
Y17
W16
Y16
Y15
W19
K20

T1
P1
V13

C556

0.1U_0402_10V6K

U55F

12

1
SN74LVC14APWLE_TSSOP14
+3V POWER

U55C

R406

100_0402_5%

P CI_FRAME#
P C I_ I RDY#
PCI_TRD Y#
PCI_STOP#
PCI_DEVSEL#
P CI_REQ#2_F
PCI_GNT#2
PM_CLKRUN#
P CIRST#

SDCD#
SDWP
SDLED

Other Pins

PC I_AD22
PC I_AD20 R403
PC I_AD21
R407
@100_0402_5%

PAR
PERR#
SERR#

SD CMD
S DCLK

C586

0.1U_0402_10V6K

C ARD_RST

23 PCI_GNT#2
24,26,29,30,36,39 PM_CLKRUN#
10,13,23,26,29,30,36,39 PCIRST#

Y14
V16
U16

SDCMD
SDCLK

U1
R4

C577

PCI_FRAME#
P C I_ IRDY#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#

PCI_PAR
PCI_PERR#
PCI_SERR#

SD C_D0
SD C_D1
SD C_D2
SD C_D3

14

23,26,29,30
23,26,29,30
23,26,29,30
23,26,29,30
23,26,29,30

C/BE#0
C/BE#1
C/BE#2
C/BE#3

R2
T2
R3
T3

23,26,29,30 PCI_PAR
23,26,29,30 PCI_PERR#
23,26,29,30 PCI_SERR#

V20
V19
V18
V17

PCI Interface

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

SDCD0
SDCD1
SDCD2
SDCD3

Q72
2N7002

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

1
2
2

1P CI_REQ#2_F

K17
K18
K19
L17
L18
L19
L20
M17
M18
M19
M20
N17
N18
N19
N20
P17
P18
P19
P20
P16
R17
R18
R19
R20
T17
T18
T19
T20
U17
U18
U19
U20

SmartMedia Interface

R706
100K_0402_5%

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PC I_AD10
PC I_AD11
PC I_AD12
PC I_AD13
PC I_AD14
PC I_AD15
PC I_AD16
PC I_AD17
PC I_AD18
PC I_AD19
PC I_AD20
PC I_AD21
PC I_AD22
PC I_AD23
PC I_AD24
PC I_AD25
PC I_AD26
PC I_AD27
PC I_AD28
PC I_AD29
PC I_AD30
PC I_AD31

SD Interface

+5VS

+3V

PCI_C/BE #[3..0]

P CI_REQ#2

PCI_AD[31..0]

23,26,29,30 PCI_AD[31..0]
23,26,29,30 PCI_C/BE#[3..0]

23 PCI_REQ#2

SD CMD
SD C_D1
SD C_D0
SD C_D2

R690
100K_0402_5%

1
2
3
4

8
7
6
5

+SD3_VCC

100K_8P4R_1206_5%

SN74LVC14APWLE_TSSOP14
+3V POWER

C588
10P_0402_50V8K

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

D ate:

CARDBUS & SD CONN (1/2)


Document Number
LA-2041
P , 09, 2003

R ev
0.1
Sheet

27

of

56

RP19
U5B

S2_A16 1
2
R402
33_0402_5%

S2_D0
S2_D1
S2_D2
S2_D3
S2_D4
S2_D5
S2_D6
S2_D7
S2_D8
S2_D9
S2_D10
S2_D11
S2_D12
S2_D13
S2_D14
S2_D15

F17
F19
G16
E10
C10
E11
C11
A11
F18
F20
G18
D10
B10
D11
B11
E12

S2_A0
S2_A1
S2_A2
S2_A3
S2_A4
S2_A5
S2_A6
S2_A7
S2_A8
S2_A9
S2_A10
S2_A11
S2_A12
S2_A13
S2_A14
S2_A15
R_S2_A16
S2_A17
S2_A18
S2_A19
S2_A20
S2_A21
S2_A22
S2_A23
S2_A24
S2_A25

E19
D20
D18
C20
C18
A18
B18
B17
E14
B13
B12
D13
A16
C14
A14
C16
E17
A13
D14
B14
D15
B15
D16
B16
C17
A17

S2_BVD1
S2_BVD2
S2_CD1#
S2_CD2#
S2_RD Y#
S2_WAIT#
S2_WP
S2_INPACK#
S2_CE1#
S2_CE2#
S2_WE#
S2 _IORD#
S2_IOW R#
S2_OE#
S2_VS1
S2_VS2
S2_REG#
S2_RST
B VCC3_EN
B VCC5_EN
BEN0
BEN1

+S2_VCC

U38

SLTA30/D0/CAD27
SLTA31/D1/CAD29
SLTA32/D2/RESERVED
SLTA2/D3/CAD0
SLTA3/D4/CAD1
SLTA4/D5/CAD3
SLTA5/D6/CAD5
SLTA6/D7/CAD7
SLTA64/D8/CAD28
SLTA65/D9/CAD30
SLTA66/D10/CAD31
SLTA37/D11/CAD2
SLTA38/D12/CAD4
SLTA39/D13/CAD6
SLTA40/D14/RESERVED
SLTA41/D15/CAD8

A8
D9
B9
J3
H5
H2
G5
G3
E9
C9
A9
J2
H3
H1
G4
G2

S1_D0
S1_D1
S1_D2
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_D8
S1_D9
S1_D10
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15

SLTB29/A0/CAD26
SLTB28/A1/CAD25
SLTB27/A2/CAD24
SLTB26/A3/CAD23
SLTB25/A4/CAD22
SLTB24/A5/CAD21
SLTB23/A6/CAD20
SLTB22/A7/CAD18
SLTB12/A8/CCBE#1
SLTB11/A9/CAD14
SLTB8/A10/CAD9
SLTB10/A11/CAD12
SLTB21/A12/CCBE#2
SLTB13/A13/CPAR
SLTB14/A14/CPERR#
SLTB20/A15/CIRDY#
SLTB19/A16/CCLK
SLTB46/A17/CAD16
SLTB47/A18/RESERVED
SLTB48/A19/CBLOCK#
SLTB49/A20/CSTOP#
SLTB50/A21/CDEVSEL#
SLTB53/A22/CTRDY#
SLTB54/A23/CFRAME#
SLTB55/A24/CAD17
SLTB56/A25/CAD19

SLTA29/A0/CAD26
SLTA28/A1/CAD25
SLTA27/A2/CAD24
SLTA26/A3/CAD23
SLTA25/A4/CAD22
SLTA24/A5/CAD21
SLTA23/A6/CAD20
SLTA22/A7/CAD18
SLTA12/A8/CCBE#1
SLTA11/A9/CAD14
SLTA8/A10/CAD9
SLTA10/A11/CAD12
SLTA21/A12/CCBE#2
SLTA13/A13/CPAR
SLTA14/A14/CPERR#
SLTA20/A15/CIRDY#
SLTA19/A16/CCLK
SLTA46/A17/CAD16
SLTA47/A18/RESERVED
SLTA48/A19/CBLOCK#
SLTA49/A20/CSTOP#
SLTA50/A21/CDEVSEL#
SLTA53/A22/CTRDY#
SLTA54/A23/CFRAME#
SLTA55/A24/CAD17
SLTA56/A25/CAD19

C8
E8
B7
D7
A6
C6
D6
B5
D4
E2
F3
E4
A4
D2
C4
A3
D5
E1
D3
D1
C3
C1
B2
B4
C5
A5

S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A7
S1_A8
S1_A9
S1_A10
S1_A11
S1_A12
S1_A13
S1_A14
S1_A15
R_S1_A16 1
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25

E20
E18
G19
H20
A15
C19
G20
D17

SLTB63/BVD1/CSTSCHG
SLTB62/BVD2/CAUDIO
SLTB36/CD#1/CCD#1
SLTB67/CD#2/CCD#2
SLTB16/BSY#/CINT#
SLTB59/WAIT#/CSERR#
SLTB33/WP#/CCLKRUN#
SLTB60/INPACK#/CREQ#

SLTA63/BVD1/CSTSCHG
SLTA62/BVD2/CAUDIO
SLTA36/CD#1/CCD#1
SLTA67/CD#2/CCD#2
SLTA16/BSY#/CINT#
SLTA59/WAIT#/CSERR#
SLTA33/WP#/CCLKRUN#
SLTA60/INPACK#/CREQ#

D12
C12
C15
E13
C13
A12
H18
H19
D19
B19

SLTB7/CE#1/CCBE#0
SLTB42/CE#2/CAD10
SLTB15/WE#/CGNT#
SLTB44/IORD#/CAD13
SLTB45/IOWR#/CAD15
SLTB9/OE#/CAD11
SLTB43/VS1/CVS1
SLTB57/VS2/CVS2
SLTB61/REG#/CCBE#3
SLTB58/RESET/CRST#

SLTB30/D0/CAD27
SLTB31/D1/CAD29
SLTB32/D2/RESERVED
SLTB2/D3/CAD0
SLTB3/D4/CAD1
SLTB4/D5/CAD3
SLTB5/D6/CAD5
SLTB6/D7/CAD7
SLTB64/D8/CAD28
SLTB65/D9/CAD30
SLTB66/D10/CAD31
SLTB37/D11/CAD2
SLTB38/D12/CAD4
SLTB39/D13/CAD6
SLTBA40/D14/RESERVED
SLTB41/D15/CAD8

S1_CE1#
S1_CE2#
S1_WE#
S1 _IORD#
S1_IOW R#
S1_OE#
S1_VS1
S1_VS2
S1_REG#
S1_RST

VC3ENA
VC5ENA
VPEN0A
VPEN1A

H17
G17
J20
H16

A VCC3_EN
A VCC5_EN
AEN0
AEN1

J18
J19
J16
J17

VC3ENB
VC5ENB
VPEN0B
VPEN1B

T13

ZVBEN

ZVAEN

U14

E15
F14
F15
F16
G15

VCCB
VCCB
VCCB
VCCB
VCCB

VCCA
VCCA
VCCA
VCCA
VCCA

E6
F5
F6
F7
G6

A19
B20
E16
J11
J12
K11
K12

GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND

A2
B1
E5
J9
J10
K9
K10

T7
T8
T11
T12

TSTI0
TSTI1
TSTI2
TSTI3

AUDIO
ALARM
EXSMI#

W5
V3
W10

W14
W13
Y13

TSTO1
TSTO2
TSTO3

NC0
NC1
NC2
NC3

A1
A20
Y1
Y20

Slot B

Slot A
System
Interface

Test Pins
NC Pins

+5VALW

1
3

+12VALW

23
A VCC3_EN
A VCC5_EN
AEN0
AEN1

AVCC3IN

BVCC3IN

+5VALW

15
17

BVCC5IN
BVCC5IN

+12VALW

BVPPIN

NC0
NC1

11
25

BVCCOUT
BVCCOUT
BVCCOUT

12
14
16

+S2_VCC

GND
GND

1U_0805_25V4Z

4
18

C215
1000P_0402_50V7K

+3VALW

+12VALW

C544

C538

C537

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0805_25V7K

0.1U_0805_25V7K

C545

C525

C543

C530

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

S1_REG#
S1_A3
S1_INPACK#
S1_A4
S1_WAIT#
S1_A5
S1_RST

+5VALW

S1_A6
S1_VS2
S1_A7
S1_A25
S1_A12
S1_A24
S1_A15
C247
0.1U_0805_25V7K

+S2_VCC

S1_A23
S1_A16
S1_A22

+S1_VPP

C551

C521

1U_0805_25V4Z

1U_0805_25V4Z

+S1_VCC
C253
0.1U_0402_10V6K

This area close to MIC2563A-0BSM

+S1_VCC

C576

C575

C585

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C558

C555

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_A17
S1_A8

S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

+S2_VCC

C557

S1_A21
S1_RD Y#
S1_A20

S1_IOW R#
S1_A9
S1 _IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#

+S1_VCC

PCM_SPK# 33

S1_WP
S1_CD2#
S1_D2
S1_D10
S1_D1
S1_D9
S1_D0
S1_D8
S1_A0
S1_BVD1
S1_A1
S1_BVD2
S1_A2

C526

+S1_VCC

C301

S1_D12
S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

1000P_0402_50V7K

TC6385XB_PBGA328

47K_8P4R_1206_5%

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75

This area close to TC6385XB

8
7
6
5

JP21

+S2_VPP
C531

BVCC3_EN
BVCC5_EN
BEN0
BEN1

1
2
3
4

CARDBUS
SOCKET

1U_0805_25V4Z

Slot B
Power
Supply BVPPOUT 10

B VCC5_EN
B VCC3_EN
BEN0
BEN1

8
7
6
5
47K_8P4R_1206_5%

+S1_VPP

MIC2563A-0BSM_SSOP28

2 S1_A16
R442
33_0402_5%

1
2
3
4

C542

AVCC3_EN
AVCC5_EN
AEN0
AEN1

20
19
21
22

A VCC5_EN
A VCC3_EN
AEN0
AEN1

+S1_VCC

AVPPIN

13

B VCC3_EN
B VCC5_EN
BEN0
BEN1

AVCCOUT

26
Slot A AVCCOUT 28
AVCC5IN
AVCCOUT
AVCC5IN Power
Supply AVPPOUT 24

6
5
7
8

+3VALW

S1_BVD1
B8
S1_BVD2
D8
S1_CD1#
J1
S1_CD2#
H4
S1_RD
Y#
B3
S1_WAIT#
E7
S1_WP
A10
C7 S1_INPACK#

G1
F4
C2
F1
E3
F2
J4
J5
A7
B6

SLTA7/CE#1/CCBE#0
SLTA42/CE#2/CAD10
SLTA15/WE#/CGNT#
SLTA44/IORD#/CAD13
SLTA45/IOWR#/CAD15
SLTA9/OE#/CAD11
SLTA43/VS1/CVS1
SLTA57/VS2/CVS2
SLTA61/REG#/CCBE#3
SLTA58/RESET/CRST#

27

+3VALW

RP14

a68
b68
a34
b34
a67
b67
a33
b33
a66
b66
a32
b32
a65
b65
a31
b31
GND
GND
a64
b64
a30
b30
a63
b63
a29
b29
a62
b62
a28
b28
a61
b61
GND
GND
a27
b27
a60
b60
a26
b26
a59
b59
a25
b25
a58
b58
a24
b24
GND
GND
a57
b57
a23
b23
a56
b56
a22
b22
a55
b55
a21
b21
a54
b54
GND
GND
a20
b20
a53
b53
a19
b19
a52/a18 b52/b18
none
none
a51/a17 b51/b17
a16
b16
a50
b50
a15
b15
GND
GND
a49
b49
a14
b14
a48
b48
a13
b13
a47
b47
a12
b12
a46
b46
GND
GND
a11
b11
a45
b45
a10
b10
a44
b44
a9
b9
a43
b43
a8
b8
GND
GND
a42
b42
a7
b7
a41
b41
a6
b6
a40
b40
a5
b5
a39
b39
GND
GND
a4
b4
a38
b38
a3
b3
a37
b37
a2
b2
a36
b36
a1
b1
a35
b35

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75

S2_WP
S2_CD2#
S2_D2
S2_D10
S2_D1
S2_D9

C216
1000P_0402_50V7K

S2_D0
S2_D8
S2_A0
S2_BVD1
S2_A1
S2_BVD2
S2_A2
S2_REG#
S2_A3
S2_INPACK#
S2_A4
S2_WAIT#
S2_A5
S2_RST

S2_A6
S2_VS2
S2_A7
S2_A25
S2_A12
S2_A24
S2_A15
S2_A23
S2_A16
S2_A22

C248
0.1U_0805_25V7K
+S2_VPP
+S2_VCC

S2_A21
S2_RD Y#
S2_A20

C254
0.1U_0402_10V6K

S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13
S2_A17
S2_A8

S2_IOW R#
S2_A9
S2 _IORD#
S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10
S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6
S2_D12
S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

C302
1000P_0402_50V7K
A

PCMC150PIN

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

D ate:

CARDBUS & PCMCIA (2/2)


Document Number
LA-2041
P , 09, 2003

R ev
0.1
Sheet

28

of

56

PCI_AD[0..31]

PCI_AD[0..31] 23,26,27,30

+3V

MINI_PCI SOCKET

24,26,27,30,36,39 PM_CLKRUN#
23,26,27,30 PCI_SERR#
23,26,27,30 PCI_PERR#
23,26,27,30 PCI_C/BE#1

PC I_AD14
PC I_AD12
PC I_AD10
PCI_AD8
PCI_AD7

CLK_PC I_MINI

PCI_AD5

R449
@33_0402_5%

PCI_AD3
PCI_AD1

+5VS_MINIPCI

W=30mils

C593
@10P_0402_50V8K

+5VS

1
L31

2 W=30mils
0_0603_5%
0603

+5VS_MINIPCI

WLANPME# 26,27,30,39
PC I_AD30
PC I_AD28
PC I_AD26
PC I_AD24
MINI_ IDSEL1
R440
PC I_AD22
PC I_AD20
PC I_AD18
PC I_AD16

2 PC I_AD18
100_0402_5%

IDSEL : PCI_AD18

PCI_PAR 23,26,27,30

PCI_FRAME# 23,26,27,30
PCI_TRDY# 23,26,27,30
PCI_STOP# 23,26,27,30
PCI_DEVSEL# 23,26,27,30
PC I_AD15
PC I_AD13
PC I_AD11

+5VS_MINIPCI
C214
@1000P_0402_50V7K

C233
@0.1U_0402_16V4Z

C598
@0.1U_0402_16V4Z

C600
@10U_1206_16V4Z

PCI_AD9
PCI_C/BE#0 23,26,27,30
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+3VS_MINIPCI

W=20mils

C304
0.1U_0402_16V4Z

C252
0.1U_0402_16V4Z

C255
0.1U_0402_16V4Z

C243
0.1U_0402_16V4Z

C288
0.1U_0402_16V4Z

PC I_AD17
23,26,27,30 PCI_C/BE#2
23,26,27,30 P C I_ IRDY#

+3V

PC I_AD21
PC I_AD19

0_0603_5%

PC I_AD23

L30

23,26,27,30 PCI_C/BE#3

PC I_AD27
PC I_AD25

PCI_GNT#1 23

PC I_AD31
PC I_AD29

W=40mils

23 PCI_REQ#1

+3VS_MINIPCI

+3V

CLK_PC I_MINI

15 CLK_PCI_MINI

+5VS_MINIPCI
PCI_PIRQC# 23,27

0_0603_5%

W=30mils
PCI_PIRQC#
W=40mils
P CIRST#

PCI_PIRQD#

23,27 PCI_PIRQD#
W=40mils

LAN RESERVED

L17

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

+3V

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

D9
RB751V_SOD323
1
2

+3VS_MINIPCI

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

P CIRST#

10,13,23,26,27,30,36,39 PCIRST#

JP27

LAN RESERVED

TIP

33,38,39 KILL_SW#

U10
TC7SH08FU_SSOP5

C590
10U_1206_16V4Z

+3V

39 W L_OFF#

2
0.1U_0402_16V4Z

Mini-PCI SLOT

1
C346

C289
0.1U_0402_16V4Z

Compal Electronics, Inc.


Title

MINI_PCI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet

29

of

56

+3VS

1
R526
1
R527
1
R524
1
R267
2
R269

2
4.7K_0402_5%
2
10K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
1
4.7K_0402_5%

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD

15
27
39
51
59
72
88
100
7
1
2
107
108
120

CPS

106

NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)

125
124
123
122
121

+3VS

2 1394_IDSEL
100_0402_5%

1
R563

23,26,27,29 PCI_C/BE#3
23,26,27,29 PCI_C/BE#2
23,26,27,29 PCI_C/BE#1
23,26,27,29 PCI_C/BE#0
15 CLK_PCI_1394
23 PCI_GNT#0
23 PCI_REQ#0

23,26,27,29 PCI_FRAME#
23,26,27,29 P C I_ IRDY#
23,26,27,29 PCI_TRDY#
23,26,27,29 PCI_DEVSEL#
23,26,27,29 PCI_STOP#
23,26,27,29 PCI_PERR#
16,23,27 PCI_PIRQA#
26,27,29,39 1394_PME#
23,26,27,29 PCI_SERR#
23,26,27,29 PCI_PAR
24,26,27,29,36,39 PM_CLKRUN#
10,13,23,26,27,29,36,39 PCIRST#

P CIRST#

C696
@10P_0402_50V8K

G_RST
GPIO3
GPIO2

R523
220_0402_5%

C685

C408

C409

C671

C410

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

86
96
10
11
CYCLEOUT/CARDBUS
CNA
TEST17
TEST16

CYCLEIN

20
35
48
62
78

C683

0.1U_0402_16V4Z

TSB43AB21
/(TSB43AB22)
PCI BUS INTERFACE

BIAS CURRENT

R0

+3VS

1394_PLLVDD

0.01U_0402_25V4Z
C407

C403

C400

C396

C670

C672

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

L18
BLM21A601SPT_0805
1
2 +3VS
C404
4.7U_0805_10V4Z

1
R545

2
1K_0402_5%

118
R564
6.34K_0603_1%

OSCILLATOR

FILTER

R1

119

X0

X1

FILTER0

C694

FILTER1

0.1U_0402_16V4Z

EEPROM 2 WIRE BUS SDA

92

SCL

91

PC0
PC1
PC2

99
98
97

1
R525
1
R521

POWER CLASS

TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -

PHY PORT 1

116
115
114
113
112

TEST9
TEST8

94
95

TEST3
TEST2
TEST1
TEST0

101
102
104
105

C702
22P_0402_50V8J
X7
24.576MHz_16P_3XG-24576-43E1
C700
22P_0402_50V8J

2
220_0402_5%
2
220_0402_5%

R562
56.2_0603_1%

R561
56.2_0603_1%

0.33U_0603_16V4Z

4
3
2
1
R557
56.2_0603_1%

C681
220P_0402_50V8K

TSB43AB21_PQFP128

C684

JP35

TPBIAS0
TPA0+
TPA0TPB0+
TPB0-

14
89
90

C675

0.1U_0402_16V4Z

R558
56.2_0603_1%

4
3
2
1

SUYIN_020204FR004S507ZL

R556
5.11K_0603_1%

R516
220_0402_5%

R583
@10_0402_5%

CLK_PCI_1394

C676

+3VS

PC I_AD16

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

+3VS

IDSEL:PCI_AD16

84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

PLLGND1
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PC I_AD10
PC I_AD11
PC I_AD12
PC I_AD13
PC I_AD14
PC I_AD15
PC I_AD16
PC I_AD17
PC I_AD18
PC I_AD19
PC I_AD20
PC I_AD21
PC I_AD22
PC I_AD23
PC I_AD24
PC I_AD25
PC I_AD26
PC I_AD27
PC I_AD28
PC I_AD29
PC I_AD30
PC I_AD31
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0
P CI_REQ#0
1394_IDSEL
P CI_FRAME#
P C I_ I RDY#
PCI_TRD Y#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_ PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

23,26,27,29 PCI_AD[0..31]

U52

VDDP
VDDP
VDDP
VDDP
VDDP

PCI_AD[0..31]

87

C695
0.1U_0402_16V4Z

C668
0.1U_0402_16V4Z

Compal Electronics, Inc.


Title

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D ate:
C

1394 Interface
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
E

30

of

56

AC97 Codec

PROPRIETARY NOTE

33 LINE_IN_L
D

33 LINE_IN_R

1
6.8K_0402_5%
1
6.8K_0402_5%
1
6.8K_0402_5%
1
6.8K_0402_5%

Adjustable Output

+5VALW

4
LINEIN_L
1U_0603_10V6K
L INEIN_R
1U_0603_10V6K

C741
C738

C432
4.7U_0805_10V4Z

U22

DELAY

0.1U_0402_16V4Z

ERROR

SD

34,39,40,41,49,50,51,52 SUSP#

VOUT

SENSE or ADJ

VIN

C434

CNOISE

GND

+VDDA

+VDDA

2
R624
2
R621
2
R623
2
R622

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R279

C431
4.7U_0805_10V4Z

100K_0603_1%
C433

SI9182DH-AD_MSOP8

0.1U_0402_16V4Z

R278
33K_0603_1%

+AVDD_AC97
L36

+VDDA

2
+5VCD

CHB2012U170_0805

38 MD_SPK

0.01U_0402_25V4Z

2
R635

1
10K_0402_5%

2
R637

1
10K_0402_5%

33 MIC

24,38 ICH_AC_RST#

LINEL

C728

4.7U_0805_10V4Z

EQ_LEFT

L INER

C727

4.7U_0805_10V4Z

EQ_RIGHT

16

VIDEO_L

MONO_OUT

37

17

VIDEO_R

TRUE_LOUT_L

39

LINEIN_L

23

LINE_IN_L

TRUE_LOUT_R

41

L INEIN_R

24

LINE_IN_R

20

CD_R

19
1U_0603_10V6K
C_M IC
21
1U_0603_10V6K
22
+AUD_VREF
C_MD_SPK 13
1U_0603_10V6K
12

2
R633

24,38 IC H _AC_SYNC

11
1
100_0402_5%
10
5

24,38 ICH_AC_SDOUT

33 EAPD

MIC2

XTL_IN

XTL_OUT

1
R632
1
R636

1
R638

30

VREFOUT

28

VREF

27

VRDA

32

RESET#
SYNC
SDATA_OUT

EAPD
SPDIFO
DVSS1
DVSS2

VRAD
DCVOL
VAUX
GPIO0
GPIO1

31
33
34
43
44

NC
AVSS1
AVSS2

40
26
42

10 CD ROM_R

11

1
R617

1
R616

+2.5VOP_REF

ICH_AC_SDIN0 24

R_ INT_CD_L
1
10K_0402_5%

2
R601

C734

1000P_0402_50V7K

C733

1000P_0402_50V7K

2
0_0402_5%

X1

22P_0402_25V8K

1
2

C436

+5VCD

22P_0402_25V8K
+2.5VOP_REF

+AUD_VREF

2
@0_0402_5%

1 R_INT _CD_R
10K_0402_5%

2
R581

C736

C729

0.1U_0402_16V4Z

4.7U_0805_10V4Z

C735

C723

0.01U_0402_25V4Z

1U_0603_10V6K

EQ_RIGHT

U53D
74HCT4066

DM_ON

+5VCD

C724
1U_0603_10V6K

AG ND

U53C
74HCT4066

1 24.576MHz_16P_3XG-24576-43E1
C435
2

EQ_LEFT

R579
100K_0402_5%

ALC202_E_LQFP48

DM_ON#

AGND
1

DGND

U53B
74HCT4066

+5VCD
ICH_AC_BITCLK 24,38

2
@10K_0402_5%

@1M_0402_5%

29

AFILT2

R_INT _CD_R
1U_0603_10V6K

DIRECT PLAY PATH

2
22_0402_5%
2
22_0402_5%

PC_BEEP

C690

2
15P_0402_50V8J

R280

AFILT1

47

PHONE

NC
XTLSEL

4
7

SDATA_IN

35 INT_CD_R

EQ_RIGHT 32,33

DM_ON#

MIC1

45
46

48

R627
@0_0402_5%

CD_GND

BIT_CLK

EQ_LEFT 32,33

35
36

1
C752

12

38

LINE_OUT_L
LINE_OUT_R

CD_L

U53A
74HCT4066

+5VCD

AUX_R

18

CDROM_L

9
DVDD2

DVDD1

1000P_0402_50V7K

AUX_L

1U_0603_10V6K

33 MONO_IN

1000P_0402_50V7K

C732

15

1U_0603_10V6K

C750

C731

CD _L_R
C746
CD_R_R
C744
CD_ GNA
C745
MIC
C743

0.1U_0402_16V4Z

C751

1
20K_0402_5%
1
20K_0402_5%

R_ INT_CD_L

CD ROM_R

2
R630
2
R626

35 INT_CD_L

CDROM_L

1
6.8K_0402_5%
1
6.8K_0402_5%

10U_1206_16V4Z

14

C748
0.1U_0402_16V4Z

2
R631
2
R625

C749

0.1U_0402_16V4Z

C693

14

AVDD1

R634
@0_0402_5%

U58

AVDD2

25

+AUD_VREF

C747

C709
1U_0603_10V6K

13

+3VS

14

+V DDC

14

10U_1206_16V4Z

0.1U_0402_16V4Z

14

C742

C737

POWER ON PATH

+VDDC

2
0_0603_5%

Q61
2N7002_SOT23

2
G
3

1
R277

DM_ON

35 CD_AGND

2
1
R628
20K_0402_5%

CD_ GNA

2
0_0603_5%

34 DM_ON

R472

R629

0_0402_5%

6.8K_0402_5%

C717
0.1U_0402_16V4Z

DM_ON

DIRECT CD

DM_ON

SYSTEM ON

C726
4.7U_0805_10V4Z

1
R272

+AUD_VREF

2
0_0603_5%

1
R281

Title

Compal Electronics, Inc.


AC97 Codec

DGND

Size
B

AGND

D ate:
5

Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
1

31

of

56

+5VCD

+5VCD
+5VCD

C423

C422

1
2
R619
1.5K_0603_1%
U57A

0.082U_0402

C704

4700P_0402_25V7K
2

1
R598
2.49K_0603_1%

+5VCD

+5VCD

R618

LMV824MT_TSSOP14

R589
100K_0603_1%

2
C

+5VCD

R595

LMV824MT_TSSOP14

C708
0.1U_0402_16V4Z

U57D

OUT

14

LMV824MT_TSSOP14

8
C722
100P_0402_50V8K

LMV824MT_TSSOP14

11

+5VCD

C420

R596
100K_0603_1%

1
2
R620
1.5K_0603_1%

4.7U_0805_10V4Z

OUT

12

+2.5VOP_REF

U57C

10

+5VCD

13

+5VCD

11

AMP_LEFT
1
@0_0402_5%
AMP_RIGHT
1
@0_0402_5%

2
R609
2
R608

100K_0603_1%

C418

14 EQ_L_OUT4

+5VCD

BY-PASS EQ CIRCUIT

EQ_RIGHT

OUT

+2.5VOP_REF

+2.5VOP_REF

EQ_LEFT

12

U56D

200K_0603_1%

AMP_LEFT 33

+5VCD

13

EQ_L_IN4

R590
200K_0603_1%

+2.5VOP_REF

4.7U_0805_10V4Z

390P_0603_50V7K

EQ_L_OUT3

2AMP_LEFT
0_0402_5%

OUTPUT TO AMPLIFIER
LEFT CHANNEL

U56C

OUT
11

10

1
R684

LMV824MT_TSSOP14

4
9

390P_0603_50V7K
EQ_L_IN3

LMV824MT_TSSOP14

11

C703
EQ_L_OUT2

U56B

EQ_L_IN2

AUDIO LEFT CHANNEL

1AMP_LEFT_1

C705

1800P_0402_50V7K

C421

C701
1500P_0402_50V7K
1
2
R594
1.65K_0603_1%

C720

31,33 EQ_RIGHT

C721

1
2
R607
3.32K_0603_1%

31,33 EQ_LEFT

LMV824MT_TSSOP14

+2.5VOP_REF

EQ_L_IN5

2
4.99K_0603_1%

1
R612

11

EQ_L_OUT1

11

R614
107K_0603_1%

U56A

4
3

C718
0.018U_0603_16V7K

EQ_L_IN1#
2
11.8K_0603_1%
EQ_L_IN1

1
R613

11

EQ_LEFT

0.1U_0402_16V4Z

C725
0.018U_0603_16V7K

C730
100P_0402_50V8K

C425

BTQ00 EQ Circuit UPDATA 03/26

0.1U_0402_16V4Z

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.082U_0402

C688

4700P_0402_25V8K

1
2
R586
2.49K_0603_1%

+5VCD

+5VCD

EQ_R_OUT3

13

EQ _R_IN4

LMV824MT_TSSOP14

12

R584
100K_0603_1%

R585
200K_0603_1%

U54D

OUT

+5VCD

4
+

OUT

AMP_RIGHT 33

14 EQ_R_OUT4

LMV824MT_TSSOP14

R615
200K_0603_1%

10

390P_0603_50V7K

U54C

EQ _R_IN3

LMV824MT_TSSOP14

390P_0603_50V7K

11

C689

7EQ_R_OUT2

4
P

U54B

O
11

EQ _R_IN2

AUDIO RIGHT CHANNEL

2AMP_RIGHT
0_0402_5%

OUTPUT TO AMPLIFIER
RIGHT CHANNEL

C707

1800P_0402_50V7K

1
R685

LMV824MT_TSSOP14

C706 1500P_0402_50V7K
1
2
R597
1.65K_0603_1%

C712

7AMP_RIGHT_1

+2.5VOP_REF

C713

1
2
R602
3.32K_0603_1%

EQ _R_IN5

2
4.99K_0603_1%

LMV824MT_TSSOP14

1
R600

11

R606
107K_0603_1%

EQ_R_OUT1

U57B

11

4
-

U54A

C710
0.018U_0603_16V7K

E Q_R_IN1#
2
11.8K_0603_1%
EQ _R_IN1

11

1
R603

EQ_RIGHT

+5VCD
C719
0.018U_0603_16V7K

+2.5VOP_REF

+2.5VOP_REF

+2.5VOP_REF

Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

D ate:

Compal Electronics, Inc.


HAREWARE EQ
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

32

of

56

Audio AMP
+5VCD

+5VCD

R661
100K_0402_5%
C761
4.7U_0805_10V4Z

SHUTDOW N#

1
2

0.1U_0402_16V4Z

C760

W=40Mil

Q66

PIN 5,9 ACTIVE

2 0.47U_0603_16V4Z

31,32 EQ_RIGHT

C770 1

2 0.47U_0603_16V4Z

16

0.1U_0402_16V4Z

Enable Gain
soft start

INTSPK_L2
INTSPK_R2

2
1

R662

+5VCD

100K_0402_5%

C767
C768
0.47U_0603_16V4Z
C766
1U_0603_10V4Z
0.47U_0603_16V4Z

+5VCD
R663
@10K_0402_5%

R666
@820_0402_5%

NBA_PLUG

(0.47U~1U)

1
2

1
13
18

+5VCD

R665
@820_0402_5%

19
20

TPA6011A4_TSSOP24

C771

EAPD 31

C769 1

15
23
17
12
2
8
6

R664
10K_0402_1%

31,32 EQ_LEFT

C764
0.47U_0603_16V4Z

2 0.47U_0603_16V4Z
C765

32 AMP_RIGHT

0.47U_0603_16V4Z
2 C763

PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
BYPASS
LOUTHP/LINE#
ROUTVOLUME
LIN
LOUT+
RIN
ROUT+
LLINEIN
SEMAX
RLINEIN
SEDIFF
LHPIN
RHPIN
PGND
PGND
FADE#
AGND

2AMP_RIGHT_1 1

22
21
14
24
9
5
10
4

U59

VOL_AMP
INTSPK_L1
INTSPK_R1
2AMP_LEFT_1 1

0.47U_0603_16V4Z
C762 1

32 AMP_LEFT

3
11
7

NBA_PLUG

R604
@100K_0402_5%
1
2

2
G

2N7002_SOT23 S

LOW

NBA_PLUG

PIN 4,10 ACTIVE

HIGH

R667
10K_0402_5%

R668
11.8K_0603_1%

SET SE MODE MAX


2.94V---0dB

SET SE MODE MAX


2.7V--- (-4dB)

JP9

INTSPK_R1
INTSPK_R2

1
2
MOLEX_53398-0290

fo=1/(2*3.14*R*C)=412Hz
R=820 / C=0.47U

R697(1.5K)----------10dB

AUDIO Board Conn.


+3V
39 BEEP#

C699
0.1U_0402_16V4Z

+VDDA
+5VCD

R593

C715

R610
560_0402_5%
1
2

1U_0603_10V6K

R641
10K_0402_5%

+3V POWER

C587
28 PCM_SPK#

R447
560_0402_5%
1
2

0.22U_0603_16V4Z

2
B

1U_0603_10V6K

Q63

+3V

C716

NBA_PLUG
VOL_AMP

1
R669

LINE_IN _R
LINE _IN_L
INTSPK_R1
INTSPK_L2
INTSPK_L1
KILL_SW#

2
100K_0402_5%

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JP10
ACES_85201-1605

R611
560_0402_5%
1
2

1U_0603_10V6K
U55B
SN74LVC14APWLE_TSSOP14
+3V POWER

R642

D35
RB751V_SOD323

10K_0402_5%

Title

PROPRIETARY NOTE

2
300_0402_5%
2
@1.5K_0402_1%

1
O

29,38,39 KILL_SW#

MONO_IN 31

R639
2.4K_0402_5%

14
P
I
G

C754
10U_1206_16V4Z

2SC2411K_SOT23

+3V

24 SPKR

31 LINE_IN_R
31 LINE_IN_L

C753
1U_0603_10V6K
MO NO_IN

SN74LVC14APWLE_TSSOP14

1
R698
1
R697

MIC

31 MIC

R640
10K_0402_5%

14

U51C
+3V POWER
SN74LVC125APWLE_TSSOP14 C714

U55A

2
O

1
2
R599
8.2K_0402_5%

OE#

10

100K_0402_5%

+AVDD_AC97
+AUD_VREF

R698(300)----------14dB

+3V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D ate:
C

Compal Electronics, Inc.


AMP & Audio Jack
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
E

33

of

56

CDD[0..15]

C D_SCS1#
C D_SCS3#

99
6
72
93

HDIOR#
HDIOW#
HIOCS16#
HIORDY

CDIOR#
CDIOW#
CIOCS16#
CIORDY

100
5
73
94

CD_S IOR#
CD _SIOW #
CIOCS16#
C D _ S IORDY

IDE_IRQ15
IDE_S DDREQ
IDE_ SDDACK#

74
12
88

HINTRQ
HDMARQ
HDMACK#

CHINTRQ
CDMARQ
CHDMACK#

75
13
89

C D_IRQ
CD_D REQ
CD_ DACK#

SIDE_RST#

24
59

HRESET#
HDASPN

CRESET#
CDASPN

23
60

C D_RSTDRV#
CDA SPN

48
53
55
50
46

HSYNC
HBIT_CLK
HDATA_OUT
HDATA_IN
HACRSTN

SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN
SACRSTN

47
52
54
49
45

28
36
35
34
37

PAV_EN
PLAY/PAUSE
FFORWARD
REWIND
STOP/EJECT

PWR_CTL

51

ISCDROM

80

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

39
40

DM_ON
PLAYBTN#
FR DBTN#
REVBTN#
STOPBTN#

210U_1206_16V4Z

DM_ON

2
1
R498
10K_0402_5%
1
2
D31
5,39 EC_SMB_DA2
1N4148_SOT23

Q50
3 2N7002

+5VCD

R496

Q49
2N7002

29
25
30

PCSYSTEM_OFF
INTN
RESET#

26

SDATA

27

SCLK

5,39 EC_SMB_CK2

2
G

2
G

+5VCD

1
2

C3651

C659
10P_0402_50V8K

100K_0402_5%

OSC1
OSC2
R497
100K_0402_5%

31
32

OSCI
OSCO

MODE0
MODE1

56
57

PAVMODE

38

CSN
INCN
UDN

41
42
43

1
2

1
2

C609
1U_0805_25V4Z

2
C611

1
1U_0805_25V4Z

8
7
6
5

C608
10U_1206_16V4Z

D
D
D
D

C604
0.1U_0402_16V4Z

SI4425DY-T1_SO8

2
1
R469
10K_0402_5%

CD_SBA0 35
CD_SBA1 35
CD_SBA2 35

2
240K_0402_5%

S
S
S
G

1
R470

+5VALW

U43

1
2
3
4

+5VALW

CD_SCS1# 35
CD_SCS3# 35
SUSP#

22K

Q46
@DTC124EK_SOT23

C D _ S IORDY 35

22K

22K

CD_PLAY

CD_PLAY 39

22K

31,39,40,41,49,50,51,52 SUSP#

CD_SIOR# 35
CD_SIOW # 35

IDE_SD IOR#
IDE_ SDIOW #

64
62

10U_1206_16V4Z

CCS0
CCS1

HCS0
HCS1

1M_0402_5%
C651
10P_0402_50V8K

58

63
61

C606

Q44
DTC124EK_SOT23

C D _IRQ 35
CD_DREQ 35
CD_DACK# 35
CD_RSTDRV# 35

+5VCD

R538

2
1
R514
GPIO_1
GPIO_0
R532 1
MODE1

2
R235

1
@10K_0402_5%
R539
1
10K_0402_5%

+5VCD

ISCD ROM
2
@0_0402_5%

1
R518

2
0_0402_5%

REVBTN#
FR DBTN#
PLAYBTN#
STOPBTN#

MEDIA_DETECT 39

8
7
6
5

RP83

1
2
3
4

10K_8P4R_1206_5%

8
7
6
5

MODE1
CDA SPN
ISCD ROM

2 @1K_0402_5%

RP84

1
2
3
4

10K_8P4R_1206_5%

1
10K_0402_5%

GPIO_0 R244 2
GPIO_1 R237 2

1 10K_0402_5%
1 10K_0402_5%
+5VCD

+5VCD

35 SIDE_RST#

R510

44

CD_SBA0
CD_SBA1
CD_SBA2

ID E_SDCS1#
ID E_SDCS3#

+5VCD

0.1U_0402_16V4Z

R228
100K_0402_5%

DM_ON

DIRECT CD

DM_ON

SYSTEM ON

C D _ S IORDY 1
R509
C D_IRQ
1
R534

2
1K_0402_5%
2
4.7K_0402_5%

CIOCS16#

2
47K_0402_5%

23,35 IDE_IRQ15
24,35 IDE_SDDREQ
24,35 IDE_SDDACK#

VDD

69
71
67

24,35 ID E _ SDIORDY
X4
8MHZ_16PF_7D08000014
OSC1
OSC2

VDD

CDA0
CDA1
CDA2

68
70
66

1
2
L34
CHB1608G301_0603

+5VCD

DM_ON

24,35 IDE_SDIOR#
24,35 IDE_SDIOW #

HDA0
HDA1
HDA2

ID E_SDA0
ID E_SDA1
ID E_SDA2

0.1U_0402_16V4Z

C642

SUSP#

2
G

1
R533

C DD7

2
R506
CD_D REQ
1
R495

DM_ON 31

Q14
2N7002

1
10K_0402_5%
2
5.6K_0402_5%

24,35 IDE_SDCS1#
24,35 IDE_SDCS3#

C DD0
C DD1
C DD2
C DD3
C DD4
C DD5
C DD6
C DD7
C DD8
C DD9
CDD 10
CDD 11
CDD 12
CDD 13
CDD 14
CDD 15

GND
GND
GND
GND
GND

24,35 IDE_SDA0
24,35 IDE_SDA1
24,35 IDE_SDA2

0.1U_0402_16V4Z

C641

+5VALW

77
79
82
84
87
91
96
98
1
3
7
10
14
17
19
21

HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15

0.1U_0402_16V4Z

C662

U46
OZ168T-A1_TQFP100

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

76
78
81
83
86
90
95
97
2
4
8
11
15
18
20
22

C673

16
33
65
85
92

IDE_ SDD0
IDE_ SDD1
IDE_ SDD2
IDE_ SDD3
IDE_ SDD4
IDE_ SDD5
IDE_ SDD6
IDE_ SDD7
IDE_ SDD8
IDE_ SDD9
IDE _SDD10
IDE _SDD11
IDE _SDD12
IDE _SDD13
IDE _SDD14
IDE _SDD15

VDD

+5VOZ

24,35 IDE_SDD[0..15]

L35
CHB1608G301_0603
1
2

+5VOZ

35 CDD[0..15]

Compal Electronics, Inc.


Title

OZ-168 CD_PLAY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet

34

of

56

IDE,CD-ROM Module CONN.

HDD CONNECTOR

Placea caps. near HDD


CONN.

IDE_PDD[0 ..15]

24 IDE_PDD[0..15]

+5VS
C645
0.1U_0402_16V4Z

+5VS

+5VS

1
R259

2
100K_0402_5%

+5VS

PCSEL 1
R236

C657

C655

C653

1000P_0402_50V7K

10U_1206_16V4Z

10U_1206_16V4Z

1U_0805_25V4Z

0.1U_0402_16V4Z

16,23 B_PCIRST#

2
3

23 PIDERST#

PIDE_RST#

TC7SH08FU_SSOP5

+5VS
C652
0.1U_0402_16V4Z

2
470_0402_5%

ID E_PDA2
ID E_PDCS3#

U47

B_PCIRST# 1

EXTID1

EXTID0

CDROM

FDD

HDD

TV Tuner/No Module

EXTID3

EXTID2

Module

CDROM

FDD

HDD

TV Tuner/No Module

IDE_PDA2 24
IDE_PDCS3# 24

+5VS

Module
5

IDE_IRQ14
ID E_PDA1
ID E_PDA0
ID E_PDCS1#

IDE_ PDD8
IDE_ PDD9
IDE _PDD10
IDE _PDD11
IDE _PDD12
IDE _PDD13
IDE _PDD14
IDE _PDD15

C656

U48

B_PCIRST# 1

24 SIDERST#

IDE_P DDREQ
IDE_ PDIOW #
IDE_PD IOR#

IDE_PDDREQ
IDE_PDIOW #
IDE_PDIOR#
ID E _ PDIORDY
IDE_PDDACK#
IDE_IRQ14
IDE_PDA1
IDE_PDA0
IDE_PDCS1#
PHDD_LED#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

C654

SIDE_RST#

SIDE_RST# 34

TC7SH08FU_SSOP5

OCTEK AFH-22DC

Main Module Conn. (Master)

2
R471

RDATA#
WP#
TRACK0#
WDATA#
STEP#
MTR0#
DS KCHG#
D RV0#

36 RDATA#
36 WP#
36 TRACK0#
36 WDATA#
36 STEP#
36 MTR0#
36 DSKCHG#
36,39 DRV0#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

INT_CD_R 31

CD_DREQ 34
CD_SIOR# 34
CD_DACK# 34
CD_SBA2 34
CD_SCS3# 34
EXTID0 39
EXTID1 39

HDSEL#
WGATE#

24,34 IDE_SDIOW #
24,34 ID E _ SDIORDY
23,34 IDE_IRQ15
24,34 IDE_SDA1
24,34 IDE_SDA0
24,34 IDE_SDCS1#

HDSEL# 36
WGATE# 36

USBP7+
USBP7-

USBP7+ 24
USBP7- 24

F D D IR#
3MODE#

F D D IR# 36
3MODE# 36

INDEX#
+5VCD

INDEX# 36

+5VS
W=80mils

C613

1U_0805_25V4Z

0.1U_0402_16V4Z

C616

10U_1206_16V4Z

Place component's closely MODULE CONNECTOR.


+5VS
RP138

8
7
6
5

1K_8P4R_1206_5%

MTR0#
DS KCHG#
INDEX#
D RV0#

STEP#
WDATA#
F D D IR#
TRACK0#
+5VS

6
7
8
9
10

RP139

IDE_SDDREQ 24,34
IDE_SDIOR# 24,34
IDE_SDDACK# 24,34
IDE_SDA2 24,34
IDE_SDCS3# 24,34
EXTID2 39
EXTID3 39

+5VCD

R464
100K_0402_5%
USBP3+
USBP3-

USBP3+ 24
USBP3- 24

SH DD_LED#

SHDD_LED# 39

+5VS

5
4
3
2
1

1K_10P8R_1206_5%

WP#
RDATA#
WGATE#
HDSEL#

+5VS

1
R468

2 EXTCSEL2
470_0402_5%

2
G
Q45
2N7002_SOT23

+3VALW
W=80mils

R467
100K_0402_5%

C610

1000P_0402_50V7K

IDE_ SDD8
IDE_ SDD9
IDE _SDD10
IDE _SDD11
IDE _SDD12
IDE _SDD13
IDE _SDD14
IDE _SDD15
IDE_S DDREQ
IDE_SD IOR#
IDE_ SDDACK#
ID E_SDA2
ID E_SDCS3#
EXTID2
EXTID3

+5VS

+5VCD

C612

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

SUYIN_100311MB060S106ZU

SUYIN_100311MB060S106ZU

1
2
3
4

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

SIDE_RST#
IDE_ SDD7
IDE_ SDD6
IDE_ SDD5
IDE_ SDD4
IDE_ SDD3
IDE_ SDD2
IDE_ SDD1
IDE_ SDD0
PDIAG
IDE_ SDIOW #
ID E _ SIORDY
IDE_IRQ15
ID E_SDA1
ID E_SDA0
ID E_SDCS1#
SH DD_LED#
EXTCSEL2

INT_ CD_R
CD_A GND
C DD8
C DD9
CDD 10
CDD 11
CDD 12
CDD 13
CDD 14
CDD 15
CD_D REQ
CD_S IOR#
CD_ DACK#
CD_SBA2
C D_SCS3#
EXTID0
EXTID1

34 CD_SIOW #
34 C D _ S IORDY
34 C D _IRQ
34 CD_SBA1
34 CD_SBA0
34 CD_SCS1#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

2nd Module Conn. (Slave)


JP29

JP28

IN T_CD_L
CD_A GND
C D_RSTDRV#
C DD7
C DD6
C DD5
C DD4
C DD3
C DD2
C DD1
C DD0
PDIAG
CD _SIOW #
C D _ S IORDY
C D_IRQ
CD_SBA1
CD_SBA0
C D_SCS1#
SH DD_LED#
1 EXTCSEL1
470_0402_5%

31 INT_CD_L
31 CD_AGND
34 CD_RSTDRV#

IDE_SDD[0 ..15]

24,34 IDE_SDD[0..15]

CDD[0..15]

34 CDD[0..15]

24
24
24
24
24
23
24
24
24
39

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

JP34
PIDE_RST#
IDE_ PDD7
IDE_ PDD6
IDE_ PDD5
IDE_ PDD4
IDE_ PDD3
IDE_ PDD2
IDE_ PDD1
IDE_ PDD0

EXTID0

C615

C617

C620

C614

1000P_0402_50V7K

10U_1206_16V4Z

1U_0805_25V4Z

0.1U_0402_16V4Z

EXTID0
EXTID1
EXTID2
EXTID3

8
7
6
5

RP82

1
2
3
4

10K_8P4R_1206_5%

Place component's closely MODULE CONNECTOR.

Compal Electronics, Inc.


Title

IDE/ FDD MODULE CONN.


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet

35

of

56

SUPER I/O SMsC FDC47N227

+3VS
1

R209
10K_0402_5%
LPD[0 ..7]

LPC_A D[0..3]

13,24,39 LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LFRAME#
LDRQ#

10,13,23,26,27,29,30,39 PCIRST#

26
27

PCIRST#
LPCPD#

CLK _PCI_SIO

50
17
30
28
29

GPIO12/IO_SMI#
IO_PME#
SIRQ
CLKRUN#
PCICLK

CLK_14M_SIO

19

CLK14

48
54
55
56
57
58
59
6
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47

GPIO10
GPIO15
GPIO16
GPIO17
GPIO20
GPIO21
GPIO22
GPIO24
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47

51
52
64

GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23/FDC_PP

18

VTR

53
65
93

VCC
VCC
VCC

7
31
60
76

VSS
VSS
VSS
VSS

R195 2
R212 2

23,27,39 SERIRQ
24,26,27,29,30,39 PM_CLKRUN#
15 CLK_PCI_SIO

2
1 1

15 CLK_14M_SIO

PID0
PID1
PID2
PID3

P ID[0..3]

22 P ID[0..3]
C341
@15P_0402_50V8J

1 10K_0402_5%
1 10K_0402_5%

38 BT_DET#

1
R643

+3VS

2
10K_0402_5%

CLK _PCI_SIO

37 FIR_EN#
R208
@33_0402_5%

1
R644

2
10K_0402_5%

+3VS

1 C330
@22P_0402_25V8K
2

2
R194
2
R192

1
10K_0402_5%
1
10K_0402_5%

+3VS

C340
0.1U_0402_16V4Z

C286
0.1U_0402_16V4Z

0.1U_0402_16V4Z

C315

4.7U_0805_10V4Z

C285

PD0/INDEX#
PD1/TRK0
PD2/WRTPRT#
PD3/RDATA#
PD4/DSKCHG#
PD5
PD6/MTR0#
PD7

68
69
70
71
72
73
74
75

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

BUSY/MTR1#
PE/WDATA#
SLCT/WGATE#
ERROR#/HDSEL#
ACK#/DS1#
INIT#/DIR#
AUTOFD#/DRVDEN0#
STROBE#/DS0#
SLCTIN#/STEP#

79
78
77
81
80
66
82
83
67

L PTBUSY
LPTPE
LPTSLCT
LPTERR#
LPTACK#

LAD0
LAD1
LAD2
LAD3

24
25

R214
@10_0402_5%
2

U8

13,24,39 LPC_FRAME#
24 LPC_DRQ#1

+3VS
CLK_14M_SIO

20
21
22
23

DTR2#
CTS2#
RTS2#
DSR2#
TXD2
RXD2
DCD2#
RI2#

100
99
98
97
96
95
94
92

DTR1#
CTS1#
RTS1#
DSR1#
TXD1
RXD1
DCD1#
RI1#

89
88
87
86
85
84
91
90

IRMODE/IRRX3
IRRX2
IRTX2

63
61
62

RDATA#
WDATA#
WGATE#
HDSEL#
DIR#
STEP#
DS0#
INDEX#
DSKCHG#
WRTPRT#
TRK0#
MTR0#
DRVDEN0

16
10
11
12
8
9
5
13
4
15
14
3
1

DRVDEN1

GPIO11/SYSOPT

LPC47N227 TQFP100 SUPER I/O

49

LPD[0..7] 38

LPTBUSY 38
LPTPE 38
LPTSLCT 38
LPTERR# 38
LPTACK# 38
INIT# 38
LPTAFD# 38
LPTSTB# 38
SLCTIN# 38

D SR#1
CTS#1
RI#1
DCD #1

CTS#2
D SR#2

8
7
6
5

RP112

+3VS

1
2
3
4

CTS#2
D SR#2
DCD #2
RI#2

1
R206

RP113

+3VS

8
7
6
5

4.7K_8P4R_1206_5%

4.7K_8P4R_1206_5%

DCD #2
RI#2

1
2
3
4

2
1K_0402_5%
+5V

DTR#1
CTS#1
RTS#1
D SR#1
TXD1
RXD1
DCD #1
RI#1

JP32

1
R199

2
1K_0402_5%

IRMODE 37
IRRX 37
IRTXOUT 37

IRRX
RDATA#
WDATA#
WGATE#
HDSEL#
F D D IR#
STEP#
D RV0#
INDEX#
DS KCHG#
WP#
TRACK0#
MTR0#

2
R213
1
R198

IRRX 1
2
R193
1K_0402_5%

RDATA# 35
WDATA# 35
WGATE# 35
HDSEL# 35
F D D IR# 35
STEP# 35
DRV0# 35,39
INDEX# 35
DSKCHG# 35
WP# 35
TRACK0# 35
MTR0# 35
3MODE# 35

1
10K_0402_5%
2
1K_0402_5%

1
2
3
4
5
6
7
8
9
10

RXD1
TXD1
D SR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD #1

1
2
3
4
5
6
7
8
9
10
@96212-1011S

+5VS

Base I/O Address


* 0 = 02Eh
1 = 04Eh

Compal Electronics, Inc.


Title

PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D ate:
C

SUPER I/O
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
E

36

of

56

+USB_BS

+3VALW

+USB_AS

+USB_BS

100K_0402_5%

100K_0402_5%

USB_OC0#

1
2
R175
47_0402_5%
1
2
R176
47_0402_5%

USB_OC2#

0.1U_0402_16V4Z

470P_0402_50V7K

USB_OC2# 24
24 USBP024 USBP0+

C231
0.1U_0402_16V4Z

R44
0_0603_5%
1
1
R45
0_0603_5%

USB0USB0+

2
2

1
2
3
4
10
12

2 USBEN#
@0_0402_5%

1
R182

1
C3

C465

470P_0402_50V7K

150U_D2_6.3VM

JP17

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

R46
0_0603_5%
1
1
R47
0_0603_5%

USB2USB2+

2
2

USBP2- 24
USBP2+ 24

SUYIN_020122MR008S516ZU

24 USB_EN#

C230

150U_D2_6.3VM

C11

USB_OC0# 24

8
7
6
5

TPS2042ADR_SO8

0.1U_0402_16V4Z

OC1#
OUT1
OUT2
OC2#

C467

C250

GND
IN
EN1#
EN2#

R174

1
+
C251
150U_D2_6.3VM

U4

1
2
3
4

R173

+5V

+USB_AS

R177

(New)

0_0402_5%

+USB_CS

+USB_DS
+3VALW
+USB_CS

1
1

R242

100K_0402_5%

100K_0402_5%

USB_OC4# 24

USB_OC6#

USBEN#

C376
0.1U_0402_16V4Z

24 USBP424 USBP4+

USB_OC6# 24

TPS2042ADR_SO8

0.1U_0402_16V4Z

USB_OC4#

1
2
R240
47_0402_5%
1
2
R239
47_0402_5%

8
7
6
5

OC1#
OUT1
OUT2
OC2#

150U_D2_6.3VM

C369
470P_0402_50V7K

1
C370
470P_0402_50V7K

C658

150U_D2_6.3VM

GND
IN
EN1#
EN2#

R247
0_0603_5%
1
1
R250
0_0603_5%

C375
0.1U_0402_16V4Z

2
2

USB4USB4+

1
2
3
4
10
12

JP33

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

USB6USB6+

R252
0_0603_5%
1
1
R256
0_0603_5%

2
2

USBP6- 24
USBP6+ 24

SUYIN_020122MR008S516ZU
(New)

+3VS

1
2
R99
@3.3_1206_5%

FIR Module
1
+3VS

R80

4.7U_0805_10V4Z

47_1206_5%

2
1
R85
10K_0402_5%
36 IRRX

+IR_ VCC

1
2

C82
22U_1206_10V4Z

+IR_ANODE

1
2
R87
3.3_1206_5%

2
C81

C348

C64
100P_0402_50V8J

C350
150U_D2_6.3VM

1
+

U12

1
2
3
4

R243

C660

+5V

+USB_DS

C63
0.1U_0402_16V4Z
+IR_ GND

36 FIR_EN#

IRRX

U2

2
4
6
8

IRED_C
RXD
VCC
GND

IRED_A
TXD
SD/MODE
MODE

1
3
5
7

+IR _ANODE
IRTXOUT
IR MODE

IRTXOUT 36
IRMODE 36

IR_VISHAY_TFDU6101E-TR4_8P

1
R645

2
0_0402_5%

The component's most place


cloely IRDA MODULE.

LOW FIR Poped


HIGH FIR Un-Poped

Compal Electronics, Inc.


Title

FIR_EN#

USB Conn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet

37

of

56

BlueTooth Interface
MDC CONN.
JP19

R72
100K_0402_5%

C98
1U_0805_25V4Z

3
1
IC H _AC_SYNC 24,31

1
2
R79
22_0402_5%
2

C80
1U_0805_25V4Z

C27

+BT_VCC

22K
C25

Q6
22K

ICH_AC_SDIN1 24

10U_1206_16V4Z

DTC124EK_SOT23

ICH_AC_BITCLK 24,31

Module ID
Indication for polarity of reset
Reset input High Active --> Low ,
Reset input Low Active --> Open

+3VS
C489
@0.1U_0402_16V4Z

39 BT_PWR

+5VS_MDC

Q7
SI2301DS-T1_SOT23

0.1U_0402_16V4Z

1
R78
22_0402_5%

+3VS_MDC

2
0_0402_5%

1
2
+5VS
L23
CHB1608B121_0603
1
2
+3VS
R350
10K_0402_5%

1
R83

0.1U_0402_16V4Z

+5VS_MDC

ACES_88023-3010

+3V

C76

MD_SPK 31

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+3VS
24,31 ICH_AC_SDOUT
24,31 ICH_AC_RST#

R100
0_0402_5%
1
2
L22
1
2 +3VS_MDC
CHB1608B121_0603

MONO_OUT/PC_BEEP AUDIO_PWDN
GND
MONO_PHONE
AUXA_RIGHT
Bluetooth Enable
AUXA_LEFT
GND
CD_GND
+5V
CD_RIGHT
USB Data+
CD_LEFT
USB DataGND
PRIMARY DN
3.3Vaux
5Vd
GND
GND
3.3Vmain
AC97_SYNC
AC97_SDATA_OUT AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK

C495
1U_0805_25V4Z

U30

29,33,39 KILL_SW#

39 BT_DETACH

@TC7SH08FU_SSOP5

LPTSLCT
LPTPE
L PTBUSY
LPTACK#

1
R344

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

BT_RESET#
BT_WAKE_UP

39 BT_WAKE_UP

BT_RESET#

39 BT_RST#
+5V_PRN

JP18
Module ID
Module_Detect

36 BT_DET#

+3V

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

+3VS

+5VS

2
0_0402_5%

24 USBP5+
24 USBP5-

USBP5+ R338
USBP5- R333

0_0603_5%
0_0603_5%

USB5+
USB5-

+BT_VCC

10
9
8
7
6

(MAX=200mA)
C477

1
R3

36 SLCTIN#

1
R2

LPTSLCTIN#
2
33_0402_5%

+5V_PRN

LPD7
LPD6
LPD5
LPD4

1
2
3
4

RP2

8
7
6
5

36 LPD[0..7]

+5VS

68_8P4R_1206_5%
F D7
8
F D6
7
F D5
6
F D4
5

36 LPTSTB#

36 LPTAFD#
36 LPTERR#

LPD[0 ..7]

1
R302

F D0
LPTERR#
F D1
LPTINIT#
F D2
LPTSLCTIN#
F D3
F D4
F D5
F D6

36 LPTACK#

1
2
3
4
5

R303
33_0402_5%
1
2

LPTSTB#

F D7

F D3
F D2
F D1
F D0

Bluetooth Connector

R304
2.2K_0402_5%

36 LPTBUSY
36 LPTPE
36 LPTSLCT

LPTACK#
L PTBUSY
LPTPE
LPTSLCT

C452
1
2
220P_0402_50V8K

AFD#/3M#

RP3
2.7K_10P8R_1206_5%

+5V_PRN

ACES_87153-2008
(Top Contact)

PARALLEL PORT

RB420D_SOT23

F D0
F D1
F D2
F D3

RP1
68_8P4R_1206_5%

F D4
F D5
F D6
F D7

10
9
8
7
6

1
2
3
4

D21

+5V_PRN
LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#

LPD0
LPD1
LPD2
LPD3

0.1U_0402_16V4Z

+5V_PRN

36 INIT#

LPTINIT#
2
33_0402_5%

1
2
3
4
5

RP87
2.7K_10P8R_1206_5%

1
2
14
33_0402_5% 2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

F D3
LPTSLCTIN#
F D2
LPTINIT#

8
7
6
5

CP11

1
2
3
4

220P_1206_8P4C_50V8_V1
CP9
8
1
7
2
6
3
5
4

LPTSLCT
LPTPE
L PTBUSY
LPTACK#

JP14
LPTCN-25

220P_1206_8P4C_50V8_V1
CP1
1
8
2
7
3
6
4
5

F D1
LPTERR#
F D0
AFD#/3M#

(BTS88)
F D7
F D6
F D5
F D4

220P_1206_8P4C_50V8_V1
CP10
8
1
7
2
6
3
5
4
220P_1206_8P4C_50V8_V1

Compal Electronics, Inc.


Title

PARALLEL/MDC PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

R ev
0.1

LA-2041
D ate:

P , 09, 2003

Sheet

38

of

56

13,24,36
13,24,36
13,24,36
13,24,36
13,24,36

0.1U_0402_16V4Z

2
C682
@22P_0402_25V8K

EC_SCI#

EC_GA20
EC_KBRST#

23 GATEA20
23 KBRST#

44
44
44
44
43
R494
100K_0402_5%
1
2
1
2
R478
100K_0402_5%

1 EC_RST#
4.7K_0402_5%

24 EC_SCI#

KSI0
KSI1
KSI2
KSI3
KSI4

EMAIL#
INTERNET#

+3VALW

R535
10K_0402_5%

26,27,29,30 WLANPME#

26,27,29,30 1394_PME#
EC_PME#

26,27,29,30 LAN_PME#

2
C649

+3VALW
1
2
3
4

RP145

BATT_TEMP
1
0.01U_0402_25V4Z

35 EXTID0
35 EXTID1
35 EXTID2
35 EXTID3
44 TP_CLK
44 TP_DATA
43 LID_SW#
34 MEDIA_DETECT

31

IOPD3/ECSCI#

5
6

GA20/IOPB5
KBRST/IOPB6
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

105
106
107
108
109
110
111
114
115
116
117
118
119

TP_CLK
TP_DATA
LID_SW#

C R Y1

158

C R Y2

160

VBAT

AD Input

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2

153
154
162
163
164
165

EC_URXD
EC_UTXD
EC_USCLK
EC_SMB_CK1
EC_SMB_DA1

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

168
169
170
171
172
175
176
1

PBTN_OUT#
EC_SMB_CK2
EC_SMB_DA2
FAN_SPEED1
EC_PME#
EC_THRM#
FAN_SPEED2

26
29
30

AC IN
CD _PLAY
PM_SLP_S3#

2
44
24
25

PM_SLP_S5#
BT_WAKE_UP

124
125
126
127
128
131
132
133

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

138
139
140
141
144
145
146
147

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

150
151

FR D#
FWR#

152

SELIO#

41
42
54
55

NUM_LED#
CAPS_LED#
PADS_LED#

143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

113
112
104
103
48

KBA16
KBA17
KBA18
KBA19
FSTCHG

PORTD-1

PORTE

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

PORTH
PS2 interface

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

PORTI

32KX1/32KCLKIN
32KX2

10K_1206_8P4R_5%

SELIO#

BKOFF#
FSEL#

40 FSEL#

+3VALW

0.1U_0402_16V4Z

PORTM

32.768KHz_12.5P_CM155
C664
10P_0402_50V8K

ECAGND

1
2
3
4
5
6
7
8
9
10

+3VALW

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
EC_URXD
EC_UTXD
EC_USCLK

@96212-1011S

KEYBOARD CONN.
(ACES_85201-2405_24P)

INVT_PWM 22
BEEP# 33
SHDD_LED# 35
ACOFF 48
KILL_SW# 29,33,38
EC_ON 43,45
EC_LID_OUT# 24
BT_DETACH 38

JP5

NUM_LED#
PADS_LED#
CAPS_LED#
1
2
300_0402_5% +3VS
KSO15 R219
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2
KSO2
KSO4
1
2
+3VS
R218
300_0402_5%

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

EC_URXD 45
EC_UTXD 45
EC_USCLK 45
EC_SMB_CK1 40,47
EC_SMB_DA1 40,47
PCIRST# 10,13,23,26,27,29,30,36
PBTN_OUT# 24
EC_SMB_CK2 5,34
EC_SMB_DA2 5,34
FAN_SPEED1 42
EC_THRM# 24
FAN_SPEED2 42
BT_PWR 38
ACIN 24,44,46
CD_PLAY 34
PM_SLP_S3# 24
ON/OFF 43
PM_SLP_S5# 24
BT_WAKE_UP 38
PM_CLKRUN# 24,26,27,29,30,36

1
R217

2
300_0402_5%

+3VS

NUM_LED#
PADS_LED#
CAPS_LED#

CP8
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSO15
KSO14
KSO10
KSO11

CP7
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSO8
KSO9
KSO13
KSI7

CP6
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSO3
KSO7
KSO12
KSI4

CP5
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSI6
KSI5
KSO6
KSO5

CP4
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSI3
KSI0
KSO0
KSO1

CP3
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

KSI1
KSI2
KSO2
KSO4

CP2
1
2
3
4

@100P_1206_8P4C_50V8
8
7
6
5

I/O Address
BADDR1(KBA3) BADDR0(KBA2)
FRD# 40
FWR# 40

SELIO# 40
PHDD_LED# 35

1
ENV0 (KBA0)

IRE
* OBD
DEV
PROG

Data

Index
2E

2F

4E

4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1


Reserved
ENV1 (KBA1)
0
1
0
1

0
0
1
1

TRIS (KBA4)
0
0
0
0

SHBM(KBA5)=1: Enable shared memory with host BIOS


TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use
+3VALW
+5VS
TP_CLK

1
R493
TP_DATA 1
R492

FSTCHG 48

2
4.7K_0402_5%
2
4.7K_0402_5%

KBA1
KBA2
KBA3
KBA5

2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
A

C798
@0.1U_0402_16V4Z

1
R491
1
R490
1
R489
1
R488

D42
DAC_BRIG

@DAN217_SOT23

+3VALW

Compal Electronics, Inc.


Title

EC PC87591

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
Custom
LA-2041
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
, 10, 2003
Date:
3

(Need to check layout library with KB spec)

PC87591L-VPCN01 A2_LQFP176

L32
FBM-L11-160808-800LMT_0603

C665
12P_0402_50V8J

ADP_I 48,52

6278-34P-KBCON

R517
120K_0402_5%

PROPRIETARY NOTE

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

PORTL

SEL0#
SEL1#
CLK

1
C644

2
100K_0402_5%
2
0.22U_0603_16V4Z

DAC_BRIG 22
EN_DFAN2 42
IREF 48
EN_DFAN1 42

ACOFF
KILL_SW#
EC_ON
EC_LID_OUT#
BT_DETACH

X5
2

C638
1

AD_BID0

R487
0_0402_5%

Rb

20M_0402_5%

Ra

C R Y2

PORTK

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD

R481
100K_0402_5%

173
174
47

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

PORTJ-2

C R Y1

R519

148
149
155
156
3
4
27
28

IOPD4
IOPD5
IOPD6
IOPD7

PORTD-2

1
R499

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

SYSON
SUSP#
VR_ON

41,42,50 SYSON
31,34,40,41,49,50,51,52 SUSP#
53 VR_ON
27 PCM_SUSP#
24,45 EC_RSMRST#
35,36 DRV0#
16,22 ENBKL
22 BKOFF#

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

AGND

EN_DFAN3

62
63
69
70
75
76

11
12
20
21
85
86
91
92
97
98

10K_1206_8P4R_5%

Analog Board ID definition,


Please see page 3.

EC_SMI#

24 EC_SMI#
42 S4_SATA
29 WL_OFF#
24 EC_SWI#
38 BT_RST#
42 EN_DFAN3

96

EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1

1
2
3
4

GND1
GND2
GND3
GND4
GND5
GND6
GND7

RP85

17
35
46
122
159
167
137

8
7
6
5

IOPJ0/RD
IOPJ1/WR0

PORTJ-1

+5VALW

ALI/MH#
EMAIL#
MODE#
INTERNET#
AD_BID0

INVT_PWM
BEEP#

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2

JTAG debug port

BATT_OVP 48
FAN_DET 42
ALI/MH# 47
EMAIL# 43
MODE# 44
INTERNET# 43

32
33
36
37
38
39
40
43

PORTC

1
100K_0402_5%

BATT_TEMPA 47

BATT_OVP

DAC_BRIG
EN_DFAN2#
IR EF
EN_DFAN1#

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

2
R553

BATT_TEMP

99
100
101
102

PWM
or PORTA

TINT#
TCK
TDO
TDI
TMS

81
82
83
84
87
88
89
90
93
94

DA0
DA1
DA2
DA3

DA output

PORTB

MEDIA_DETECT

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

Host interface

Key matrix scan

1
2
3
4
5
6
7
8
9
10

161

34
45
123
136
157
166
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

16

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

71
72
73
74
77
78
79
80

MODE#
FR D#
SELIO#
FSEL#

8
7
6
5

7
8
9
15
14
13
10
18
19
22
23

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

26,27,29,30 PCM_PME#

For EC Tools
JP31

0.1U_0402_16V4Z
U50

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

2
R549

+3VALW

15 CLK_PCI_LPC

LPC_FRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

KBA[0..19]
AD B[0..7]

40 KBA[0..19]
40 ADB[0..7]

+RTCVCC

+51AVCC

C677

23,27,36 SERIRQ

L33
FBM-L11-160808-800LMT_0603

C639

R548
@33_0402_5%

ECAGND

+3VALW

+3VALW
2

ECAGND

+3VALW

2
1

C637
1000P_0402_50V7K

0_0402_5%

0.1U_0402_16V4Z

1
2

+51AVCC

C666

R552

1000P_0402_50V7K

1
D

+3VS

VDD

0.1U_0402_16V4Z

+RTCVCC

C643

1
2

C661

0.1U_0402_16V4Z

+51VDD

0.1U_0402_16V4Z
C669

C678

0.1U_0402_16V4Z
C674

95

+3VALW

AVCC

R ev
0.1
1

Sheet

39

of

56

+5VALW

+5VALW

1
C351

+5VALW

KBA4

SELIO#

SN74HCT273PW_TSSOP20

U13A

3
4
7
8
13
14
17
18

D0
D1
D2
D3
D4
D5
D6
D7

VCC

0.1U_0402_16V4Z

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
CC
LARST#

11
1

CP
MR

GND

CP
MR

+3VALW

C366
1
2

SN74LVC32APWLE_TSSOP14

10

20

CD_F DD_LED#

CDON_LED# 44
MP3_LED# 44
EMAIL_LED# 44
PW R_LED# 44
PW R_SUSP_LED# 44
BATT_LOW_LED# 44
BATT_CHGI_LED# 44
CD_FDD_LED# 43

14

11
1

VCC

AA
LARST#

10

U13B
SN74LVC32APWLE_TSSOP14

2
5
6
9
12
15
16
19

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

D0
D1
D2
D3
D4
D5
D6
D7

SELIO#

U14

GND

3
4
7
8
13
14
17
18

39 SELIO#

KBA2

14

+3VALW

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

2
0.1U_0402_16V4Z
U11

20

1
2
C367
0.1U_0402_16V4Z

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

2
5
6
9
12
15
16
19

KSO16

KSO17
HDD _LED#

KSO17 43,44
HDD_LED# 43
WL_BT_LED# 43
S4_LATCH 42
EC_RCVEN 45
EC_RCRST# 45
CIR_GATING# 45

EC_ RCVEN
EC_RCRST#

to 3V

SN74HCT273PW_TSSOP20

C352
1
2

1
2
R224
20K_0402_5%

1U_0805_25V4Z

+3VALW

CC
+3VALW
R245
100K_0402_5%

8
7
6
5

39,47 EC_SMB_CK1
39,47 EC_SMB_DA1

1
100K_0402_5%

U18

VCC
WP
SCL
SDA

R266

A0
A1
A2
GND

1
2
3
4

AT24C16N10SC-2.7_SO8

EC_FLASH# 24

C399
2 0.1U_0402_16V4Z

SUSP# 31,34,39,41,49,50,51,52

U13C
SN74LVC32APWLE_TSSOP14

1
D

10

14
P

Q15
2N7002_SOT23

FWE#

+5VALW
+5VALW

2
100K_0402_5%
2
100K_0402_5%

2
G

+3VALW

1
R246
1
R238

AA

R263
100K_0402_5%

FW R# 39

1MB Flash ROM

512KB Flash ROM


+3VALW

U15

39 FSEL#
39 F RD#

Flash ROM Socket Conn.

KB A[0..19]
ADB[0 ..7]

39 KBA[0..19]
39 ADB[0..7]

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

FSEL#
F RD#
FWE#

22
24
9

CE#
OE#
WE#

VCC0
VCC1

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

GND0
GND1

23
39

C663
0.1U_0402_16V4Z
2

U16

1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RESET#

1
2
R248
@100K_0402_5%

C380
0.1U_0402_16V4Z

+3VALW

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

@29F040/SST39VF040_PLCC

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
F RD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

+3VALW

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

JP7

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KBA17
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
+3VALW
ADB3
ADB2
ADB1
ADB0
F RD#
FSEL#
KBA0

@SUYIN-80065A-040G2T

SST39VF080-70_TSOP40

Compal Electronics, Inc.


Title

BIOS & EXT. I/O PORT


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet

40

of

56

+3V

+5VALW TO +5V

SYSON_ALW

10U_1206_16V4Z

2 SYSON#
G
Q39
@2N7002_SOT23

C605

R427

0.1U_0402_16V4Z

@1M_0402_5%
S

2
1

C437

+3VS

0.1U_0402_16V4Z

R473

0.1U_0402_16V4Z

@1M_0402_5%
S

SUSP
2
G
Q47
2N7002_SOT23

5VS_GATE

4.7U_0805_10V4Z

C194

39,42,50 S YSON

0.1U_0402_16V4Z

14
1

1U_0805_25V4Z

C192
4.7U_0805_10V4Z

U61A

C193

R501
10K_0402_5%

19,52 SUSP

SUSP

S Y SON

Q53
31,34,39,40,49,50,51,52 SUSP#
2N7002_SOT23

2
G
S

Q52
2N7002_SOT23

2
G
S

+3VALW

SI4800DY_SO8

1
2

C640

0_0402_5%

+5VALW

R699

O
G

S
S
S
G

D
D
D
D

1
2
3
4

+2.5VS
U3

SYSON#

+3VALW

+3V

+2.5V TO +2.5VS

+5VALW

1U_0805_25V4Z
R502
10K_0402_5%

8
7
6
5

C646
4.7U_0805_10V4Z

+2.5V

4.7U_0805_10V4Z

C648

C342

SI4800DY_SO8

C647

10U_1206_16V4Z

C345

SI4800DY_SO8

1
2
3
4

S
S
S
G

+12VALW

D
D
D
D

R474
100K_0402_5%
1
2

5VS_GATE

2 SUSP
G
Q54
@2N7002_SOT23

+5VS

U45

8
7
6
5

3
+5VALW

1U_0805_25V4Z

2 SUSP
G
Q48
@2N7002_SOT23

C343

C781
0.1U_0402_16V4Z

14

U61B

1
2
3
4

10U_1206_16V4Z

+3VALW POWER
SN74LVC14APWLE_TSSOP14

O
G

C344

+3VALW

R507
@470_0805_5%

1
D

S
S
S
G

+5VS

+5VALW TO +5VS

+3VS

D
D
D
D

2 SUSP
G
Q11
@2N7002_SOT23

SYSON_ALW

2 SYSON#
G
Q41
2N7002_SOT23

+3VALW TO +3VS

8
7
6
5

2 SYSON#
G
Q51
@2N7002_SOT23

R475
@470_0805_5%

U9

1U_0805_25V4Z

C441
4.7U_0805_10V4Z

1
1

C438

C635

+12VALW

4.7U_0805_10V4Z

R184
@470_0805_5%

SI4800DY_SO8

R426
100K_0402_5%
1
2

C440

R505
@470_0805_5%

1
2
3
4

S
S
S
G

D
D
D
D

R408
@470_0805_5%

1
2
3
4

S
S
S
G

SI4800DY_SO8

8
7
6
5

1U_0805_25V4Z

D
D
D
D

U44

10U_1206_16V4Z

+5V

U23

8
7
6
5

C599

+3VALW

C601

+2.5VS

+5VALW

+5V

+3V

+3VALW TO +3V

V_ON 50

+3VALW POWER
SN74LVC14APWLE_TSSOP14

5VS_GATE

C170
+3VALW POWER

+3VS

0.1U_0402_16V4Z

+3VALW

+3VALW

O 6
+3VALW POWER
SN74LVC14APWLE_TSSOP14

14
9

U61D

U61C

O
G

P
I

14

R700
0_0402_5%

VS_ON 50,51,52

+3VALW POWER
SN74LVC14APWLE_TSSOP14

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
Size
PROPRIETARY TRADE
NOTE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D ate:
A

POWER CONTROL CKT


Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet
E

41

of

56

RTC Battery

FAN CONN. 1

+5VALW

VS

+3VS

1
R529

ACES_85205-0400

C791

FAN CONN. 2

@1000P_0402_50V7K

+5VALW

3
1
2

SYS_PW ROK 7,24

0.1U_0402_16V4Z

14

14

100K_0402_5%

1000P_0402_50V7K

1
2
3

+12VALW

1
2

1
2
R268
10K_0402_5%
U19
NC7SZ14M5X

Q18
2N7002_SOT23

2
G
S

RB751V_SOD323

Q17
2N7002_SOT23

2
G
3

2
1U_0603_10V6K

C794

2
G

39,41,50 S YSON

1000P_0402_50V7K

Q16
2N7002_SOT23

@1000P_0402_50V7K

ON/OFFBTN# 43,45

1N4148_SOT23

43 S4_LID_SW#

0.1U_0402_10V6K
2

2
10K_0402_5%

C793

C406
1

D15

FAN CONN. 3

680K_0402_5%

1
C411

ACES_85205-0300

39 FAN_SPEED2

100K_0402_5%

D13

2
1
R541

R270

1N4148_SOT23

2
8.2K_0402_5%

100K_0402_5%

JP23

R271

R275

1SS355_SOD323

RTCVREF

FA N2

RTCVREF

0.1U_0402_16V4Z
D5

+3VS

RTCVREF RTCVREF

C249
10U_1206_16V4Z

D3

Q10

C256

FMMT619_SOT23

2
B

E N_FAN2 1
2
R200
100_0402_5%

LM358A_SO8

1
R201

R202
10K_0402_5%

OUT

+3V POWER

CHGRTC
C607

R588

1U_0805_25V4Z

-IN

O
+3V POWER

U55E
SN74LVC14APWLE_TSSOP14
O 10

C792

+IN

EN_ DFAN2

11

U7B

2
10K_0402_5%

39 FAN_SPEED1

39 EN_DFAN2

C692

1
2
3
4

1N4148_SOT23

U55D
SN74LVC14APWLE_TSSOP14

JP25

D8

2
8.2K_0402_5%

R587
180K_0402_5%

BAS40-04_SOT23

+RTCVCC

0.1U_0402_16V4Z

1
R210

1SS355_SOD323

FA N1

Q71
E

C782

LM358A_SO8

2
B
2

+3V

1
R705
100_0402_5%

+3V

R211
10K_0402_5%

C287
10U_1206_16V4Z

1
1
E N_FAN1

OUT

-IN

FMMT619_SOT23

D27

+3VS

P
+IN

8
2

39 EN_DFAN1

EN_ DFAN1

D7

+RTCBATT

+RTCBATT

RTCBATT

Power ON Circuit

U7A

1
2
C303
0.1U_0402_16V4Z
1

BATT1

R679
10K_0402_5%

1
2
R273
10K_0402_5%

R707

1
FMMT619_SOT23
Q12

40 S4_LATCH
RTCVREF

C257

D4

10U_1206_16V4Z

1
2
R274
1
10K_0402_5%
C413

D6

+3VALW

JP22

1
2
3

1N4148_SOT23

Q73
2N7002_SOT23

39 S4_SATA

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

RTCVREF
C405
1

0.1U_0402_10V6K
2

74LCX74

D14

D_SET_S4

Q19
2N7002_SOT23

2
G
S

RB751V_SOD323

ACES_85205-0300

C779

D40

4.7U_0805_10V4Z

C260

FAN_DET 39

RB751V_SOD323
R696
100K_0402_5%

@100_0402_5%

2
10K_0402_5%

R205

1
R695

+5V

2
@0_0402_5%

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

14
13
12
11
10
09
08

C795
1000P_0402_50V7K

E N_FAN2 1
R207

1
2
R276
10K_0402_5%

@1U_0805_16V7K

C780
0.1U_0402_16V4Z

Compal Electronics, Inc.

2
G

EN_ DFAN3

1SS355_SOD323

39 EN_DFAN3

FAN2-1

2
B

Q69
2SA1036K_SOT23

1
2
3
4
5
6
7

2
B

2
1U_0805_16V7K
U20

D38
1N4148_SOT23

10K_0402_5%

1
C412

+5VALW

R681
10K_0402_5%

+3VALW

2 2

RTCVREF

+5VALW

Title

0.1U_0402_16V4Z

Power OK/Reset/RTC battery/Lid Switch/Int. KB


Size

Document Number

R ev
0.1

LA-2041
A

D ate:

P , 09, 2003

Sheet

42

of

56

LID Switch
42 S4_LID_SW#

45 CIR_LID_SW #

2
R656

1
100K_0402_5%

DAN202U_SC70

SW1

INTERNET_BTN#

2INTERNET#

JP6

INTERNET# 39

51ON#

INTERNET_BTN#
EMIAL_BTN#

DAN202U_SC70

D1
@DAN217_SOT23

+3VALW
39 KSI4
40,44 KSO17

2
H O R NG CHIH

+3VALW

Button FPC Conn.

D10

D2

39 LID_SW #

LID_SW # 2

D11

+3VALW

EMIAL_BTN#

(DIFFERENT BETWEEN MPU-101-81A)

EMAIL#

51ON#

6
5
4
3
2
1

TV_OUT_EN#
KSO17

ACES_85201-0605

EMAIL# 39

DAN202U_SC70

1
JOPEN

+3VALW

+5VS

Power Button

+5V

1
JOPEN

J2

Q42
DTA114YKA_SOT23

47K

2
51ON#

1000P_0402_50V7K

1 WL_BTLED#
200_0402_5%

2
R466

RLZ20A_LL34

1
2 2
R555
33K_0402_5%
Q58 22K
DTC124EK_SOT23

Power FPC Conn.


+5VS

1
2
G

47K

Q13
DTA114YKA_SOT23
HDD _LED#

HDD_LED# 40

ACES_85201-1405

10K

+5VS

2N7002_SOT23 S

1 CD_FD DLED#
200_0402_5%

22K
B

Q55

40

D34

2
C687

2
39,45 EC_ON

WL_BT_LED#

51ON# 44,46

2
R465

+3VALW

E C_ON

WL_BT_LED#

2
10K

O N/OFF 39

DAN202U_SC70

R554
4.7K_0402_5%

CD_FDD_LED# 40

Q43
DTA114YKA_SOT23

47K

10K

ON /OFFBTN# 1

CD_F DD_LED#

2
C

100K_0402_5%
D33

42,45 ON/OFFBTN#

J3

R560

200_0402_5%

HDDL ED#
1
200_0402_5%

2
R216

R215

44 POW ER_ON_LED

WL_BTLED#
1
SDLED#
CD_FD DLED#
HDDL ED#
ON /OFFBTN#
POW ER_ON_LED

+5VALW
44 PW R_SUSPLED#_1

14
13
12
11
10
9
8
7
6
5
4
3
2
1

14
13
12
11
10
9
8
7
6
5
4
3
2
1

JP4

SDLED#
D

27 SDLED
A

S DLED

2
G

Q56
2N7002_SOT23

Compal Electronics, Inc.


Title

Switchs & Connectors


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet
1

43

of

56

R294

R297

47K

1 2

DTC115EKA_SOT23
Q28

100K

100K

BATT_LOW_LED#

BATT_LOW_LED#

40

R295

DTC115EKA_SOT23
Q30

200_0402_5%

1U_0805_25V4Z
1

100K

EMAILLED#

2N7002_SOT23

2
470K_0402_5%
2
100K_0603_1%
1U_0805_25V4Z
1

C773
2

-IN

+IN

R673

OUT

1
R672

+5VALW

1
R671

Q29

2
G

LM358A_SO8
U60A

D37

2
R293

1PW R_SUSPLED#
200_0402_5%

2
R678

1
200_0402_5%

BATTERY CHGI/LOW LED

EMAIL LED

PW R_SUSPLED#_1 43

PW R_LED#

40 PW R_LED#

C772
2

100K

BATT_CHGI_LED# 2

PW R_SUSP_LED# 40

40 BATT_CHGI_LED#

R646

EMAIL_LED# 40

10K

2 1

200_0402_5%

R296

Q31
DTA114YKA_SOT23
B

2EMAIL_LED#
C

1
200_0402_5%
D

200_0402_5%

1 2

200_0402_5%
PW RLED#

+5V

POW ER_ON_LED

43 POW ER_ON_LED

BATT_LOWLED#

BATT_CHGILED#

LED FPC Conn.

100K_0603_1% RB751V_SOD323

POWER/SUSP LED

ACIN LED#
PW RLED#
PW R_SUSPLED#
BATT_LOWLED#
BATT_CHGILED#
EMAILLED#

0.1U_0402_16V4Z

1
2
3
4
5
6
7
8
9
10

ACIN LED#

2
R298
200_0402_5%

JP12
+5VALW

2 A C IN
G
Q32
2N7002_SOT23

+5VALW
C775

A C IN 24,39,46

ACES_85201-1005

CD ON_LED#

40 CDON_LED#

3
Q21
DTA114YKA_SOT23

E
40 MP3_LED#

MP3_LED#

10K

U60B

2
C

+IN

-IN

OUT

11

200_0402_5%

200_0402_5%

+5VALW POWER

Touch Pad Connector

U61E

O 10
+3VALW POWER
SN74LVC14APWLE_TSSOP14

R283

R282

LM358A_SO8

2 1

2 1

10K

47K

14

47K

Q20
DTA114YKA_SOT23

ACIN LED

+5VCD

+5VCD

51ON#

43,46 51ON#

D16

+5VS

CDPLAY Board Conn.

MODE#

39 MODE#

D17

1N4148_SOT23

+3VALW

100P_0402

D_MODE#
R_C DON_LED#
R_MP3_LED#
KSO17
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
E C_FRDBTN#

C783
C784
C785
C786
C787
C788
C789
C790

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z
@100P_0402_16V4Z

40,43
39
39
39
39

KSO17
KSI0
KSI1
KSI2
KSI3

D_MODE#
R_C DON_LED#
R_MP3_LED#
KSO17
EC_PLAYBTN#
EC_STOPBTN#
EC_REVBTN#
E C_FRDBTN#

14
13
12
11
10
9
8
7
6
5
4
3
2
1

14
13

U61F

11

12

+3VALW POWER
SN74LVC14APWLE_TSSOP14

1U_0603_10V6K
D43
@DAN217_SOT23

14
13
12
11
10
9
8
7
6
5
4
3
2
1

TP_CLK

TP_DATA

2
3

+5VS

3
A

D44
@DAN217_SOT23

Compal Electronics, Inc.


Title

JP11

SN74LVC125APWLE_TSSOP14
+3V POWER

Switchs & Connectors


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U51D

12

ACES 85201-0602_6P

ACES_85201-1405

D_MODE#

1N4148_SOT23

C347

1
2
3
4
5
6

TP_CLK
TP_DATA

39 TP_CLK
39 TP_DATA

OE#

R_MP3_LED#

13

JP8
R_C DON_LED#

Size
B

Document Number

D ate:

P , 09, 2003

R ev
0.1

LA-2041
Sheet
1

44

of

56

H24
SCREW 8.5x3.0

H21
SCREW 8.5x3.0

H22
SCREW 8.5x3.0

Q33
SI2301DS 1P_SOT23

3
C445
1U_0603_10V6K

H11
SCREW 8.5X2.8

H12
SCREW 8.5X2.8

1
R300

H18
SCREW 8.5X2.8

H19
SCREW 8.5X2.8

1
2
R284
100K_0402_5%
2
24,39 EC_RSMRST#
G

3
X2

H33
SCREW 8.5X2.8

H36
SCREW 8.5X2.8

H37
SCREW 8.5X2.8

H34
SCREW 8.5x3.0

2
@10P_0402_50V8K

H35
SCREW 8.5x3.0

H41
SCREW

H42
SCREW

1
R676

2
0_0402_5%
CIR_R CRST#

0.1U_0402_16V4Z
+5V_CIR

RCIR RX

20
19
18
17

XOUT

P10
P11
P12/CNTR
P13/INT

16
15
14
13

RESET#

7
8

P21/AIN1
P20/AIN0

CIR_UTXD

D0
D1

12
11

CIR_U RXD
CIR_US CLK

1
R301

9
10

D3/K
D2/C

CNVSS

VDD

VSS

C446

2
+5V_CIR
@10K_0402_5%

1
R291

2
0_0402_5%

2
0_0402_5%

1U_0805_25V4Z

0.1U_0402_16V4Z

+5V_CIR

8
7
6
5

40 CIR_GATING#

39 EC_UTXD

+3VALW

1
R287

EC_UTXD

10K_0402_5%

R650

10K_0402_5%

3
1 CIR_UTXD
Q26
MMBT3904_SOT23

40 EC_RCVEN

CIR_RCVEN

Q64

2
10K_0402_5%

10K_0402_5%

MMBT3904_SOT23

CIR _GATING#

ACES_85201-0605

2
@10K_0402_5%

1
R285

CIR _GATING#

R670

2 2

1
2
3
4
5
6

RCIR RX

Q67
100K

+5V_CIR

1
+3VALW

JP13

2 2

CIR Reciever Board Conn.


+5V_CIR

Q25
2N7002_SOT23

DTC115EKA_SOT23

100K

R677
47K_0402_5%

+3VALW

H46
SCREW

C774

M34501M4-XXXFP

R286
H45
SCREW

2
G

+5V_CIR

H44
SCREW

+5V_CIR

ON/OFFBTN# 42,43

RC_ON /OFFBTN

10K_1206_8P4R_5%

H43
SCREW

2
1
R657
@10K_0402_5%

1
2
3
4

CIR_RCVEN
CIR_UTXD

P00
P01
P02
P03

XIN

1
R290

H40
SCREW

CIR_RCVEN
CIR_R CRST#
CIR_U RXD
CIR_US CLK

@1M_0603_5%

2
RP86

H39
SCREW

R675

C447

H38
SCREW

1U_0805_25V4Z

U25

1
C758

H32
SCREW 8.5X2.8

Q22
DTC115EKA_SOT23

P2
C443

Q23
2N7002_SOT23

H30
SCREW 8.5x3.0

2
@10P_0402_50V8K

4MHZ_30PF_6W04000042

H31
SCREW 8.5X2.8

8
7
6
5

IN
FB
TAP
ERR#

H29
SCREW 8.5x3.0

OUT
SNS
SHDN
GND

Q24
2N7002_SOT23

H28
SCREW 8.5x3.0

1
C757

H27
SCREW 8.5x3.0

H26
SCREW 8.5x3.0

2
G

H25
SCREW 8.5x3.0

MIC2951

P2

H20
SCREW 8.5X2.8

1
2
3
4

2
100K_0603_5%

43 CIR_LID_SW #

H17
SCREW 8.5X2.8

H16
SCREW 8.5X2.8

H15
SCREW 8.5X2.8

H14
SCREW 8.5X2.8

2
10K_0402_5%

U24

P2

H13
SCREW 8.5X2.8

1
R289

EC_ON 39,43

C442
1U_0603_10V6K

H10
SCREW 8.5X2.8

2
1U_0603_10V6K
2
100K_0603_5%

+5VALW

H9
SCREW 8.5X2.8

H8
SCREW 8.5X2.8

H7
SCREW 8.5X2.8

H6
SCREW 8.5X2.8

2
1
C444
1
R299

H5
SCREW 8.5X2.8

+5V_CIR

H23
SCREW 8.5x3.0

100K

H4
SCREW 8.5X2.8

100K

H3
SCREW 8.5X2.8

H2
SCREW 8.5x3.0

H1
SCREW 8.5x3.0

+3VALW

C F5
CF11
C F8
CF20
C F7
CF14
C F6
C F9
CF13
CF10
CF15
CF18
CF16
CF19
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

1
R292

E C_USCLK

CIR_U RXD

R651

RB751V_SOD323

2
D19

40 EC_RCRST#

CIR_US CLK

Q65

CIR_R CRST#

MMBT3904_SOT23
A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

10K_0402_5%

Compal Electronics, Inc.

1
F D6
F IDUCAL

1
F D5
F IDUCAL

1
F D4
F IDUCAL

1
F D1
F IDUCAL

1
F D3
F IDUCAL

1
F D2
F IDUCAL

2
10K_0402_5%

2
D18

RB751V_SOD323

CF21
CF27
CF23
CF24
CF22
CF26
CF25
CF28
C F2
C F4
CF12
CF17
C F1
C F3
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80

39 EC_USCLK

EC_URXD

2 2

39 EC_URXD

CIR & Screws

Size
B

Document Number
LA-2041

D ate:

P , 09, 2003

R ev
0.1
Sheet

45

of

56

VS

5.6K_0603_5%

2
8
PC6

PD2

LM393M_SO8

0.1U_0603_25V7K

2
1

10K_0603_5%

V IN

PR8

P ACIN 48,49

PR7
10K_0603_5%

RLZ4.3B_LL34

2
1000P_0603_50V7K

P ACIN

A C IN 24,39,44

20K_0603_1%

PR6

PC5

SINGA_2DC-S113L200

2
22K_0603_5%

1
PR5

100P_0603_50V8J

1
2
PR4
1K_0603_5%

PU1A

1000P_0603_50V7K

PR2

84.5K_0603_1%

PC4

100P_0603_50V8J

PC3

1000P_0603_50V7K

PC2

1
2

PD1
EC10QS04

PC1

G
G
G
G

2
1M_0603_1%

VS

PR3

6
5
4
3

1
PR1

1
2
C8B BPH 853025_2P

PCN1

V IN

PL1

V IN
PF1
12A_65VDC_451012
1
2

Vin Detector

RTCVREF

3.3V

High 18.764 17.901 17.063


Low 17.745 16.903 16.038

PD3

BATT+

1N4148_SOD80
PD4

RB751V_SOD323

PR9

VS

33_1206_5%

1
2
PR10
1K_1206_5%

2
N1

1
PQ1
TP0610T_SOT23

0.22U_1206_25V7M

VIN

PD5

N3

1
2
PR12
1K_1206_5%

1N4148_SOD80

PC8
0.1U_0603_25V7K

B+

100K_0603_5%

PC7

PR13

1
2
PR11
200_0603_5%

CH GRTCP

1
PR14

2
22K_0603_5%

1
2
PR15
1K_1206_5%
1

43,44 51ON#

RTCVREF

2
10K_0603_5%

PJP1

PR21

1
PR23
215K_0603_1%

499K_0603_1%

PR22

PC11
3

1000P_0603_50V7K

1000P_0603_50V7K

PC13

RLZ6.2C_LL34

PC12

PD8

RB715F_SOT323

8
7

48 ACON

PR19
499K_0603_1%

LM393M_SO8

RLZ16B_LL34

PD7

1
1M_0603_1%

1U_0805_25V4Z

47,49 MAINPWON

2
PR18
PU1B

PON
PD6

PC10
10U_1206_10V4Z

PC9

6.0V

N2

2
10K_0603_5%

1
PR17

VS

2
3

200_0603_5%

200_0603_5%

200_0603_5%

3.3V

PR20

CHGRTC

PR200

PR16

PU2
S-81233SGUP-T1_SOT89

0.1U_0603_16V7K

RTCVREF

3.3V

PAD-OPEN 4x4m
+2.5V

(12A,480mils ,Via NO.=24)

+1.25VSP

PJP4

PJP3
+5VALWP

+1.25VS (1.5A,120mils

,Via NO.= 6)

(6A,240mils ,Via NO.= 12)

+CPUVIDP

PJP5

+CPUVID

(150mA,40mils ,Via NO.= 2)

+3VALWP

PJP7

+12VALWP

PJP9

P ACIN
1
47K_0603_5%

2
PR24

PQ3
DTC115EKA_SOT23

+3VALW

100K

+5VALWP

100K

(6A,240mils ,Via NO.= 12)


2

+1.5VS

(6A,240mils ,Via NO.= 12)

PAD-OPEN 4x4m
4

2
G

Precharge detector
15.34
15.90
16.48
13.13
13.71
14.20

PAD-OPEN 4x4m

PAD-OPEN 2x2m

+1.5VSP

D
PQ2
2N7002_SOT23

+5VALW

PAD-OPEN 4x4m

PAD-OPEN 4x4m
PJP6

PAD-OPEN 4x4m

PJP2

+2.5VP

+VGA_COREP

PJP8

+VGA_CORE

PAD-OPEN 4x4m

+12VALW

PAD-OPEN 2x2m

(300mA,20mils ,Via NO.= 1)

(5A,200mils ,Via NO.= 10)


PJP10

+VTT_GMCHP

+VTT_GMCH

PAD-OPEN 3x3m

(1.2A,60mils ,Via NO.= 3)

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


DCIN & DETECTOR
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

46

of

56

PH1 under CPU botten side :


CPU thermal protection at 84 degree C
Recovery at 45 degree C

PR31
1
2
16.9K_0603_1%
TM_REF1

MAINPW ON 46,49

0.01U_0603_50V7K

1K_0603_5%

47K_0603_1%

1000P_0603_50V7K

PC16

1
2
PR28
47K_0603_1%
PU3A
O 1

PD10

PQ4

100K

1SS355_SOD323

LM393M_SO8

PC17

BAS40-04_SOT23

PD9
@

PR33

0.22U_0805_16V7K

2
25.5K_0603_1%

ALI/MH# 39
+3VALWP

PR34
2
1
100K_0603_1%

3.32K_0603_1%

VL

1
PR35

DTC115EKA_SOT23
100K

100_0603_5%

PC15

PR25

PC14
0.1U_0603_25V7K

2
47K_0603_5%

VL

10KB_0603_1%_TH11-3H103FT
PH1

BATT+

PR32

100_0603_5%

+3VALWP

1
PR30

PL2
1
2
C8B BPH 853025_2P

PR29

PF2

15A_65VDC_451015

1
PR27

SUYIN_200275MR009G116ZL

1
1K_0603_5%

2
PR26

ALI/N IMH#
A B/I
TS_A
EC_SMDA
EC_SMCA

GND
GND

1
2
3
4
5
6
7
8
9

10
11

BATT+
BATT+
ID
B/I
TS
SMD
SMC
GNDGND-

PCN2

VS

VL

VMB

PD11
@ BAS40-04_SOT23

100K_0603_1%

PR36

PC18

PR37
1K_0603_5%

1000P_0603_50V7K

1
2
BATT_TEMPA 39
EC_SMB_DA1 39,40

EC_SMB_CK1 39,40

PH2 near main Battery CONN :


BAT. thermal protection at 79 degree C
Recovery at 45 degree C

PD12
@ BAS40-04_SOT23

PD13
@ BAS40-04_SOT23

VL

VL

PR38
47K_0603_1%

10KB_0603_1%_TH11-3H103FT

PR39
1
2
47K_0603_1%

2
14.7K_0603_1%
TM_REF2

PU3B

PD14

1SS355_SOD323

LM393M_SO8

PR42
3.48K_0603_1%

2
PC20

PR41

VL

100K_0603_1%

PR43
100K_0603_1%

PC19
0.22U_0805_16V7K

1
PR40

+5VALWP

PH2

1000P_0603_50V7K
4

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


BATTERY CONN / OTP
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

47

of

56

1
2
C8B BPH 853025_2P

0.01_2512_1%

PC21
4.7U_1210_25V6K

8
7
6
5

PC22
4.7U_1210_25V6K

1
2
3

PC23

SI4825DY_SO8

2
1
PR58

39 IR E F

0.1U_0603_16V7K

1000P_0603_50V7K

2
PR60

FB2

OUT

20

VH

19

VCC

18

FB1

-INE1

RT

17

+INE1

-INE3

16

10
1
10K_0603_5%

0.1U_0603_16V7K

VREF

OUTC1

FB3

15

11

OUTD

CTL

14

12

-INC1

+INC1

13

0_0603_5%
PC24
0.022U_0603_25V7K
1
2

CS

N18

PQ8
SI4835DY_SO8

21

3
2
1

-INE2 VCC(o)

7
2
1K_0603_5%

100K_0603_1%
PQ11
DTC115EKA_SOT23

PC33

PQ9
DTC115EKA_SOT23

4
100K

PC25
1
2
0.1U_0603_25V7K

1
PR57
68K_0603_5%
PR61

1
2
PC31
0.1U_0603_25V7K
2

PL4
22UH_SPC-1204P-220A
1
2

PC32
1
2

1
2
47K_0603_5%
1500P_0603_50V7K
AC ON

PR59

4.7U_1210_25V6K

BATT+

0.02_2512_1%
PD16

PC34

RB051L-40_SOD106

PC35

4.7U_1210_25V6K

100K

100K

PR64

PC36

MB3887_SSOP24

ACOFF 39

CC=0.5~2.7A
CV=16.8V(12 CELLS LI-ION)

100K
PQ12
DTC115EKA_SOT23
39 FSTCHG

100K

LXCHRG

1
2
PC28
0.1U_0603_25V7K

100K

1
1

1
PR63
47K_0603_5%

PR62

22

PC30
PR56
1
2 1

2
205K_0603_1%

CS

CS

PC27
PR55
5
2 1
2
10K_0603_5%

4700P_0603_50V7K

PC29

+3VALWP

+INE2

PR50

0.1U_0603_16V7K

IREF=1.31*Icharge
IREF=0.73~3.3V

33.2K_0603_1%

10K_0603_1%

V IN

PR54

PC26

23

47K_0603_5%

AC ON

46 ACON

PR53

OUTC2 GND

PR48

2N7002_SOT23

2
G

PQ10

P ACIN 1
2
PR52
3K_0603_5%

24

1
100K_0603_5%

+INC2

-INC2

5
6
7
8

2
PR51

1SS355_SOD323

PU4

39,52 ADP_I

150K_0603_1%

PR47

10K_0603_5%

PR49

PD15

AC OFF#1

AC OFF#

46,49 P ACIN

4.7U_1210_25V6K

200K_0603_1%

10K_0603_5%

D
D
D
D

PR46

SI4825DY_SO8

S
S
S
G

1
2
3
4

PQ7
SI7447DP_SO8

PL3

PR45

1
2
3
4

S
S
S
G

PR44

1
1

D
D
D
D

8
7
6
5

PQ6

B++

B+

PQ5
V IN

Iadp=0~5.8A

P3

P2

4.2V

47.5K_0603_0.1%

PR65

4.7U_1210_25V6K

143K_0603_0.1%

VMB

PR66
340K_0603_1%

OVP voltage : LI
2

4S3P : 17.4V--> BATT_OVP= 1.935V


1

(BAT_OVP=0.1111 *VMB)
PR67
499K_0603_1%

PU5A
3

+
-

LM358A_SO8

1
105K_0603_0.5%

2.2K_0603_5%

PR69

PC38
0.01U_0603_50V7K

@ 0.1U_0603_16V7K

PR68

PC37

39 BATT_OVP

+5VALWP

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


CHARGER
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

48

of

56

PC39
4.7U_1210_25V6K
1
2

VL

1SS355_SOD323

PC47
4.7U_1206_16V4Z

SPC-1205P-100

PC45

PC48
0.1U_0603_25V7K

47P_0603_50V8J

PDL3
PC50

PDH3

PC49
4.7U_1206_16V4Z
PD H5

P DH51

100P_0603_50V8J

PON

RUN/ON3

PC56
680P_0603_50V8J

0.012_2512_1%

2
2.5VREF
PC55
+5VALWP

4.7U_1206_16V4Z

PR79
10.5K_0603_1%

PC59

PC57
150U_D2_6.3VM

100P_0603_50V8J

PD21
EP10QY03
PC58
2
@ 150U_D2_6.3VM

PR82

2
1
PR83
47K_0603_1%

PC60

0.047U_0603_16V7K

VL

2
1
2

+3.3V Ipeak = 6.66A ~ 10A

PR76

2M_0603_5%

PR81

1
PR75

47K_0603_5%

47P_0603_50V8J

VL

V+

TIME/ON5

MAX1632

PC51

CS H5

PR80
10K_0603_1%

7
28

SI4814DY_SO8

PLX5

1
2
PR201
10K_0603_5%

CSH3
CSL3
FB3
SKIP#
SHDN#

8
7
6
5

PC54

31,34,39,40,41,50,51,52 SUSP#

1
2
3
10
23

PU6

PR78

LX3
DL3

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

EP10QY03

1
PR77
@ 10K_0603_5%

DH3

26
24

PQ14

PDL5

4
5
18
16
17
19
20
14
13
12
15
9
6
11

PC53
@ 150U_D2_6.3VM

46,48 PACIN

PD20

PC52
150U_D2_6.3VM

3.57K_0603_1%

27

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

CS H3

BST3

1M_0603_1%

25

GND

2
PR73

0.012_2512_1%

1
2
3
4

21

22

2
1
PR74

PR72

0_0603_5%

+3VALWP

PC46
4.7U_1210_25V6K

@ 4.7U_1210_25V6K

PL6

PT1
SDT-1205P-100

B+++

+12VALWP

SI4814DY_SO8

0.1U_0603_25V7K

PD19

1
PR71
0_0603_5%
PLX3

P DH31

PC44
1
2

DAP202U_SOT323

4.7U_1210_25V6K

8
7
6
5

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

PD18

1
2
3
4

VS
PQ13

PC43

PC42
@ 4.7U_1210_25V6K

HCB4532K-800T90_1812

1 FLYBACK
22_1206_5%

S NB 2
PR70

0.1U_0603_25V7K

EC11FS2_SOD106

470P_0805_100V7K

BST51

BST31

PD17

B+

B+++

PL5

PC40

PC41

N4

10K_0603_1%

+5V Ipeak = 6.66A ~ 10A

MAINPW ON 46,47
PC61
0.047U_0603_16V7K

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
IN C .
D ate:
2

Compal Electronics, Inc.


5V/3.3V/12V
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

49

of

56

+2.5V/+VTT_GMCHP
PL7

PC69

HCB4532K-800T90_1812

PR84
0_0603_5%

4.7U_1210_25V6K

+5VALWP

ON1

2
G
PQ23
2N7002_SOT23

PR96
10K_0603_1%

53 GMCH_SEL

1
2

PR207
@ 0_0603_5%

1
PR202
@ 0_0603_5%

ILIM2
ILIM1

VTT_GMCH=1.225V

OCP 1.92A ~ 3.71A

GMCH_SEL=1 NORTHWOOD

VTT_GMCH=1.45V

OCP 1.98A ~ 3.78A

D
D
D
D
G
S
S
S

1
EP10QY03

4
3
2
1

EC31QS04

PQ16
FDS6672A_SO8

PR92
15K_0603_1%

7
5
13
3

PR99
42.2K_0603_1%
2
1

PC79
PR97
0.22U_0805_16V7K
100K_0603_1%

2
PR94

1
@ 0_0603_5%

S YSON 39,41,42

2
PR95

1
0_0603_5%

V_ON 41

PR93
10K_0603_1%

PR98
3

100K_0603_1%

GMCH_SEL=0 PRESCOTT

PC73
220U_D2_4V 220U_D2_4V
2
2

PD23

PD28

PR100
220K_0603_1%
2
1

PR203
0_0603_5%

15
14
12

5
6
7
8

22
SKIP
6

10

GND

PR206
0_0603_5%
24,52,53 VGATE

23

MAX1845EEI_QSOP28

OUT2
FB2
ON2
PGOOD
TON

5,53 ENLL

1
1

PR91
@ 0_0603_5%

19
18
17
20
16

PC72

11

BST2
DH2
LX2
DL2
CS2

FB1

21

+2.5VP

VDD

+2.5V
PL8
2.2H_SPC-1205P-2R2B_+40-20%
1
2

CS1
OUT1

OVP

1
2
@ 0_0603_5%
1

5
6
7
8
28
1

31,34,39,40,41,49,51,52 SUSP#

PR88
10K_0603_1%

PC64
4.7U_1210_25V6K

3
2
1

LX1
DL1

UVP

DH1

27
24

VCC

26

PR90
41,51,52 VS_ON

PC63

4.53K_0603_1%

BST1

2
1
PC71
0.1U_0603_25V7K

PR89

PC76
+ 150U_D2_6.3V

PU7

REF

25

PR87
0_0603_5%
1
2

1
2
PC70
1

PR86
0_0603_5%
1
2

0.1U_0603_25V7K

PD27
EP10QY03

20_0603_5%
PC68
1U_0603_10V6K

V+

2
PR85
2

8
7
6
5

PL9
SI4814DY_SO8
5UH_SPC-06704-5R0_2.9A_30%
1
2

+VTT_GMCHP

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

PQ15
IRF7811A_SO8

+1.45V/+1.225V

PQ17

4.7U_1210_25V6K

1U_0805_25V4Z

DAP202U_SOT323

1
2
3
4

4.7U_1210_25V6K

PC62

4.7U_1206_16V4Z

PC66

PC65

PD22

B+

2.5V OCP

11.84A ~ 21A

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


DDR_2.5V/VTT_GMCH
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

50

of

56

PC82
4.7U_1210_25V6K

+5VALWP

B+

0_0603_5%

PL10

HCB4532K-800T90_1812
PC83

PR101

PC81
4.7U_1210_25V6K

4.7U_1210_25V6K

PC80

4.7U_1210_25V6K

DAP202U_SOT323

1U_0805_25V4Z

PC85
4.7U_1206_16V4Z

PC84

PD24

PR102

+1.5V

1845VCC 2
1
PC87
1U_0603_10V6K 20_0603_5%

PR205

100K_0603_1%

1
1
2

@470U_D2_2.5VM
2
2

2
PR112

1 SUSP#
@ 0_0603_5%

1
PR109

2 VS_ON
0_0603_5%

PC157
@ 2200P_0603_50V7K

22

PR204

1 PR117

1
2
43K_0603_1%

PR114
10K_0603_1%

16.2K_0603_1%

PR119

PR118

2
G
PQ20
2N7002_SOT23

16 POW ER_SEL

100K_0603_1%

100K_0603_1%

0.22U_0805_16V7K

PR113
470U_D2_2.5VM PD30
1
1
2.8K_0603_1%
PC94
+ PC93
+
EP10QY03
@ 4700P_0603_50V7K
PC156

13
3

PR108
16.2K_0603_1%
1
2

PC95

1.5V OCP 6.9A ~ 8.72A

MAX1845EEI_QSOP28

SI4814DY_SO8

7
5

+VGA_COREP

0_0603_5%

ILIM2
ILIM1

PL12
2.2H_SPC-1205P-2R2B_+40-20%
1
2

PR208
8.66K_0603_1%

PR1072

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

8
7
6
5

PGOOD
TON

PQ19

VS_ON

ON1

15
14
12

+1.28V/1.15V
1
2
3
4

41,50,52 VS_ON

11

OUT2
FB2
ON2

PC89
0.1U_0603_25V7K
2
1

31,34,39,40,41,49,50,52 SUSP#

19
18
17
20
16

10K_0603_1%

PR106
SUSP#
1
@ 0_0603_5%

FB1

OVP

PR195

CS1
OUT1

BST2
DH2
LX2
DL2
CS2

PR104
0_0603_5%
1
2

28
1

VDD

21

LX1
DL1

UVP

27
24

VCC

DH1

REF

5.1K_0603_1%

BST1

26

SKIP

0_0603_5%

PU8

10

25

PR103

SI4814DY_SO8

PC88
2
1
0.1U_0603_25V7K

1
2
3
4

470U_D2_2.5VM @ 470U_D2_2.5VM
2
2

PR194

G1
D1
S1/D2 D1
S1/D2 G2
S1/D2 S2

V+

1
PC91
+

PQ18

GND

1
PC90
+

8
7
6
5

PD29
EP10QY03

PL11
2.2H_SPC-1205P-2R2B_+40-20%
1
2

23

+1.5VSP

NV34M Ultra
POWER_SEL=1

VOUT=1.28V

OCP 7.1A ~ 8.9A

POWER_SEL=0

VOUT=1.15V

OCP 6.85A ~ 8.7A

PR113=2.8K_0603_1%
PR208=8.66K_0603_1%

NV31
POWER_SEL=1

VOUT=1.27V

POWER_SEL=0

VOUT=1V

OCP 7.1A ~ 8.9A

PR113=2.7K_0603_1%

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Unpop PR208

OCP 6.85A ~ 8.7A

Compal Electronics, Inc.


VGA_CORE/1.5V
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

51

of

56

1
PR120

145W THROTTLING
120W REVOVERY

2
1M_0603_1%

+3VS

VL

PU9A
LM393M_SO8

0.33U_0805_10V7F

PC99
10P_0603_50V8J

1
2

Vb

8
+

PU9B

1
R702

2
0_0402_5%

CK409_PW RGD# 15

LM393M_SO8

R660
100K_0603_1%

PC98
1000P_0603_50V7K

C759

2
200K_0603_1%
2
10K_0603_1%

+CPU_CORE

PQ21
2N7002_SOT23

2
G

Va

PR124
100K_0603_1%

1
R658
1
R659

+3VS

0.1U_0603_25V7K

100K_0603_5%
R422

H_PROCHOT# 5,7

365K_0603_1%

8
P

2
249K_0603_1%

1
PR123

3
2
64.9K_0603_1%
2

VL

1
PR122

t = -RC(1-Vb/Va)

PR121

PC97

VS

39,48 ADP_I

+CPU_CORE

1
R703

2
@0_0402_5%

Q70
@2N7002_SOT23

2
G

24,50,53 VGATE

1
R704

2
@0_0402_5%

+3VALWP

+3VALWP
PR125
0_1206_5%
C

PR126

1
2

PC101
4.7U_1206_16V4Z

PC100
1U_0603_10V6K

PR110

5.1_0603_5%

PC92

100K_0603_5%

0.1U_0603_16V7K

0.1U_0603_16V7K

3
1

@ 0_0603_5%

41,50,51 VS_ON

PR199

2
PC102

470P_0603_50V8J

REMOTE SENSE

PC103
220U_D2_4VM

PR198

PC96
0.1U_0603_16V7K

PR116
@ 499K_0603_1%

2
G
S

31,34,39,40,41,49,50,51 SUSP#

2
0_0603_5%

1
PR197

1K_0603_5%

2
@ 0_0603_5%

100K_0603_5%
2

+1.25VSP

PQ22
2N7002_SOT23

1
PR196

19,41 SUSP

PR128

1 PR129

PL13
5UH_SPC-06704-5R0_2.9A_30%
1
2

CM3718
D

8
7
6
5

PVIN
LX
PGND
VFB

F B_VDD+

VIN
GND
SD
VREF

2
G

105K_0603_0.5%

PR115

PQ46
2N7002_SOT23

PC104

PU10

2
1
PR111
105K_0603_0.5%
1

+2.5VP

1
2
3
4

0_0603_5%

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
2

Compal Electronics, Inc.


DDR_1.25V/CLOCK THROTTLING
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

52

of

56

Different Pin Definition for ISL6561 in PU9

#7

GND

#11

REF

#33

EN

#38

OVP

#9

TCOMP

#14

IDROOP

#35

GND

#40

GND

#18

RGND

#37

GND

B+

+5VALWP

PR130
80.6K_0603_1%

Battery Feed
Forward

6
PR145
@ 0_0603_5%
1
2

PC112

+CPUVIDP

13

38

VR-TT#

NC

14

GND

VDIFF
VSEN
VRTN

16
17
18

GND

OFS

NTC

ISL6247_MLFP40

PR146
2
0_0603_5%

PR148
@ 0_0603_5%
2
1
PC111
@ 1000P_0603_50V7K

Place close to IC
0.1U_0603_16V7K
PC113

PR158

PQ26
2N7002_SOT23
2
G

PR156

340K_0603_1%

PC114
1U_0603_10V6K

PR157
5.1K_0603_1%

2
G

50 GMCH_SEL
PC116
4.7U_1206_16V4Z

4 BOOTSELECT

PR167

2
1
PR164
22K_0603_5%

PR162
2
1
0_0603_5%
PQ27
2N7002_SOT23
2 PR163 1

PQ28
MMBT3904_SOT23

1
PR150

2
2.26K_0603_1%
PR153
1
2

3
PQ24
2N7002_SOT23

27K_0603_5%

+5VALWP

3
GND

PWM4 55

ISEN4- 55
PR144
20K_0603_1%
2
1
1
2
PC108 1000P_0603_50V7K
2
1
PC110
@ 1000P_0603_50V7K

PR152
1.2M_0603_5%
PQ25
TP0610T_SOT23

ISEN3- 55

+5VALWP

ISEN4+ 55

MIC5258_SOT23-5

15

FB

EN

PG

OUT

COMP

DRSV

NOW DISABLE THIS FUNCTION, POP 330K_0402_5%

30
29

37

Panasonic ERTJ0EV334J (0402)


Locate this NTC resistor on
PCB between phase 2 and 3
for thermal compensation.

@ 10K_0603_5%

31

FS

40

2
2

PR151

DSV

PWM4
ISEN4+
ISEN4-

36

PH3
12
330K_0402_5%
19

+3VALWP

220P_0603_50V8J

PR147
100K_0603_5%

2
1
IN

SOFT

ISEN3+ 55

2 PR139 1
@ 0_0603_5%

16.2K_0603_1%
G

ISEN3+
ISEN3-

PWM3 55

21
22

OCSET

ISEN2- 54

PR154
32.4K_0603_1%

PC115
4.7U_1206_16V4Z

PR165
0_0603_5%

20

1.2 VDD

PWM3

PU12

39 VR_ON

ISEN2+ 54

DSEN#

11

PU5B
+ 5

5 VID_PW RGD

PWM2 54

27
28

PWM2
ISEN2+
ISEN2-

ISEN1- 54

27.4K_0603_1%

PR155
45.3K_0603_1%

0_0603_5%

DRSEN

26

1
1

PR143

PR149
10K_0603_1%

PR161

ISEN1+ 54

1U_0603_10V6K

LM358A_SO8

+3VALWP

ISEN1+
ISEN1-

ENLL

Frequency Select

PC109
100P_0603_50V8J

PWM1 54

24
23

1
2

PC107

PR142
69.8K_0603_1%

475_0603_1%

10
PR138
@ 1K_0603_1%

PR141

@ 0_0603_5%

PR140

PR137
@ 0_0603_5%

+5VALWP

25

35

15,24 STP_CPU#

PWM1

0_0603_5%
2
1
PR136
@ 0_0603_5%

VGATE 24,50,52

39

33

PGOOD

24 PM_DPRSLPVR

PR135

34

RAMPS

VID4
VID3
VID2
VID1
VID0
VID12.5

5 H_VID5

5,50 ENLL

PR132
1
10K_0603_5%

VCC

PR134
0_0603_5%

1
2
3
4
5
6

H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

PU11

2
1
PR159
0_0603_5%
PR160
2
1
@ 0_0603_5%

+CPU_CORE

Remote
Sensing

VCCSENSE 5

Place near +VCC_CORE


output capacitor
VSSSENSE 5

@ 0_0603_5%

0_0603_5%

32

5
5
5
5
5

PC106
1U_0603_10V6K

1
2

@ 0_0603_5%
PR133
1

PR131

#10 DAC

PR166
100K_0603_5%

100K_0603_5%

1. When mode control signal is


high/ low, the VR will operate to
Northwood/ Prescott load line.
2. VID5(12.5) should be pulled
high, when the VR operates to
Nothwood load line.

BOOTSELECT=1 PRESCOTT
BOOTSELECT=0 NORTHWOOD
A

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


CPU_CORE_Controller
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

53

of

56

CPU_B+

1
PC118 +

22U_23V
2

PL142

B+

C8B BPH 853025_2P

PC119
22U_23V

G
S
S
S

G
S
S
S

4.7U_1210_25V6K
4.7U_1210_25V6K

1
4.7U_1210_25V6K
+
PC121
PC122

PC120

PQ31

PQ32
SI4362DY_SO8

PR172
68_0805_5%

PC126
220P_0603_50V8J

4
3
2
1

4
3
2
1

G
S
S
S

SI4362DY_SO8

ISL6207CB-T_SO8

PC124
1U_0805_25V4Z

PC125

32.4K_0603_1%

CPU_DRIVE_EN

PR173

12

LGATE

PL15

0.6U_HK_AE26A0R6_26A_25%

5
6
7
8

GND

PHASE

D
D
D
D

EN

5
6
7
8

SI4892DY_SO8

2
PR169
N6
1N5 2
1
2.2_0603_5%
PHASE1
8

BOOT

PWM UGATE

VCC

G
S
S
S

0.1U_0603_16V7K

PU13

499K_0603_1%

1
PC123

PR170
2
0_0603_5%

PR171

53 PWM1

SI4892DY_SO8

D
D
D
D

4
3
2
1

4
3
2
1

PQ30

D
D
D
D

0.22U_0805_16V7K

PR168
0_0603_5%

PQ29

D
D
D
D

5
6
7
8

5
6
7
8

PC117

+5VALWP

1
0.01U_0603_16V7K

N7

53 ISEN153 ISEN1+

PH4
1

2
CPU_B+
PC128
PC129
4.7U_1210_25V6K

D
D
D
D

PQ34

PC130
4.7U_1210_25V6K

SI4892DY_SO8

GND

LGATE

ISL6207CB-T_SO8

PQ35
SI4362DY_SO8

PL16

1
PQ36
SI4362DY_SO8

+CPU_CORE

0.6U_HK_AE26A0R6_26A_25%

PHASE

PR177
68_0805_5%
PR178

1 2

EN

5
6
7
8

PR175
N9
1N8 2
1
2.2_0603_5%
PHASE2
8

D
D
D
D

PWM UGATE

5
6
7
8

SI4892DY_SO8

G
S
S
S

4
3
2
1

PC131
1U_0805_25V4Z

BOOT

D
D
D
D

PR176
499K_0603_1%

VCC

G
S
S
S

53 PWM2

PU14

4
3
2
1

4
3
2
1

4
3
2
1

G
S
S
S

4.7U_1210_25V6K

Local Transistor
Swtich Decoupling

PQ33

0.22U_0805_16V7K

G
S
S
S

PR174
0_0603_5%

820B_0603_5%_ERAV33J821V

D
D
D
D

5
6
7
8

5
6
7
8

PC127

PC132
220P_0603_50V8J

PC133

32.4K_0603_1%

1
0.01U_0603_16V7K

N10

53 ISEN253 ISEN2+

PH5
1
820B_0603_5%_ERAV33J821V

Local Transistor
Swtich Decoupling

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


CPU_CORE_Power stage 1
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

54

of

56

GND

LGATE

PL17

D
D
D
D

PQ40
SI4362DY_SO8

1
0.6U_HK_AE26A0R6_26A_25%

PR182
68_0805_5%

4
3
2
1

4
3
2
1

G
S
S
S

PQ39
SI4362DY_SO8

G
S
S
S

ISL6207CB-T_SO8

N12

PHASE

PR183

EN

SI4892DY_SO8

PWM UGATE

4.7U_1210_25V6K

4.7U_1210_25V6K

5
6
7
8

PC137

5
6
7
8
PQ38

PC136

PC135
@ 4.7U_1210_25V6K

G
S
S
S
4
3
2
1

SI4892DY_SO8

BOOT

PR180
1N11 2
1
2.2_0603_5%
PHASE3
8

PC138
1U_0805_25V4Z

VCC

5
6
7
8

499K_0603_1%

PU15

D
D
D
D

PR181

4
3
2
1

G
S
S
S

6
53 PWM3

D
D
D
D

5
6
7
8
PR179
0_0603_5%

PQ37

D
D
D
D

0.22U_0805_16V7K

+5VALWP

CPU_B+

PC134

PC140
220P_0603_50V8J

PC139

32.4K_0603_1%

1
0.01U_0603_16V7K

N13

53 ISEN353 ISEN3+

2
CPU_B+

LGATE

ISL6207CB-T_SO8

4
3
2
1

G
S
S
S

1
2

1
2

D
D
D
D
PQ43
SI4362DY_SO8

PQ44
SI4362DY_SO8

PL18

0.6U_HK_AE26A0R6_26A_25%

GND

Local Transistor
Swtich Decoupling

@ 4.7U_1210_25V6K

PR187
68_0805_5%
PR188

1 2

PC144

N15

5
6
7
8

PHASE

D
D
D
D

EN

G
S
S
S

PWM UGATE

PC143
4.7U_1210_25V6K

PC142

SI4892DY_SO8

4
3
2
1

PR185
1N14 2
1
2.2_0603_5%
PHASE4
8

4.7U_1210_25V6K

G
S
S
S

SI4892DY_SO8

PQ42

+CPU_CORE

4
3
2
1

4
3
2
1
BOOT

5
6
7
8

VCC

PC145
1U_0805_25V4Z

PU16

D
D
D
D

2
1

499K_0603_1%

PR186

D
D
D
D

5
6
7
8
6

53 PWM4

PQ41

G
S
S
S

0.22U_0805_16V7K

5
6
7
8

1
PR184
0_0603_5%

PH6
1

820B_0603_5%_ERAV33J821V

PC141

PC147
220P_0603_50V8J

PC146

32.4K_0603_1%

CPU_DRIVE_EN

1
0.01U_0603_16V7K

N16

53 ISEN453 ISEN4+

PH7
2
820B_0603_5%_ERAV33J821V

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY


OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
Size
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS,
D ate:
IN C .
C

Compal Electronics, Inc.


CPU_CORE_Power stage 2
Document Number

R ev
0.1

LA-2041
P , 09, 2003

Sheet

55

of

56

DBQ01 PIR LIST


************* Rev0.1 PIR List **************

Compal Electronics, Inc.


Title
PROPRIETARY NOTE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D ate:

DBQ01 PIR LIST

Document Number

LA-2041

P , 09, 2003

R ev
0.1
Sheet

56

of

56

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