Spring 2001 EE 8223 Analog IC Design Page 1

Background Review
Fabrication:
Basic IC structure:
Spring 2001 EE 8223 Analog IC Design Page 2
Patterning in IC technology:
Spring 2001 EE 8223 Analog IC Design Page 3
Silicon-dioxide (SiO
2
) growth:
t
Si
= 0.45 t
ox
Wells in IC bulk-CMOS technology:
Spring 2001 EE 8223 Analog IC Design Page 4
More detailed view of an n-well:
Beware of parasitics!

,
_

1
nkT
d
qV
e
S
I
D
I diode current
Spring 2001 EE 8223 Analog IC Design Page 5
Determining resistance of IC structures:
W
L
t
R

W
L
R R
square

Spring 2001 EE 8223 Analog IC Design Page 6
Fundamentals of pn junctions:
m
d
j
j
V
C
C
1
]
1

,
_

0
0
1

depletion capacitance

,
_

2
0
ln
i
D A
n
N N
q
kT
built-in potential
2 1
0
0
0
0
1 1
m
d
s j
m
d
b j
j
V
C
V
C
C
1
1
]
1

,
_

+
1
1
]
1

,
_

Spring 2001 EE 8223 Analog IC Design Page 7
Depletion capacitance voltage dependence:
T
D
s
q kT n
I
C
1
pn junction storage capacitance
Spring 2001 EE 8223 Analog IC Design Page 8
RC delay through an n-well:
2
35 . 0 rcl t
d
delay through distributed RC network
Other important background review topics (see text):
metal electromigration
ground bounce
crosstalk
ESD protection:
Spring 2001 EE 8223 Analog IC Design Page 9
The MOSFET
Spring 2001 EE 8223 Analog IC Design Page 10
MOSFET fabrication:
Spring 2001 EE 8223 Analog IC Design Page 11
Oxide encroachment:
Effective gate width calculation:
DW W W
drawn eff

Spring 2001 EE 8223 Analog IC Design Page 12
Lateral diffusion of source and drain:
Effective gate length calculation:
DL L LD L L
drawn drawn eff
2
MOSFET drain or source pn junction depletion capacitance:
Depletion capacitance:
mjsw
DB
D
mj
DB
D
jdep
pbsw
V
P cjsw
pb
V
A cj
C

,
_

,
_

1 1
Spring 2001 EE 8223 Analog IC Design Page 13
MOSFET schematic symbols
MOSFET Capacitances
Spring 2001 EE 8223 Analog IC Design Page 14
MOSFET gate capacitance in accumulation:
( )
TOX
W L
TOX
W LD L
C
eff eff ox eff ox
gb

2
gate-to-substrate cap.
[including oxide encroachment]
TOX
W LD
C
eff ox
s gd

,
gate-to-drain (or source) overlap cap.
C
gd,s
in terms of SPICE model parameters CGSO and CGDO,
eff
ox
eff gd
W
TOX
LD
W CGDO C

[F]
eff gs
W CGSO C [F]
Oxide capacitance,
TOX
C
ox
ox

'
[F/m
2
]
Total gate capacitance to ground,
L W C C
ox ox

'
[F]
Spring 2001 EE 8223 Analog IC Design Page 15
MOSFET gate capacitance in depletion weak inversion (subthreshold
region):
MOSFET in strong inversion V
GS
> V
THN
C
g,total
versus V
GS
:
Spring 2001 EE 8223 Analog IC Design Page 16
Summary of MOSFET capacitances:
Off SI Triode SI Saturation
C
gd CGDOW
eff
=
eff
ox
W
TOX
LD

2
1
C
ox

W
eff
L
eff

+ C
ox

W
eff
LD
CGDOW
eff
C
db
C
jdep
C
jdep
C
jdep
C
gb C
ox

W
eff
L
eff
+ CGBOL CGBOL
= L
TOX
DW
ox

CGBOL
C
gs CGSOW
eff
=
eff
ox
W
TOX
LD

2
1
C
ox

W
eff
L
eff
+ C
ox

W
eff
LD
3
2
C
ox

W
eff
L
eff
+ C
ox

W
eff
LD
C
sb
C
jdep
C
jdep
C
jdep