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EMBEDDED SYSTEMS MATERIAL IV B.TECH INFORMATION TECHNOLOGY I-SEMESTER (R07)

PREPARED BY Mr G.KISHORE KUMAR, M.Tech

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The 8051 Architecture

WHAT IS A MICROCONTROLLER? All of the components needed for a controller were built right onto one chip. A one chip computer, or microcontroller was born. A microcontroller is a highly integrated chip which includes, on one chip, all or most of the parts needed for a controller. The microcontroller could be called a "one "one-chip solution".

MICROPROCESSOR vs MICRO CONTROLLER General purpose microprocessor syst system

Microcontroller

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Block Diagram of Microcontroller 8051 Features: The Intel 8051 is used in embedded systems o o o o o o o 8-bit CPU with registers A(the accumulater) and B bit 16-bit program counter(PC) and data pointer(DPTR) bit 8-bit program status word(PSW) bit 8-bit stack pointer(SP) Internal ROM of 4K Bytes Internal RAM of 128 Bytes 32 I/O lines ( 4 PORTS WITH 8 EACH ): P0 P0-P3 Page 3

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o o o o o

bit Two 16-bit timers: T0 and T1 1 Serial port: SBUF 6 interrupt sources Control registers: TCON,TMOD,SCON,PCON,IE and IP Oscillator and Clock circuits

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8051 PIN DIAGRAM :

8051 contains four I/O ports (P0 - P3) .Each port can be used as input or output (bi-direction) PSEN (out): Program Store Enable, the read signal for external program memory (active low). ALE (out): Port2 Address Latch Enable, to latch address outputs at Port0 and

EA (in): External Access Enable, active low to access external program memory locations 0 to 4K RXD,TXD: UART pins for serial I/O on Port 3 XTAL1 & XTAL2: Crystal inputs for internal oscillator.

o o GND

Vcc provides supply voltage to the chip. The voltage source is +5V.

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pin 20

Vcc

pin 40

ground

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o o o

These 2 pins provide external clock. Way 1 using a quartz crystal oscillator using Way 2 using a TTL oscillator using

QUARTZ CRYSTAL OSCILLATOR Using a quartz crystal oscillator We can observe the frequency on the XTAL2 pin.

C2 XTAL2 30pF C1 XTAL1 30pF GND

XTAL Connection to an External Clock Source Using a TTL oscillator XTAL2 is unconnected.

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XTAL1 and XTAL2 pins 19,18 pins

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o o

There is no on-chip ROM in 8031 and 8032 . The EA pin is connected to GND to indicate the code is stored externally.

o o o PSEN o

For 8051, EA pin is connected to Vcc. active low.

This is an output pin and is connected to the OE pin of the ROM.

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pin 29

PSEN

The clock frequency f establishes the smallest interval of time within the microcontroller called the pulse p time. The smallest interval of time to accomplish any simple instruction, or part of a complex instruction, however, is the machine cycle. The machine cycle is itself made up of six states. A state is the basic time interval for discrete operations of the microcontroller such as fetching an opcode byte, decoding an opcode, executing an opcode, or writing a data byte. Two oscillator pulses define each state. address latch enable ALE pin 30 It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data. external access EA pin 31

ALE are used for external ROM.

program store enable

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address latch enable ALE pin 30 o It is an output pin and is active high. o 8051 port 0 provides both address and data. o The ALE pin is used for de-multiplexing the address and data.

Program Counter(PC) : The program counter is 16 bits wide. This means that it can access program addresses 0000 to FFFFH, a total of 64K bytes of code. The program counter points to the address of the next instruction to be executed. As the CPU fetches the opcode from the program ROM, the program counter is increasing to point to the next instruction. Data pointer (DPTR): Data pointer is used to access internal and external data or code. Made up of two 8-bit registers named DPL and DPH. DPTR is a 16 bit register at addresses 82H (low byte) and 83H (high byte).

Flags and Program Status Word(PSW): Flags are 1-bit registers provided to store the results of certain program instructions. The flags may be conveniently addressed, they are grouped inside the program status word (PSW) and the power (PCON) registers. The 8051 has four math flags and three general purpose user flags. Math flags are Carry(C), Auxilary Carry (AC), Overflow (OV) and Parity (P). User flags are F0,GF0 and GF1. PSW contains the math flags, user flag F0.The remaining two user flags, GF0 and GF1 are stored in PCON.

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Memory organization of 8051: 8051 has 128 bytes of internal RAM and 4K bytes of ROM. The internal Ram organization of 8051 is as follows:

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Special Function Registers:

Thirty Two bytes from address 00h to 1Fh that make up of 32 working registers organized as four banks of eight registers each. The four register banks are numbered 0 to 3 and are made up of eight registers named R0 to R7. Each Register can be addressed by name or by i5ts RAM address.. Thus R) of bank 3 is R0 (if bank 3 is selected) or address 18h (whether bank 3 is selected or not). A bit addressable area of 16 bytes occupies RAM byte addresses 20 h to 2Fh forming a total of 128 addressable bits. An addressable bit may be specified by its bit address of 00h to 7fh, or 8 bits may form byte address from 20h to 2Fh. A general-purpose RAM area are above the bit area, from 30h to 7Fh, addressable as bytes. The internal ROM organization of 8051: Internal ROM of 4K and external ROM of 64K can be connected to 8051. For external access EA pin connected to ground.

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The Stack and Stack Pointer: Stack pointer (SP) is an 8-bit register at address 81H It contains the address of the data item currently on top of the stack. Stack operations include pushing data on the stack and popping data off the stack Pushing increments SP before writing the data Popping from the stack reads the data and decrements the SP 8051 stack is kept in the internal RAM Depending on the initial value of the SP, stack can have different sizes Example: MOV SP,#5FH On 8051 this would limit the stack to 32 bytes since the uppermost address of on chip RAM is 7FH. The default value of SP (after system reset) is 07H. This result in the first stack write operation to store data in location 08H which means that register bank 1 (and possible 2 and 3) are not available User may initialize the SP to avoid this

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Input/Output Pins, Ports, and Circuits: Total 4 ports 1. Port 0 may serve as inputs, outputs, or as a low order address and data bus for external memory. 2. Port 1 may be used as input/output port. 3. Port 2 may be used as input/output or high order address byte. 4. Port 3 may be used as an input/output and for some alternate function. Each port consists of a latch, an output driver, and an input buffer. The bit latch is represented as a TypeD flipflop, which will clock in a value from the internal bus in response to a write to latch signal, Q output of the flipflop is placed on the internal bus in response to a read latch signal, level of the port pin itself is placed on the internal bus in response to a read pin signal from the CPU. The output drivers of PortsO and2 are switchable to an internal ADDR and ADDR/DATA bus by an internal CONTROL signal for use in external memory access. If P3 bit latch contains a 1, then the output level is controlled by the signal alternate output function". The actual P3.X pin level is always available to the pins alternate input function. To be used as an input, the port bit latch must contain a 1, which turns off the output driver FET. Then, for Ports 1, 2, and 3, the pin is pulled high by the internal pullup, but can be pulled low by an external source. Because Ports 1, 2, and 3 have fixed internal pullups they are sometimes called quasi-bidirectionalports as inputs they pull high and will source current when externally pulled low. Port O, is true bidirectional, because when configured as an input it floats. To be used as an output, the port bit latch must contain a 0,which turns on the output driver FET.

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8051 Port bit latches

20

Port 0 and Port 1

Port 2 and Port 3

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External memory: The connection diagram between an 8051 and an external memory configuration consisting of 16K EPROM and 8K of static RAM is as follows

The 8051 access external RAM Whenever certain program instructions are executed. External ROM is accessed whenever the EA(external access) pin is connected to ground or ground or when PC contains an address higher than the last address in the internal 4k ROM (0FFFh). The 8031 having no internal ROM must have EA grounded. The beolw waveform shows the timing associated with an external memory access cycle. During any memory access cycle, port 0 is time multiplexed. That is, it first provides the lower byte of the 16-bit memory address, then acts as a bidirectional data bus to write or read a byte of memory data. Port 2 provides the high byte of the memory address during the entire memory read/write cycle.

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The lower address byte from port 0 must be latched into n external register to save the byte. Address byte save is accomplished by ALE clock pulse that provides the correct timing for the 373 type data latch. The port 0 pins then becomes free to serve as data bus. If the memory acces is for a byte of program code in the ROM, the PSEN(program store enable) pin will go low enable the ROM to place a byte of program code on the data bus. If access is for a RAM byte ,the WR(write) or RD (read) pins will go low, enabling data to flow between the RAM and the data bus. THE ROM may be expanded to 64K by using a 27512 type EPROM and connecting the remaining port 2 upper address lines A14-A15 to the chip.

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Timers/Counters: The 8051 comes equipped with two timers, both of which may be controlled, set,read, and configured individually. The 8051 timers have three general functions: Keeping time and/or calculating the amount of time between events, Counting the events themselves, or Generating baud rates for the serial port the 8051 has two timers which each function essentially the same way. One timer is TIMER0 and the other is TIMER1. The two timers share two SFRs (TMOD and TCON) which control the timers, and each timer also has two SFRs dedicated solely to itself (TH0/TL0 and TH1/TL1).

The TCON(Timer Control) Special Function Register: TCON (timer control) register is an 8- bit register. TCON register is bit-addressable register.

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The TMOD(Timer Mode) Special Function Register: The TMOD SFR is used to control the mode of operation of both timers. Each bit of the SFR gives the microcontroller specific information concerning how to run a timer. The high four bits (bits 4 through 7) relate to Timer 1 whereas the low four bits (bits 0 through 3) perform the exact same functions, but for timer 0.

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The individual bits of TMOD have the following functions:

Four bits (two for each timer) are used to specify a mode of operation. The modes of operation are:

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If GATE = 1, the start and stop of the timer are done externally through pins P3.2 and P3.3 for timers 0 and 1, respectively. This hardware way allows to start or stop the timer externally at any time via a simple switch

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13-bit Time Mode (mode 0) Timer mode "0" is a 13-bit timer. When the timer is in 13-bit mode, TLx will count from 0 to 31. When TLx is incremented from 31, it will "reset" to 0 and increment THx. Thus, effectively, only 13 bits of the two timer bytes are being used: bits 0-4 of TLx and bits 0-7 of THx. This also means, in essence, the timer can only contain 8192 values. If you set a 13-bit timer to 0, it will overflow back to zero 8192 machine cycles later. 16-bit Time Mode (mode 1) Timer mode "1" is a 16-bit timer. This is a very commonly used mode. It functions just like 13-bit mode except that all 16 bits are used. TLx is incremented from 0 to 255. When TLx is incremented from 255, it resets to 0 and causes THx to be incremented by 1. Since this is a full 16- bit timer, the timer may contain up to 65536 distinct values. If you set a 16-bit timer to 0, it will overflow back to 0 after 65,536 machine cycles.

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8-bit Time Mode (mode 2) Timer mode "2" is an 8-bit auto-reload mode. What is that, you may ask? Simple. When a timer is in mode 2, THx holds the "reload value" and TLx is the timer itself. Thus, TLx starts counting up. When TLx reaches 255 and is subsequently incremented, instead of resetting to 0 (as in the case of modes 0 and 1), it will be reset to the value stored in THx. For example, lets say TH0 holds the value FDh and TL0 holds the value FEh. Split Timer Mode (mode 3) Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it essentially becomes two separate 8-bit timers. That is to say, Timer 0 is TL0 and Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All the bits that are related to Timer 1 will now be tied to TH0. While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into modes 0, 1 or 2 normally--however, you may not start or stop the real timer 1 since the bits that do that are now linked to TH0. The real timer 1, in this case, will be incremented every machine cycle no matter what. Serial Communication: One of the 8051s many powerful features is its integrated UART, otherwise known as a serial port. The fact that the 8051 has an integrated serial port means that you may very easily read and write values to the serial port. If it were not for the integrated serial port, writing a byte to a serial line would be a rather tedious process requring turning on and off one of the I/O lines in rapid succession to properly "clock out" each individual bit, including start bits, stop bits, and parity bits. However, we do not have to do this. Instead, we simply need to configure the serial ports operation mode and baud rate. Once configured, all we have to do is write to an SFR to write a value to the serial port or read the same SFR to read a value from the serial port. The 8051 will automatically let us know when it has finished sending the character we wrote and will also let us know whenever it has received a byte so that we can process it. We do not have to worry about transmission at the bit level-which saves us quite a bit of coding and processing time. Setting the Serial Port Mode The first thing we must do when using the 8051s integrated serial port is, obviously, configure it. This lets us tell the 8051 how many data bits we want, the baud rate we will be using, and how the baud rate will be determined.

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Serial Control (SCON) SFR: SCON is an 8-bit register used to program the start bit , stop bit and data bits of data framing. First, lets present the "Serial Control" (SCON) SFR and define what each bit of the SFR represents:

Bit Name 7 6 5 4 3 2 1 SM0 SM1 SM2 REN TB8 RB8 TI

Bit Addres 9Fh 9Eh 9Dh 9Ch 9Bh 9Ah 99h

Explanation of Function Serial port mode bit 0 Serial port mode bit 1. Mutliprocessor Communications Enable (explained later) Receiver Enable. This bit must be set in order to receive characters. Transmit bit 8. The 9th bit to transmit in mode 2 and 3. Receive bit 8. The 9th bit received in mode 2 and 3. Transmit Flag. Set when a byte has been completely transmitted. Receive Flag. Set when a byte has been completely received.

RI

98h

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Additionally, it is necessary to define the function of SM0 and SM1 by an additional table: SM0 SM1 Serial Mode Explanation 0 0 1 1 0 1 0 1 0 1 2 3 Baud Rate

8-bit Shift Register Oscillator / 12 8-bit UART 9-bit UART 9-bit UART Set by Timer 1 Oscillator / 64 Set by Timer 1

The baud rate indicated in this table is doubled if PCON.7 (SMOD) is set. The SCON SFR allows us to configure the Serial Port. Thus, well go through each bit and review its function. The first four bits (bits 4 through 7) are configuration bits. Bits SM0 and SM1 let us set the serial mode to a value between 0 and 3, inclusive. The four modes are defined in the chart immediately above. As you can see, selecting the Serial Mode selects the mode of operation (8-bit/9-bit, UART or Shift Register) and also determines how the baud rate will be calculated. In modes 0 and 2 the baud rate is fixed based on the oscillators frequency. In modes 1 and 3 the baud rate is variable based on how often Timer 1 overflows. Well talk more about the various Serial Modes in a moment. The next bit, SM2, is a flag for "Multiprocessor communication." Generally, whenever a byte has been received the 8051 will set the "RI" (Receive Interrupt) flag. This lets the program know that a byte has been received and that it needs to be processed. However, when SM2 is set the "RI" flag will only be triggered if the 9th bit received was a "1". That is to say, if SM2 is set and a byte is received whose 9th bit is clear, the RI flag will never be set. This can be useful in certain advanced serial applications. For now it is safe to say that you will almost always want to clear this bit so that the flag is set upon reception of any character. The next bit, REN, is "Receiver Enable." This bit is very straightforward: If you want to receive data via the serial port, set this bit. You will almost always want to set this bit. The last four bits (bits 0 through 3) are operational bits. They are used when actually sending and receiving data--they are not used to configure the serial port.

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The TB8 bit is used in modes 2 and 3. In modes 2 and 3, a total of nine are transmitted. The first 8 data bits are the 8 bits of the main value, and bit is taken from TB8. If TB8 is set and a value is written to the serial datas bits will be written to the serial line followed by a "set" ninth bit. clear the ninth bit will be "clear."

data bits the ninth port, the If TB8 is

The RB8 also operates in modes 2 and 3 and functions essentially the same way as TB8, but on the reception side. When a byte is received in modes 2 or 3, a total of nine bits are received. In this case, the first eight bits received are the data of the serial byte received and the value of the ninth bit received will be placed in RB8. TI means "Transmit Interrupt." When a program writes a value to the serial port, a certain amount of time will pass before the individual bits of the byte are "clocked out" the serial port. If the program were to write another byte to the serial port before the first byte was completely output, the data being sent would be garbled. Thus, the 8051 lets the program know that it has "clocked out" the last byte by setting the TI bit. When the TI bit is set, the program may assume that the serial port is "free" and ready to send the next byte. Finally, the RI bit means "Receive Interrupt." It funcions similarly to the "TI" bit, but it indicates that a byte has been received. That is to say, whenever the 8051 has received a complete byte it will trigger the RI bit to let the program know that it needs to read the value quickly, before another byte is read. Setting the Serial Port Baud Rate Once the Serial Port Mode has been configured, as explained above, the program must configure the serial ports baud rate. This only applies to Serial Port modes 1 and 3. The Baud Rate is determined based on the oscillators frequency when in mode 0 and 2. In mode 0, the baud rate is always the oscillator frequency divided by 12. This means if youre crystal is 11.059Mhz, mode 0 baud rate will always be 921,583 baud. In mode 2 the baud rate is always the oscillator frequency divided by 64, so a 11.059Mhz crystal speed will yield a baud rate of 172,797. In modes 1 and 3, the baud rate is determined by how frequently timer 1 overflows. The more frequently timer 1 overflows, the higher the baud rate. There are many ways one can cause timer 1 to overflow at a rate that determines a baud rate, but the most common method is to put timer 1 in 8-bit auto-reload mode (timer mode 2) and set a reload value (TH1) that causes Timer 1 to overflow at a frequency appropriate to generate a baud rate. To determine the value that must be placed in TH1 to generate a given baud rate, we may use the following equation (assuming PCON.7 is clear). TH1 = 256 - ((Crystal / 384) / Baud) If PCON.7 is set then the baud rate is effectively doubled, thus the equation becomes: Prepared By G. Kishore Kumar Page 26

TH1 = 256 - ((Crystal / 192) / Baud) For example, if we have an 11.059Mhz crystal and we want to configure the serial port to 19,200 baud we try plugging it in the first equation: TH1 TH1 TH1 TH1 = = = = 256 256 256 256 ((Crystal / 384) / Baud) ((11059000 / 384) / 19200 ) ((28,799) / 19200) 1.5 = 254.5

As you can see, to obtain 19,200 baud on a 11.059Mhz crystal wed have to set TH1 to 254.5. If we set it to 254 we will have achieved 14,400 baud and if we set it to 255 we will have achieved 28,800 baud. Thus were stuck... But not quite... to achieve 19,200 baud we simply need to set PCON.7 (SMOD). When we do this we double the baud rate and utilize the second equation mentioned above. Thus we have: TH1 TH1 TH1 TH1 = = = = 256 256 256 256 ((Crystal / 192) / Baud) ((11059000 / 192) / 19200) ((57699) / 19200) 3 = 253

Here we are able to calculate a nice, even TH1 value. Therefore, to obtain 19,200 baud with an 11.059MHz crystal we must: 1. 2. 3. 4. Configure Serial Port mode 1 or 3. Configure Timer 1 to timer mode 2 (8-bit auto-reload). Set TH1 to 253 to reflect the correct frequency for 19,200 baud. Set PCON.7 (SMOD) to double the baud rate.

Writing to the Serial Port Once the Serial Port has been propertly configured as explained above, the serial port is ready to be used to send data and receive data. To write a byte to the serial port one must simply write the value to the SBUF (99h) SFR. For example, if you wanted to send the letter "A" to the serial port, it could be accomplished as easily as: MOV SBUF,#A Upon execution of the above instruction the 8051 will begin transmitting the character via the serial port. Obviously transmission is not instantaneous--it takes a measureable amount of time to transmit. And since the 8051 does not have a serial

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output buffer we need to be sure that a character is completely transmitted before we try to transmit the next character. The 8051 lets us know when it is done transmitting a character by setting the TI bit in SCON. When this bit is set we know that the last character has been transmitted and that we may send the next character, if any. Reading the Serial Port Reading data received by the serial port is equally easy. To read a byte from the serial port one just needs to read the value stored in the SBUF (99h) SFR after the 8051 has automatically set the RI flag in SCON. Once the RI bit is set upon character reception the above condition automatically fails and program flow falls through to the "MOV" instruction which reads the value. Interrupts:

As the name implies, an interrupt is some event which interrupts normal program execution. As stated earlier, program flow is always sequential, being altered only by those instructions which expressly cause program flow to deviate in some way. However, interrupts give us a mechanism to "put on hold" the normal program flow, execute a subroutine, and then resume normal program flow as if we had never left it. This subroutine, called an interrupt handler, is only executed when a certain event (interrupt) occurs. The event may be one of the timers "overflowing," receiving a character via the serial port, transmitting a character via the serial port, or one of two "external events." The 8051 may be configured so that when any of these events occur the main program is temporarily suspended and control passed to a special section of code which presumably would execute some function related to the event that occured. Once complete, control would be returned to the original program. The main program never even knows it was interrupted. The ability to interrupt normal program execution when certain events occur makes it much easier and much more efficient to handle certain conditions. If it were not for interrupts we would have to manually check in our main program whether the timers had overflown, whether we had received another character via the serial port, or if some external event had occured. Besides making the main program ugly and hard to read, such a situation would make our program inefficient since wed be burning precious "instruction cycles" checking for events that usually dont happen. Thus, every 65536 instruction cycles we execute the CPL instruction and the RETI instruction. Those two instructions together require 3 instruction cycles, and weve accomplished the same goal as the first example that required 1312 instruction cycles. As far as the toggling of P3.0 goes, our code is 437 times more efficient! Not Prepared By G. Kishore Kumar Page 28

to mention its much easier to read and understand because we dont have to remember to always check for the timer 0 flag in our main program. We just setup the interrupt and forget about it, secure in the knowledge that the 8051 will execute our code whenever its necessary. The same idea applies to receiving data via the serial port. One way to do it is to continuously check the status of the RI flag in an endless loop. Or we could check the RI flag as part of a larger program loop. However, in the latter case we run the risk of missing characters--what happens if a character is received right after we do the check, the rest of our program executes, and before we even check RI a second character has come in. We will lose the first character. With interrupts, the 8051 will put the main program "on hold" and call our special routine to handle the reception of a character. Thus, we neither have to put an ugly check in our main code nor will we lose characters. What Events Can Trigger Interrupts, and where do they go? We can configure the 8051 so that any of the following events will cause an interrupt:

Timer 0 Overflow. Timer 1 Overflow. Reception/Transmission of Serial Character. External Event 0. External Event 1.

In other words, we can configure the 8051 so that when Timer 0 Overflows or when a character is sent/received, the appropriate interrupt handler routines are called. Obviously we need to be able to distinguish between various interrupts and executing different code depending on what interrupt was triggered. This is accomplished by jumping to a fixed address when a given interrupt occurs. Interrupt Flag Interrupt Handler Address External 0 IE0 Timer 0 TF0 0003h 000Bh 0013h 001Bh

External 1 IE1 Timer 1 Serial TF1

RI/TI 0023h

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By consulting the above chart we see that whenever Timer 0 overflows (i.e., the TF0 bit is set), the main program will be temporarily suspended and control will jump to 000BH. It is assumed that we have code at address 000BH that handles the situation of Timer 0 overflowing. Setting Up Interrupts By default at powerup, all interrupts are disabled. This means that even if, for example, the TF0 bit is set, the 8051 will not execute the interrupt. Your program must specifically tell the 8051 that it wishes to enable interrupts and specifically which interrupts it wishes to enable. The IE(Iterrupt Enable) Special Function Register: Your program may enable and disable interrupts by modifying the IE SFR (A8h):

Bit Name Bit Address Explanation of Function 7 6 5 4 3 2 1 0 EA ES ET1 EX1 ET0 EX0 AFh AEh ADh ACh ABh AAh A9h A8h Global Interrupt Enable/Disable Undefined Undefined Enable Serial Interrupt Enable Timer 1 Interrupt Enable External 1 Interrupt Enable Timer 0 Interrupt Enable External 0 Interrupt

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As you can see, each of the 8051s interrupts has its own bit in the IE SFR. You enable a given interrupt by setting the corresponding bit. For example, if you wish to enable Timer 1 Interrupt, you would execute either: MOV IE,#08h or SETB ET1 Both of the above instructions set bit 3 of IE, thus enabling Timer 1 Interrupt. Once Timer 1 Interrupt is enabled, whenever the TF1 bit is set, the 8051 will automatically put "on hold" the main program and execute the Timer 1 Interrupt Handler at address 001Bh. However, before Timer 1 Interrupt (or any other interrupt) is truly enabled, you must also set bit 7 of IE. Bit 7, the Global Interupt Enable/Disable, enables or disables all interrupts simultaneously. That is to say, if bit 7 is cleared then no interrupts will occur, even if all the other bits of IE are set. Setting bit 7 will enable all the interrupts that have been selected by setting other bits in IE. This is useful in program execution if you have time-critical code that needs to execute. In this case, you may need the code to execute from start to finish without any interrupt getting in the way. To accomplish this you can simply clear bit 7 of IE (CLR EA) and then set it after your time-criticial code is done. So, to sum up what has been stated in this section, to enable the Timer 1 Interrupt the most common approach is to execute the following two instructions: SETB ET1 SETB EA Thereafter, the Timer 1 Interrupt Handler at 01Bh will automatically be called whenever the TF1 bit is set (upon Timer 1 overflow). Polling Sequence The 8051 automatically evaluates whether an interrupt should occur after every instruction. When checking for interrupt conditions, it checks them in the following order:

External 0 Interrupt Timer 0 Interrupt External 1 Interrupt Timer 1 Interrupt Serial Interrupt

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This means that if a Serial Interrupt occurs at the exact same instant that an External 0 Interrupt occurs, the External 0 Interrupt will be executed first and the Serial Interrupt will be executed once the External 0 Interrupt has completed. Interrupt Priorities The 8051 offers two levels of interrupt priority: high and low. By using interrupt priorities you may assign higher priority to certain interrupt conditions. For example, you may have enabled Timer 1 Interrupt which is automatically called every time Timer 1 overflows. Additionally, you may have enabled the Serial Interrupt which is called every time a character is received via the serial port. However, you may consider that receiving a character is much more important than the timer interrupt. In this case, if Timer 1 Interrupt is already executing you may wish that the serial interrupt itself interrupts the Timer 1 Interrupt. When the serial interrupt is complete, control passes back to Timer 1 Interrupt and finally back to the main program. You may accomplish this by assigning a high priority to the Serial Interrupt and a low priority to the Timer 1 Interrupt. Interrupt priorities are controlled by the IP SFR (B8h). The IP SFR has the following format: Bit Name Bit Address Explanation of Function 7 6 5 4 3 2 1 0 PS PT1 PX1 PT0 PX0 BCh BBh BAh B9h B8h Undefined Undefined Undefined Serial Interrupt Priority Timer 1 Interrupt Priority External 1 Interrupt Priority Timer 0 Interrupt Priority External 0 Interrupt Priority

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When considering interrupt priorities, the following rules apply:

Nothing can interrupt a high-priority interrupt--not even another high priority interrupt. A high-priority interrupt may interrupt a low-priority interrupt. A low-priority interrupt may only occur if no other interrupt is already executing. If two interrupts occur at the same time, the interrupt with higher priority will execute first. If both interrupts are of the same priority the interrupt which is serviced first by polling sequence will be executed first.

What Happens When an Interrupt Occurs? When an interrupt is triggered, the following actions are taken automatically by the microcontroller:

The current Program Counter is saved on the stack, low-byte first. Interrupts of the same and lower priority are blocked. In the case of Timer and External interrupts, the corresponding interrupt flag is cleared. Program execution transfers to the corresponding interrupt handler vector address. The Interrupt Handler Routine executes.

Take special note of the third step: If the interrupt being handled is a Timer or External interrupt, the microcontroller automatically clears the interrupt flag before passing control to your interrupt handler routine. This means it is not necessary that you clear the bit in your code. What Happens When an Interrupt Ends? An interrupt ends when your program executes the RETI (Return from Interrupt) instruction. When the RETI instruction is executed the following actions are taken by the microcontroller:

Two bytes are popped off the stack into the Program Counter to restore normal program execution. Interrupt status is restored to its pre-interrupt status.

Serial Interrupts Serial Interrupts are slightly different than the rest of the interrupts. This is due to the fact that there are two interrupt flags: RI and TI. If either flag is set, a serial interrupt is triggered. As you will recall from the section on the serial port, the RI bit is set when a byte is received by the serial port and the TI bit is set when a byte has been sent. Prepared By G. Kishore Kumar Page 33

This means that when your serial interrupt is executed, it may have been triggered because the RI flag was set or because the TI flag was set--or because both flags were set. Thus, your routine must check the status of these flags to determine what action is appropriate. Also, since the 8051 does not automatically clear the RI and TI flags you must clear these bits in your interrupt handler.

The Assembly Language Programming Process

A generic computer includes hardware concepts and software concepts. The hardware concepts include the CPU and memory. The software concepts include the code and data memory. Computer Languages: The computer languages are the sources for interaction between the user and the computer. The languages can be two types high level languages and assembly languages. Assembly languages: Assembly language uses the mnemonics for writing the program. The assembly programs use the internal registers as the part of the assembly language code. The assembly languages are used with 8051, 8086, 6502, 68000 and Z80 CPUs. Reasons for using Assembly language:

To speed up the operation of the computer Assembly language will reduce the size of the program compared to machine language program. Assembly language programs are used to write programs for special situations like machine control and robot arm movement. Assembly language program will save the money. To better understanding how the CPU operate.

The programs essential for writing assembly language programs:

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Program

Description systems are used for the

Operating DOS or Windows operating system program programming process.

Word processing Assembly program mnemonics are written in the text editor. This Text editor is stored on the disk in the format of file with extension .asm. Assembler program The assembler will take the .asm file from the disk and convert that into machine code. The machine code is stored in the file with extension .obj.

This program allows the user to test his program under controlled Testing program conditions. These testing programs can also called as debuggers or simulators.

Programming Tools and Techniques:

The computer is the sequential circuit that fetches the instruction from the code memory and then decodes it. The decoded program will be executed for giving the result to the user. The challenges faced by the beginning programmer are unfamiliarity with the tools and running of the program. A sequence of steps required for learning process for assembly language is given below. Learning process for assembly language:

Learn about the architecture of the CPU. Need to learn o the set of assembly language instructions used in the CPU. o how to use the personal computer o about the operating system o about the text editor o how to use the assembler program. o to debug the program o how to write the program in assembly language. Continue to write the large programs.

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Steps for writing the Assembly program (Manual Assembly Process):

Write the program on a pad of paper using the instruction mnemonics. Convert each instruction to its haxadecimal code, using a code book that lists each instruction mnemonic and its haxadecimal code. Assign each code byte an address in code memory. Use a paper tape punch to record the program code bytes. Enter the program into computer code memory via a paper tape reader under the control of a reader utility program. Find the mistakes, re-write and re-code the program, and re-enter it.

Steps for writing the Assembly program (Automated Assembly Process):

Write the program using the mnemonics by using the text editor. Store the edited assembly program on the disk Call the assembler for converting the assembly language program into the computer understandable language. Load the assembled machine language program form the disk into the RAM for testing purpose. Identify the errors, reedit the program, reassemble the program and again test until get the result.

Flow charts: Flow charts are used for visualizing the programs. Flow chart uses five elements, they are Symbol Action box Bubble Decision Line Arrow Purpose The action box is used to represent the data moves, math operations or any other instructions used to denote the program action. This is used to represent the beginning and end of the programs. The decision symbol used for condition checking the condition outputs either yes or no. The decision is represented by using diamond symbol. The line is used for showing the program flow. The line is used for showing the program flow. The arrow will show in what direction the information is passing.

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Programming the 8051

Assembly language programs are written as the sequence of text lines. Each line of the text is nothing but the instruction to the CPU. The syntax of the instruction of the text line is shown below. LABEL: ........ INSTRUCTION........ ; COMMENT(S) Labels are used to assign some name to a location in the program. The allowable label needs to have up to 8 characters.

Label

The instruction is any one of the coded set that has been defined by the manufacturer of the 8051. Every instruction can be converted into a unique machine language binary code that can be acted on by internal Instruction circuit of 8051. The syntax of the instruction is shown below. Mnemonic........ operands Comments are used for understanding the program in easy manner. The comments are begin with;.(semicolon)

Comments

8051 Addressing modes The way of specifying the address of the operand is called as addressing mode. The 8051 microcontroller is having four addressing modes for accessing data. 1. 2. 3. 4. Immediate Addressing mode Register Addressing mode Direct Addressing mode Indirect Addressing mode

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Immediate Addressing mode: This is used to load a direct data into a destination. This is identified by using symbol #. The number after # is directly loaded into the destination.

Ex: MOV Rr, #n; into the register Rr, the data n is loaded. MOV A, #25h; number 25h is loaded into the register A MOV DPTR, #nn; number nn (16 bit data) is loaded into the data pointer. DPTR can also be accessed as two 8-bit registers, the high byte DPH and low byte DPL. MOV DPTR, #4521H; DPTR=4512H

MOV DPL, #21H; this is the same

MOV DPH, #45H; as above

The source and destination registers must match in size MOV DPTR, A will give an error

The movement of data between Rn registers is not allowed MOV R4, R7 is invalid Register Addressing mode: In the register addressing mode, register names are used in the instruction and the source or destination data is in the registers. Ex: MOV A, Rr; copy data from the register Rr to A MOV Rr, A; copy data from A to the register Rr MOV A, R5; copy data from the register R5 to A Prepared By G. Kishore Kumar Page 39

Direct Addressing mode: The internal Ram memory address is directly used in the instruction, to get the data or load the data in the memory. Ex: MOV 90h, #A5h; copy the number A5h, into the memory location 90h. MOV R2, 54h; copy the data from the memory location 54h to Register R2. Indirect Addressing mode: In indirect addressing mode, R0 or R1 is used to store the actual address of the memory location and by using this register with @ symbol, the data is identified in the memory. Ex: MOV @R0, #27h; move the number 27h into the memory location whose address is available in R0.(destination is indirect address and source is immediate address) MOV 27h, @R1; move the contents of the memory whose address is in R1 into the memory location at the address 27h. (Destination is direct address, source is indirect address) MOV @R), A; Move data from register A to memory location whose address is in R0 (destination is indirect address and source is register address)

Data Transfer Instructions

Moving data: The data stored at the source address are moved onto the destination address. The 8051 is using six types of op-codes for moving data. They are OpCode MOV

Description Moves the data from internal RAM source address to internal RAM destination address. Moves a byte data from external RAM source address to register A and vice versa.

MOVX

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MOVC PUSH POP XCH

moves data from external or internal RAM source address to register A Copy a byte to internal stack from internal RAM source. Copy a byte from internal stack to internal RAM destination. Used to exchange data between register and internal RAM.

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Logical Instructions

Logical Operations: The logical instructions in 8051 are divided into two types. The byte level logical operations use all four addressing modes for the source of a data type. Logical operations at the BYTE level The destination address of the operation can be the accumulator (register A), a general register, or a direct address. Status flags are not affected by these logical operations (unless PSW is directly Byte level manipulated). logical Example instructions are: operations

ANL A, #55h ; AND each bit in A with corresponding bit in number 55h, leaving the result in A. ANL 42h, R4; AND each bit in RAM location 42h with corresponding bit in R4, leaving the result in RAM location 42h. ORL A, @R1; OR each bit in A with corresponding bit in the Page 42

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number whose address is contained in R1 leaving the result in A. XRL R4, 80h ; XOR each bit in R4 with corresponding bit in RAM location 80h (port 0), leaving result in A. CPL R0 ; Complement each bit in R0

Bit logical operations

The C (carry) flag is the destination of most bit level logical operations. The carry flag can easily be tested using a branch (jump) instruction to quickly establish program flow control decisions following a bit level logical operation. The following SFR registers only are addressable in bit level operations: IE IP TCON SCON level PSW Examples of bit level logical operations are as follows:

SETB 2Fh ; Bit 7 of Internal RAM location 25h is set CLR C ; Clear the carry flag (flag =0) CPL 20h ; Complement bit 0 of Internal RAM location 24h MOV C, 87h ; Move to carry flag the bit 7of Port 0 (SFR at 80h) ANL C,90h ; AND C with the bit 0 of Port 1 (SFR at 90) ORL C, 91h ; OR C with the bit 1 of Port 1 (SFR at 90)

Other Instructions The ability to rotate the A register (accumulator) data is useful to allow examination of individual bits. The options for such rotation are as follows: Rotate Instructions

RL A; Rotate A one bit to the left. Bit 7 rotates to the bit 0 position RLC A ; The Carry flag is used as a ninth bit in the rotation loop RR A ; Rotates A to the right (clockwise) RRC A; Rotates to the right and includes the carry bit as the 9th bit.

Swap Instructions

The Swap instruction swaps the accumulators high order nibble with the low-order nibble using the instruction:

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