Anna University of Technology Madurai-IET12

APPLICATION OF GENETIC ALGORITHM FOR THE DETERMINATION OF DYNAMIC AVAILABLE TRANSFER CAPABILITY
B.Dineshkumar, PG Student, EEE, Thiagarajar College of Engineering, Madurai. A.Srinivasan Research Scholar, EEE, Thiagarajar College of Engineering, Madurai P.Venkatesh Associate Professor, EEE, Thiagarajar College of Engineering, Madurai

Abstract This paper presents the application of genetic algorithm (GA) for the determination of dynamic available transfer Capability (D-ATC) considering the Hopf bifurcation limit, in an electricity market having bilateral and multilateral transaction. In the deregulated electricity environment, the transmission system may be operated under stressed condition due to the increased transactions; hence it is important to consider the oscillatory stability limit related to the occurrence of Hopf bifurcation while determining the dynamic ATC. In general, Hopf bifurcation produces limit cycles leading to oscillatory problems and possible instabilities to the system. In this paper, ATC is computed by finding the optimum loading very close to the occurrence of Hopf bifurcation using the genetic algorithm (GA) as the optimization tool. The effect of line contingencies is considered in the ATC determination. In order to reduce the computational time, the critical contingencies are identified by utilizing an oscillatory stability based contingency screening index, taking into account the impact of transactions on the relative severity of the contingencies. The proposed genetic algorithm is demonstrated to determine the dynamic ATC considering Hopf bifurcation limit for WSCC 3Machine 9-bus system and New England 10-Machine 39-bus system. Simulation results are compared to the solutions obtained by sequential quadratic programming (SQP) approach.

DEVELOPMENT OF DYNAMIC THERMAL MODEL FOR SWITCHED RELUCTANCE MACHINE

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Anna University of Technology Madurai-IET12

E. Annie Elisabeth Jebaseeli, Research Scholar, EEE, Sathyabama University, Chennai Dr.S.Paramasivam, R& D Head, ESAB , Chennai, India.

Abstract In the last decades, the Switched Reluctance Machine (SRM) has become an important alternative in various applications. To insure a successful design of the electrical machine, special attention has to be given to thermal aspects which will determine the power rating of the machine. For calculating the temperature rise in electrical systems such as electrical machines or power electronic systems, lumped parameter thermal model has been used .In this method thermal problems are solved by applying thermal networks analogues to electrical circuits. A simple thermal model considering the dynamic condition of the machine is developed and presented in this paper.

DESIGN OF STATIC OUTPUT FEEDBACK PID CONTROLLER FOR SYNCHRONOUS GENERATOR

R.Ramya, Project Fellow, EEE ,Thiagarajar College of Engineering, Madurai Dr.K.Selvi, Associate professor EEE,Thiagarajar College of Engineering, Madurai M.Tamilvanan, PG scholar, Thiagarajar College of Engineering, Madurai

Abstract - This paper describes the design of a Static Output Feedback (SOF) PID controller for a Synchronous Generator. Iterative Linear matrix Inequality (ILMI) algorithm is applied to find the gains of PID. The design of the controller guarantees the stability of the closed loop system and ensures the output voltage is maintained within an acceptable threshold. The results of SOFPID controller are compared for the system with conventional IEEE type2 exciter. The performance of the AVR was analyzed under different operating conditions and network parameter variations which provides better voltage control and also contributed better damping of oscillations.

DIRECT TORQUE CONTROL FOR INDUCTION MOTOR USING FUZZY LOGIC TECHNIQUE
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Anna University of Technology Madurai-IET12

A.Saravanan,EEE,Rover Engineering College, Perambalur. V. Subha seethalakshmi., EEE,Rover Engineering College, Perambalur.

Abstract This paper deals about the sandwich of artificial intelligence technique particularly fuzzy logic in the direct torque control for induction motor (IM) drive. Classical direct torque control (DTC) has advantage in absence of coordinate transform and voltage modulator block. However, it may have disadvantage in controlling electromagnetic torque. DTC produces high ripple in electromagnetic torque as it is not directly controlled. Thus, FLC is applied to reduce electromagnetic torque ripple. This paper presents the simulation analysis of Fuzzy Logic Direct Torque Controller (FLDTC) of induction machine drives. Using FLDTC, the resulting electromagnetic torque from produced fewer ripples than classical DTC. Simulation results will be presented and discussed to prove the effective new of the proposed technique.

MITIGATION OF VOLTAGE DISTURBANCES FOR RADIAL DISTRIBUTION SYSTEMS BY IMPLEMENTING UNIFIED POWER QUALITY CONDITIONING SYSTEM
A.Prabu, EEE Dept., TCE, Madurai M.Mohan EEE Dept., TCE, Madurai. Dr.V.Suresh Kumar, Associate professor, EEE Dept., TCE, Madurai G.Sivasankar ,Assistant Professor EEE Dept., TCE, Madurai.

Abstract - Voltage sag is a frequently occurring power quality problem as it may significantly affect industrial production. The unified power quality conditioning system is used to mitigate voltage sag under different fault condition. In this paper, a study on the operation of a UPQC for distribution systems is carried out. The main purpose of unified power-quality conditioner (UPQC) is capable of simultaneous compensation for voltage and current in multibus/multifeeder systems. In this configuration, one shunt voltage-source converter (shunt VSC) and one series VSCs exist. The system can be applied to adjacent feeders to compensate for supply-voltage imperfections. The IEEE 16 node test feeder, which is a highly loaded unbalanced system, is used in the study. The UPQC consists of a threelevel inverter with IGBTs and PWM control. Modelling and simulations are implemented in Mat lab/Simulink.

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Anna University of Technology Madurai-IET12

IMPLEMENTATION OF HCC PWM TECHNIQUE IN SINGLE-PHASE HALF -BRIDGE BI-DIRECTIONAL BOOST AC-DC CONVERTER
R. Arun Kumar, PG scholar, EEE, SSN College of Engineering A. N. Arvindan, Professor, EEE, SSN College of Engineering.

Abstract This paper deals with unity power factor operations with near sinusoidal line currents of the bi-directional boost type improved power quality AC-DC converter. Hysteresis Current Control (HCC) pulse width modulation (PWM) technique is implemented in singlephase half-bridge boost ac-dc converter topology. The HCC PWM technique is capable of conferring unity power factor operations in both rectification and inversion modes of the bidirectional boost converter with a small value of total harmonic distortion (THD) in the line current waveform. To reduce switching losses, power to the gating circuit and switching stress on the devices, it is proposed that only one switching device in the single-phase topology is turned on per half cycle of the reference sinusoidal waveform.

NON-CONVEX OPTIMIZATION FOR ECONOMIC DISPATCH PROBLEM USING GENETIC ALGORITHM

T.Saravanan, P.G student, Thiagarajar College of Engineering, Madurai. V.Ramanathan, Assistant Professor, Thiagarajar college of Engineering, Madurai.

Abstract The Economic Dispatch with Multiple Fuel Options (EDMFO) is one of the important optimization problems in a power system. The objective of economic dispatch problem is to determine the optimal combination of power outputs for all generating units, which minimizes the total fuel cost while satisfying load demand and operating constraints. This makes the economic dispatch problem with multiple fuel options a non-linear constrained optimization problem. The generating units, particularly those that are supplied with multi-fuel sources (coal, nature gas, or oil), lead to the problem of determining the most economic fuel to burn. The cost curve of such generator is become highly nonlinear, containing discontinuities due to valve point loadings, the cost function is more realistically denoted as a segmented piecewise quadratic function. This paper addresses the Genetic Algorithm (GA) algorithm for the solution of realistic economic dispatch problem. The performance of the algorithm for the solution of EDMFO is evaluated by implementing the algorithm with 10-unit economic dispatch problem considering both multi-fuel effects and valve-point loadings considering losses.

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Anna University of Technology Madurai-IET12

FUZZY LOGIC BASED FLUX LINKAGE MODELING OF A SWITCHED RELUCTANCE MACHINE

D.Susitra, Research Scholar, Faculty of EEE, Sathyabama university,Chennai. S.Paramasivam , R&D Head, ESAB Group Kancheepuram district,Sriperumbatur.

Abstract-The Switched reluctance machine (SRM) can be operated as a motor/generator which is the subject of interest by many researchers in the field of electrical machines for the last few decades. Many research papers have concluded that Switched Reluctance Generator (SRG) has proved to be a valid alternative to the classical generators in many industrial applications especially in the field of wind energy generation system. The magnetization characteristics of the SRM is highly non-linear making the flux linkage and torque as the non-linear functions of both the current (Iph) and rotor position(). Establishing this high precision nonlinear mapping between (I,),current (Iph) and rotor position() are the base to model the machine accurately for the analysis and control of any SRG system. The generating or motoring mode of operation of the machine depends greatly on the value of rising or falling inductance which depends on the phase flux linkage which needs to be modeled more accurately for the practical applications. This paper presents a fuzzy logic based modeling technique for building the Non-linear flux linkage () model of a Switched reluctance Machine (SRM). Fuzzy inference system (FIS) is built and used for the nonlinear flux linkage

calculation by using the data set from the magnetization characteristics of a 6/4 pole SRM.Fuzzy logic technique is greatly suited to model general non linear mapping between input and output spaces. In this paper, a computationally efficient flux linkage model for SRM is developed. SRM Model for the phase Inductance (I,) using FIS has been successfully arrived, tested and presented for various values of phase currents(Iph) and rotor positions() of a non linear SRM. It is observed that fuzzy logic technique is suitable for (I,) modeling of SRM which is tested to be in good agreement with the training data used for modeling.

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Anna University of Technology Madurai-IET12

OPTIMAL CAPACITOR ALLOCATION IN DISTRIBUTION SYTEMS

K.Prabhakaran, PG Student, EEE , Thiagarajar College of Engineering. Dr.N.Shanmuga Vadivoo, Assistant Professor,EEE,Thiagarajar College of Engineering.

AbstractThe work reported in this paper is carried out with the objective of identifying the optimal locations of shunt capacitors to be placed in radial distribution system based on minimization of losses. At first, base case load flow of precompensated distribution system is carried out by using forward and backward sweep load flow algorithm. After that, based on load flow solutions, loss sensitivity factors (LSF) indicating the potential locations for compensation are computed. From the LSF, the candidate number of buses are identified at which capacitors are placed. This method is tested on IEEE 33 bus radial distribution system.

SPEED CONTROL OF SINGLE-PHASE INDUCTION MOTOR USING AC CHOPPER

S.Ponmalar, PG Scholar, EEE, SSN College of Engineering, Chennai. A. N. Arvindan, Professor, EEE, SSN College of Engineering, Chennai.

Abstract Fractional kilowatt motors are employed in fans, refrigerators, mixers, small farming appliances etc. Capacitor type single-phase induction motors are extensively used in these applications, as the starting and running performance of these motors are highly improved by the presence of capacitors. A single-phase bidirectional ac chopper using power MOSFET four-quadrant switches is used to control the speed of the singlephase induction motor. Stator voltage control is used by adopting the symmetrical multipulse modulation (SMM) technique. The efficacy of the technique to achieve speed control is explored by conducting simulations on a realistic model whose parameters are obtained from experimental data of no-load and blocked-rotor tests conducted in the laboratory. The stator voltage is varied by varying the number of pulses per half cycle (M) and duty cycle () of the pulses that are SMM parameters. Simulation results are presented that suggest speed control in a limited range is possible using the SMM ac chopper.

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Anna University of Technology Madurai-IET12

TRANSMISSION PRICING MECHANISM USING TRACING BASED POINT-OF-CONNECTION TARIFF METHOD

J.Jeslin Drusila Nesamalar, PG Scholar, EEE, Thiagarajar College of Engineering, S. Charles Raja,EEE Department ,Thiagarajar College of Engineering, Madurai. Dr. P. Venkatesh, EEE Department ,Thiagarajar College of Engineering, Madurai.

Abstract: Deregulation has revolutionized the back-bone of the countrys economy in the fields like transportation, communication, aviation and so in power sector. The purpose of this paper is to establish a cost of system services on a nondiscriminatory basis using Point of Connection charges by incorporating Locational Marginal Price (LMP) and Locational Transmission Price (LTP) method. The advantages of the proposed methodologies are demonstrated by sample Six Bus and IEEE 30 bus system. The solutions provide a better pricing approach that can provide a more reasonable economic indicator for transmission cost.

MULTI-MACHINE TRANSIENT STABILITY ANALYSIS USING ENERGY FUNCTION BY CONNECTING SVC

K.Tamilselvam, PG Student,Thiagarajar College of Engineering, Madurai. Dr.S.Latha,Associate Professor,Thiagarajar College of Engineering, Madurai.

Abstract - Transient stability analysis has recently become a major issue in the operation of power systems due to the increasing stress on power system networks. This problem requires evaluation of a power system's ability to withstand disturbances while maintaining the quality of service. Many different techniques have been proposed for transient stability analysis in power systems, especially for a multi-machine system. These methods include the time domain solutions, the extended equal area criteria, and the direct stability methods such as the transient energy function.This paper presents the effect of Static VAR Compensator(SVC) in a multimachine system to improve the Critical Clearing Time(CCT) using transient energy function. Tests are performed on IEEE 9 Bus System.

DESIGN ANALYSIS AND IMPLEMENTATION OF ON-LINE UPS USING BIFRED CONVERTER

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Anna University of Technology Madurai-IET12

V. Meroshedha, EEE, SSN College of Engineering, Dr. V. Kamaraj, Professor, EEE, SSN College of Engineering.

Abstract: This project deals with design and analysis of an on-line single phase uninterruptible power supply (UPS) system based on a boost integrated flyback rectifier/energy storage (BIFRED) converter. The proposed system consists of the ac/dc diode bridge rectifier, dc/dc BIFRED converter, dc/ac inverter and a bidirectional dc/dc converter. The electrical isolation is obtained using high frequency transformer. BIFRED converter not only functions as a converter but also improves the input power factor and improves the voltage regulation. The proposed system has the advantages of low cost, high efficiency, small in size and less weight.

MITIGATION OF CURRENT HARMONICS IN DISTRIBUTION SYSTEM USING SERIES PASSIVE AND SHUNT ACTIVE FILTERS
G.Anandhan, PG Scholar, Anna University of Technolog Madurai. P.SathishBabu,Asst. Profr, Dept of EEE, Anna University of Technology, Ramnadu Campus.

Abstract- In this paper the current harmonic can be compensated by using the Shunt Active Power Filter, Passive Power Filter and the combination of both. The system has the function of harmonic suppression. An improved generalized integrator control was proposed to improve the performance of APF. The simulation results of the non- linear systems have been carried out with MATLAB.

BEHAVIOR OF TMT BARS UNDER FIRE

B.Jeyaprabha, AP,Civil, Velammal Collage of Engg. &Tech., Madurai. G.Elangovan, Associate Profesor,Civil , Anna University of Tehnology Madurai.

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Anna University of Technology Madurai-IET12 Abstract-The deterioration of the mechanical properties of yield strength and modulus of elasticity is considered as the primary element affecting the performance of steel structures under fire. In this study, the behavior of TMT bars under fire was investigated. Fe 415 - 12 mm diameter TMT rebar were subjected to high temperatures to investigate the fire performance. It is aimed to determine the remaining mechanical properties of steel rebars after elevated temperatures.TMT bars were exposed to temperatures of 100oC, 300oC, 600oC and 900oC in a high temperature programmable muffle furnace. The rate of heating was 5oC per min and after reaching the temperatures mentioned, the bars were heated constantly at those temperatures for exactly one hour. The heated samples were rapidly cooled by quenching in water and normally by air cooling to the room temperature. Subsequently, tensile tests were conducted on the specimens. All mechanical properties were reduced due to the temperature increase of the steel rebars.

INVESTIGATION ON THE MECHANICAL BEHAVIOUR OF RANDOMLY ORIENTED COIR AND BAGASSE FIBERS REINFORCED POLYESTER HYBRID COMPOSITES
P.Raja, PG Scholar, Anna University of Technology Madurai. B.Stalin, AP,Mechanical Engineering, Anna University of Technology Madurai. A.Athijayamani, Mechanical Engineering, ACCET, Karaikudi.

Abstract Natural fibres are partially replacing currently used synthetic fibres as reinforcement for polyester composites. In this research mechanical properties of hybrid composites made out of chemically modified fibres of coir / bagasse reinforced with polyester were investigated and compared with those of unmodified fibre composites. The test specimens were processed via hand lay up method. Various testing methods including tensile, flexural and impact test were used to investigate the composites mechanical performance. Scanning Electron Microscopy was carried out to study the fibre - matrix interfacial adhesion

EFFECT OF COIR AND BAGASSE FIBERS REINFORCEMENT IN MECHANICAL PROPERTIES OF POLYESTER COMPOSITES
Nayagaraja.R, PG Scholar, Anna University of Technology Madurai.
B.Stalin, AP,Mechanical Engineering, Anna University of Technology Madurai.

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A.Athijayamani, Mechanical Engineering, ACCET, Karaikudi.

Abstract-The development of high performance engineering product made from natural resources is increasing worldwide due to renewable and environmental issue .Among many type of natural fibers Coir and Bagasse have been extensively exploited over fast few years. This paper describes the mechanical behaviors of coir and Bagasse fiber reinforced unsaturated polyester resin. The composites fiber content was increased from 20% to 60% by weight basis. Study the treated fiber composites mechanical properties like as Tensile strength, Flextural strength, Impact strength. The fiber was treated with 10% NaoH and soaking time also increased for analysis.

MACHINABILITY STUDIES ON RANDOMLY ORIENTED NATURAL FIBRE REINFORCED POLYMER COMPOSITE MATERIAL
Newton. V, PG Scholar, Anna University of Technology Madurai. B.Stalin, AP,Mechanical Engineering, Anna University of Technology Madurai. A.Athijayamani, Mechanical Engineering, ACCET, Karaikudi.

Abstract-Recently the interest in composite materials reinforced with natural fibres has considerably increased due to the new environmental legislation. This project deals with the characterization of two natural fibres reinforced polymer composites under machinability. Two natural fibres are sugarcane bagasse and Coconut coir. Three types of composites are made in which the Unsaturated polymer reinforced with bagasse, coir and the Combination of bagasse and coir. After the preparation of these Composites, the different materials undergo machining operations, SEM, Hardness test to determine its strength. Moulds are prepared for performing machining operations i.e. drilling and turning for determining machining capability. Rockwell or Brinell hardness test is made to determine its strength.

MECHANICAL BEHAVIOR OF HYBRID HAND LAY-UP NATURAL FIBER PARTICULATE REINFORCED POLYMER COMPOSITE
Subramanian. S, PG Scholar, Anna University of Technology Madurai. B.Stalin, AP,Mechanical Engineering, Anna University of Technology Madurai. A.Athijayamani, Mechanical Engineering, ACCET, Karaikudi.

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Anna University of Technology Madurai-IET12 Abstract-This paper reports on a study of the biodegradable hybrid composite material of the unsaturated polyester polymer (USP) with the natural fibers of Sugarcane Bagasse, Coconut coir and the Ceramic fiber of Alumina (Al2O3). Hybridization is a process of incorporating Synthetic polymer fibers with that of more than one natural fibers and a ceramic material fiber in order to yield better strength, stiffness, high strength to weight ratio and other mechanical properties. The USP composites were fabricated for different length (10mm &30mm) of natural fibers and different weight percentages (10, 15, 20, 25, 30) for each of the Sugarcane Bagasse, Coconut coir and Alumina(Al2O3). Then the composites were characterized by mechanical properties such as tensile test, flexural test and impact test. The mechanical properties were increased against the increase of percentages of reinforcement natural fibers and AluminaAl2O3). The maximum mechanical properties of the hybrid composites were in the 30 mm fiber length and 30 weight percentage. When compared the mechanical properties of 30mm fiber length hybrid/polyester composites with 10 mm length hybrid/polyester composites, the 30 mm fiber length hybrid composites result in 22% increase in both the tensile and Impact strength, 38% increase in flexural strength. Morphological analysis was carried out to observe fracture behaviour and pull-out the samples using scanning electron microscope.

EVALUATION OF PARAMETERS DURING MACHINING OF COIR/BAGASSE/PARTICULATE REINFORCED POLYMER COMPOSITE MATERIALS

Ayyar. V PG Scholar, Anna University of Technology Madurai.
B.Stalin, AP,Mechanical Engineering, Anna University of Technology Madurai. A.Athijayamani, Mechanical Engineering, ACCET, Karaikudi.

Abstract-The mechanical properties of the Alumina (Al2O3) particulated coir fiber/polyester composites and bagasse fiber/polyester composites were evaluated. In this work, the optimum Souvenir
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Anna University of Technology Madurai-IET12 weight percentage which provides the maximum mechanical property was found by varying the fiber length (10 mm and 30 mm) and weight percentages (10, 20, 30, 40, 50) for coir fiber/polyester composites and bagasse fiber/polyester composites. Then the particulated coir fiber/polyester composites and bagasse fiber/polyester composites were fabricated by varying Alumina (Al2O3) powder particles weight percentages (10, 15, 20, 25, 30) with the optimum fiber content percentage. The mechanical properties of composites were tested in Universal Testing Machine and Izod Impact Tester. Approximately 3 % improvement in tensile strength, 4 % in flexural strength and 3% in impact strength had been found for these composites and 20 weight percentages Alumina (Al2O3) is the percentage for getting maximum mechanical properties for particulated coir fiber/polyester composites and bagasse fiber/polyester composites. The fractured surface of the composites was tested by Scanning Electron Microscope for morphological analysis.

EFFICIENT DATA MINING USING DISTRIBUTION BASED TREE ALGORITHM

Vijayalakshmi.R, PG Scholar, College of Engineering, Guindy

AbstractData mining techniques are applied in building software fault prediction models for improving the software quality. Early identification of high-risk modules can assist in quality enhancement efforts to modules that are likely to have a high number of faults. The objective of this paper is to reduce the number of data sets for the proper and efficient usage of the processor memory. The paper discusses about the improvement of memory management for wireless environmental monitoring system using distribution based decision tree algorithm. For the analysis continuous distributions methods are considered.Comparison of gaussian distribution with Averaging are discussed in this paper. Therefore obtaining an efficient data mining scheme for wireless sensor networks using decision tree algorithms is obtained.

MODELING OF FAST TRANSVERSAL LEAST MEAN SQUARE ALGORITHM FOR SPEECH SIGNAL PROCESSING
J.Jebastine, Research Scholar, Dept. of ECE, Sathyabama University, Chennai Dr.B.Sheela Rani, Vice-Chancellor & Dean, PG Studies and Research, Sathyabama University, Chennai

Abstract:- This paper describes the Recursive Least Square (RLS) algorithm and Fast Transversal Recursive Least Square (FT-RLS) Algorithm for effective noise cancellation. The Simulink model for RLS and FT-RLS Algorithm was designed which results in a noise free signal as output. The filter used here is adaptive filter and the algorithm used is Recursive Least Souvenir
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Anna University of Technology Madurai-IET12 Square algorithm and Fast Transversal Recursive Least Square Algorithm. A random noise is given as a input to the block and the other given input is the original speech signal. By varying the adaptive step size, Signal to Noise Ratio are determined and compared for both the algorithms. Based on these results the optimum step size is found for noise free outputs and the best efficient algorithm is found. The FT-RLS algorithm provides similar performance to the standard RLS algorithm while reducing the computational effort. This is accomplished by a combination of four transversal filters used in union. The four transversal filters used in forming the update equations are forward prediction, backward prediction, conversion factor and joint process estimation. The FT-RLS algorithm is found to be a suitable solution for adaptive filtering applications and hence chosen to implement in hardware. Thus hardware has been implemented for effective removal of noise in audio and speech processing and it can be widely used in Mobile and Radio communication.

DESIGN AND OPTIMIZATION OF MPSOC USING LOW POWER VLSI

Dipin Thomas, PG Scholar, Anna University of Technology, Madurai. Dr.V.Malathi, Professor and Head of ECE, Anna University of Technology, Madurai.

Abstract-

The MultiProcessor System-on-Chip (MPSoC) uses multiple CPUs along with

other hardware subsystems to implement a system. A wide range of MPSoC architectures have been developed over the past decade. In this paper, a novel strategy is introduced for optimizing resources in Multi-Processor Systems-on-Chip (MPSoC) by maximizing the efficiency on exploiting available resources such as CPU time, operating frequency, etc. The fine-grained Dynamic Voltage/Frequency Scaling (DVFS) is an important tool in managing the balance between power and performance in chip-multiprocessors.

VERILOG HDL BASED DEVICE MODELLING FOR EMBEDDED ARCHITECTURE

Sattanathan.V,Dept. of EEE,College of Engineering,Guindy,

Abstract- ALU is an important component for processor.In many processors, the functional units of ALU are designed based on conventional transistors and pass transistor gates. In this paper, design of a ALU using majority logic CMOS is proposed . The ALU can perform four arithmetic and four logical operations. The core of the ALU, which is the full adder circuit, has been designed using majority logic transistors. Additional logic gates have also been built using

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Anna University of Technology Madurai-IET12 majority logic transistors. The design present here is simple in structure with significantly lesser number of transistors and interconnections when compared to earlier designs.

RELAY NODE PLACEMENT SCHEME TO REPAIR DAMAGED WIRELESS SENSOR NETWORKS

R.Blessie Samlin, PG Scholar, Anna University of Technology Madurai E.Srie Vidhya Janani, AP/CSE, Anna University of Technology Madurai

Abstract-Due to the harsh surroundings and violent nature of wireless sensor network (WSN) applications, the network sometimes suffers a large-scale damage that involves several nodes and would thus create multiple disjoint partitions. This paper investigates a strategy for recovering from such damage through the placement of relay nodes (RNs) and promotes a novel approach. The proposed approach opts to reestablish connectivity (i.e., 1-vertex connectivity) using the least number of relays while ensuring a certain quality in the formed topology. Unlike contemporary schemes that often form a minimum spanning tree among the isolated segments, the proposed approach establishes a topology that resembles a spider web, for which the segments are situated at the perimeter. Such a topology not only exhibits stronger connectivity than a minimum spanning tree but achieves better sensor coverage and enables balanced distribution of traffic load among the employed relays as well.. The simulation result demonstrates the effectiveness of the proposed recovery algorithm.

SMART ELECTRICITY MONITORING METER WITH SECURE TRANSMISSION TO EB BY GSM/GPRS

T. Mohanraj, PG Scholar, SSN College of Engineering, Chennai E. Janardhanan, Professor, Department of ECE, SSN College of Engineering, Chennai.

AbstractThe development of a Global System for Mobile Communication (GSM) Automatic Power Meter Reading system is presented in this paper. The GAPMR system is consists of GSM digital power meters installed in every consumer unit and an electricity eBilling system at the energy provider side .The GSM Digital power meter is a single phase digital Kilo watt Hour (kwh) power meter with embedded GSM modem which utilize the GSM Network to send its power usage reading using short messaging system back to the energy Souvenir
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Anna University of Technology Madurai-IET12 provider wirelessly. At the power provider side an eBilling system is used to manage all received meter reading, compute the billing cost, update the data base, and to publish billing information to its respective consumer thorough SMS, email, web portal and printed postage mailing. Such a real time data will then be used for different analysis purposes and also to track the power theft as well as non-payment of the bills. This project describes the Electric power monitoring system for the planning, design and implementation process. The system operates based on intelligent monitor, remote observation points and monitoring centre system. A working prototype of the GSM Automatic Power Meter Reading (GAPMR) system was build to demonstrate the effectiveness and efficiency of automatic meter reading, billing and notification through the use of GSM network.

DLL BASED FREQUENCY SYNTHESIZER FOR IMPROVING EFFICIENCY IN TERMS OF POWER

D.Rethinapriya, PG Scholar, Anna University of Technology, Madurai. Mr.V.Arun, AP / ECE, Anna University of Technology, Madurai.

Abstract-The design of the All Digital Receiver circuit in this project uses Delay Locked Loop (DLL) as the main core instead of PLL. A 14-band CMOS frequency synthesizer using DLL is designed for spur reduction in MB-OFDM UWB system. DLL reduces the design complexity since the main difference when considering with PLL is there is no internal voltage control oscillator. The feedback more specific sub harmonics are obtained from SSB mixer for 14-band generation. This DLL based frequency synthesizer reduces the interference and provides efficient signal with negligible bit error rate.

STEGANOLYSIS OF DIGITAL IMAGE USING RSA ALGORITHM AND LSB INSERTION

K. Hariprakash, Dept. of ECE, Annamalai University,Chidambaram S.Sivagnanam , Lecturer, Dept. of ECE, Annamalai University,Chidambaram K. J. Jegadish Kumar AP, Dept. of ECE, SSNCE, Chennai.

Abstract - Steganography is the term used to describe the hiding of data in images to avoid detection by attackers. It is an emerging area which is used for secured data transmission over any public media. In this study a novel approach of image steganography based on LSB (Least Significant Bit) insertion and RSA encryption technique for the lossless jpeg images has been Souvenir
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Anna University of Technology Madurai-IET12 proposed. This paper discusses an application which ranks images in a users library based on their suitability as cover objects for some data. The data is matched to an image; so there is less chance of an attacker being able to use steganalysis to recover the data. The application first encrypts the data using RSA algorithm. The message bits are embedded into the image using Least Significant Bits insertion. Before embedding, the message bits are encrypted using RSA algorithm, resulting in increased robustness. This would decrease the intentional attacks which try to reveal the hidden message. At the receiver side reverse operation has been carried out to get back the original information.

DUPLICATION AVOIDANCE LINK LEVEL SECURITY IN WIRELESS SENSOR NETWORKS

Chitra.S, PG Scholar, Anna University of Technology, Madurai. Arunprasath.R, Faculty/ECE, Anna University of Technology Madurai

AbstractWith the widespread growth of applications of Wireless Sensor Networks (WSNs), the need for reliable security mechanisms these networks has increased manifold. Public key and Private keys are generated by RSA algorithm and the public key is exchanged between the sender and the receiver. Though this process is time consuming, it is very efficient; as encrypted and secured routing is performed by checking and verifying the certificates (using MD5algorithm) by the respective nodes. This process consumes less energy and thereby it saves the battery life time, which is a major issue in sensor networks. This work is implemented in ns2 and the results have been analyzed in terms of throughput, residual energy.

SUPPORT VECTOR MACHINES IN DETECTION OF THYROID LESIONS

G.S.Sankari, VLSI Design, Francis Xavier Engineering College, Tirunelveli. Shally Kennedy, VLSI Design, Francis Xavier Engineering College, Tirunelveli.

Abstract-This paper describes the usage of Support vector machine in the classification of thyroid lesions. It is an effective classifying tool designed by the MATLAB software. It gives high performance in the real world classification process. The initial step involved in this process is the building of the SVM where the feature vectors of an ultrasound image are used to train the SVM in identifying the lesions as benign or malignant. The trained SVM is then presented with new thyroid lesions. Now the SVM is able to detect benign and malignant Souvenir
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Anna University of Technology Madurai-IET12 thyroid lesions distinctly with minimal chances of error. This is the testing stage. Given a set of points that all belong to one of the two classes, an SVM can find the hyperplane that leaves the largest possible fraction of points of the same class on the same side, while maximizing the distance of either class from the hyperplane. It should also be selected in such a way that though the distance between both the classes should be large, the distance of the features within a given class should be less. This optimal separating hyperplane can minimize the risk of misclassifying examples of the test set. As a result, the decision taken by the intelligent expert system is more close to reality.

WIRELESS INTRUSION DETECTION SYSTEM WITH REDUCTION IN ATTACKS

Mr.S.Suresh ,Final year M.Tech (CSE), KLU. Ms.S.Sudha M.S, AssistantProfessor, CSE KLU

Abstract--Wireless IDS will be an important part of thewireless LAN.Wireless IDS (Intrusion Detection System) can help network system quickly identify attacks, which extends the system administrator's security management capabilities(including security audits, monitoring, attack recognition andresponse), improves the integrity of the information securityinfrastructure. Intrusion Detection Systems (IDSs) are a major line of defense for protecting network resources from illegal penetrations.A common approach in intrusion detection models, Souvenir
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Anna University of Technology Madurai-IET12 specifically in the intrusion detection systems consist of basic information related to the TCP/IP header, with no considerable attention to the featuresassociated with lower level protocol frames.The resulting detectors were efficient and accurate in detecting network attacks at thenetwork and transport layers, but unfortunately, not capable of detecting 802.11-specific attacks such as deauthentication attacks orMAC layer DoS attacks.Our model for feature selection uses the information gain ratio measure as a means to compute the relevanceof each feature and the k-means classifier to select the optimal set of MAC layer features that can improve the accuracy of intrusiondetection systems while reducing the learning time of their learning algorithm.

IMPLEMENTATION OF INDUSTRIAL COMMUNICATION PROTOCOLS FOR AN AC MICROGRID

E.Rajarajan, PG Scholar, College of Engineering Guindy, Chennai

Abstract: In this recent years, the industrys experience have demonstrated the need for the developing the standard communication protocol, which will support the interoperability of Intelligent Electronic Devices [IEDs] in an AC microgrid. The microgrid for distributed generation delivers more reliable power to the consumer .Managing and controlling the microgrid efficiently using compatible protocols will leads to good system. This end to end networking architecture provides connectivity, collaboration and integration from the device level to enterprise based automation. This system employs the protocols like PROFIBUS-DP and IEC61850. The Real Time Operating System [RTOS] provides more robust control for the AC microgrid using industrial protocols which accounts for monitoring, control and protection. This paper describes about the implementation through RTOS and Industrial Ethernet protocols for the AC microgrid system.

LOAD SHARING BETWEEN HETEROGENEOUS PROCESSORS

A.S.Narmadaa, PG Scholar, Anna University of Technology Madurai V.Arun, AP/ECE, Anna University of Technology Madurai

Abstract: As the system scales up continuously, the problem of internal swing for high performance computing (HPC) system becomes more severe. Heterogeneous system integrating two or more kinds of processors could be better adapted to heterogeneity in applications and provide much higher energy efficiency. This project deals with a power efficient work distribution method for single application on a CPU-GPU heterogeneous system.

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Anna University of Technology Madurai-IET12 The proposed method could co-ordinate inter-processor work distribution to minimize energy consumption as well as reduces the internal swing under a given scheduling length constraint.

STUDY OF SURFACE ROUGHNESS IN EXTREMELY SMALL SI NANOWIRE MOSFETS USING FULLY-3D NEGFS
C.Priya,ECE Dept.,Syed ammal Engg.college, Ramanathapuram. Sakubar saddique, ECEDept, Anna/SyedammalEngg.college, Ramanathapuram.

AbstractIn this paper we study the impact of surface rough- ness in the channel on the current variability of a gateallaround Si nanowire MOSFET. This analysis has been carried out using a fully3D realspace NonEquilibrium Greens function (NEGF) simulator. 3D simulations are required due to the strong spatial inhomogeneities of the potential and electron concentration caused by the rough interface. As an initial condition for the Greens function simulation we use a driftdiffusion solution with density gradient quantum corrections. This stabilises the convergence of the NEGF algorithm. We have obtained the ID VG characteristics for the smooth and the surface roughness devices. A large variation in the on current and a noticeable threshold voltage shift have been observed in the ID VG characteristics when the smooth device is compared with the surface roughness device. The results obtained have been directly correlated with the selfconsistent electrostatic potential, electron density and transmission coefficients along the wire axis.

ENERGY EFFICIENT LOCAL MONITORING IN MOBILE SENSOR NETWORK

G.Sindhuja, PG Scholar, Anna University of Technology, Madurai. J.Mangaiyarkarasi Faculty/ECE, Anna University of Technology Madurai

Abstract Adhoc and sensor networks are emerging as a promising platform for a variety application area in both military and civilian domains. In multi hop wireless systems, the need for cooperation among nodes to relay each other's packets exposes them to a wide range of security attacks. Local monitoring is the one of the powerful technique for improving the security in multi hop adhoc and sensor network. Although it is a good technique for security purpose in WSN but it has a major drawback that it is costly in terms of energy consumption which make overhead for the energy constrained system such as WSN. In this paper a new Souvenir
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Anna University of Technology Madurai-IET12 technique is proposed that is not only energy efficient but also a secure technique which combine the sleep wake up scheduling with local monitoring in mobile multi hop adhoc and sensor networks.

TOLL GATE AUTOMATION

Muthukumar.A, PG Scholar, College of Engineering Guindy Uma.S, AP/EEE, College of Engineering Guindy

Abstract: In Toll gate Automation system is designed for toll gate automation and automatic vehicle tracking. It keeps track of the vehicles movement and the details like owners name, address, phone number etc. In this system, a computerized system automatically identifies an approaching vehicle and records the vehicle number. If the vehicle belongs to the authorized person/group, it automatically opens the Toll Gate and a predetermined amount is automatically deducted from its account. If any vehicle purpose, the toll gate automatically blocks the company. is asked to block for security particular vehicle. If any cargo company

subscribe for mail on arrival of its cargo vehicle, a mail could be send to the particular

APPLICATION OF CLOUD TECHNOLOGY FOR LOWER END SMART DEVICES

T.Sivashankari, PG Scholar, Anna University of Technology, Madurai V.Arun, AP / ECE, Anna University of Technology, Madurai.

Abstract Recent days VLSI systems are used as accelerator devices for computing high intensive functions and these devices possess only low level processors and limited resources. An embedded internet device which is compatible to work with the cloud technology has been developed, where the tasks are offloaded to the cloud. The input is taken from the user, computational task is performed in the cloud and the results are shown back to the user. This process is achieved by augmented execution. As the processing is done in the cloud platform, complex tasks can be computed through a device with low level processor and simple hardware configuration.

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Anna University of Technology Madurai-IET12

MODIFIED CARRY SELECT ADDER FOR LOW POWER AND AREA EFFICIENCY
V.Kalimuthu, ECE, Sardar Raja College of Engineering, Tirunelveli A.S.Mahesh Anand, ECE, Sardar Raja College of Engineering, Tirunelveli

Abstract Carry Select Adder (CSLA) is one of the technique to fast arithmetic and logic operation. This technique uses a simple and gate level modification to significantly reduce the area and power consumption.CSLA based on this modification 8,16,32,64 and 128 b SQRT CSLA structure have been implemented and compared with regular CSLA methods.SQRT CSLA is one the pipeline concept and reduce the power and area efficiency. The result analysis prove that implemented CSLA system is better than the regular SQRT CSLA system.

VLSI IMPLEMENTATION OF 16 CHANNEL ICA PROCESSOR

Jini Kuriakose, PG Scholar, Anna University of Technology, Madurai. A.Muthukrishnan, Faculty, ECE, Anna university of technology, Madurai Abstract-This paper presents a 16- channel ICA implementation in FPGA for biomedical application. Independent component analysis (ICA) is a statistical signal processing technique having emerging new practical applications. Infomax ICA is a common method to identify artifacts and interference from their mixtures such as electroencephalogram (EEG), magneto encephalography (MEG), and electrocardiogram (EEG). Multilevel power optimization approach is using for reducing the power dissipation of the ICA processor.

DESIGN OF LOW POWER VLSI ARCHITECTURE FOR RECONFIGURABLE FIR FILTER

S.Saravanakumar, ECE, Anna University of Technology Coimbatore. S.Elango, ECE, Anna University of Technology Coimbatore. K.N.Vijeyakumar, ECE, Anna University of Technology Coimbatore.

AbstractWe present an implementation of a reconfigurable 8tap finite impulse response (FIR) filter. In order to achieve better area reduction we use modified Baugh-Wooley multiplier for partial product generation. In addition we truncate the least significant bits of product for reducing hardware count of adders and and gates used in least significant bit generation.Threshold monitoring circuit(TMC) is used to off the multiplier for minimal input bits thereby reducing dynamic power dissipation. The proposed reconfigurable FIR filter is designed using VHDL, a hardware description language and simulated using Altera Quartus II. Experimental analysis reveals that the proposed FIR architecture gives efficient trade-off between power savings and filter performance. The power savings is 31.98% compared to the Souvenir
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Anna University of Technology Madurai-IET12 standard truncated multiplier with minor performance degradation and hardware reduction is 47% compared to the full width modified Baugh-Wooley multiplier with minimum mean square error.

DESIGN OF HIGH PERFORMANCE FFT/IFFT PROCESSOR FOR OFDM APPLICATION

R.Rajeshwari, M.E VLSI Design, PSNACET, Dindigul.

AbstractWireless Technology are efficiently growth in now a day hence there are advance in 3G and 4G.The transmission and receiving are need synchronizing further in the orthogonal frequency division multiplexing (OFDM). The FFT/IFFT are follow to produce a efficient implementation for pipeline architecture. To achieve the low power have eliminate the ROM. Bit parallel multiplier and reconfigurable complex multiplier to achieve the ROM-less Device. The consuming lower power than the existing works. The proposed processor not only supports the operation of FFT/IFFT in 128 points and 64 points but can also provide different throughput rates for 14 simultaneous data sequences to meet IEEE 802.11n requirements. Furthermore, less hardware complexity is needed in our design compared with traditional approach. At the operation clock rate of 40 MHz, our proposed processor can calculate 128point FFT with four independent data sequences within 3.2 s meeting IEEE 802.11n standard requirements.

PERFORMANCE ANALYSIS OF DIFFERENT FLAGGED BINARY ADDER ARCHITECTURES FOR BCD ADDITION
Dinesh Babu A, PG Scholar, ECE, Anna University of Technology Coimbatore.

Abstract - Multi-operand addition is a part of many complex arithmetic algorithms, such as multiplication, certain DSP algorithms and several image processing algorithms. Various adder architectures have been proposed to accomplish the addition of more than two operands, consuming minimum power with less delay. One of the popular multi-operand adders is the carry-save adder (CSA) capable of adding more than two operands at a time. Since adders are often responsible for setting the minimum clock cycle time in a processor, they can be critical to any improvements seen at the VLSI level. In order to resolve this problem, a new technique called flagged binary addition has been proposed to perform increment and decrement operations by generating flag bits. In this approach by introducing the flexibility of adding three-input operands to a regular adder, eliminates the need of a special adder to do the same. Souvenir
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Anna University of Technology Madurai-IET12 Using prefix computations, offers the flexibility of having more than one implementation for intermediate structures within the adder. In order to increment or decrement sum of two numbers, A and B by unity, parallel prefix adders can be easily modified to generate a new set of intermediate outputs called flag bits, making them Flagged Prefix Adders(FPA). These bits are used to invert selected bits from the sum, A+B to generate the new result, A+B+1 or A-B-1. In addition to prefix adders, hardware can be incorporated within the carry-skip and carryselect adders to accomplish the same leading to Flagged Binary Adders (FBA). The advantage of using the proposed technique is that it introduces extra functionality to a regular adder, making it more flexible and convenient to use in applications such as image processing, DSP operations etc. A comparison has also been made between FBA designs and carry-save adders used as the benchmark for 16, 32 and 64-bit operands since the latter is conventionally used for multi-operand addition. The proposed Flagged Binary Adders (FBA) was designed and simulated using Altera Quartus II. This work evaluates the performance of the proposed designs in terms of delay, area, power. The result analysis shows that the proposed flagged binary adder architecture is better than the conventional multi-operand adders.

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