LIST OF EXPERIMENTS

SI.no.
1 2 3 4

Experiment name
Design of Inverting, Non-Inverting and Differential amplifiers Integrator and Differentiator Design of an Instrumentation amplifier Design and Construction of Astable, Mono stable Multivibrators using Op-Amp Characteristics of PLL and its use as Frequency Multiplier Design and Construction of Astable , Mono stable Multivibrators using NE555 timer

Page no.
1

5 6

7 8 9

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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DESIGN OF INVERTING, NON-INVERTING AND DIFFERENTIAL AMPLIFIERS

AIM: To design and construct a non inverting, inverting amplifier, comparator and adder circuit using op-amp and obtain their output. APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. DESIGN: Inverting amplifier: A = -Rf/R1 Take A = 1 Rf = R1 Choose Rf = 10k, R1=10k Non inverting amplifier: A = 1+ Rf/R1 Take A = 2 Rf = R1 Choose Rf = 10k, R1=10k Adder: Inverting Adder: Vo= -(Rf/R1)V1-(Rf/R2)V2-(Rf/R3)V3 Take A = 1 Rf = R1 Choose Rf = 10k, R1=10k Non-Inverting Adder: Vo= (1+ Rf/R1)V1 +(1+ Rf/R2)V2+(1+ Rf/R3)V3 Take A = 2 Rf = R1 Choose Rf = 10k, R1=10k Comparator: Vo= +Vsat if V2>V1
LINEAR INTEGRATED CIRCUITS LAB MANUAL Page 2

Apparatus Resistor Op-amp Dual RPS AFO CRO Bread board Connecting wires

Range 10k IC741 (0-30)v -

Quantity 5 1 1 2 1 1

Vo= -Vsat if V1>V2 PROCEDURE: Inverting and Non-inverting amplifier: 1. Connections are made as per the circuit diagram. 2. Apply the input voltage using AFO or RPS. 3. The output is noted and plot the graph. 4. Then calculate the gain value. Adder: 1. Connections are made as per the circuit diagram. 2. Apply the input voltage v1, v2, v3using RPS, the output is noted. 3. This is repeated for different values of v1, v2, v3. 4. The results are tabulated. Comparator: 1. Connections are made as per the circuit diagram. 2. Apply the two periodic signal using AFO. 3. Note the output square wave form and plot the graph.

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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CIRCUIT DIAGRAM

INVERTING AMPLIFIER

NON INVERTING AMPLIFIER

R2 1k R1 1k
3 V2 O S U S 1 6 5

R4 1k R3
1 T 2 V2 4 O S U S 1 6 5 1 T 2

U1
+ 7

O O

1k
3

U2
+ 7

O O

V+

AFO
0

ADDER
R 3 2 k k R 4 3 2 1 4 u 1 + 7 A Vk O S 1 U 1 1 1

COMPARATOR

V1 V2
1 R

k R

5 k 6 k

V+

Vin
1

U + u -

V+

uA 741

CRO

AFO

uA 741

CRO

5 2

V3

6 7O 4 U 1 T 5 O S 2 V +

V0 Vref

R 1

A 4

6 7O 4 U 1 T 1 O S 1 V -

V0

RESULT: Thus the non-inverting, inverting, adder and comparator circuits are designed and constructed using op-amp and their outputs are obtained.

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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2. INTEGRATOR AND DIFFERENTIATOR AIM: To construct and test the integrator and differentiator circuit. Draw the waveforms APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. 8. DESIGN: Integrator: Vo= -(1/R1*Cf) *Vin dt Differentiator: Vo= -R1Cf * dv/dt PROCEDURE: Integrator: 1. Connections are made as per the circuit diagram. 2. Apply the square or sine input signal at high frequency using AFO. 3. Note the corresponding output waveforms and plot the graph. Differentiator: 1. Connections are made as per the circuit diagram. 2. Apply the square or sine input signal at low frequency using AFO. 3. Note the corresponding output waveforms and plot the graph. Apparatus Resistor Capacitor Op-amp Dual RPS AFO CRO Bread board Connecting wires Range 10k,1k 470pF, . 1nF,1F IC741 (0-30)v Quantity 2,2 1 1,1 1 1 2 1 1 -

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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CIRCUIT DIAGRAM

INTEGRATOR

DIFFERENTIATOR
R 3 C 1 k 3 n

C 1

2 n

R 1 k

1 C 1 n

O 3 + U O 7 3 V+

U S

6 5

n 3

V-

V-

u1 A 2

7 -

1 O S 1 1 T 2

2 C

u4

A 2

7 -

1 O S U S 1 6 5 1 T 2

4 7 4 V+

O + U O

AFO

CRO

AFO

CRO

RESULT: Thus the integrator and differentiator circuits are constructed and tested. The wave forms are drawn.

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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3. MULTIVIBRATOR USING 555 TIMER AIM: To design and construct the astable and mono stable multivibrator using 555 timer. Draw the waveform. APPARATUS REQUIRED: S.No Apparatus Range Quantity

1.

Resistor

6.8k,10k 470

1,2 1 1,1 1 1 1 1 1 1 -

2.

Capacitor

470pF, . 1nF,1F NE555 (0-30)v -

3. 4. 5. 6. 7. 8. DESIGN:

Timer IC RPS AFO CRO Bread board Connecting wires

Astable multivibrator: For 50% duty cycle: Tc= 0.69(Ra+Rb)*C Td= 0.69Rb* C T = Tc+Td T = 0.69(Ra+2Rb)*C f = 1/T = 1.45/(Ra+2Rb)*C % Duty cycle D = Td/T*100 D = Ra/(Ra+2Rb)*C
LINEAR INTEGRATED CIRCUITS LAB MANUAL Page 7

Let Tc = Td = 0.05 msec Choose C = 10nf 0.05*10-3 = 0.69(Ra+Rb)*10n Therefore Ra+Rb = 7.215k Choose Ra=470 Rb=6.8k

Monostable Multivibrator: Tp = 1.1 RC For Tp = 0.1ms Choose C= 0.01F To Find R R =Tp/1.1C=10K

PROCEDURE: Astable multivibrator: 1. Connections are made as per the circuit diagram. 2. The output waveforms are viewed through CRO. 3. The voltage across the capacitor and that at the output terminal is measured and the waveforms are drawn. Monostable multivibrator: 1. Connections are made as per the circuit diagram. 2. A low frequency trigger pulse is applied. 3. The output waveforms are viewed through CRO. 4. The voltage across the capacitor and that at the output terminal is measured and the waveforms are drawn.

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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ASTABLE MULTIVIBRATOR:

R 1 1 k

8 7

4 3 o/p

R 2 1 k

6 2
C 1 1 n

555

5
C 2 1 n

MONOSTABLE MULTIVIBRATOR:

vcc

R2 1k

8 7

4 3

6
C3 I/P 1n R3 1k DIODE C1 1n D1

o/p

555 1 5
C2 1n

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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RESULT: Thus the astable and mono stable multivibrator using 555 timer are designed and the waveforms are drawn. 5. CHARACTERISTICS OF PLL AIM: To design a PLL circuit and determine the lock in range and capture range. APPARATUS REQUIRED: S.No Apparatus Range Quantity

1. 2. 3. 4. 5. 6. 7.

Resistor Capacitor PLL IC Dual RPS AFO Bread board Connecting wires

6.8k 1nF,1F IC565 15v -

1 2,1 1 1 1 1

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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PROCEDURE: 1. Connections are made as per the circuit diagram. 2. Measure the free running frequency of VCO at pin 4, with the input signal vin set equal to zero. Compare it with the calculated value = 0.25/RtCt. 3. Now apply the input signal of 1V square wave at a 1khz to pin 2. Connect one channel of the scope to pin 2 and display this signal on the scope. 4. Gradually increase the input frequency till the PLL is locked to the input frequency. This frequency f1 gives the lower end of the capture range. Go on increasing the input frequency, till PLL tracks the input signal, say, to a frequency f2. This frequency f2 gives the upper end of the lock range. If input frequency is increased further, the loop will get unlocked. 5. Now gradually decrease the input frequency till the PLL is again locked. This is the frequency f3, the upper end of the capture range. Keep on decreasing the input frequency until the loop is unlocked. This frequency f4 gives the lower end of the lock in range. 6. The lock range fL = (f2-f4). Compare it with the calculated value of 7.8f0/12. Also the capture range is fC = (f3-f1).Compare it with the calculated values of Capture range. Fc= [fl/ (2) (3.6) (103)*C] 1/2 PHASE LOCKED LOOP:

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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+VCC

R1 6.8k

C1 0.001uF

C2 1nF

10 INPUT 2

8 7

IC 565
1 9

4 5

OUTPUT

C3 0.01uF

-VCC

RESULT: Thus the characteristics of PLL are studied and the capture range& lock in range are determined.

6. FREQUENCY MULTIPIER USING PLL AIM: To construct a frequency multiplier circuit using PLL. APPARATUS REQUIRED: S.No Apparatus Range Quantity

1.

Resistor

2,10,4.7 k

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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2. 3. 4. 5. 6. 7. 8. 9. 10.

Potentiometer Capacitor 4-BitBinaryCounter PLL IC Transistor Dual RPS AFO Bread board Connecting wires

20k 1,10nF,1pF IC7490 IC565 2N2222 15v -

1 1,1,1 1 1 1 1

PROCEDURE: 1. Connections are made as per the circuit diagram. 2. Set the input signal at 1volt square wave at 500 Hz. 3. Vary the VCO frequency by adjusting the 20k potentiometer till the PLL is locked. Measure the output frequency. It should be 5 times the input frequency. 4. Repeat the steps 2, 3 for different input frequency.

FREQUENCY MULTIPLIER USING PLL:

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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+VCC

R 1 2 0 k C

C 2 1 n F u F

0 . 0 0 1

10 INPUT 2

8 7 OUTPUT +VCC
5 11 2 3 6 7 1 10 1
R 2 1 k Q 2 1 2 2 R 3 1 k

IC 565
1 9

2 N

2 A

C 3 0 . 0 1

u F

-VCC

RESULT: Thus the frequency multiplier is constructed using PLL and checked for various frequencies

LINEAR INTEGRATED CIRCUITS LAB MANUAL

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