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1. (5 points) Processor and Instruction Cycle (a) In general terms, what are the four distinct actions that a machine instruction can specify? A machine instruction can specify the following four distinct actions 1- Processor-memory: Such instructions involve data transfer between processor and memory. 2- Processor-I/O: Instructions may involve data transfer between Processor and I/O modules. 3- Data processing: Instructions involving arithmetic and logical operations on data. 4- Control: An instruction may specify that the sequence of execution be altered. For example, in a program any instruction may alter the memory address of the next instruction. (b) The MOS Technologies 6502 is an 8-bit microprocessor introduced in 1975 and it was a primary player during the home computer revolution of the 1980s. Consider the instruction set of the 6502 microprocessor. From the available instructions, give three examples for each of the actions in (a) as far as present in the 6502 instruction set. Also give the addressing mode used in your example (e.g. absolute, implied, indirect). Give two examples for instructions that belong to two differerent types of actions at the same time. Memory-Processor Instructions: LDA LDX STA --- LDA stands for Load Accumulator (immediate or Absolute) --- LDX stands for LoaD X(immediate or Absolute) --- STA stands for STore Accumulator(Absolute)

Data Processing Instructions:

Verndert mitADC DEMOVERSION von CAD-KAS PDF-Editor (http://www.cadkas.de). der --- ADC stands for ADd with Carry(Immediate, Absolute, Indirect)
INX --- INX stands for INcrement Register X(Implied) SBC --- SBC stands for SuBtract with Carry(Immediate, Absolute, Indirect) Control Instructions: JMP --- JMP stands for JuMP (Indirect, Absolute) JSR --- JSR stands for Jump SubRoutine(Absolute) RTI --- RTI stands for ReTurn from Interrupt(Implied)

ADC $10 (Memory-Processor and Data Processing) AND $00 (Data Processing and Memory-Processor) (c) The 6502 microprocessor does not have any instructions from one of the types of actions in (a). However, in order for the 6502 to perform operations on I/O devices, some mechanism is still required. Research how this is accomplished by the 6502, in contrast to using dedicated I/O machine instructions. What role can the operating system play for applications that wish to access I/O devices with respect to these alternatives of how to exchange data between the processor and I/O devices on the instruction set level? The 6502 has 16-bit wide Address bus and 8-bit data bus. All the peripherals connected to the 6502 acquire a unique address for their control registers (Memory mapped I/O: reserved by 6502) and address space from the address bus. The 6502 can then communicate the mode of operation of the peripheral device by configuring its control registers and then calling a certain address in its address space of the I/O module for a certain operation such as a read/write on/from a location in the I/O device. An operating system can act as a hardware abstraction layer. It can relieve the running applications of time consuming tasks such as reading/writing and copying bulks of data to and from I/O devices. It can also help in assignment of reserved addresses to control registers of any I/O device.

Verndert mit der DEMOVERSION von CAD-KAS PDF-Editor (http://www.cadkas.de).

Verndert mit der DEMOVERSION von CAD-KAS PDF-Editor (http://www.cadkas.de).

(d) Which registers are used by the processor to exchange data with main memory and I/O devices? Explain briey how these registers are used. Registers X and Y. Used as counters and storing offset of memory. When connected directly to data bus, it can directly read/write data with memory or I/O devices. Another register is Stack Pointer which stores address of the memory location used as stack e.g. before an interrupt. Another register is Program Counter which holds the address of the next instruction in memory. (http://webspace.webring.com/people/sp/profdredd/cprogram/6502_ml.html http://www.6502.buss.hk/6502-architecture/registerprogram-counter)

http://www.6502.buss.hk/6502-architecture/registerindex

Q2: Interrupts and DMA (a) What is an interrupt and how are interrupts accommodated in the instruction cycle? It is a event that interrupts normal CPU fetch,decode,execute cycle. After every execution of instruction, the availability of an interrupt is checked. (b) Describe two approaches how multiple interrupts are dealt with. Verndert mitThe approaches include Sequential and Nested interrupts. (http://www.cadkas.de). interrupt is being der DEMOVERSION von CAD-KAS PDF-Editor In the former case, when any responded to, other interrupts are disabled until the current interrupt routine ends. In Nested approach, every interrupt is given a priority order. While any interrupt routine is in progress, If any other interrupt arrives, it would wait if its priority order is less than the current interrupt, or else if its priority order is more, then the status of the current interrupt routine is saved in stack, and it(the new interrupt) is served first. (c) In virtually all systems that include DMA modules, DMA access to main memory is given higher priority than processor access to main memory. Explain why! If processor interrupts DMA, it would further slow down a slow I/O operation which would result into an inefficient working of the operating system. Further the data copy from the I/O to memory if interrupted, might result in data loss because data is copied in a stream. (d) A DMA module is transferring characters to main memory from an external device transmitting at 9600 bits per second (bps). The processor can fetch instructions at the rate of 1 million instructions per second. By how much will the processor be slowed down due to the DMA activity? Ignore data read/write operations and assume the processor only fetches instructions. Assuming one instruction and one character has 1Byte. Then speed of external device=9600/12=1200 characters/second. Time for transmitting one character(one instruction)=1/1200=8.333x10^-4 second. Time for processor to fetch one instruction=1/10^6 = 1 microsecond. Processor would be slowed down by 1/833 x 100 = .12 %

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Verndert mit der DEMOVERSION von CAD-KAS PDF-Editor (http://www.cadkas.de).

(e) During DMA, the bus is granted to the DMA module, which performs the transfer of data between some I/O device and main memory. Assume that a cache between the CPU and main memory is also present. What problems may possibly occur during a DMA transfer (in both directions) in the presence of a cache? How can these problems be solved? You may research the Web for information! If a DMA writing(to main memory) is in progress, then the data in the cache may get obsolete and if the processor uses this value, the results of the calculation would be wrong. If a DMA read(from main memory) is in progress, the data in the main memory will get obsolete and the I/O device would get a non updated value. These are called the cache coherency problems. There are two methods to solve these problems. Either we can use cache coherent systems or this job can be assigned to the operating system. In the former, the cache controller is signaled(in hardware) to invalidate the cache if it is a DMA write, or update the main memory if it is a DMA read. In the latter, the operating system ensures that the cache must be flushed before a DMA read from the memory occurs and vice versa.

http://en.wikipedia.org/wiki/Direct_memory_access

3. (2 points) Operating System Architecture (a) Modern operating systems are one of the most complex pieces of software for computer systems. Name two approaches for managing the complexity of operating systems.

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1) Modular software development (helps diagnose and debugging) 2) Well-Defined interfaces in softwares (helps evolution of software)

(b) Operating systems can be classified according to having a microkernel or monolithic kernel design. Further, some operating systems employ the technique of loadable kernel modules. Associate the following operating systems with whether they use a microkernel or monolithic kernel design, and whether they support loadable modules. Justify your answers. - AmigaOS (mickrokernal) - FreeBSD 6.2 (monolithic) - Linux 2.6 (monolithic, has loadable kernel modules) - Mach 3 (mickrokernal, has loadable kernel modules) - MINIX 3 (mickrokernal) - Sun Solaris 10 (monolithic) - Windows XP (Hybrid)

In FreeBSD 6.2, linux and Sun Solaris 10 OS, whole of the operating system is loaded in the kernel space. Whereas in AmigaOS, Mach 3 and MINIX 3, the kernel space contains only the necessary mechanisms of the operating system. http://en.wikipedia.org
4. (8 points) Processes and Threads (a) Name the fields of the Process Control Block (PCB) and describe their purpose. Process ID: Contains the unique identifying value of the process. State: keeps track of the process state i.e ready, blocked, suspended or running.

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Verndert mit der DEMOVERSION von CAD-KAS PDF-Editor (http://www.cadkas.de).

Priority: Discriminates the process from other processes in terms of importance. Program Counter: Holds the address of the next instruction for the process Memory Pointers: record of all process associated data pointers Context Data: information about CPU registers being used by the process I/O Status Information: Status of the I/O devices and I/O files associated with the process. Accounting Information: Includes a record times eg. processor time, clock time used, time limits, account numbers etc (b) Describe the roles of the six state process suspension model from the lecture. The states used are: new, ready, running, exit, suspend, and blocked. What is the bene_t of having states other than running and blocked? The role of the six states model is to increase processor efficiency by appropriately distributing its resources among the processes. The processes in the ready queue wait for the processor to be assigned to them. If a running process requests an I/O operation, the process is shifted to the blocked queue while the I/O request is fulfilled. This allows other processes from ready queue to be processed in the mean time. If too much main memory is being consumed by the blocked, ready and running processes, then some blocked processes are shifted to hard disk in the suspended queue for freeing the memory. This is called swapping. It controls the degree of multiprogramming in an operating system. Suspended processes can help keep the processor busy if all processes in the ready queue are I/O intensive otherwise the processor will sit idle while I/O requests are being processed. Suspension of processes also makes the processor more responsive to new process requests. (c) What is the main optimization goal for a dispatcher? Which approaches do you know to achieve this? What is the tradeoff? Dispatchers optimization goal is to reduce time taken for making the decision about which process to Verndert mitexecute next. der DEMOVERSION von CAD-KAS PDF-Editor (http://www.cadkas.de). Approaches used by the dispatcher for optimization are: Distinguish between events and maintaining of ready, blocked and suspended process queues accordingly. Reduce queue traversal cost computation time.

(d) Briefly explain the difference between processes and threads. Why do most systems use a combination of the two concepts?

A process is a program in execution. It requires independent resources from the kernel. A thread however is part of a process. A process may generate any number of threads which share the processs share of resources for execution. They share its address space, I/O handles, stack etc. Often processes require multiple tasks to be executed at the same time or at least give this impression. For example in two player video games, the main process can divide itself into two threads to respond to the inputs of players. Similarly, a word processor may require different threads for receiving user input, spellchecking and suggesting phrases.

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