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FACULTY OF ENGINEERING

ASSIGNMENT REPORT COVER PAGE

EEN1016 Electronic I
(TRIMESTER 1 SESSION 2012/2013)
[Student Name] [Student ID] (Contribution) Degree Major (EE / LE / CE / TE / ME / OPE / MCE / NANO) EE Q1 (2%) Q2 (2%) Q3 (2%) Q4 (2%) Efforts (2%) Total (10%)

[e.g. S. Name ABC ] [S. ID 12345678] (e.g. 25%, contributed to ..)

[e.g. S. Name ABC ] [S. ID 12345678] (e.g. 25%, contributed to .)

TE

[e.g. S. Name ABC ] [S. ID 12345678] (e.g. 25%, contributed to ..)

ME

[e.g. S. Name ABC ] [S. ID 12345678] (e.g. 25%, contributed to ..)

OPE

Declaration of originality: I declare that all sentences, results and data mentioned in this report are from our own work. All work derived from other authors have been listed in the references. I understand that failure to do this is considered plagiarism and will be severely penalized. Student1 signature: ........

ASSIGNMENT EEN1016 (ELECTRONICS I) Student3 signature: Student4 signature: ASSIGNMENT TITLE: SIMULATIONS OF ELECTRONIC CIRCUITS
Date Submitted: CD Submitted: 1/5

Student2 signature:

OBJECTIVE To introduce the use of software simulation tool (Multisim) to verify and analyze electronic circuits. DESCRIPTION This assignment contains four questions on diode and transistor circuits. Students will learn about circuit analysis and simulation. This assignment intends to provide opportunity for students to learn the basic skills in circuit design, simulation and analysis, thus the building up of the skills is highly dependent on students efforts. Guidelines are given along with the assignment questions. Students are advised to understand the way of design, the chosen conditions/considerations, the way of analysis, the information gained from the analysis, etc. RULES AND REGULATIONS Assignment work must be tidy and clear and presented in the order of question/sub-question order. All design procedures must be typewritten. All simulated schematic diagrams and simulated graphs/waveforms must be printed. If simulated graphs/waveforms have the same xaxis, all of them must be plotted on the same x-y plane. All simulated graphs or waveforms must be labeled clearly. Four students to form a group to complete the assignment tasks, and each group member is expected to submit an individual report in hardcopy indicating all group members names, student IDs, degree majoring, and each contribution towards the completion of the assignment tasks, as well as the assignment report (see above for the assignment cover page). The assignment report must be typewritten. This is a group assignment (Four students in one group). You are free to choose your own group members. The assignment report in hardcopy can be identical among members in the same group. However, the report should not be duplicated for different assignment groups. Besides the individual assignment report in hardcopy, each group is expected to submit a CD (labeled with group members names, IDs and degree majoring) containing the softcopy of the report and the simulation files from all 4 group members. The CD will be processed by lecturers for plagiarism check using softwares such as http://www.scanmyessay.com/features.php and/or Turn-It-In in order to prevent report duplication for different assignment groups. Your report will not be graded if you do not submit the CD softcopy. These plagiarism software can be used to detect the similarity between different assignment reports. Therefore, please do not allow your report to be copied by other assignment group as the software would not be able to differentiate the original one and the copied version. In the case plagiarism is found in the reports from different assignment groups, your assignment marks (10%) will be forfeited. In the case of similar work and original work cannot be identified, mark will be forfeited for both assignment reports. The due date for the assignment report submission is in week-8 of the Trimester I, which is on 2nd Aug 12, before 5pm. Late submission is strictly not allowed! Please use the given report cover-page template (first page of this assignment document). Please submit the typewritten 2/5

hardcopy report and CD to Dr. Chan Kah Yoong (Office:BR4056). Submission signature is required in the submission list. Please do not drop in your report to lecturers pigeonhole! Use the free Multisim spice simulator. The free Multisim spice simulator can be downloaded here: http://www.analog.com/en/design-tools/dt-multisim-spice-program-download/designcenter/index.html or https://lumen.ni.com/nicif/us/evalmultisimadi/content.xhtml Multisim is an easy to use spice simulator and the free version comes with spice model from Analog Devices and the basic components. There are many tutorials on how to use Multisim on the Internet, here are some simple ones http://www.g9toengineering.com/thewellroundedengineer/MultiSimtutorial%201.pdf http://www.g9toengineering.com/thewellroundedengineer/MultiSimtutorial2.pdf ACKNOWLEDGEMENT Acknowledgement is given to National Instrument for the Multisim simulator download. Matters concerning assignment can be referred to Dr. Chan Kah Yoong and Mr. Lam Zi Yi.

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Question 1 (Rectifier) Analyze the rectifier, and sketch the output voltage of the rectifier (VRL) for the indicated input voltage of 60 Hz, as shown in Fig. 1 below. The 1N4001 is specific rectifier diode.

Fig. 1 Diode rectifier

Perform the simulation on the diode rectifier circuit given in Fig. 1 and simulate VRL and compare your simulation result for the VRL with the estimated sketch result above. Repeat the analysis and simulation on the diode rectifier circuit given in Fig. 1, given the peak input is 10 V.

QUESTION 2 (Voltage Regulator) Determine the IZ, IC, IL, and VRL, for the regulator circuit as shown in Fig. 2 below.
R S=200ohm + 22V Is= 90.151mA Iz Ic + 3.187 V (Zener diode)(1N5226B) NPN (2N3904) R L=100 ohm

IL

+ V BE

Fig. 2 Voltage regulator. Perform the simulation on the circuit given in Fig. 2 above for the IZ, IC, IL, and VRL, Compare the simulated values with the calculated values for these parameters.

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QUESTION 3 (Voltage Limiter) Fig. 3 below shows a circuit combining a positive limiter with a negative limiter. Analyze the circuit and determine the output voltage waveform. The diodes are of 1N914.

Fig. 3 Voltage Limiter. Perform simulation on Fig. 3, and compare your simulated output waveform with the analyzed output waveform above. Repeat the analysis and simulation on the voltage limiter circuit given in Fig. 3, given the peak input is 15 V.

QUESTION 4 (Transistor Amplifier) Determine the signal voltage at the base of the transistor in Fig. 4 below with a 10 mV rms, 300 ohm, 60 Hz signal source. Given IE = 3.80 mA.

Fig. 4 Transistor Amplifier.

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