Transistor transistor language secret signification synchronization sign into discrete event simulation environment dynamism Author: Said

Mchaalia draft copy in September 08th 2012 1. Abstract electronic background was with the three noble prize winners in 1956, the innovative invention into the world of compile-compute-conclude motor flow dynamics environment mechanism. After this intentional legend of basic logic influence systems on compile-compute-conclude motor flow dynamics environment mechanism, the discrete event simulation environment dynamism did speed up aim object to reach the fast toggle frequency changes and smart design as desirable measurable wishes and destinations. Keywords: electronic background, compile-compute-conclude motor flow dynamics environment mechanism, discrete event simulation and desirable measurable wishes and destinations. 2. Introduction transistor inventors were the best invention all time to drive drain to reach brain powerfulness of compilecompute-conclude motor flow dynamics environment mechanism. In figure 001, the basic sufficient suitable transistor number selfish set to drive drain to reach brain compilecompute powerfulness is the binary 00110b in the original main byte array coordination references. Intel and consume sub-micron electronics fabrication environment dynamics organizations work hard to achieve sufficient suitable desirable significant wishes, which are lower and fastest master flip-flop frequency to drive slave circuits. In fact, in 1948 Claude Shannon [9] did invent mathematical theory of database information based on stochastic learning and error correction to receive desirable measurable database spite of those developed in [1]. On the other hand, in 1879 and later Hertz and co did discover and invent the motor flow of send-receive proceeding processing. Thus, the secret significant synchronization symbols were the antenna and digit sensor inventions [3]. However, Lempel and Ziv in 1977 and 1978 did bring into digital world the sequential digital data encoding and compression techniques [4]. Those work could be easy transferred to map<char, x> data compression encoding based on C++-language and other similarly programming languages. This map<char, x> data compression encoding could be introduced in many data file format such that *.mp4 and so on (SusiCompress.exe reference). Therefore, dictionary basics is to encode digital data in byte matrix sizes. This was the first fatal fundamental following flows for any digital data encoding and proceeding processing analysis aspects.

Figure 001: basic sufficient suitable transistor number selfish set to drive drain to reach brain compile-compute powerfulness

Figure 001 illustrates basic sufficient suitable transistor number selfish set to drive drain to reach brain compilecompute powerfulness. This binary 00110b the sophistical suitable significant synchronization secret sign. Furthermore, the dynamics environment mechanism is the ratios calculation and treatments inside any modelingsimulation proceeding processing. Ratio definition is ratio of a number b to a number c. Indeed, the ratio
6 3 = 8 4

is the most around meaningful ratio of modeling and simulation result effect to reach
6 3 = ratio and the involving transistor picture model 8 4

their desirable measurable event occurrence values. In fact, Said Mchaalia current works is to use this shown in figure 001 to reach more most around mathematical modeling and simulation effect results. Therefore,

the envelop-latch defined in figure 002 should contain and evolve the transistor transistor programming language to involve event environment dynamism.

Figure 002: principles of discrete compute-compile-conclude processing analysis

In fact, figure 002 depicts two basic template latches inside flip-flop toggle frequency changes. Therefore, template latch is leaflike locking mechanism dynamics, which it has to be opened from the outside by a keymotor flow, such that the following flows of electrical current inside circuits, which are represented in figure 003.

Figure 003: push-pull dynamics mechanism involving sequential template latch leaflike locking mechanism dynamics

Indeed, figure 003 depicts two basic template interruption latches inside any flip-flop toggle frequency mechanism environments. Hence, the following flows of electric current inside any electric electronic circuit envelops the brain power of all possible instruction language selfish sets. Therefore, template latch is leaflike locking mechanism dynamics, which it has to be opened from the outside by a keymotor flow, such that the following flows of electrical current inside circuits, which are represented in figure 003. In fact, grounded to research aspect effects, the manipulation and implementation of such a leaflike locking mechanism dynamics are original main primordial principal desires of Intel consume electronics and the inventors of push-pull control data flow graphs such that Petri nets and Taylor theoretical industrial data chart coastlines and outline maps for specific thread-tasks. However, Said Mchaalia [8], did ground the discrete event simulation and parallel jobs to the counting dynamics environment mechanism. Indeed, maths is science of invisible philosophy processing analysis within any digital

data encoding [9], [2], and [1]. This science is belong to compile-compute-conclude effect aspects of following motor flows. Measurement calculation steps are impure and addictive when their boundary conditions are limitless or although pure and noble when those boundary conditions would be awoken within modeling and simulation tasks and threads. The strength of model descriptions in order to provoke right simulation processes and to bring into innovative world of development environment is the aim object of each entity activity inside interest active system. Indeed, in digital data transmission, mathematical functionalism is characterized by following description functions and fear flows in modulation fields. Therefore, aware away of the identification of those function is subject of many workers within innovation system development environments. In fact, the sinusoidal function, which has periodic characteristics during simulation time, is the awoken waveform of data edge representation inside measurement calculation within system development environment. Therefore, within system development environment of digital data transmission such that text files and emails inter-exchanges, data edge representations are electrical currents aware away of electromagnetic waves. To determine, the values of those data edge representations, the resolution of Maxwell-Ampere equation is interest away such that resolve: B(t). ds= function(Volume i (t). dv) , where dv and ds are measurement quantities for both volume and surface (two dimension measurement coordination viewpoints) during discrete simulation time intervals. Because, any electric cable has length and surface section, which is circle with a 2 diameter ] .Similarly in fact, the number of months inside a year is always twelve surface of Surface= pi [ 2 months. This number of twelve months is data edge representation inside measurement account of year enumerations. Indeed, the main synchronization secret of data edge representation is value change dump during following motor flows through measurement calculation nodes, whereby discrete event simulation time have to be onwards and forwards proceeded steps with test-bench characteristics. These test-benches faithful for digital data transmission modeling and simulation. In fact, light color development is a crazy and lazy aim object of many searchers within discrete event simulation basics, such that Microsoft command line color invention, whereby the command help color from the black screen DOS environment dynamism, determines the principle requirement for light color choices. Indeed, based on this idea, event states inside discrete event simulation could be model within a selfish set of light color development. Although light color development is interest task in this discrete event simulation disciplines. The frequency variation level inside electrical {(inductor-capacitor-resistor)} circuit, allow any light color development [6] and [5]. Thus, Lempel and Ziv did develop all requirements for sequential data encoding and compression techniques [2]. Though, with the advancements in digital design, like those developments within ASTRA digital satellites and co, the mathematical information theory of digital data should be then measurable based on logic influence systems such that the antenna transmission-reception-absorption measurable event values, herewith, it is the just language of frequency, which is defined in table 001, whereby this frequency identification depicts any fuzzy proceeding processing analysis within any following functionalism fabrication flow. The just language usage of such a (sin ( x)) 2 function consists to flow the origin of coordination system (the intersection of x-axis and yaxis, which are two perpendicular straight lines) during any proceeding processing through x-axis. The values engendered by this (sin ( x)) 2 function are nulls (zeros) for the boundary values and maximum for the middle average of considered segment [a, b] such that [a ,b] , thus sin 2 (a )=0a=0 and hence sin 2 (b)=0b= pi / pi=3.14 . Although Furthermore,
(sin ( a+b a+b pi )) =1 = 2 2 2
2

. Therefore, the (sin ( x))2

function owes magnitude level variation inside proceeding processing analysis within any stochastic systems.
[sin x] is a boundary following description function of any modulation and correlation threadx [sin x] task inside any central metric digital data parallel scheduling job op-codes. Thus and (sin ( x))2 x

function have the most around measurement ability to depict any current data edge flow inside control data flow graphs. Figure 1 shows a control data flow graph whereby current data edge {(time_event, value_event)} could be basically mathematically modeled by (sin ( x))2 function such that x= x(t)/t =time event and

value event=(sin ( x))

or

value even=

[sin x] . Indeed, sequential digital data encoding could then deduced based x

on the correlation and modulation dynamics mechanisms inside any digital design description disciplines. In fact, in the proposal work of Said Mchaalia the elementary digital selfish encoding set is the following set {(0000b, 0001b, 0010b, 0011b)}time, which is depicts the fourth of digital data encoding nucleus selfish set, whereby t=timeevent nil =null= zero=0 for starting interruption process to be ready for functionalism within involving thread-task environment mechanism dynamics allowing maximum magnitude level destination.

Figure 004: basic push-pull involvement development dynamics environment mechanism of digital data encoding

Figure 004 depicts basic push-pull involvement development dynamics environment mechanism of digital data encoding, whereby the transistor is assumed to be an electrical current generator for any instantaneous event occurrence value. Furthermore, the transition inside transition programming language is to amply the electrical current of transistor base. Therefore transistor command language is based on the electrical magnitude level variations. By this the proposal transistor command control circuit could be then the electronic circuit defined in figure 005.

Figure 005: basic push-pull involvement development dynamics environment mechanism during inductor-capacitor filer op-codes

Figure 005 depicts the realization of frequency variation inside a circuit to filter the signal output. The inductor L receive signal input edge characterizes current flows in Amperes. These current flows sustain or incur some basic logic influences. These current flows incur phase shifting and magnitude modification. Then they maintain their following flows within the circuit. Some of them will traverse the resistor and others will contribute for capacitor charge. The output node is resistor-capacitor filter characterizing the 3dB lossy magnitude for cutoff frequency. In fact, to measure this cutoff frequency within the 3dB lossy magnitude, the following mathematical
V out ) should be onward proceeded. V The output voltage waveform is illustrated by 1ea.RC.t . Although, the input voltage waveform is depicted V by: sin (2.p.f.t ) . 3dB lossy magnitude from the maximum gain, Gain dB=20.Log10 ( out ) , allow then short V

functional operation

Gain dB=20.Log10 (

time interval measurement dt, which is characterizing cutoff frequency;

1 in Hz. dt

In fact, frequency oscillation realizations is the aim object of digital data transmission branch fields. The simple way to achieve this is the usage of circuit included in figure 005. Incurring onwards send-receive those frequency is the subject aim of digital data transmission such this involved within digital satellites processing analysis. The main original theme of this incurring onwards is the data encoding decoding processing analysis. Hence, Shannon did propose an idea of data encoding based on the bit-word-length calculations thus the minimum amount of bits to be used to encode a character a for example found in an alphabet set of N characters. This number is thus calculated 2 x = N +1 . To search x, just introduce the logarithm function as follows: x x 2 = N +1 log 2( 2 )=log 2 ( N +1) . Therefore, this x number could be determine as follows; x=log2 ( N +1 ) . Indeed, the logarithm conversion between bases is:
log a ( y)= ln ( y) . Thus, ln (a ) x=log2 ( N +1)= ln ( N +1) , ln( 2)

where ln(.) is the natural logarithm function. As example, where the ASCII code (255 characters) were encoded, the amount of bits was eight bits. To encode one character from the 255 character alphabet set, a sequence of eight bits is required for example 10011010b. To send this character, the above techniques such the charging and discharging of the capacitor of figure 11 eight times or more would be involved. In fact, the 1b represents the highest magnitude amount, however the 0b represents the nil environment of the magnitude amount. An other methodology is to convert such a binary sequence to integer value and to use the potentiometer command and controlling for digital-analog converting. Figure 006 represents such a processing analysis.

[sin(.)] .[exp(.)] wave-form modeling simlation processing

magnitude

time

Figure 006: basic digital encoding waveform based on push-pull involvement development dynamics environment mechanism

Figure 006 illustrates the basic digital encoding waveform based on push-pull involvement development dynamics environment mechanism. 3. Transistor transistor programmable language inside proceeding processing: The transistor transistor programmable language which drive drain to reach the powerfulness brain of any hardware description language such that parallel VHDL simulation [3] or primitive weighted time scheduling of parallel jobs [7] , involves principally primordial {(push, pull)}index op-codes seeming to have been synchronized to cycle background latch leaflike locking flip flops. In fact, Figure 007 illustrates the basic transistor transistor programmable push-pull involvement development dynamics environment mechanism. Therefore the movable measurable centric metric bitwise opcodes are measurements of voltage level variations inside load nil (see color brown shown in figure 007) or load one (see color magenta shown in figure 007). Application of theoretical control data flow graph and Petri Nets [1], [4] and [10], are know how representation of methodology and enhancement to evaluate and schedule instantaneous discrete event simulation [6]. Although, in [10], Edwin Naroska and Said Mchaalia did invent an algorithm to minimize storage space and filling in database information hardware, whereby co-verification and co-design of any sequential digital data needs intentional requirements of transistor programmable push-pull involvement development dynamics environment mechanism. Therefore, as shown in figure 001, the original main sufficient suitable brain power algorithms of evaluation and scheduling instantaneous discrete event simulation are to find following functional mechanism of controlling switcher involvements inside circuits. Hence, in figure 001 four main switchers are away to be aware of receiving current data edge value level variations. Thus, these current data edge value level variations control the measurable sequential digital data.

Figure 007: basic transistor transistor programmable push-pull involvement development dynamics environment mechanism

In fact, following fundamental fatal functional flows define within any transistor hardware description, shown in Figure 007 , illustrates basic transistor transistor programmable push-pull involvement development dynamics environment mechanism. Therefore the movable measurable centric metric bitwise opcodes are measurements of voltage level variations inside load nil (see color brown shown in figure 007) or load one (see color magenta shown in figure 007). Hence, during fundamental fatal following functional fact flows of sequential digital data involvement inside figure 001 require just language, which is defined in figure 002, of logic bitwise opcodes at any instantaneous time event value, which will be then converted to iteration value inside co-software design of this just language of logic bitwise opcodes [10]. In fact, the main idea to drive the define circuit shown in figure 001, is to search the logic functional fact flows, whereby the principal logic AND, and logic OR should be then used to achieve desirable aim object functionalism. Furthermore, the primordial logic NOT could then be evolved during direct connection of the drain of Gate0 = {(push, pull)}(0)(n) to the source of Gate1 = {(push, pull)}(1)(i). Indeed, based on transistor programmable language depicting in figure 007, the normal transistor output is defined within load 0 functionalism. The rest of possible other logic operations such that logic XOR, logic NAND and so on could be easy defined during enlivenment development of envisaged circuits shown in figure 001 and figure 007. Even though, the generation of proceeding processing waveforms could be then measurable event occurrence values within any defined inside circuit output at instantaneous involvement time event values. Thus, to generate binary opcodes for obtained sequential digital data, modulation and correction involvements should be then introduced inside this proceeding processing. Therefore, the (sin ( x)) 2 function owes magnitude level variation

inside proceeding processing analysis within any stochastic systems. Furthermore, data parallel scheduling job op-codes. Thus
[sin x] and x
(sin ( x))
2

[sin x] is a boundary x

following description function of any modulation and correlation thread-task inside any central metric digital function have the most around measurement ability to depict any current data edge flow inside control data flow graphs. Figure 1 shows a control data flow graph whereby current data edge {(time_event, value_event)} could be basically mathematically modeled by (sin ( x)) 2 function such that x= x(t )/t =time event and value event=(sin ( x)) 2 or
value even =

[sin x] . Indeed, sequential digital data encoding could then deduced based on the correlation and x

modulation dynamics mechanisms inside any digital design description disciplines. These bitwise opcodes could then be defined in the following table abstract review. Gates Gate0 = {(push, pull)}
(n) (0)

Instantaneous tome value event occurrences t = n.T , where T is equal to

i frequency i j frequency j p frequency p q frequency q m frequency m

Description simple logic requirement to be achieved with following fuzzy dynamics mechanisms simple logic requirement to be achieved with following fuzzy dynamics mechanisms complex logic requirement to be achieved with following fuzzy dynamics mechanisms simple logic requirement to be achieved with following fuzzy dynamics mechanisms complex logic requirement to be achieved with following fuzzy dynamics mechanisms complex logic requirement to be achieved with following fuzzy dynamics mechanisms

1 frequency

Gate1 = {(push, pull)}(1)(i)

t=

Gate2 = {(push, pull)}(2)(j)

t=

Gate3 = {(push, pull)}

(p) (3)

t=

Gate4 = {(push, pull)}(4)(q)

t=

Gate5 = {(push, pull)}

(m) (5)

t=

Table 001: basic transistor gates programmable push-pull involvement development dynamics environment mechanism

Table 001 engenders basic transistor gates programmable push-pull involvement development dynamics environment mechanism, whereby Gate2 = {(push, pull)}(2)(j) is equal to logic NOT(Gate0 = {(push, pull)}(0)(n)). Furthermore, Gate5 = {(push, pull)}(5)(m) is equal to {logic NAND(Gate0 = {(push, pull)}(0)(n), Gate1 = {(push, pull)}(1)(i)), logic NAND(Gate2 = {(push, pull)}(2)(j), Gate3 = {(push, pull)}(3)(p)), logic NOT(Gate4 = {(push, pull)}(4) (q) )}. To achieve digital data encoding and compression based in circuit enlivenment development shown in figure 001, a main principal descriptive control data flow graph could then be evolved and integrated inside searching digital encoding environment dynamism mechanism as it was developed in [10]. Hence, figure 008 presents a general purpose design circuit for using transistor hardware description language to master and drive any sequential digital data encoding and compression techniques, modeling and simulation. Thereby, the {(transistor, index)}iteration is a compact representation of involvement transistor selfish set defined within figure 001 and figure 007.

Figure 008: basic selfish set grounded to transistor transistor programmable push-pull involvement development dynamics environment mechanism

Figure 008 illustrates basic selfish set grounded to transistor transistor programmable push-pull involvement development dynamics environment mechanism, whereby the primordial principally defined inside hardware design is the transistor whose secret significant synchronization sign is keymotor flows of all possible compilecompute-conclude aspects and analysis effect results. 4. Conclusion viewpoint overviews: System centric metric of parallel jobs scheduling as defined in [1], [3] and [6] could be easy converted to transistor transistor programmable language push-pull involvement mechanism environment dynamism, which was evolved with Said Mchaalia draft thesis works [8] and [10]. Furthermore, within this paper a fatal fundamental fast following fact flow of data compression techniques based on Lempel Ziv digital sequential encoding [2], was then implemented in map<char, x> C++-language declaration proceeding processing. This fatal fundamental fast following fact flow of data compression techniques is usable for all possible sequential digital data formats including movies, text files and all other file types. On the other hand, the bright idea evolved in this current work is the new proposal sequential digital data encoding based on sin2(frequency, time) modulation and correction following description functionalism. In order to achieve precious priciest sequential digital data encoding, deep investigation of this famous

sin2(frequency, time) modulation and correction following description functionalism could be then involved within next digital data encoding and compression methodologies and techniques.

5. Reference papers: [1] Uwe Schwiegelsohn, A system-centric metric for the evaluation of online job schedules, 2011, Journal of Scheduling, 14, 6, 571 -581 [2] Lempel and Ziv, sequential digital encoding and compression algorithms, IEEE, 1977-1978 [3] Edwin Naroska, Parallel VHDL simulation, Proceedings of the Design, Automation and Test in Europe Conference DATE'98, 159--163, 1998 [4] Uwe Schwiegelshohn and Lothar Thiele, Proceedings of the 19th International Conference on Application and Theory of Petri Nets, Workshop Hardware Design and Petri Nets (HWPN 98), 12--25, 1998 [5] Uwe Schwiegelshohn and Lothar Thiele, Periodic and Non-periodic Min-Max Equations, Proceedings of the 24th International Colloquium on Automata, Languages, and Programming (ICALP 97), 379--389, Springer, 1997 [6] Naroska and Uwe Schwiegelshohn, A New Scheduling Method for Parallel Discrete-Event Simulation, Proc. 2nd International Euro-Par Conference on Parallel Processing, 582--593, Springer-Verlag, 1996 [7] Uwe Schwiegelsohn, Preemptive Weighted Completion Time Scheduling of Parallel Jobs Proceedings of the 4th Annual European Symposium on Algorithms (ESA96), 39--51, Springer, 1996 [8] Said Mchaalia, Waveform compression draft copy, December 11th 2002, CEI, Dortmund University, Germany

[9] Claude Shannon, mathematical information theory, IEEE, 1948. [10] Edwin Naroska and Said Mchaalia, Free HDL Compiler Control Data Flow Graph and its application in Waveform compression draft copy, August 07th 2002, CEI, Dortmund University, Germany