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IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 34, NO. 2, MARCH/APRIL 1998

Unied Voltage Modulation Technique for Real-Time Three-Phase Power Conversion

Dae-Woong Chung, Student Member, IEEE, Joohn-Sheok Kim, Member, IEEE, and Seung-Ki Sul, Member, IEEE
Abstract In this paper, a new voltage modulation technique named unied pulsewidth modulation (PWM) is described for high-performance voltage generation in a three-phase voltage-fed inverter. By considering the operation of the inverter, a simple but useful concept named effective time can be established and, by fully employing this concept, a new voltage modulation technique is presented with a detailed explanation and actual test results. The results show that various carrier-based PWM schemes can be implemented with reduced computational burden and a seamless change from one modulation scheme to another is possible. Index Terms Carrier-based pulsewidth modulation, effective time, three-phase voltage-fed inverter.

I. INTRODUCTION

UE TO THE improvement of fast-switching power semiconductor devices and machine control algorithms, a growing interest is found in a more precise pulsewidth modulation (PWM) method. A large variety of methods for PWM exist, and a survey of these was recently given in [1]. There are some requirements for a PWM method. Among them, full utilization of the dc-bus voltage is extremely important to achieve the maximum output torque under all operating conditions for ac machine drive applications and to obtain the control voltage margin, even under increased source voltage for three-phase PWM rectier applications. Another important point is the minimization of the current ripple and/or the total losses of the power converter system and, needless to say, the whole modulation task should have the simplest form to be easily applied in actual applications. To address simultaneously the different requirements mentioned above, a synthetic modulation method should be established from the viewpoint of global inverter operation. Considering the voltage generation fashion of the voltagefed inverter that is comprised of six power devices in parallel with a freewheeling diode, it can be found that the output voltage of the inverter is determined by the different voltages between each inverter arm and the time duration in which the different voltage is maintained. Interest should be particularly focused on the time duration when the voltage difference is not zero, because an effective power ow is made during this

duration. In this paper, this time interval will be named the effective time. Actually, the idea for the effective time has already been introduced in the space voltage vector PWM (SVPWM) method [2]. In that paper, the applying time for a certain available voltage vector was evaluated on the basis of the average voltage concept. Practically, this PWM scheme is superior to other schemes from the viewpoint of dc-link voltage utilization and current harmonics. However, the implementation of this scheme is formidable when applied in the actual eld because the applying time is calculated by trigonometric function, and a recombination process for actual gating times should be performed [3]. Moreover, since this scheme was evaluated on the foundation of the switching states, the relationship among PWM schemes failed to be noticed. In this paper, a novel voltage modulation technique named unied voltage modulation is described. When the effective time concept is properly utilized, the voltage modulation task can be greatly simplied, since the inverter output voltage is directly synthesized by the effective time. In the proposed PWM method, the actual gating times for each inverter arm are immediately deduced, simply by using the effective time relocation algorithm. Furthermore, by employing the one degree of freedom that allows the effective time to be relocated anywhere within the sampling interval, various carrier-based PWM strategies can be easily implemented without hardware modication. Therefore, in practically no time, the operating fashion of the proposed scheme can be changed to any carrierbased PWM strategy, such as sinusoidal PWM, SVPWM, and discontinuous modulation schemes. The widely used overmodulation scheme is also simply implemented by the effective time concept. As well as giving a detailed explanation of the proposed PWM algorithm, the experimental results in various operating modes are presented in this paper. II. UNIFIED VOLTAGE MODULATION In Fig. 1(a), a typical power stage of the three-phase inverter and equivalent circuit of the load are presented. In Fig. 1(b), the eight available different switching vectors of the inverter are depicted with the space vector concept [2], [3]. The switching state means the ring for the upper device of one arm and the pole voltage will have half of the dc-link voltage value. Also, the modulation index is dened as the ratio of phase voltage amplitude to . Note that the switching states of each arm should be combined with each other to compose the required three-phase output voltage. Because each pole voltage has only two levels according to the related switching state, the time duration in

Paper IPCSD 9770, presented at the 1996 Industry Applications Society Annual Meeting, San Diego, CA, October 610, and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Industrial Power Converter Committee of the IEEE Industry Applications Society. Manuscript released for publication October 29, 1997. D.-W. Chung and S.-K. Sul are with the School of Electrical Engineering, Seoul National University, Seoul, 151-742 Korea. J.-S. Kim is with the Power Electronics Laboratory, Department of Electrical Engineering, University of Inchon, Inchon, 402-749 Korea. Publisher Item Identier S 0093-9994(98)02178-1.

00939994/98$10.00 1998 IEEE

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(a)

(b) Fig. 1. Switching state diagram of the inverter. (a) Three-phase inverter system. (b) Space vector diagram of the available switching vectors. Fig. 2. Unied PWM. (a) Relationship between the effective time and the output voltage. (b) Actual gating time generation.

which the different voltages are maintained is denitely related to the voltage modulation task. Therefore, the modulation task can be greatly simplied by considering the relation between the time duration and the output voltage. We now focus on the effective voltage that makes an actual power ow between inverter and load. As shown in Fig. 2(a), when the switching states of each phase become 0 from 1 at different times during one sampling interval, an effective voltage is applied to the load side. denotes the sampling time and denotes the time duration in which the different voltage is maintained. is called the effective time in this paper. For the purpose of explanation, an imaginary time value will be introduced. This value is directly related to the phase voltage and one proportional formation can be dened as follows:

where (2) When the actual gating signals for power devices are generated in the PWM algorithm, there is one degree of freedom by which the effective time can be relocated anywhere within the sampling interval. Therefore, a time-shifting operation will be applied to the imaginary switching times to generate the actual ) for each inverter arm, as shown gating times ( in Fig. 2(b). This task is accomplished by adding the same value to the imaginary times as follows:

(3) This gating time determination task is only performed for the sampling interval in which all of the switching states of each arm go to 0 from 1. This interval is called the OFF sequence in this paper. In the other sequence, it is called the ON sequence. In order to generate a symmetrical switching pulse pattern within two sampling intervals, the actual switching time will be replaced by the subtraction value, with sampling time as follows:

(1) and are the -phase, -phase, and -phase reference voltages, respectively. This switching time could be negative in the case where negative phase voltage is commanded. Therefore, this time is called the imaginary switching time in this paper. Now, the effective time can be dened as the time duration between the smallest and the largest of three imaginary times, as given by

(4) To guarantee the full utilization of dc-link voltage, the actual as gating times should be restricted to a value from 0 to

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(a)

Fig. 4. Offset time and phase and pole voltage of sinusoidal PWM (modulation index: 0.9).

(b) Fig. 3. Graphical representation of offset time. (a) Range of available offset time (modulation index: 0.9). (b) Maximum and minimum value of offset time with a variation of modulation index.

follows: (5) From the above, the range of the available offset time can be calculated as follows: where (6) and are the available minimum and maximum value of , respectively. For example, Fig. 3(a) shows the range of the available offset time and corresponding phase voltage when modulation index is 0.9. Fig. 3(b) represents the and with a variation of the modulation index. As shown in this gure, the lines of and intersect when the modulation index reaches the value of . This value is the maximum modulation index of the proposed PWM scheme. In the next section, it will be shown that various carrierbased PWM schemes can be obtained by changing the arbitrarily between and for wide applicability in various elds. III. VARIOUS CARRIER-BASED PWMS UNIFIED PWM STRATEGY A. Sinusoidal PWM The sinusoidal PWM scheme is a classical and widely used method. In this case, there is no difference between phase voltage ( ) and pole voltage ( ). Therefore, the duty ratio of the -phase inverter output pulse becomes (7)
BY Fig. 5. Offset time and phase and pole voltage of SVPWM (modulation index: 0.9).

and

can be rearranged as (8)

Therefore, to implement the sinusoidal PWM, the offset value is dened as follows: (9) As is widely known, this PWM method has a decisive disadvantage, in that the linear range of controllable voltage is limited to the modulation index 1. This disadvantage is basically caused by the improper location of the effective time. Regardless of the operating condition, the location of the effective time is always xed, as shown in (9). Fig. 4 shows the offset time and phase and pole voltage of the sinusoidal PWM scheme. For monitoring purposes, the pole voltage of this gure is synthesized using the calculated gating time by the following equation: (10) B. SVPWM The SVPWM method was evaluated on the basis of the average voltage concept during one sampling period. If a constant reference voltage vector is given in the hexagon area, as shown in Fig. 1(b), this vector can be represented by the nearest two active vectors as follows: (11)

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(b)

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(e)

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Fig. 6. Offset time and phase and pole voltage according to various discontinuous PWM schemes (modulation index: 0.9). (a)(c) 60 discontinuous PWMs. (d) 30 discontinuous PWM. (e) and (f) 120 discontinuous PWMs.

and, the applying times reference frame voltage

are deduced using the stationary [4]

(12) where sector number . Note that the applying times mean the duration in which active voltages are applied, but do not imply the actual gating times. Therefore, to calculate the actual gating times, the applying times should be recombined with the zerovoltage applying time according to the reference vector location. In this PWM method, the zero-voltage applying

time is distributed symmetrically at the start and end of the sampling interval in a symmetrical manner. Therefore, to employ this PWM method for inverter operation, a more complicated task should be performed to identify the sector number and recombine applying times. Therefore, the overall process would be complex in the conventional technique. However, it is possible to reconstruct the actual gating time without complicated tasks by introducing the effective time concept. If the zero-voltage time is symmetrically distributed in one sampling period, the whole modulation task for SVPWM is easily accomplished by the proposed algorithm. A more detailed explanation is presented in [3]. To relocate the effective time at the center of the sampling interval, the time shifting value is

where (13)

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Fig. 5 shows the offset time and phase and pole voltage of SVPWM scheme. It is noted that the offset time is the middle of and . C. Discontinuous Modulation Schemes This PWM scheme, which also leads to the maximum modulation range as does SVPWM, uses a discontinuous switching operation. In this case, each output of the inverter legs is alternately left on the positive or negative rail of the link voltage for 120 intervals of the electrical fundamental period. Although this PWM scheme generally leads to higher current harmonics compared with the SVPWM, it is of special interest, because it reduces the average switching frequency by 33% and, thus, leads to less switching loss. Among various discontinuous modulation PWMs, that of Fig 6(a) is of special interest for a line converter to minimize switching loss. The principle of this PWM scheme can be depicted in terms of effective time as follows. If the -phase voltage reference is positive (or negative) and has maximum magnitude, the -phase switch should be xed to the ON (or OFF) state. That is to say, if if Therefore, the time shifting value if if is

(a)

(b) Fig. 7. Overmodulation scheme. (a) Voltage vectors. (b) Effective time.

(14)

(15)
Fig. 8. Block diagram of the gating signal generator.

In some applications, from the viewpoint of current harmonics minimization, it is required that the inverter switching sequence be changed from SVPWM to this scheme or back [5], [6]. In the proposed unied PWM method, this transition can be accomplished seamlessly by changing only the offset time from (13) to (15), or back. The shift of ON duration by 30 is possible without any restriction of the modulation range. In [5] and [7], the ON duration for each inverter arm is shifted 30 to minimize the switching loss according to the power factor of the load. This PWM scheme is also implemented easily by modifying the offset time in the proposed scheme, as shown in Fig. 6(b) and (c). The 30 discontinuous PWM scheme was reported in [8]. In this scheme, switching loss is not dependent on the phase angle, since the ON region is distributed evenly over the fundamental period [5], and the current harmonics are smallest among the discontinuous PWMs [9]. The switching pattern of this scheme is opposite to that of the 60 discontinuous PWM mentioned above. Therefore, the offset time is given by if if

offset time, the following equations can be written. For the PWM scheme of Fig. 6(e) (17) and for the PWM scheme of Fig. 6(f) (18) Fig. 6 shows the offset time and phase and pole voltage according to the various discontinuous PWM schemes. IV. OVERMODULATION As is widely known, the maximum magnitude of the inverter output voltage is limited by the dc-link voltage. Therefore, in order to guarantee the linearity of the inverter output voltage, the reference vector should reside in the hexagon region. However, in the transient state of the machine control system with current regulation, the reference voltage vector may exceed the hexagon area, as shown in Fig. 7. In this case, the effective time becomes larger than the sampling time . A proper overmodulation technique should be implemented, because it determines the transient dynamics of the system. In the proposed PWM scheme, a commonly used simple overmodulation strategy is adopted, in which the available voltage vector at point is selected instead of the original reference vector at point , as shown in Fig. 7(a) [11]. As

(16)

The 120 discontinuous PWM scheme was reported in [10]. The pole voltage of this scheme is not half-wave symmetric and it contains the dc component. From the viewpoint of the

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(g) (h) Fig. 9. Voltage modulation features of the proposed unied PWM method (modulation index: 0.9). (a) Sinusoidal PWM. (b) SVPWM. (c) 60 discontinuous modulation. (d) 60 discontinuous modulation shifted by 30 (elec. angle). (e) 60 discontinuous modulation shifted by 30 . (f) 30 discontinuous modulation. (g) 120 discontinuous modulation-I. (h) 120 discontinuous modulation-II. (In each gure, upper trace: synthetic pole voltage; lower trace: A-phase upper gating signal.)

shown in Fig. 7(b), the offset time and the actual gating time can be simply calculated from the scale-downed effective time as follows: Step 1: (Scale Down). Step 2:

Step 3: (19) V. IMPLEMENTATION RESULTS Experiments were conducted to evaluate the performance of the proposed unied PWM algorithm. Although the proposed algorithm can be implemented by an analog circuit, a digital circuit is recommended to change the offset time arbitrarily for various PWM schemes. A typical block diagram of the gating circuit is depicted in Fig. 8. By loading the precalcu-

lated gating times ( ) to each counter at every sampling time, the gating sequence runs automatically for the proper inverter action. In the experiment, this gating circuit is implemented on an erasable programmable logic device (EPLD). To compare calculation times between the conventional and proposed PWM schemes, both are implemented in assembly language on a TMS320C31 processor with a 33-MHz clock. The conventional PWM scheme needs 58 machine cycles, which is maximally optimized using an approximately 250 double-words lookup table for trigonometric function and sector identication [2]. One machine cycle means 60 ns in the TMS320C31 processor. On the contrary, only 40 machine cycles are needed in the proposed PWM scheme. Therefore, in the proposed scheme, the calculation time is reduced by 31%. Since the proposed scheme needs no additional table and no sector identication, memory size is also reduced remarkably. The various modulation features of the unied PWM method are illustrated in Fig. 9. In this gure, the sampling time is 150 s and the frequency of reference voltage is 100 Hz. By the effective time shifting operation, relative gating patterns are generated according to the various modulation schemes. For monitoring purposes, the pole voltage ( ) of

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PWM scheme can be implemented by a low-performance microprocessor without any tables and trigonometric functions and can be easily applied in industry applications. By the inherent simplicity of the proposed scheme, the real-time change of the modulation scheme is implemented seamlessly. The performance of the proposed PWM scheme has been proven by laboratory tests. REFERENCES
[1] J. Holtz, Pulsewidth modulationA survey, IEEE Trans. Ind. Electron., vol. 39, pp. 410420, Oct. 1992. [2] H. W. Van der Broeck and H. C. Skudelny, Analysis and realization of a pulse width modulator based on voltage space vectors, IEEE Trans. Ind. Applicat., vol. 24, pp. 142150, Jan./Feb. 1988. [3] J. S. Kim and S. K. Sul, A novel voltage modulation technique of the space vector PWM, in Conf. Rec. IPEC95, Yokohama, Japan, 1995, pp. 742747. [4] J. F. Moynihan, R. C. Kavanagh, M. G. Egan, and J. M. D. Murphy, Indirect phase current detection for eld oriented control of a permanent magnet synchronous motor drive, in Conf. Rec. EPE91, 1991, vol. 3, pp. 641646. [5] J. W. Kolar, H. Ertl, and F. C. Zach, Inuence of the modulation method on the conduction and switching losses of a PWM converter system, IEEE Trans. Ind. Applicat., vol. 27, pp. 10631075, Nov./Dec. 1991. [6] S. Ogasawara, H. Akagi, and A. Nabae, A novel PWM scheme of voltage source inverters based on space vector theory, in Conf. Rec. EPE89, 1989, pp. 11971202. [7] A. M. Trzynadlowski and S. Legowski, Minimum-loss vector PWM strategy for three-phase inverters, IEEE Trans. Power Electron., vol. 9, pp. 2634, Jan. 1994. [8] J. W. Kolar, H. Ertl, and F. C. Zach, Calculation of the passive and active component stress of three phase PWM converter systems with high pulse rate, in Conf. Rec. EPE89, 1989, pp. 13031311. [9] H. W. Van der Broeck, Analysis of the harmonics in voltage fed inverter drives caused by PWM schemes with discontinuous switching operation, in Conf. Rec. EPE91, 1991, vol. 3, pp. 261266. [10] K. Taniguchi, Y. Ogino, and H. Irie, PWM technique for power MOSFET inverter, IEEE Trans. Power Electron., vol. 3, pp. 328334, July 1988. [11] T. G. Habetler, F. Profumo, M. Pastorelli, and L. M. Tolbert, Direct torque control of induction machines using space vector modulation, IEEE Trans. Ind. Applicat., vol. 28, pp. 10451053, Sept./Oct. 1991.

(c)

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Fig. 10. Real-time change of voltage modulation method by proposed unied PWM method (modulation index: 0.4). (a) A-phase reference voltage. (b) Synthesized A-pole voltage. (c) A-phase upper gating signal. (d) A-phase current. TABLE I RATINGS AND PARAMETERS OF TEST INDUCTION MACHINE

each gure is synthesized using the calculated gating times by (10). In Fig. 10, the PWM modulation strategy is changed in real time by the proposed unied PWM method. A 22 kW induction motor operates at constant speed with no load. The sampling time is set to 150 s for the 7.5-kHz switching frequency and the dc-link voltage is 310 V. The machine parameters are shown in Table I. Fig. 10(a) shows the -phase reference voltage given to the PWM algorithm, and the pole voltage is synthesized as shown in Fig. 10(b). In Fig. 10(c), the upper gating signal is generated according to each modulation scheme. The current harmonics of the discontinuous PWM is higher because the switching frequency is reduced by 33% compared with SVPWM. From these results, it can be seen that the real-time transition of the PWM method also can be accomplished easily and seamlessly by changing only the offset time. VI. CONCLUSION In this paper, a novel voltage modulation technique using the effective time concept has been described. The proposed

Dae-Woong Chung (S96), for a photograph and biography, see this issue, p. 345.

Joohn-Sheok Kim (S93M96) was born in Korea in 1965. He received the B.S., M.S., and Ph.D. degrees in electrical engineering from Seoul National University, Seoul, Korea, in 1989, 1992, and 1995, respectively. He is currently an Assistant Professor in the Department of Electrical Engineering, University of Inchon, Inchon, Korea. His main research interests are adjustable-speed ac drives and static power converters.

Seung-Ki Sul (S78M80), for a photograph and biography, see this issue, p. 345.