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COMPONENT DESCRIPTION

PIC 16F877 Microcontroller


Microcontroller Core Features: 1) High-performance RISC CPU 2) Only 35 single word instructions to learn 3) All single cycle instructions except for program branches which are two cycle 4) Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle 5) Up to 8K x 14 words of FLASH Program Memory, Up to 368 x 8 bytes of Data Memory 6) (RAM) Up to 256 x 8 bytes of EEPROM data memory 7) Pinout compatible to the PIC16C73B/74B/76/77 8) Interrupt capability (up to 14 sources) 9) Eight level deep hardware stack 10) Direct, indirect and relative addressing modes 11) Power-on Reset (POR) 12) Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) 13) Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation 14) Programmable code-protection 15) Power saving SLEEP mode 16) Selectable oscillator options 17) Low-power, high-speed CMOS FLASH/EEPROM technology 18) Fully static design 19)In-Circuit Serial Programming (ICSP) via two pins 20) Single 5V In-Circuit Serial Programming capability 21) In-Circuit Debugging via two pins 22) Processor read/write access to program memory 23) Wide operating voltage range: 2.0V to 5.5V 24) High Sink/Source Current: 25 mA 25)Commercial and Industrial temperature ranges Block Diagram

Pin Diagram

1 Program Memory Organization The PIC16F87X devices have a 13-bit program counter capable of addressing an 8K x 14 program memory space. The PIC16F877/876 devices have 8K x 14 words of FLASH program memory and the PIC16F873/ 874 devices have 4K x 14. Accessing a location above the physically implemented address will cause a wraparound. The reset vector is at 0000h and the interrupt vector is at 0004h. Data Memory Organization The data memory is partitioned into multiple banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1(STATUS<6>) and RP0 (STATUS<5>) are the bank select bits. RP1:RP0 00 01 10 11 Bank 0 1 2 3

Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for the Special Function Registers. Above the Special Function Registers are General Purpose Registers, implemented as static RAM. All implemented banks contain Special Function Registers. Some high use Special Function Registers from one bank may be mirrored in another bank for code reduction and quicker access.

I/O PORTS Some pins for these I/O ports are multiplexed with an alternate function for the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin.

PORTA and the TRISA Register PORTA is a 6-bit wide bi-directional port. The corresponding data direction register is TRISA. Setting a TRISA bit (=1) will make the corresponding PORTA pin an input (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISA bit (=0) will make the corresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin). Reading the PORTA register reads the status of the pins, whereas writing to it will write to the port latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that the port pins are read, the value is modified and then written to the port data latch. Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output. All other PORTA pins have TTL input levels and full CMOS output drivers. Other PORTA pins are multiplexed with analog inputs and analog VREF input. PORTB and the TRISB Register PORTB is an 8-bit wide, bi-directional port. The corresponding data direction register is TRISB. Setting a TRISB bit (=1) will make the corresponding PORTB pin an input (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISB bit (=0) will make the corresponding PORTB pin an output (i.e., put the contents of the output latch on the selected pin). Three pins of PORTB are multiplexed with the Low Voltage Programming function; RB3/PGM, RB6/PGC and RB7/PGD. The alternate functions of these pins are described in the Special Features Section. Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is performed by clearing bit RBPU (OPTION_REG<7>). The weak pull-up is automatically turned off when the port pin is configured as an output.

PORTC and the TRISC Register PORTC is an 8-bit wide, bi-directional port. The corresponding data direction register is TRISC. Setting a TRISC bit (=1) will make the corresponding PORTC pin an input (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISC bit (=0) will make the corresponding PORTC pin an output (i.e., put the contents of the output latch on the selected pin). PORTC is multiplexed with several peripheral functions (Table 3-5). PORTC pins have Schmitt Trigger input buffers. When the I2C module is enabled, the PORTC (3:4) pins can be configured with normal I2C levels or with SMBUS levels by using the CKE bit (SSPSTAT <6>). When enabling peripheral functions, care should be taken in defining TRIS bits for each PORTC pin. Some peripherals override the TRIS bit to make a pin an output, while other peripherals override the TRIS bit to make a pin an input. Since the TRIS bit override is in effect while the peripheral is enabled, read-modify-write instructions(BSF, BCF, XORWF) with TRISC as destination should be avoided. PORTD and TRISD Registers PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is individually configurable as an input or output. PORTE and TRISE Register PORTE has three pins, RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/AN7, which are individually configurable as inputs or outputs. These pins have Schmitt Trigger input buffers. I/O PORTE becomes control inputs for the microprocessor port when bit PSPMODE (TRISE<4>) is set. In this mode, the user must make sure that the TRISE<2:0> bits are set (pins are configured as digital inputs). Ensure ADCON1 is configured for digital I/O. In this mode, the input buffers are TTL. Register 3-1 shows the TRISE register, which also controls the parallel slave port operation. PORTE pins are multiplexed with analog inputs. When selected as an analog input, these pins will read as 0s. TRISE controls the direction of the RE pins, even when they are being used as analog inputs.

SFR and GPR There is a Special Function Register (SFR) and a General Purpose Register (GPR) in each of the banks. SFR a are used for special purposes. The bits in SFR are either set by the manufacturers for specific functions or are set automatically with respect to the status of some other register. For example, the Status Register is an SFR, which is set according to the status of the Working Register (WR). Bank 0& Bank 1 is combined to form Group 0 and Bank 2 & Bank 3 together forms the Group 1. In PIC, the GPRs are of 8bits. The SFR in each bank is different whereas GPR 1 & GPR 2 are the exact copies of GPR 1 & GPR 2 respectively. If it is not provided so, if for example, SFR3 requires the data of GPR 2 for some manipulations, then it have to switch to Group 0. But, since GPR 2 is an exact copy of GPR 2, the above switching is not needed. STATUS REGISTER The STATUS register contains the arithmetic status of the ALU, the RESET status and the bank select bits for data memory. The STATUS register can be the destination for any instruction, as with any other register. If the STATUS register is the estination for an instruction that affects the Z, DC or C bits, then the write to these three bits is disabled. These bits are set or cleared according to the device logic. Furthermore, the TO and PD bits are not writable, therefore, the result of an instruction with the STATUS register as destination may be different than intended.

OPTION_REG REGISTER The OPTION_REG Register is a readable and writable register, which contains various control bits to configurethe TMR0 prescaler/WDT postscaler (single assign-able register known also as the prescaler), the External INT Interrupt, TMR0 and the weak pull-ups on PORTB.

STATUS REGISTER:

Option Register:

INTERRUPTS

The PIC16F87x family has up to 14 sources of interrupt. Some of them are TMRO register overflow; RB port change and external RB0/INT pin interrupts. The interrupt control register (INTCON) records individual interrupt requests in flag bits. In our project we need only the External RB0 pin interrupt for getting the number of rotations

INTCON REGISTER The INTCON Register is a readable and writable register, which contains various enable and flag bits for the TMR0 register overflow, RB Port change and External RB0/INT pin interrupts. Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit. User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.

The return from interrupt instruction, RETFIE, exits the interrupt routine. The RB0/INT pin interrupt, the RB port change interrupt flags are contained in the INTCON register. Once in the interrupt service routine, the source(s) of the interrupt can be determined by polling the interrupt flag bits. The interrupt flag bit(s) must be cleared in software before re-enabling interrupts to avoid recursive interrupts

I/O PORTS Some pins for these I/O ports are multiplexed with an alternate function for the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin. There are 3 I/O ports in PIC16F873: PORTS A,B and C. the corresponding configuration registers of these ports are TRISA, TRISB and TRISC respectively. In the project only two ports are used; PORT A and B PORTA and the TRISA Register PORTA is a 6-bit wide bi-directional port. The corresponding data direction register is TRISA. Setting a TRISA bit (=1) will make the corresponding PORTA pin an input (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISA bit (=0) will make the corresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin). Reading the PORTA register reads the status of the pins, whereas writing to it will write to the port latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that the port pins are read, the value is modified and then written to the port data latch. Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output. All other PORTA pins have TTL input levels and full CMOS output drivers. Other PORTA pins are multiplexed with analog inputs and analog VREF input. The operation of each pin is selected by clearing/setting the control bits in the ADCON1 register (A/D Control Register1). The TRISA register controls the direction of the RA pins, even when they are being used as analog inputs. The user must ensure the bits in the TRISA register are maintained set when using them as analog inputs.

PORTB and the TRISB Register

PORTB is an 8-bit wide, bi-directional port. The corresponding data direction register is TRISB. Setting a TRISB bit (=1) will make the corresponding PORTB pin an input (i.e., put the corresponding output driver in a hi-impedance mode). Clearing a TRISB bit (=0) will make the corresponding PORTB pin an output (i.e., put the contents of the output latch on the selected pin). Three pins of PORTB are multiplexed with the Low Voltage Programming function; RB3/PGM, RB6/PGC and RB7/PGD. Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is performed by clearing bit RBPU (OPTION_REG<7>). The weak pull-up is automatically turned off when the port pin is configured as an output. The pull-ups are disabled on a Power-on Reset. In the project, the analog output from the fuel sensor is provided to PIC through the 0th pin of PORT a (RA0) and the analog output from the temperature sensor is provided through the 1st pin of PORTA (RA1). Also, the external interrupt from the rotation sensor is provided through the 0th pin of PORT B (RB0) TIMERS There are 3 timers in PIC: Timer0, Timer1 and Timer2. Of these Timer0 is used in the program for providing the various delays TIMER0 MODULE

The Timer0 module timer/counter has the following features: 8-bit timer/counter Readable and writable 8-bit software programmable prescaler Internal or external clock select

Interrupt on overflow from FFh to 00h Edge select for external clock Timer mode is selected by clearing bit T0CS (OPTION_REG<5>). In timer mode, the Timer0 module will increment every instruction cycle (without prescaler). If the TMR0 register is written, the increment is inhibited for the following two instruction cycles. The user can work around this by writing an adjusted value to the TMR0 register. Counter mode is selected by setting bit T0CS (OPTION_REG<5>). In counter mode, Timer0 will increment either on every rising or falling edge of pin RA4/T0CKI. The incrementing edge is determined by the Timer0 Source Edge Select bit T0SE (OPTION_REG<4>). Clearing bit T0SE selects the rising edge. The prescaler is mutually exclusively shared between the Timer0 module and the watchdog timer. ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE

The Analog-to-Digital (A/D) Converter module has five inputs for the 28-pin devices and eight for the other devices. The analog input charges a sample and hold capacitor. The output of the sample and hold capacitor is the input into the converter. The converter then generates a digital result of this analog level via successive approximation. The A/D conversion of the analog input signal results in a corresponding 10-bit digital number. The A/D module has high and low voltage reference input that is software selectable to some combination of VDD, VSS, RA2 or RA3. The A/D converter has a unique feature of being able to operate while the device is in SLEEP mode. To operate in sleep, the A/D clock must be derived from the A/Ds internal RC oscillator. The A/D module has four registers. These registers are: A/D Result High Register (ADRESH)

A/D Result Low Register (ADRESL) A/D Control Register0 (ADCON0) A/D Control Register1 (ADCON1) The ADCON0 register, controls the operation of the A/D module. The ADCON1 register, configures the functions of the port pins. The port pins can be configured as analog inputs (RA3 can also be the voltage reference) or as digital I/O. 1. Configure the A/D module: Configure analog pins / voltage reference / and digital I/O (ADCON1) Select A/D input channel (ADCON0) Select A/D conversion clock (ADCON0) Turn on A/D module (ADCON0) 2. Configure A/D interrupt (if desired): Clear ADIF bit Set ADIE bit Set GIE bit 3. Wait the required acquisition time. 4. Start conversion: Set GO/DONE bit (ADCON0) 5. Wait for A/D conversion to complete, by either: Polling for the GO/DONE bit to be cleared OR Waiting for the A/D interrupts 6. Read A/D Result register pair (ADRESH: ADRESL), clear bit ADIF if required. 7. For next conversion, go to step 1 or step 2 as required. The A/D conversion time per bit is defined as TAD. A minimum wait of 2TAD is required before next acquisition starts.

Configuring Analog Port Pins

The ADCON1, and TRIS registers control the operation of the A/D port pins. The port pins that are desired as analog inputs must have their corresponding TRIS bits set (input). If the TRIS bit is cleared (output), the digital output level (VOH or VOL) will be converted. The A/D operation is independent of the state of the CHS2: CHS0 bits and the TRIS bits. Note 1: When reading the port register, any pin configured as an analog input channel will read as cleared (a low level). Pins configured as digital inputs will convert an analog input. Analog levels on a digitally configured input will not affect the conversion accuracy. 2: Analog levels on any pin that is defined as a digital input (including the AN7:AN0 pins), may cause the input buffer to consume current that is out of the device specifications. A/D Conversions Clearing the GO/DONE bit during a conversion will abort the current conversion. The A/D result register pair will NOT be updated with the partially completed A/D conversion sample. That is, the ADRESH: ADRESL registers will continue to contain the value of the last completed conversion (or the last value written to the ADRESH: ADRESL registers). After the A/D conversion is aborted, a 2TAD wait is required before the next acquisition is started. After this 2TAD wait, acquisition on the selected channel is automatically started. A/D RESULT REGISTERS The ADRESH: ADRESL register pair is the location where the 10-bit A/D result is loaded at the completion of the A/D conversion. This register pair is 16-bits wide. The A/D modules give the flexibility to left or right justify the 10-bit result in the 16-bit result register. The A/D Format Select bit (ADFM) controls this justification. Figure below shows the operation of the A/D result justification. The extra bits are loaded with 0s. When an A/D result will not overwrite these locations (A/D disable), these registers may be used as two general-purpose 8-bit registers.

2.2 Liquid Crystal Display (LCD)


Liquid crystal displays have materials, which combine the properties of both liquid and crystals. Rather than having a melting point, they have a temperature range within which the molecules are almost as mobile as they would be in a liquid, but are grouped together in an ordered form similar to a crystal. An LCD consists of two glass plates, with the liquid crystal material sand witched in between. The inner surfaces of the glass plate are coated with transparent electrodes, which defined the character, symbols or patterns to be displayed. Polymeric layers are present in between the electrodes and the Liquid Crystal molecules to maintain a defined orientation angle. One each polarisers are pasted outside the two glass panels. These polarisers would rotate the light rays passing through them to a definite angle, in a particular direction. When the LCD is in off state, the two polarisers and the Liquid Crystal rotate light rays, such that the light rays come out of the LCD without any orientation, and hence the LCD appears transparent. When sufficient voltage is applied to the electrodes, the Liquid Crystal molecules would be aligned in a specified direction. The light rays passing through the LCD would be rotated by the polarisers, which would result in activating/highlighting the desired characters. The LCDs are light weight with only a few millimeters thickness since the LCDs consume less power, they are compactable with low power electronic circuits, and can be powered for long durations. The LCDs dont generate light and so light is needed to read the display by using backlighting reading is possible in the dark the LCDs have long life and a wide operation temperature range. Changing the display size or the layout size is relatively simple which makes the LCDs more customers friendly. Brightness Brightness of an LCD is the ratio of the luminance of the reflected or transmitted light to the luminance of the incident light. Reflective displays will therefore tend to appear rather gray /dark. A brighter display can be obtained by providing back lighting.

Contrast Ratio Contrast ratio of an LCD is defined as the ratio of brightness of the lighted/non activated pixels to that of the darkened activated pixels. Back Lighting When sufficient lighting is not there, back lighting of the LCD is done for reading the characters/patterns. The widely used back lighting is of the LED array type, wherein the LEDs are connected in an array. LCD Display & pin outs.

LCD Display

Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14

Symbol Vss Vcc VEE RS R/W E DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7

I/O ---I I I/O I/O I/O I/O I/O I/O I/O I/O I/O

Description Ground +5V Power supply Contrast control RS=1,CMD Reg., RS=0, Data Reg. R/W=0 for write, R/W=1 for read. Enable The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus

Vss: This is the Ground pin of the LCD. Vcc: This is the power pin of the LCD. The supply voltage of the LCD is +5V.

VEE: This is the contrast pin of the LCD. Contrast is adjusted by adjusting the voltage of this pin by using a potentiometer. RS: There are two very important registers inside the LCD. The RS pin is used to selecting these two registers. If RS = 0, then the instruction command code register is selected, allow the user to send command to the LCD such as clear display etc. If RS = 1, then the data register is selected. This will allow the user to send data to be displayed on the LCD.

R/W: This input allows the use to Write data to the LCD and read the data from the LCD. If R/W = 0, then writing is possible and if R/W = 1, then reading is possible.

E: The enable pin is used by the LCD to latch information presented to its data pins. When data is supplied to the data pins, a high- to-low pulse must be applied to this pin in order for the LCD to latch in the data present at the data pins. This pulse must be a minimum of 450ns wide.

DB 0 DB 7: These are the data pins of the LCD. It is 8-bit wide. These are used to send the information to the LCD or read the contents of the LCDs internal registers. To display letters and numbers, we send ASCII codes for the letters A Z, a z and numbers 0 9 to these pins while making RS = 1.

For sending commands to the LCD we should make the RS = 0 first. We also use RS = 0 to check the busy flag bit to see if the LCD is ready to receive information. The busy flag is D7 and can be read when R/W = 1., RS =0 as follows: if R/W = 1, RS = 0. When D7 = 1(busy flag = 1), the LCD is busy taking care of internal operations and will not accept any new information. It is recommended that, before writing each data we have to check the busy flag. If the busy flag is high, then do not write the data to the LCD. The commands of the LCD are given in the table below. Code (Hex) 1 2 Command to LCD instruction Register. Clear Display screen. Return home

4 6 5 7 8 A C E F 10 14 18 1C 80 C0 38

Decrement Cursor (shift cursor to left) Increment Cursor (shift cursor to right) Shift display right Shift display left Display off, cursor off Display off, cursor on Display on, cursor off Display on, cursor blinking Display on, cursor blinking Shift cursor position to left Shift cursor position to right Shift the entire display to left Shift the entire display to right Force cursor to beginning of the first line Force cursor to beginning of the second line 2 lines and 5x7 matrix

These are the commands used in the LCD display for its controlling. Before sending the information to LCD we have to configure the LCD for the display position, cursor position etc. After configure the display we can send the information to the data lines of the LCD and toggle the Enable pin of the LCD. Then the information will shown on the LCD.

2.6 ADC 0808


Analog to Digital converters are among the most widely used devices for data acquisition. Digital computers use binary values, but in the physical world everything is analog. Temperature, pressure and velocity are a few examples of physical quantities

that we deal with every day. A physical quantity is converted to electrical signals using a device called a transducer. Transducers are also referred to as sensors. Although there are sensors for temperature, velocity, pressure, light, and many other natural quantities, they produce an output that is voltage or current. There for we need an analog to digital converter to translate the analog signals to digital numbers so that the Micro controller can read them. The ADC 0808 IC is an analog to digital converter in the family of the ADC 0800 series from National Semiconductor. It works with +5V and has a resolution of 8bits. In addition to resolution conversion time is major factor in judging an ADC. Conversion time is defined as the time it takes the ADC to convert the analog input to digital number. The conversion time varies depending up on the clocking signal applied to the CLK pin of the ADC.

Pin description of ADC 0808

Pin description:
IN0, IN1, IN7: There are the analog input pins of the ADC 0808. There are 8 input pins and we can give the analog data here for converting it in to digital format. All these channels are multiplexed. That is, at a time ADC convert one of the channel input to digital format. It could not handle all the data at a time. ADD A, B and C: These are the address lines of ADC for the multiplexing of the input pins. The table given below shows the multiplexing of the channels in the ADC 0808.

Selected Channel IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7

Address Lines C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1

START: This is one of the input signals for the ADC to starts its working. When a positive pulse is applied to this pin, then only the ADC starts to convert the analog signal to the Digital format. This signal is called Start of conversion signal. EOC: This is one of the output signals from the ADC. EOC stands for End Of Conversion. That is, this is an acknowledgement signal from the ADC. When the ADC completed its conversion, then EOC pin will goes to high. It is indicates that the ADC completed it conversion successfully. OE: This is another one input signal for the ADC. OE stands for Output Enable. After getting the EOC from the ADC, OE pin should make high. Then only the digital signal is available on the output pins of the ADC for the corresponding input signal applied on the input channel. CLK: This is the clock input pin of the ADC. The conversion time depends up on the clock applied to the ADC. If the clock speed is high, the conversion time will be less and the clock speed is low then the conversion time will be increased. ALE: This is another one input for the ADC. ALE stands for Address Latch Enable. It is used for latch the address of the channel, which has been selected for converting the signal to Digital format. A positive pulse is applied for latching the address. Vref (+): This is the positive reference signal to the ADC. It is used for determine the maximum positive level of the input signal for converting in to Digital format.

Vref (-): This is the negative reference signal to the ADC. It is used to determine the maximum negative level of the input signal for converting in to digital format. 2-1, 2-2, 2-8: These are the data out pins of the ADC. Here got the digital signal for corresponding input analog signal. Here 2-8 to 2-5 are LSB and 2-4 to 2-1 are MSB. VCC: This is the positive power supply pin of the ADC. The supply voltage of the ADC is +5V. GND: This is them ground pin of the ADC. It also called as the power supply pin of the ADC.

Features:
Easy interface to all microprocessors/ micro controllers

Operates ratio metrically or with 5 VDC or analog span adjusted voltage reference

No zero or full-scale adjust required 8-channel multiplexer with address logic 0V to 5V input range with single 5V power supply Outputs meet TTL voltage level specifications Standard hermetic or molded 28-pin DIP package Resolution of 8 Bits

Total Unadjusted Error 1 /2 LSB and 1 LSB

Low Power up to 15 mW Conversion Time of 100 s