Features
Dual Version of CA3140 Internally Compensated MOSFET Input Stage - Very High Input Impedance (ZIN) 1.5T (Typ) - Very Low Input Current (II) 10pA (Typ) at 15V - Wide Common-Mode Input Voltage Range (VICR ): Can Be Swung 0.5V Below Negative Supply Voltage Rail Directly Replaces Industry Type 741 in Most Applications
Applications
Ground Referenced Single Amplifiers in Automobile and Portable Instrumentation Sample and Hold Amplifiers Long Duration Timers/Multivibrators (MicrosecondsMinutes-Hours) Photocurrent Instrumentation Intrusion Alarm System Comparators Instrumentation Amplifiers Active Filters Function Generators Power Supplies
Ordering Information
PART NUMBER CA3240AE CA3240AE1 CA3240E TEMP. RANGE ( oC) -40 to 85 -40 to 85 -40 to 85 PACKAGE 8 Ld PDIP 14 Ld PDIP 8 Ld PDIP PKG. NO. E8.3 E14.3 E8.3
Functional Diagram
2mA 4mA V+
Pinouts
CA3240, CA3240A (PDIP) TOP VIEW
BIAS CIRCUIT CURRENT SOURCES AND REGULATOR 200A + INPUT A 1.6mA 200A 2A 2mA OUTPUT
1 2 3 4
10
A 10,000
A1
C1 12pF V-
1 2 3 4 5 6 7
OFFSET NULL
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright Intersil Americas Inc. 2001
CA3240, CA3240A
Absolute Maximum Ratings
Supply Voltage (Between V+ and V-). . . . . . . . . . . . . . . . . . . . . 36V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V) Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite
Thermal Information
Thermal Resistance (Typical, Note 2)
JA (oC/W)
8 Lead PDIP Package . . . . . . . . . . . . . . . . . . . . . . . 100 14 Lead PDIP Package . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Voltage Range . . . . . . . . . . . . . . . . . . . . . 4V to 36V or 2V to 18V
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Short circuit may be applied to ground or to either supply. Temperatures and/or supply voltages must be limited to keep dissipation within maximum rating. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Large-Signal Voltage Gain (See Figures 13, 28) (Note 3) Common Mode Rejection Ratio (See Figure 18)
For Equipment Design, VSUPPLY = 15V, TA = 25oC, Unless Otherwise Specified CA3240 SYMBOL VIO IIO II AOL CMRR MIN 20 86 70 VICR PSRR (VIO/V) VOM+ VOMVOMI+ PD -15 76 12 -14 0.4 TYP 5 0.5 10 100 100 32 90 -15.5 to +12.5 100 80 13 -14.4 0.13 8 240 MAX 15 30 50 320 11 150 12 360 MIN 20 86 70 -15 76 12 -14 0.4 CA3240A TYP 2 0.5 10 100 100 32 90 -15.5 to +12.5 100 80 13 -14.4 0.13 8 240 MAX 5 20 40 320 12 150 12 360 UNITS mV pA pA kV/V dB V/V dB V V/V dB V V V mA mW
Common Mode Input Voltage Range (See Figure 25) Power Supply Rejection Ratio (See Figure 20) Maximum Output Voltage (Note 4) (See Figures 24, 25) Maximum Output Voltage (Note 5) Total Supply Current (See Figure 16) For Both Amps Total Device Dissipation NOTES:
3. At VO = 26VP-P, +12V, -14V and RL = 2k. 4. At RL = 2k. 5. At V+ = 5V, V- = GND, ISINK = 200A.
Electrical Specifications
PARAMETER
For Equipment Design, VSUPPLY = 15V, TA = 25oC, Unless Otherwise Specified TYPICAL VALUES SYMBOL TEST CONDITIONS Typical Value of Resistor Between Terminals 4 and 3(5) or Between 4 and 14(8) to Adjust Maximum VIO RI CI RO eN BW = 140kHz, RS = 1M CA3240A 18 1.5 4 60 48 CA3240 4.7 1.5 4 60 48 UNITS k T pF V
Input Offset Voltage Adjustment Resistor (E1 Package Only) Input Resistance Input Capacitance Output Resistance Equivalent Wideband Input Noise Voltage (See Figure 2)
CA3240, CA3240A
Electrical Specifications
PARAMETER Equivalent Input Noise Voltage (See Figure 19) Short-Circuit Current to Opposite Supply For Equipment Design, VSUPPLY = 15V, TA = 25oC, Unless Otherwise Specified (Continued) TYPICAL VALUES SYMBOL eN IOM + IOMGain Bandwidth Product (See Figures 14, 28) Slew Rate (See Figure 15) Transient Response (See Figure 1) fT SR tr OS Settling Time at 10VP-P (See Figure 26) Crosstalk (See Figure 23) tS RL = 2k, C L = 100pF RL = 2k, C L = 100pF AV = +1, RL = 2k, CL = 100pF, Voltage Follower f = 1kHz Rise Time Overshoot To 1mV To 10mV TEST CONDITIONS f = 1kHz, RS = 100 f = 10kHz, RS = 100 Source Sink CA3240A 40 12 40 11 4.5 9 0.08 10 4.5 1.4 120 CA3240 40 12 40 11 4.5 9 0.08 10 4.5 1.4 120 UNITS nV/Hz nV/Hz mA mA MHz V/s s % s s dB
Electrical Specifications
For Equipment Design, at VSUPPLY = 15V, TA = -40 to 85oC, Unless Otherwise Specified TYPICAL VALUES
PARAMETER Input Offset Voltage Input Offset Current (Note 8) Input Current (Note 8) Large Signal Voltage Gain (See Figures 13, 28), (Note 6)
CA3240A 3 32 640 63 96
32 90
Common Mode Input Voltage Range (See Figure 25) Power Supply Rejection Ratio (See Figure 20)
Supply Current (See Figure 16) Total For Both Amps Total Device Dissipation Temperature Coefficient of Input Offset Voltage NOTES: 6. At VO = 26VP-P, +12V, -14V and RL = 2k. 7. At RL = 2k. 8. At TA = 85oC.
Electrical Specifications
For Equipment Design, at V+ = 5V, V- = 0V, TA = 25oC, Unless Otherwise Specified TYPICAL VALUES
PARAMETER Input Offset Voltage Input Offset Current Input Current Input Resistance Large Signal Voltage Gain (See Figures 13, 28)
UNITS mV pA pA T kV/V dB
CA3240, CA3240A
Electrical Specifications
For Equipment Design, at V+ = 5V, V- = 0V, TA = 25oC, Unless Otherwise Specified (Continued) TYPICAL VALUES PARAMETER Common-Mode Rejection Ratio SYMBOL CMRR CA3240A 32 90 Common-Mode Input Voltage Range (See Figure 25) VICR PSRR -0.5 2.6 Power Supply Rejection Ratio 31.6 90 Maximum Output Voltage (See Figures 24, 25) VOM+ VOM Maximum Output Current Source Sink Slew Rate (See Figure 15) Gain Bandwidth Product (See Figure 14) Supply Current (See Figure 16) Device Dissipation IOM+ IOMSR fT I+ PD 3 0.3 20 1 7 4.5 4 20 CA3240 32 90 -0.5 2.6 31.6 90 3 0.3 20 1 7 4.5 4 20 UNITS V/V dB V V V/V dB V V mA mA V/s MHz mA mW
50mV/Div., 200ns/Div. Top Trace: Input, Bottom Trace: Output FIGURE 1A. SMALL SIGNAL RESPONSE
+15V 10k + CA3240 0.1F
5V/Div., 1s/Div. Top Trace: Input, Bottom Trace: Output FIGURE 1B. LARGE SIGNAL RESPONSE
SIMULATED LOAD 2k
0.1F
100pF
FIGURE 1C. TEST CIRCUIT FIGURE 1. SPLIT-SUPPLY VOLTAGE FOLLOWER TEST CIRCUIT AND ASSOCIATED WAVEFORMS
-15V
1k
FIGURE 2. TEST CIRCUIT AMPLIFIER (30dB GAIN) USED FOR WIDEBAND NOISE MEASUREMENT
Q6
Q5
Q7 R1 8K
Q21
Q8
Q9 Q10 R3 500
C1 12pF
Q14
Q15
Q16 D6
R6 50
R7 30
V-
NOTES: 9. Only available with 14 Lead DIP (E1 Suffix). 10. All resistance values are in ohms.
V+
+HV LOAD
CA3240 RL
RS 120VAC
MT2
FIGURE 3. METHODS OF UTILIZING THE VCE (SAT) SINKING CURRENT CAPABILITY OF THE CA3240 SERIES
CA3240, CA3240A
10K VS = 15V
1K
100
10
shift in the output voltage (Terminal 7) of the CA3240E. These positive transitions are fed into the CA3059, which is used as a latching circuit and zero-crossing TRIAC driver. When a positive pulse occurs at Terminal 7 of the CA3240E, the TRIAC is turned on and held on by the CA3059 and its associated positive feedback circuitry (51k resistor and 36k/42k voltage divider). When the positive pulse occurs at Terminal 1 (CA3240E), the TRIAC is turned off and held off in a similar manner. Note that power for the CA3240E is supplied by the CA3059 internal power supply. The advantage of using the CA3240E in this circuit is that it can sense the small currents associated with skin conduction while allowing sufficiently high circuit impedance to provide protection against electrical shock.
-60
-40
-20
20 40 60 80 TEMPERATURE (oC)
100
120 140
It is well known that MOSFET devices can exhibit slight changes in characteristics (for example, small changes in input offset voltage) due to the application of large differential input voltages that are sustained over long periods at elevated temperatures. Both applied voltage and temperature accelerate these changes. The process is reversible and offset voltage shifts of the opposite polarity reverse the offset. In typical linear applications, where the differential voltage is small and symmetrical, these incremental changes are of about the same magnitude as those encountered in an operational amplifier employing a bipolar transistor input stage.
Offset-Voltage Nulling
The input offset voltage of the CA3240AE1 and CA3240E1 can be nulled by connecting a 10k potentiometer between Terminals 3 and 14 or 5 and 8 and returning its wiper arm to Terminal 4, see Figure 5A. This technique, however, gives more adjustment range than required and therefore, a considerable portion of the potentiometer rotation is not fully utilized. Typical values of series resistors that may be placed at either end of the potentiometer, see Figure 5B, to optimize its utilization range are given in the table Electrical Specifications for Equipment Design shown on third page of this data sheetAn alternate system is shown in Figure 5C. This circuit uses only one additional resistor of approximately the value shown in the table. For potentiometers, in which the resistance does not drop to 0 at either end of rotation, a value of resistance 10% lower than the values shown in the table should be used.
Typical Applications
On/Off Touch Switch
The on/off touch switch shown in Figure 6 uses the CA3240E to sense small currents flowing between two contact points on a touch plate consisting of a PC board metallization grid. When the on plate is touched, current flows between the two halves of the grid causing a positive 7
CA3240, CA3240A
V+ 13(9) 1(7) CA3240 2(6) 4 3 (5) 12(10) CA3240 V+
14(8) 10k
R (NOTE 11)
10k
R (NOTE 11)
V-
V-
CA3240
FIGURE 5C. SIMPLER IMPROVED RESOLUTION NOTE: 11. See Electrical Specification Table for value of R. FIGURE 5. THREE OFFSET-VOLTAGE NULLING METHODS, (CA3240AE1 ONLY)
44M +6V +6V ON 1M 6 0.01F 5.1M 1M +6V 5 8 1/2 CA3240 + 51K 36K 7 1N914 42K OFF 3 2 0.01F 1M 1/2 CA3240 + 13 9 10 11 7 1 1N914 4 +6V SOURCE 2 + CA3059
10K (2W) RS (NOTE 12) 12K 8 MT2 120V/220V AC 60Hz/50Hz 40W 120V LIGHT T2300B (NOTE 12) G 4 MT1 COMMON
100F (16V)
44M
NOTE: 12. At 220V operation, TRIAC should be T2300D, RS = 18K, 5W. FIGURE 6. ON/OFF TOUCH SWITCH
CA3240, CA3240A
12M +15V
8 100K 2 +15V 240K HIGH LEVEL 8.2K 5 100K 6 1/2 CA3240 + (0.5V) 3
0.1F +15V 1 33K 3 160K 100K 2 100K 7 + CA3140 6 680 4 LED 7 0.1F
- 1/2
CA3240 +
LOW LEVEL
12M
VO V+ 2N6385 DARLINGTON 3 75 3K 12 2 13 1/2 CA3240E1 + 4 100 VI = 30V + 2.7K 100K 2000F 50V 10 11 1 14 CA3086E TRANSISTOR ARRAY 9 3 8 5 7 1K 4 6 6.2K 1 1W 13 820 680K 50K 100K 12 6 2.2K 82K V+ 2 + 5F 16V 100K 7 9 1/2 CA3240E1 + 1N914 0.056F 10K IO
1 2 180K
+ 500 - F
10
CHASSIS GROUND VO RANGE = 20mV TO 25V LOAD REGULATION: VOLTAGE <0.08% CURRENT <0.05% OUTPUT HUM AND NOISE 150VRMS (10MHz BANDWIDTH) SINE REGULATION 0.1%/VO IO RANGE = 10mA - 1.3A
100K
CA3240, CA3240A
Top Trace: Output Voltage; 500mV/Div., 5s/Div. Bottom Trace: Collector Of Load Switching Transistor Load = 100mA to 1A; 5V/Div., 5s/Div. FIGURE 9. TRANSIENT RESPONSE
+15V 8 10M 3 2 + 1/2 CA3240 1 2000pF +15V 1% 5.1K 2 CA3140 3.9K 100K 1% 5.1K 1% 3 4 0.1F -15V 7 FREQUENCY RESPONSE (-3dB) DC TO 1MHz SLEW RATE = 1.5V/s COMMON MODE REJ: 86dB GAIN RANGE: 35dB TO 60dB 0.1F -15V 6 2K 0.1F OUTPUT 0.1F
100K 1%
2000pF
GAIN CONTROL
100K 1% 100K
6 5 10M
2000pF
1/2 CA3240 + 4
10
CA3240, CA3240A
Vertical: 1.0mV/Div. Amplifier Gain = 100X Scope Sensitivity = 0.1V/Div. Horizontal: >0.2s/Div. (Uncal) FIGURE 11. TYPICAL ELECTROCARIOGRAM WAVEFORM
0.015F
100K +15V 8 +15V 5.1K 3 1.3 K 5 13K 6 + 1/2 CA3240E 2 1/2 CA3240E + 200K 2 7 2K +15V
2K 3 +
CA3140
OUTPUT
4 -15V
4 -15V 100K
200k
0.015F
only the difference is amplified. In this manner, the circuit can be used over a wide range of ambient light conditions without circuit component adjustment. Also, when used with a light source, the circuit will not be sensitive to changes in light level as the source ages.
11
125 100 75
50 25 0 5 10 15 20 25
20
RL = 2k CL = 100pF
10 9 8 7 6 5 4 3 2
RL = 25 oC TA = -40oC 85 oC
10
15
20
25
10
15
20
25
5 0 10K
1M
4M
10 2
103
104
105
10 6
107
FREQUENCY (Hz)
12
(Continued)
POWER SUPPLY REJECTION RATIO (dB) SUPPLY VOLTAGE: VS = 15V TA = 25 oC POWER SUPPLY REJECTION RATIO = VIO/ VS +PSRR
100
100
RS = 100
80 60 -PSRR 40
10
20
1 1
101
10 2 10 3 FREQUENCY (Hz)
10 4
105
101
102
103
104
10 5
10 6
10 7
FREQUENCY (Hz)
TA = 25oC SUPPLY CURRENT (mA) PER AMP (DOUBLE FOR BOTH) VS = 15V ONE AMPLIFIER OPERATING
TA = 25oC VS = 15V RL =
-15
-10
15
-15
-10
15
CROSSTALK (dB)
1000
V- = 0V TA = 25oC
100
V+ = +5V
+15V +30V
10
10 2
10 3
1.0 0.01
0.1
1.0
10
FIGURE 24. VOLTAGE ACROSS OUTPUT TRANSISTORS Q15 AND Q16 vs LOAD CURRENT
13
(Continued)
INPUT AND OUTPUT VOLTAGE REFERENCED TO TERMINAL V- (V) 1.5 1.0 0.5
RL = OUTPUT VOLTAGE (-VO) COMMON MODE VOLTAGE (-VICR) TA = -40oC TO 85 oC 0 -0.5 -1.0 -1.5 TA = 85oC TA = -40oC
TA = 25 oC
TA = -40oC 20 25
10
15
20
25
FIGURE 25A.
FIGURE 25B.
FIGURE 25. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
SUPPLY VOLTAGE: VS = 15V TA = 25oC, RL = 2k, CL = 100pF 10 8 INPUT VOLTAGE (V) 6 4 2 0 -2 -4 -6 -8 -10 0.1
2 4
10mV
10mV
100pF 0.1F
1mV
2k 0.05F 10
CA3240 200
SIMULATED LOAD 2k
+
100pF 0.1F
4.99k
-15V
5.11k
D1 1N914
FIGURE 26C. TEST CIRCUIT (INVERTING) FIGURE 26. INPUT VOLTAGE vs SETTLING TIME
14
(Continued)
PHASE
1K
-150
100
40
10
20 0 101
1 -60
-40
-20
20
40
60
80
100
120
140
102
103
104
10 5
10 6
10 7
10 8
TEMPERATURE (oC)
FREQUENCY (Hz)
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15
VS = 15V TA = 25oC
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