Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers

Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers
April 2007
Features
Low current 0.5mA Superior CTR-2000% Superior CMR-10kV/s CTR guaranteed 070C U.L. recognized (File # E90700) VDE recognized (File # 120915) Ordering option V,
tm
Description
The 6N138/9 and HCPL2730/HCPL2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. The split darlington conguration separating the input photodiode and the rst stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler. In the dual channel devices, HCPL2730/HCPL2731, an integrated emitter-base resistor provides superior stability over temperature. The combination of a very low input current of 0.5mA and a high current transfer ratio of 2000% makes this family particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high fan-out TTL requirements. An internal noise shield provides exceptional common mode rejection of 10 kV/s.
e.g., 6N138V
Dual Channel HCPL2730, HCPL2731
Applications
Digital logic ground isolation Telephone ring detector EIA-RS-232C line receiver High common mode noise line receiver P bus isolation Current loop receiver
Schematic
Package
N/C 1
8 VCC
+ 1 V
F1
8 VCC
8 1
+ 2 V
F
7 VB
_ 2
7 V01
6 VO
_ V
6 V02
F2
8
5 GND
8 1 1
N/C 4
5 GND
+ 4
6N138 / 6N139
HCPL2730 / HCPL2731
2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
Absolute Maximum Ratings (TA = 25C unless otherwise specied)

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
TSTG TOPR TSOL EMITTER IF (avg) IF (pk) IF (trans) VR PD DETECTOR IO (avg) VER VCC, VO PO Average Output Current Emitter-Base Reverse Voltage Supply Voltage, Output Voltage DC/Average Forward Input Current Storage Temperature Operating Temperature
Parameter
Value
-55 to +125 -40 to +85 260 for 10 sec
Units
C C C
Lead Solder Temperature (Wave solder only. See recommended reow prole graph for SMD mounting)
Each Channel Each Channel
20 40 1.0
mA mA A V mW
Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Peak Transient Input Current - (1s P.W., 300 pps) Reverse Input Voltage Input Power Dissipation
Each Channel Each Channel
5 35
Each Channel (6N138 and 6N139) (6N138, HCPL2730) (6N139, HCPL2731)
60 0.5 -0.5 to 7 -0.5 to 18 100
mA V V
Output Power Dissipation
Each Channel
mW
Electrical Characteristics (TA = 0 to 70C unless otherwise specied)

Individual Component Characteristics Symbol
EMITTER VF BVR (VF /TA) DETECTOR IOH Logic HIGH output current (IF = 0mA, VO = VCC = 18V) Each Channel (IF = 0mA, VO = VCC = 7V) Each Channel ICCL Logic LOW supply (IF = 1.6mA, VO = Open) (VCC = 18V) (IF1 = IF2 = 1.6mA, VCC = 18V) (VO1 - VO2 = Open, VCC = 7V ICCH Logic HIGH supply (IF = 0mA, VO = Open, VCC = 18V) (IF1 = IF2 = 0mA, VCC = 18V) (VO1 - VO2 = Open, VCC = 7V *All Typicals at TA = 25C
2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 2
Parameter
Input Forward Voltage
Test Conditions
TA = 25C Each channel (IF = 1.6mA) (TA = 25C, IR = 10A) Each Channel
Device
All
Min. Typ.* Max.

1.30 1.7 1.75
Unit
V
Input Reverse Breakdown Voltage
All
5.0
20
Temperature coefcient of forward voltage (IF = 1.6mA)
All
-1.8
mV/C
6N139 HCPL2731 6N138 HCPL2730 6N138 6N139 HCPL2731 HCPL2730 6N138 6N139 HCPL2731 HCPL2730
0.01
100
0.01
250
0.4 1.3
1.5 3
mA
0.05 0.10
10 20
Transfer Characteristics (TA = 0 to 70C unless otherwise specied)

Symbol
COUPLED CTR Current transfer ratio (Note 1, 2) (IF = 0.5mA, VO = 0.4 V, VCC = 4.5V) Each Channel (IF = 1.6mA, VO = 0.4 V, VCC = 4.5V) Each Channel (IF = 1.6mA, VO = 0.4 V, VCC = 4.5V) Each Channel VOL Logic LOW output voltage output voltage (Note 2) (IF = 0.5mA, IO = 2mA, VCC = 4.5V) (IF = 1.6mA, IO = 8mA, VCC = 4.5V) Each Channel (IF = 0.5mA, IO = 15mA, VCC = 4.5V) Each Channel (IF = 12mA, IO = 24mA, VCC = 4.5V) Each Channel (IF = 1.6mA, IO = 4.8mA, VCC = 4.5V) Each Channel 6N139 HCPL2731 6N139 HCPL2731 6N138 HCPL2730 6N139 6N139 HCPL2731 6N139 HCPL2731 6N139 HCPL2731 6N138 HCPL2730 0.10 0.4 0.20 0.4 0.13 0.4 300 500 400 1100 3500 1300 2500 1300 2500 0.08 0.01 0.4 0.4 V %
Parameter
Test Conditions
Device
Min.
Typ.*
Max.
Unit
*All Typicals at TA = 25C
www.fairchildsemi.com 3
Switching Characteristics (TA = 0 to 70C unless otherwise specied., VCC = 5V)

Symbol Parameter
TPHL Propagation delay time to logic LOW (Note 2) (Fig. 24)
Test Conditions
(RL = 4.7, IF = 0.5mA) TA = 25C (RL = 4.7, IF = 0.5mA) Each Channel TA = 25C (RL = 270, IF = 12mA) TA = 25C (RL = 270, IF = 12mA) Each Channel TA = 25C TA = 25C (RL = 2.2, IF = 1.6mA) Each Channel TA = 25C Each Channel (RL = 4.7, IF = 0.5mA) TA = 25C Each Channel (RL = 270, IF = 12mA) TA = 25C (RL = 270, IF = 12mA) Each Channel TA = 25C (RL = 2.2, IF = 1.6mA) Each Channel (RL = 2.2, IF = 1.6mA) TA = 25C Each Channel (RL = 2.2, IF = 1.6mA)
Device
6N139
Min.
Typ.*
4
Max. Unit
30 25 120 s
HCPL2731 3 6N139 0.2 HCPL2730 HCPL2731 6N138 1.5 HCPL2731 HCPL2730 6N139 HCPL2731 6N139 HCPL2731 6N139 1.3 HCPL2730 HCPL2731 6N138 HCPL2730/1 6N138 HCPL2730/1 6N138 6N139 HCPL2730 HCPL2731 6N138 6N139 HCPL2730 HCPL2731 1,000 10,000 1,000 7 16 10,000 12 22 0.3
100 2 1 3 2 15 10 25
20 90 s
TPLH
Propagation delay time to logic HIGH (Note 2) (Fig. 24)
(RL = 4.7, IF = 0.5mA)
60
10 7 15 5 10 50
35
|CMH|
Common mode transient immunity at logic HIGH (Note 3) (Fig. 25) Common mode transient immunity at logic LOW (Note 3) (Fig. 25)
(IF = 0mA, |VCM| = 10VP-P) TA = 25C, (RL = 2.2) Each Channel (IF = 1.6mA, |VCM| = 10VP-P, RL = 2.2) TA = 25C Each Channel
V/s
|CML|
V/s
** All Typicals at TA = 25C
Isolation Characteristics (TA = 0 to 70C unless otherwise specied)

Symbol
II-O
Characteristics
Input-output insulation leakage current (Note 4) Withstand insulation test voltage (Note 4) Resistance (input to output) (Note 4) Capacitance (input to output) (Note 4, 5) Input-Input Insulation leakage current (Note 6) Input-Input Resistance (Note 6) Input-Input Capacitance (Note 6)
Test Conditions
(Relative humidity = 45%) (TA = 25C, t = 5 s) (VI-O = 3000VDC) (RH 50%, TA = 25C, II-O 2A) ( t = 1 min.) (VI-O = 500VDC) (f = 1MHz) (RH 45%, VI-I = 500VDC) t = 5 s, (HCPL2730/2731 only) (VI-I = 500VDC) (HCPL2730/2731 only) (f = 1 MHz) (HCPL2730/2731 only)
Min.
Typ.*
Max.
1.0
Unit
A
VISO RI-O CI-O II-I
2500 1012 0.6 0.005
VRMS pF A
RI-I CI-I
1011 0.03
pF
** All Typicals at TA = 25C

Notes: 1. Current Transfer Ratio is dened as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Pin 7 open. (6N138 and 6N139 only) 3. Common mode transient immunity in logic HIGH level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic HIGH state (i.e., VO > 2.0V). Common mode transient immunity in logic LOW level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic LOW state (i.e., VO < 0.8V). 4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shor ted together. 6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
Electrical Characteristics (TA = 25C unless otherwise specied)

Current Limiting Resistor Calculations R1 (Non-Invert) = VDD1 - VDF - VOL1 IF R1 (Invert) = VDD1 - VOH1 - VDF IF R2 = VDD2 - = VOLX (@ IL - I2) IL CMOS @ 5V CMOS @ 10V Where: VDD1 - Input Supply Voltage VDD2 - Output Supply Voltage VDF - Diode Forward Voltage VOL1 - Logic 0 Voltage of Driver VOH1 - Logic 1 Voltage of Driver IF - Diode Forward Current VOLX - Saturation Voltage of Output Transistor IL - Load Current Through Resistor R2 I2 - Input Current of Output Gate 74SXX 74LXX 74XX NON-INV. 2000 INV. 510
INPUT R1 (V) CMOS @ 5V R2 (V) CMOS @ 10V R2 (V) 74XX R2 (V) OUTPUT 74LXX R2 (V) 74SXX R2 (V) 74LSXX R2 (V) 74HXX R2 (V)
1000
2200
750
1000
1000
1000
560
NON-INV. 5100 INV. 4700
NON-INV. 2200 INV. 180
74LSXX NON-INV. 2000 INV. 180
74HXX NON-INV. 2000 INV. 180
Fig. 1 Resistor Values for Logic Interface
VDD1
VDD2
VDD2
1 2 3
IN R1
8 7 6
OUT R1 R2 IN
1 2 3 4
8 7 6 5
R2
OUT
Fig. 2 Non-Inverting Logic Interface
Fig. 3 Inverting Logic Interface
Fig. 4 LED Forward Current vs. Forward Voltage

100 1.5
Fig. 5 LED Forward Voltage vs. Temperature
IF = 1.6 mA
FORWARD CURRENT - IF (mA)
FORWARD VOLTAGE - VF (V)

TA = 25C TA = -40C 1.2 1.3 1.4 1.5 1.6
10 TA = 85C
1.4
TA = 70C
1.3
0.1
1.2
0.01
TA = 0C 0.001 1.0 1.1 1.1 -40 -20 0 20 40 60 80 100
FORWARD VOLTAGE - VF (V)
TEMPERATURE - TA (C)
Fig. 6 Non-saturated Rise and Fall Times vs. Load Resistance (6N138 / 6N139 Only)
100 TA = 25C
Fig. 7 Non-saturated Rise and Fall Times vs. Load Resistance (HCPL2730 / HCPL2731 Only)
TA = 25C tf 10
tf
TIME, T (s)
10
TIME - s
tr tr
1 IF ADJUSTED FOR VOL = 2 V 1 0.1 1 10
0.1
10
RL - LOAD RESISTANCE (k)
RL - LOAD RESISTANCE (k)
Fig. 8 Propagation Delay To Logic Low vs. Base-Emitter Resistance (HCPL2730 / HCPL2731 Only)
TPHL - PROPAGATION DELAY TO LOGIC LOW - (s)
6 IF = 1.6 mA, VCC = 5 V RL = 2.2 K, TA = 25C Normalized to RBE = None
Fig. 9 Current Transfer Ratio vs. Forward Current (6N138 / 6N139 Only)
1600
VCC = 5 V VO= 0.4 V
CURRENT TRANSFER RATIO - CTR (%)
1200
TA = 85C 800
TA = 70C 400 TA = -40C 0

0.01 0.1 1 10
TA = 25C TA = 0C
0 0.01
0.1
10
RBE - BASE-EMITTER RESISTANCE - M
IF - FORWARD CURRENT - mA
Fig. 10 Current Transfer Ratio vs. Base-Emitter Resistance (6N138 / 6N139 Only)
1600
Fig. 11 Current Transfer Ratio vs. Forward Current (HCPL2730 / HCPL2731 Only)
5000 VCC = 5 V VO = 0.4 V 4000 TA = 70C TA = 85C TA = 25C 3000 TA = 0C
CTR - CURRENT TRANSFER RATIO (%)
1400
1200
1000
800
CTR - CURRENT TRANSFER RATIO - %
600
2000
TA = -40C
400 IF = 1.6 mA VCC = 5 V VO = 0.4 V 1 10 100 1000
1000
200
0.1
10
100
RBE - BASE RESISTANCE (k)
IF - FORWARD CURRENT - mA
Fig. 12 Output Current vs Output Voltage (6N138 / 6N139 Only)

60 VCC = 5V TA = 25C 50 5 mA 4.5 mA 4 mA 3.5 mA 100 3 mA 120
Fig. 13 Output Current vs Output Voltage

(HCPL2730 / HCPL2731 Only)
IF = 5.0 mA IF = 4.5 mA
TA = 25C VCC = 5.0 V IF = 4.0 mA
IO - OUTPUT CURRENT (mA)
IO-OUTPUT CURRENT - mA
IF = 3.5 mA 80 IF = 3.0 mA IF = 2.5 mA 60 IF = 2.0 mA IF = 1.5 mA 40 IF = 1.0 mA
40
2.5 mA
2 mA 30 1.5 mA 20 1 mA 10
20 IF = 0.5 mA
0 0 1 2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VO - OUTPUT VOLTAGE (V)
VO - OUTPUT VOLTAGE (V)
Fig. 14 Output Current vs. Input Diode Forward Current (6N138 / 6N139 Only)
100 100 VCC = 5.0 V VO = 0.4 V TA = 85C
Fig. 15 Output Current vs Input Diode Forward Current (HCPL2730 / HCPL2731 Only)
IO - OUTPUT CURRENT (mA)
IO - OUTPUT CURRENT - mA
10
VCC = 5 V VO = 0.4 V 10
TA = 25C
TA = 85C 0 TA = 70C TA = 25C TA = 0C TA = -40C 0 0.01
1 TA = -40C
0.1 0.1 1 10 0.1 1 10 100
IF - INPUT DIODE FORWARD CURRENT - mA
Fig. 16 Logic Low Supply Current vs. Input Diode Forward Current (6N138 / 6N139 Only)
4.0 100
Fig. 17 Logic Low Supply Current vs. Input Diode Forward Current
TA = 25C
ICCL - LOGIC LOW SUPPLY CURRENT (mA)
3.5
ICCL - LOGIC LOW SUPPLY CURRENT - mA
3.0
HCPL2731 VCC = 18 V 10 HCPL2730 HCPL2731 VCC = 7 V
2.5 VCC = 5 V 2.0 VCC = 18 V 1.5
1.0
0.5
0.0 0 2 4 6 8 10 12 14 16
0.1 0.1 1 10 100
IF - FORWARD CURRENT (mA)
Fig. 18 Propagation Delay vs. Input Diode Forward Current (6N138 / 6N139 Only)
70
Fig. 19 Propagation Delay vs. Input Diode Forward Current

70
VCC = 5 V TA = 25C
60
VCC = 5 V TA = 25C 60
tP - PROPAGATION DELAY - s
50
50 (tPHL) RL = 2.2 k or 4.7 k 40
(tPHL) RL = 2.2 k or 4.7 k

40
30
30 (tPLH) RL = 4.7 k 20 (tPLH) RL = 2.2 k
20
(tPLH) RL = 4.7 k
10
10 (tPLH) RL = 2.2 k
0 0 1 2 3 4 5 6 7 8 9 10 0 2 4 6 8 10
Fig. 20 Propagation Delay to Logic Low vs. Pulse Period (6N138 / 6N139 Only)
100
Fig. 21 Propagation Delay to Logic Low vs. Pulse Period

100
tPHL - PROPAGATION DELAY to LOGIC LOW - s
6N139 IF = 0.5 mA RL = 4.7 k 10
tPHL - PROPAGATION DELAY to LOGIC LOW - s
10
HCPL2731 IF = 0.5 mA RL = 4.7 k
6N138 IF = 1.6 mA RL = 2.2 k 1
HCPL2730 HCPL2731 IF =1.6 mA RL = 2.2k
TA = 25C
TA = 25C 0.1 0.01 0.1 1 10 0.1 0.01 0.1 1 10
T - INPUT PULSE PERIOD - ms
T - INPUT PULSE PERIOD - ms
Fig. 22 Propagation Delay vs. Temperature (6N138 / 6N139 Only)

50 HCPL2730 : IF = 1.6 mA, RL = 2.2 k HCPL2731 : IF = 0.5 mA, RL = 4.7 k 40 40 50
Fig. 23 Propagation Delay vs. Temperature

HCPL2730 : IF = 1.6 mA, RL = 2.2 k HCPL2731 : IF = 0.5 mA, RL = 4.7 k
tPLH (HCPL2731) 30
tPLH (HCPL2731) 30
20 tPLH (HCPL2730)
20 tPLH (HCPL2730)
10
tPHL (HCPL2731) tPHL (HCPL2730)
10
tPHL (HCPL2731) tPHL (HCPL2730)
0 0 10 20 30 40 50 60 70 80
0 0 10 20 30 40 50 60 70 80
TA - TEMPERATURE (C)
TA - TEMPERATURE (C)
Pulse Generator IF tr = 5ns Z O = 50 V 10% D.C. I/ f< 100ns
1 2
VF
Noise Shield
8 7 6 5
VCC
+5 V
Pulse Generator tr = 5ns Z O = 50V
IF
Noise Shield
1
VF1 -
8 7 6 5
VCC RL V01 0.1 F
+5 V
VB
RL
10% DUTY CYCLE I/f < 100 S VO
2
-
VO C L = 15 pF*
3
I F Monitor Rm
VO 0.1 F
3 4
V02
IF MONITOR Rm C L = 15 pF*
VF2 + GND
GND
Test Circuit for 6N138, 6N139 IF
Test Circuit for HCPL2730 and HCPL2731
VO
5V
1.5 V
1.5 V VOL
TPHL
TPLH
Fig. 24 Switching Time Test Circuit
IF
1 2
VF A B VFF
Noise Shield
8 7 6 5
VCC
+5 V IF
+ VF1 A
Noise Shield
1 2 3 4
8 7 6 5
VCC RL V01 0.1 F
+5 V
VB
RL B VO 0.1 F VFF
VO
3 4
+
VCM
VO
VF2 +
V02
GND
GND
Pulse Gen
VCM -
Pulse Gen Test Circuit for 6N138 and 6N139 VCM 10 V 10% tr 90% 90% 10% tf Test Circuit for HCPL2730 and HCPL2731
0V
VO Switch at A : IF = 0 mA VO Switch at B : I F = 1.6 mA
5V
VOL
Fig. 25 Common Mode Immunity Test Circuit
Physical Dimensions
Dimensions are in inches (millimeters) unless otherwise noted.
Through Hole
PIN 1 ID.
4 3 2 1
Surface Mount
0.390 (9.91) 0.370 (9.40)
4 3 2 1
0.270 (6.86) 0.250 (6.35)

5 6 7 8
PIN 1 ID.
0.270 (6.86) 0.250 (6.35)
0.390 (9.91) 0.370 (9.40)
SEATING PLANE
0.070 (1.78) 0.045 (1.14) 0.200 (5.08) 0.140 (3.55) 0.020 (0.51) MIN
0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN
0.300 (7.62) TYP 0.016 (0.41) 0.008 (0.20)
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 15 MAX 0.300 (7.62) TYP
0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP Lead Coplanarity : 0.004 (0.10) MAX
0.045 [1.14] 0.315 (8.00) MIN 0.405 (10.30) MIN
0.4" Lead Spacing

PIN 1 ID.
Recommended Pad Layout for Surface Mount Leadform
0.070 (1.78)
0.270 (6.86) 0.250 (6.35)
0.060 (1.52)
0.390 (9.91) 0.370 (9.40)
0.100 (2.54) 0.295 (7.49)

0.070 (1.78) 0.045 (1.14)
SEATING PLANE
0.415 (10.54)
0.030 (0.76)
0.200 (5.08) 0.140 (3.55)
0.004 (0.10) MIN
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 0 to 15 0.400 (10.16) TYP
Ordering Information
Option
No Sufx S SD W V WV SV SDV
Example Part Number

6N138 6N138S 6N138SD 6N138W 6N138V 6N138WV 6N138SV 6N138SDV
Description
Standard Through Hole Device, 50 pcs per tube Surface Mount Lead Bend Surface Mount; Tape and reel 0.4" Lead Spacing VDE0884 VDE0884; 0.4 lead spacing VDE0884; surface mount VDE0884; surface mount; tape and reel
Marking Information
2730 V
3 4
2 6
XX YY T1
5
Denitions
1 2 3 4 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option See order entry table) Two digit year code, e.g., 07 Two digit work week ranging from 01 to 53 Assembly package code
Tape Specications
12.0 0.1 4.90 0.20 0.30 0.05 4.0 0.1 4.0 0.1 1.55 0.05 1.75 0.10
7.5 0.1 13.2 0.2 10.30 0.20 16.0 0.3
0.1 MAX
10.30 0.20
1.6 0.1
User Direction of Feed
Reow Prole
300 Temperature (C) 250 200 150 100 50 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) Peak reflow temperature: 225C (package surface temperature) Time of temperature higher than 183C for 60150 seconds One time soldering reflow is recommended Time above 183C, 60150 sec Ramp up = 3C/sec 225 C peak 215 C, 1030 s
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Rev. I26
2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
No Identification Needed
Full Production
Obsolete
Not In Production

Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers

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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers

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Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers

Absolute Maximum Ratings (TA = 25C unless otherwise specied)

Each Channel Each Channel

Each Channel Each Channel

Each Channel (6N138 and 6N139) (6N138, HCPL2730) (6N139, HCPL2731)

60 0.5 -0.5 to 7 -0.5 to 18 100

Output Power Dissipation

Electrical Characteristics (TA = 0 to 70C unless otherwise specied)

Min. Typ.* Max.

Input Reverse Breakdown Voltage

Temperature coefcient of forward voltage (IF = 1.6mA)

Transfer Characteristics (TA = 0 to 70C unless otherwise specied)

*All Typicals at TA = 25C

Switching Characteristics (TA = 0 to 70C unless otherwise specied., VCC = 5V)

Propagation delay time to logic HIGH (Note 2) (Fig. 24)

(RL = 4.7, IF = 0.5mA)

** All Typicals at TA = 25C

Isolation Characteristics (TA = 0 to 70C unless otherwise specied)

VISO RI-O CI-O II-I

2500 1012 0.6 0.005

** All Typicals at TA = 25C

Electrical Characteristics (TA = 25C unless otherwise specied)

NON-INV. 5100 INV. 4700

NON-INV. 2200 INV. 180

NON-INV. 1800 INV. 100

NON-INV. 2000 INV. 360

74LSXX NON-INV. 2000 INV. 180

74HXX NON-INV. 2000 INV. 180

Fig. 1 Resistor Values for Logic Interface

Fig. 2 Non-Inverting Logic Interface

Fig. 3 Inverting Logic Interface

Fig. 4 LED Forward Current vs. Forward Voltage

Fig. 5 LED Forward Voltage vs. Temperature

FORWARD CURRENT - IF (mA)

FORWARD VOLTAGE - VF (V)

TA = 0C 0.001 1.0 1.1 1.1 -40 -20 0 20 40 60 80 100

FORWARD VOLTAGE - VF (V)

1 IF ADJUSTED FOR VOL = 2 V 1 0.1 1 10

RL - LOAD RESISTANCE (k)

RL - LOAD RESISTANCE (k)

VCC = 5 V VO= 0.4 V

CURRENT TRANSFER RATIO - CTR (%)

TA = 70C 400 TA = -40C 0

RBE - BASE-EMITTER RESISTANCE - M

CTR - CURRENT TRANSFER RATIO (%)

CTR - CURRENT TRANSFER RATIO - %

400 IF = 1.6 mA VCC = 5 V VO = 0.4 V 1 10 100 1000

RBE - BASE RESISTANCE (k)

Fig. 12 Output Current vs Output Voltage (6N138 / 6N139 Only)

Fig. 13 Output Current vs Output Voltage

TA = 25C VCC = 5.0 V IF = 4.0 mA

IO - OUTPUT CURRENT (mA)

IF = 3.5 mA 80 IF = 3.0 mA IF = 2.5 mA 60 IF = 2.0 mA IF = 1.5 mA 40 IF = 1.0 mA

VO - OUTPUT VOLTAGE (V)

VO - OUTPUT VOLTAGE (V)

IO - OUTPUT CURRENT (mA)

TA = 85C 0 TA = 70C TA = 25C TA = 0C TA = -40C 0 0.01

0.1 0.1 1 10 0.1 1 10 100

IF - INPUT DIODE FORWARD CURRENT - mA

IF - INPUT DIODE FORWARD CURRENT - mA

ICCL - LOGIC LOW SUPPLY CURRENT (mA)

ICCL - LOGIC LOW SUPPLY CURRENT - mA