Chapter 2.

Functions

1 Functions
1.1 Performance Specifications
1.1.1 K200S / K300S / K1000S Items
Program control method I/O control method Numbers of Instructions Basic Application 226 0.5/step 7k steps P0000 ~ P015F (256 points) M (Auxiliary relay) K (Keep relay) L (Link relay) F (Special relay) T (Timer relay) C (Counter relay) S (Step controller) D (Data register) The range of integer 0.2/step 15k steps P0000 ~ P031F (512points) 30k steps P0000 ~ P063F (1,024 points)

K200S

K300S

K1000S

Cyclic execution of stored program, Time-driven interrupt, Event-driven interrupt Indirect , Direct by program command 30 228

Processing speed Program capacity P (I/O relay)

M0000 ~ M191F (3,072 points) K0000 ~ K031F (512 points) L0000 ~ L063F (1,024 points) F0000 ~ F063F (1,024 points) 100msec (T000 ~ T191 : 192 points), 10msec (T192 ~ T255 : 64 points) The range of 100ms and 10ms timer can be changed with parameter setting. C000 ~ C255 (256 points) S00.00 ~ S99.99 (100100 steps) D0000 ~ D4999 (5,000 words) 1. Signed instruction 16 bit : 32768 ~ 32767 32 bit : 2147483648 ~ 2147483647 2. Unsigned instruction 16 bit : 00000 ~ 65535 32 bit : 00000000 ~ 4295967295 D0000 ~ D9999 (10,000 words)

Timer types Counter types Programming language Special functions

On-delay, Off-delay, Accumulation, Monostable, Retriggerable (5 types) Up, Down, Up-down, Ring counter (4 types) Mnemonic, Ladder diagram Real time clock, RUN mode editing, Forced I/O control

Chapter 2. Functions

1.2 Memory devices of MASTER-K series

1.2.1

Input / output area : P

The P devices are used for data transaction between the PLC CPU and external devices. The input devices hold ON/OFF data sent from external devices (e.g. pushbuttons, select switches, limit switches, digital switches, etc.) to input module. Input data is used by the program as contact data (NO1 and NC contacts) and as the source data for basic and application instructions. The output devices are used to output operation results of the program from the output module to external devices (e.g. solenoids, magnetic switches, signal lamps, digital indicators). Only NO contact type is available for output devices. The redundant P devices that are not connected to external devices can be used in the same way with the auxiliary relay M.

< Figure 1. The example of input/output configuration >

P0000

P0020 ( ) P0020 P0021 ( ) P0023 ( )

P0000 P0001 P0002 Input

P0001

P0002

P0021

P0020 P0021 P0021 P0024 ( ) Output

P00201

P0023 P0024

The input signals are stored in batch in the input data memory before execution of each scan. The data in the input data memory is used for execution of the sequence program operation. The operation results are output by each result to the output data memory. The data in the output data memory is output in batch to the output modules after execution of the END instruction. Please make sure that there is no conflict of input and output in the user program because the MASTER-K series uses a P area for input and output in common.

NO : Normally Open contact, NC : Normally Closed contact

Chapter 2. Functions

< Figure 2. Flow of input / output data in the refresh mode >

Read
P0000 P0020

Input P Data memory

Read

( )
P0001 P0020 P0021

Input module

CPU

( )

Write Read Output P Data memory Write

Output module

CPU module

- Input refresh Input data is read () in batch from the input module before execution of step 0 and stored in the input data memory. - When an input contact command is executed : Input data is read () from the input data memory and used for execution of the sequence program. - When an output contact command is executed : Output data is read () from the output data memory and used for execution of the sequence program. - When an output OUT instruction is executed : The operation result () is stored in the output data memory. - Output refresh Data () in the output data memory is output in batch to the output module after execution of the END instruction.

1.2.2

Auxiliary relay : M
The M area is internal relay used in the PLC CPU, and can not be connected directly with external devices. All M area except designated as latched area will be cleared as 0 when the PLC is switched on or turned to RUN mode. With K200S / K300S / K1000S, a user can change the latched area by parameter setting.

Chapter 2. Functions

1.2.3

Keep relay : K
The K area functions as same as M area. However, the operation results are retained if the PLC is switched on or turned to RUN mode. The K area can be cleared by following methods; put the initialization routine in the sequence program. Run the data clear function of hand-held loader (KLD-150S) Run the data clear function of graphic loader (KGL-WIN)

1.2.4

Link relay : L
The L area is the internal memory for use in a data or computer link system. It can be used as same as M area if no link module is mounted on the PLC system. With K200S / K300S / K1000S, it is possible to change the range of latch area by parameter setting. For the detail usage of L area, please refer the list of link relay at appendix and the computer link users manual.

1.2.5

Step control relay : S

The S area can be used for two kinds of step control according to the instruction OUT or SET. If the OUT instruction is used, the S area functions as last-in priority. Otherwise, it functions as sequential control. (See the chapter 4 for detailed usage.) When the CPU is switched on or turned to RUN mode, the S area will be initialized as first step (Sxx.00) except the latch area designated by parameter setting.

OUT OUT OUT

S00.02 S00.29 S00.61

In the same group, the last-in condition has the priority to run.

SET SET SET SET SET

S00.01 S00.02 S00.03 S00.04 S00.00

Sequential control means that a certain process can be executed only after the previous process is completed.

The clear condition (Sxx.00 ) can be operated at any time while the sequential process is running.

Chapter 2. Functions

1.2.6

Timer relay : T
MASTER-K series have 100msec and 10msec timer. The timing method is various according to the timer instructions (TON, TOFF, TMR, TMON, TRTG). The maximum timer setting value is hFFFF by hexadecimal or 65535 by decimal. The following figure shows the types and timing methods of each timer instruction.

< Figure 3. Types and timing methods of timer instructions >

Timer instruction Input contact No. of timer relay Setting value

Timer instruction TON

Description ON Delay

Timing method Increment Input condition t Timer output

Time chart

ON Delay timer

t =setting value OFF Delay timer t

TOFF

OFF Delay

Decrement

Input condition

Timer output TMR Accumulation ON Delay Increment Input condition t1 Timer output TMON Monostable Decrement Input condition t2

t =setting value Accumulation timer

t = t1 + t2

t =setting value Monostable timer t

Timer output TRTG Retriggerable Decrement Input condition Timer output

t =setting value Retriggerable timer

t =setting value

Chapter 2. Functions

1.2.7

Counter relay : C
The counter counts the rising edges of pulses driving its input signal and counts once only when the input signal is switched from off to on. MASTER-K series have 4 counter instructions such as CTU, CTD, CTUD, and CTR. The maximum counter setting value is hFFFF ( = 65535). The followings shows brief information for counter operation.

< Figure 4. Types and counting methods of counter instructions > Count Pulse U CXX CXXX R <S> XXXX Reset signal Rising Edge (OFFON)

Counter instruction CTU

Type Up Counter

Counting method Increment

Input signal 1 Reset signal Count Pulse Elapsed value Counter output

Time chart

Setting value

CTD

Down counter

Decrement

Reset signal Count Pulse Elapsed value Counter output Setting value

CTUD

Up/Down Counter

Increment / Decrement

Reset signal Increase pulse Decrease pulse Elapsed value Counter output Setting value

CTR

Ring counter

Increment

1 Reset signal Count Pulse Elapsed value Counter output Setting value

Chapter 2. Functions 1.2.8 Data register : D

The D area is used to store numeric data. Each data register consists of 16 bits (1 word) which is the unit of data read and write. The data resister number designated by the double-word instruction holds the lower 16 bits and the designated data register number + 1 holds the higher 16 bits. Example) DMOV h12345678 D050 High 16 bits D51 h1234 Lower 16 bits D50 h5678

The D area except latched area assigned by parameter setting will be cleared as 0 when the CPU is switched on or turned to RUN mode.

Chapter 2. Functions

2 Instructions
2.1 Basic instructions

2.1.1

Contact instructions
CPU

Mnemonic symbol LOAD LOAD NOT AND AND NOT OR OR NOT

Function No. -

Ladder symbol

Unit

Contents of processing

Page

NO contact operation start NC contact operation start NO contact series connection NC contact series connection NO contact parallel connection NC contact parallel connection

4- 1 4- 1 4- 3 4- 3 4- 4 4- 4

2.1.2

Connection instructions
CPU

Mnemonic symbol AND LOAD OR LOAD MPUSH MLOAD

Function No. 005 006

Ladder symbol

Unit

Contents of processing

Page

A A B MPUSH MLOAD MPOP

Series connection of blocks Parallel connection of blocks Stores the operation result Reads the operation result from MPUSH Reads the operation result from MPUSH and clears the result

4- 6 4- 8 4- 10 4- 10

( ) ( ) ( )

MPOP

007

4- 10

2.1.3

Inversion instruction
Ladder symbol Contents of processing
CPU

Mnemonic symbol NOT

Function No. -

Unit

Page

Invert the operation result

4- 12

Remark Applicable CPU type : = All CPUs ; = K10S1 / K10S / K30S / K60S ; = K200S / K300S / K1000S 8

Chapter 2. Functions

2.1.4

Master control instructions

CPU

Mnemonic symbol MCS MCSCLR

Function No. 010 011

Ladder symbol

Unit

Contents of processing

Page

MCS

Start a master control End a master control

4- 13 4 13

MCSCLR n

2.1.5

Output instructions
CPU

Mnemonic symbol D

Function No. 017

Ladder symbol

Unit

Contents of processing

Page

Generates one scan pulse on the rising edge of input signal. Generates one scan pulse on the falling edge of input signal. Set a device Reset a device Output a device

4- 16

D NOT

018

D NOT D

4 18

SET RST OUT

SET RST )

D D

4 19 4 20

2.1.6

Step controller instructions

Ladder symbol Contents of processing
CPU

Mnemonic symbol SET S OUT S

Function No. -

Unit

Page

SET Sxx.xx ( Sxx.xx )

Sequential processing control Last-in priority control

4- 22 4 24

2.1.7

END instruction
Ladder symbol Contents of processing
CPU

Mnemonic symbol END

Function No. 001

Unit

Page

END

Ends a sequence program

4- 25

Chapter 2. Functions

2.1.8

No operation instruction
CPU

Mnemonic symbol NOP

Function No. 000

Ladder symbol

Unit

Contents of processing

Page

No ladder symbol

No operation (occupies 1 step)

4- 26

2.1.9

Timer instructions
Ladder symbol Timer setting value TON Txxx v Output Timer relay No. t = setting value <Off delay timer> Input TOFF Txxx v Output Timer relay No. Timer setting value TMR Txxx v

Mnemonic symbol TON

Contents of processing <On delay timer> Input t

CPU

Function No. -

Unit

Page

4- 27

TOFF

Timer setting value

4 29

TMR

Input

t = setting value <Accumulation timer>

4 31

Timer relay No. TMON Timer setting value TMON Txxx v -

Output

t1 t 2

t = setting value ( t = t1+t2 ) <Monostable timer> t

4 33

Input Output Timer relay No. TRTG Timer setting value TRTG Txxx v Timer relay No. Input Output

t = setting value <Retriggerable timer> t

4 35

t = setting value

10

Chapter 2. Functions

2.1.10 Counter instructions

Mnemonic symbol CTU
CPU

Function No. -

Ladder symbol
Counter relay No.

Unit

Contents of processing

Page

Count Pulse
Reset

- Reset
Count Pulse Current value Output

4- 37

C U CTU xxx R <S> v

Setting value

Setting value

CTD

Count Pulse
Reset

Counter relay No.

- Reset
Count Pulse Current value Output

4 38

C D CTD xxx R <S> v

Setting value

Setting value

CTUD

Up Pulse Down Pulse

Reset

Counter relay No.

Reset Up Pulse Down Pulse Current value

4 39

U CTUD C xxx D R <S> v

Setting value

Setting value Output

CTR

Count Pulse
Reset

Counter relay No.

Reset Count Pulse Current value Output

4 41

C D CTR xxx R <S> v

Setting value

11

Chapter 2. Functions

2.2 Application instructions

2.2.1

Data transfer instructions

CPU

Mnemonic symbol MOV MOVP

Function No. 080 081

Ladder symbol

Unit

Contents of processing

Page

16 bits

MOV MOVP

S D S D

Move data
[ ]

[ ]

5-1

D
5-1

DMOV DMOVP CMOV CMOVP

S D S D

DMOVP

083

32 bits

DMOV

082

Move data
[

+ 1,

+ 1,

D
5-3

S D S D

CMOVP

085

16 bits

CMOV

084

Complement data move

[ ]

D D n
5-5 5-3

DCMOV DCMOVP

S D S D

DCMOVP

087

32 bits

DCMOV

086

Complement data move

[

+ 1,

+ 1,

16 bits

GMOV GMOVP

090 091 GMOV S D n

Group move

GMOVP S D n 16 bits FMOV FMOVP 092 FMOV 093 FMOVP S D n Filling move S

S D n

D n

5-7

n bit

BMOV BMOVP

100 BMOV 101

S D Cw

Bit move
(See the 5-9 page for detail usage)

5-9

BMOVP S D Cw

12

Chapter 2. Functions

2.2.2

Conversion instructions
CPU

Mnemonic symbol BCD BCDP

Function No. 060 061

Ladder symbol

Unit

Contents of processing

Page

16 bits

BCD BCDP

S D S D

BCD conversion
[ ]

BCD D
]

5-11

Binary S

DBCD DBCDP

S D S D

32 bits

DBCD DBCDP

062 063

BCD conversion
[

5-11

Binary S

+ 1,

+ 1,

BCD D Binary D
5-14 5-14

BIN BINP

S D S D

16 bits

BIN BINP

064 065

BIN conversion BCD

[ ]

DBIN DBINP

S D S D

32 bits

DIND DBINP

066 067

BIN conversion BCD S

+ 1, ]

+ 1,

Binary D

2.2.3

Shift instructions
CPU

Mnemonic symbol BSFT BSFTP

Function No. 074 075

Ladder symbol

Unit

Contents of processing

Page

S1-S2 bits

S1

S1

S2

S2

5-36

BSFT BSFTP

S1 S2 S1 S2

S2

S2

S1

S1

S1-S2 words

WSFT WSFTP

070 071 WSFT WSFTP S1 S2 S1 S2

S1

S1

S2

S2

5-38

S2

S2

S1

S1

16 bits

SR SR D n

D +n

5-40

13

Chapter 2. Functions

3.2.3 Compare instructions

Function No. 028 094 188 038 096 196 048 098 198 058 106 216 068 108 218 078 118 228 Unit

Mnemonic symbol LOAD= AND= OR= LOAD> AND> OR> LOAD< AND< OR< LOAD>= AND>= OR>= LOAD<= AND<= OR<= LOAD<> AND<> OR<>

S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2

16 bits

= = = > > > < < < >= >= >= <= <= <= <> <> <>

The input condition is switched on when [S1] = [S2]

CPU

Ladder symbol

Contents of processing

Page

5-21 5-22 5-23

The input condition is switched on when [S1] > [S2] (Signed comparison)

16 bits

5-21 5-22 5-23

The input condition is switched on when [S1] < [S2] (Signed comparison)

16 bits

5-21 5-22 5-23

The input condition is switched on when [S1] >= [S2] (Signed comparison)

16 bits

5-21 5-22 5-23

The input condition is switched on when [S1] <= [S2] (Signed comparison)

16 bits

5-21 5-22 5-23

16 bits

The input condition is switched on when [S1] <> [S2] (Not equal)

5-21 5-22 5-23

14

Chapter 2. Functions

2.2.4

Increment / Decrement instructions

CPU

Mnemonic symbol INC INCP DINC DINCP DEC DECP DDEC DDECP

Function No. 020 021 022 023 024 025 026 027

Ladder symbol

Unit

Contents of processing

Page

16 bits

INC INCP DINC DINCP DEC DECP DDEC DDECP

D D D D

Increment
[ ] +1

[ ]

5-24

D
5-24

32 bits

Increment
[ +1, D ] +1 D [ +1, ]

D
5-26

D D

16 bits

Decrement
[ ] -1

D
5-26

D D

32 bits

Decrement
[ D +1, ] -1 D [ +1, ]D

2.2.5

Exchange instructions
Ladder symbol Contents of processing
CPU

Mnemonic symbol XCH XCHP DXCH DXCHP

Function No. 102 103 104 105

Unit

Page

16 bits

XCH XCHP DXCH DXCHP

D1 D2 D1 D2 D1 D2 D1 D2

[ D1 ]

[ D2 ]

5-42

32 bits

[ D1+1, D1 ]

[ D2+1, D2 ]

5-42

15

Chapter 2. Functions 2.2.6 BIN arithmetic instructions

CPU

Mnemonic symbol ADD ADDP

Function No. 110 111 ADD

Ladder symbol

Unit

Contents of processing

Page

16 bits

S1 S2 S1 S2

D D

[ S1 ] + [ S2 ]

[D]

5-44

ADDP

32 bits

DADD DADDP

112 113

DADD DADDP SUB SUBP

S1 S2 S1 S2 S1 S2 S1 S2

D D

[S1+1, S1] + [S2+1, S2] [D+1, D]

5-44

16 bits

SUB SUBP

114 115

D D

[ S1 ] - [ S2 ]

[D]

5-46

32 bits

DSUB DSUBP

116 117

DSUB DSUBP MUL MULP

S1 S2 S1 S2 S1 S2 S1 S2

D D

[S1+1, S1] - [S2+1, S2] [D+1, D]

5-46

16 bits

MUL MULP

120 121

D D

[ S1 ] [ S2 ]

[ D+1, D ]

5-48

[D+1] : High word, [D] : Low word

32 bits

DMUL DMULP

122 123 DMUL DMULP S1 S2 S1 S2 D D

[S1+1, S1][S2+1, S2] [D+3,D+2,D+1,D] [D+3,D+2] = Higher 2 words [D+1, D] = Lower 2 words

5-48

16