ABSTRACT

The information age we are in is tightly linked to generation, storage and transmission of huge amounts of data. A key element in this information revolution is the capability of storage systems, together with their very fast transfer rates and low cost. Different technologies are used for information storage, the most popular one being the optical storage which is used in the broadly extended compact disc, digital versatile disc and Blu-ray disc systems. In these systems, information storage and reading are performed in a sequential way which eventually limits the transfer rate causing capped performance by the processor. There are several drivers of storage growth, including the increasing need to capture data from and serve data to Web clients, resulting in a large number of points of access for data housed in the data centre , increasing sizes of data objects, with growth in image and video applications, need to retain data for extended periods of time to satisfy regulatory or business process obligations, need to replicate data to meet disaster recovery/business resiliency requirements. A promising way to increase both storage capacity and transfer rate Racetrack memory. Racetrack Memory is an experimental non-volatile memory device under development at IBM's Almaden Research Center by a team led by Stuart Parkin. In early 2008, a 3-bit version was successfully demonstrated. If it is developed successfully, racetrack would offer storage density higher than comparable solid-state memory devices like flash RAM and similar to conventional disk drives, but with much higher read/write performance. It is one of a number of new technologies trying to become a universal memory in the future.

1. INTRODUCTION
1.1 Evolution of Computer Storage One of the first storage devices is the magnetic tape used first in 1951. The recording density was 128 characters per inch (198 micrometer/character) on eight tracks at a linear speed of 100 in/s (2.54 m/s), yielding a data rate of 12,800 characters per second. Of the eight tracks, six were data, one was a parity track, and one was a clock, or timing track. Making allowance for the empty space between tape blocks, the actual transfer rate was around7,200 characters per second.Magnetic recorders using steel wire or steel tape were used in some specialized areas, but the real break-through came with the replacement of wire, as a recording medium, by a thin flexible layer of plastic tape coated with a magnetizable material. The hard-disk drive is a wonder of modern technology, consisting of a stack of disk platters. Each one an aluminum alloy or glass substrate coated with a magnetic material and protective layers. Read write heads, typically located on both sides of each platter, record and retrieve data from circumferential tracks on the magnetic medium. A spindle motor rotates the stack at speeds of between 3,600 and 10,000 revolutions per minute. Then floppy disk was invented in 1969. It was used until the late 1990s. Floppy disks started with the 8 inches floppy disks. The first 8 inch disks had a capacity of around 80KBs then increased to 1200KBs in 1977. Later came the 5.25 inches disks in 1976 with a capacity of 90KBs and increased to 1.2MBs in 1982 and finally came the 3.5 inches disk in 1982 with a capacity of 280KBs and reached 1.44MBs in 1987. The disk shown in the image is a 5.25 inches disk. The Compact Disc-CD was invented in 1982. This was an Audio CD, digital audio. Soon the computer industry recognized that the large amount of digital audio data could be replaced by digital computer data. CD-ROM (Compact Disc Read-Only Memory) represents a new important tool for the storage, retrieval, and the distribution of information. CD-ROMs can store and play back audio, video, graphic images, digital data, and digitized text. CDs contain computer data in the same way as the hard disk. Compact Disks are usually in the ISO 9660 format. This is a data format that was introduced in 1984 by the International Standards Organization (ISO). Since then it has succeeded in becoming a widely accepted cross-platform.

After CD it was the turn of DVD which was developed in the late 1990s.The DVD capacity is 4.7 GB for single layer DVDs, and 8.5 GB for dual layer DVDs. DVDs resemble Compact Discs in that they have the exact appearance.These read-only disks hold 4.7 GB of data, and the format is standard to both the PC and the consumer electronics markets. Then Flash drives were introduced around 1998. As of April 2007, memory capacities for USB Flash Drives currently are sold from 32 megabytes up to 64 gigabytes. Flash drives are very handy because of their size (they fit in your pocket), their storage capacity, their speed and their ease of use. The HD DVD is a high density DVD which started in 2003. The HD DVD is the successor of the DVD. It has a capacity of 15 GB for a single layer disk and 30GBs for a dual layer disk. Blu-Ray disc Employs a blue laser ray instead of a red one (hence the name) which allows more precision. It has a capacity of 25 GB for a single layer disk and 50GBs for a dual layer disk. The home video game console system PlayStation 3 (Sony) is shipped with a disk drive that is called 2x Blu-ray Disc drive.

1.2 Existing System & Limitations Almost all the above mentioned technologies in the evolution of computer storage are being used today and many of these will continue for some more time in the near future. Storage capacity is not the only issue when dealing with hard disks. The rate with which data can be accessed is also becoming an important factor that may also determine the useful life span of magnetic disk-drive technology. Although the capacity of hard-disk drives is surging by 130 percent annually, access rates are increasing by a comparatively tame 40 percent. Requirement of high capacity mass portable storage makes room for a newer technology. With the demand for storage and relative access rate increasing day by day, higher versions have become the need of the hour and seem to be inevitable. Limitations With Disk Bandwidth Access Time Reliability Power

Disk Performance improves very slowly. Gap between processor and disk performance
widens rapidly. Bandwidth gap can be solved with many parallel disks but need 10,000 disks 3

today, 500,000 disks by 2020 ,but thats just for a traditional high-end HPC system . Data intensive problems are much worse Access time gap has no good solution. disk access times decrease only 5% per year complex caching or task switching schemes help sometimes. Newest disk generations are less reliable than older ones. Data losses occur in even the best enterprise-class storage systems. Disk power dissipation is a major factor in data-centric systems
2006 IBM Corporation

Limitations with Flash Read/Write Access Times Write endurance Flash Performance showing no improvement. Gap between processor and flash performance continues to widen Write endurance is less than 106 and showing no improvement trends wheras the needed is greater than 109 to cater to frequent writes as data continually flows into the system.Tomorrows hand-held devices will be continuously updated. Access time gap has no good solution

1.3 Proposed System Here a proposal for a novel storage-class memory is described in which magnetic domains are used to store information in a "magnetic race-track". The magnetic race-track shift register storage memory promises a solid state memory with storage capacities and cost rivalling that of magnetic disk drives but with much improved performance and reliability. The magnetic race track is comprised of tall columns of magnetic material arranged perpendicularly to the surface of a silicon wafer. The domains are moved up and down the race-track by nanosecond long current pulses using the phenomenon of spin momentum transfer. The domain walls in the magnetic race-track are read using magnetic tunnel junction magneto resistive sensing devices arranged in the silicon substrate. Recent progress in developing magnetic tunnel junction devices with giant tunnelling magneto resistance exceeding 350% at room temperature will be mentioned. Experiments exploring the current induced motion and depinning of domain walls in magnetic nano-wires

with artificial pinning sites will be discussed. The domain wall structure, whether vortex or transverse, and the magnitude of the pinning potential is shown to have surprisingly little effect on the current driven dynamics of the domain wall motion. By contrast the motion of domain walls under nanosecond long current pulses is surprisingly sensitive to their length. In particular, we find that the probability of dislodging a domain wall, confined to a pinning site in a perm alloy nanowire, oscillates with the length of the current pulse, with a period of just a few nanoseconds. Using an analytical model and micro magnetic simulations we show that this behaviour is connected to a current induced oscillatory motion of the domain wall. The period is determined by the domain wall mass and the curvature of the confining potential. When the current is turned off during phases of the domain wall motion when the domain wall has enough momentum, there is a boomerang effect that can drive the domain wall out of the confining potential in the opposite direction to the flow of spin angular momentum. Racetrack memory could blur the line between storage and computing, providing a key to a new way to search for data, as well as store and retrieve data. It will not only change the way we look at storage, but it could change the way we look at processing information. Were moving into a world that is more data-centric than computing-centric. Racetrack memory, could outpace both solid-state flash memory chips as well as computer hard disks, making it a technology that could transform not only the storage business but the entire computing industry.

2. RACETRACK STORAGE TECHNOLOGY

The magnetic race-track shift register storage memory promises a solid state memory with storage capacities and cost rivalling that of magnetic disk drives but with much improved performance and reliability. The magnetic race track is comprised of tall columns of magnetic material arranged perpendicularly to the surface of a silicon wafer. The domains are moved up and down the race-track by nanosecond long current pulses using the phenomenon of spin momentum transfer. The domain walls in the magnetic race-track are read using magnetic tunnel junction magneto resistive sensing devices arranged in the silicon substrate. Recent progress in developing magnetic tunnel junction devices with giant tunnelling magneto resistance exceeding 350% at room temperature will be mentioned. 2.1 Racetrack Architecture The racetrack is a ferromagnetic nanowire, with data encoded as a pattern of magnetic domains along a portion of the wire. Pulses of highly spin-polarized current move the entire pattern of domain walls coherently along the length of the wire past read and write elements. The nanowire is approximately twice as long as the stored domain wall pattern, so the domain walls may be moved in either direction. A vertical-configuration racetrack offers the highest storage density by storing the pattern in a U-shaped nanowire normal to the plane of the substrate. The two cartoons show the magnetic patterns in the racetrack before and after the domain walls have moved down one branch of the U, past the read and write elements, and then up the other branch. Fig : Horizontal Setup

A horizontal configuration uses a nanowire parallel to the plane of the substrate.

Fig : Vertical Setup

Like this billions of ferromagnetic wires can be placed to form the racetrack storage setup as shown in the following figure. Arrays of racetracks are built on a chip to enable high-density storage.Racetrack Memory uses spin-coherent electric current to move the magnetic domains along a nanoscopic permalloy wire about 200 nm across and 100 nm thick. As current is passed through the wire, the domains pass by magnetic read/write heads positioned near the wire, which alter the domains to record patterns of bits. A Racetrack Memory device is made up of many such wires and read/write elements Fig : Array of Nanowires.

2.2 Writing Data

Writing data is accomplished, for example, by the fringing fields of a domain wall moved in a second ferromagnetic nanowire oriented at right angles to the storage nanowire. Dramatic improvements in magnetic detection capabilities, based on the development of sprintonic magneto resistive sensing materials and devices, allow the use of much smaller magnetic domains to provide far higher aerial densities. Fig : Writing Data

Memory appears to scale to much smaller sizes than any current memory device. In the vertical orientation (U-shaped) about 128 bits are stored per cell, which itself can have a physical size of at least about 20 F. No other near-term solid-stage technology appears to be able to scale anywhere near these densities, representing a storage density about 100 times that of Flash.. 2.3 Reading Data Reading data from the stored pattern is done by measuring the tunnel magneto resistance of a magnetic tunnel junction element connected to the racetrack. Domains in the racetrack form part of Magnetic tunnelling junction. Fig : Reading Data

The caveat here is that bits at different positions on the "track" would take different times (from ~10 ns to nearly a microsecond, or 10 ns/bit) to be accessed by the read/write sensor, because the "track" is moved at fixed rate (~100 m/s) past the read/write sensor. 2.4 Domain Wall Data Bit

Current-driven domain walls motion has been studied in just a small number of magnetic materials, both soft and hard , in in-plane and perpendicularly magnetized nanowires, respectively. In hard materials, the magnetization direction is determined largely by the direction of the magnetic anisotropy fields, which are intrinsic to the material. In contrast, the magnetization direction in magnetically soft nanowires is defined by the geometrical shape and form of the nanowire. Here we focus on horizontal racetracks with rectangular cross-sections fabricated from thin films of soft magnetic alloys composed of iron, nickel, and cobalt. In these cases, the internal structure of the domain walls and its width are largely derived from magnetostatic fields determined by the shape of the racetrack . Fig : Domain Wall Motion

In particular, the domain walls width scales approximately with the nanowire width. For the nanowire dimensions studiedwidths ranging from 100 to 500 nm and thicknesses ranging from 10 to 50 nmthe domain walls states with the lowest energies have either transverse (T) or vortex (V) wall structures . The vortex structure is favored in thicker or wider nanowires because it is flux closed with reduced surface charge (and, thereby, demagnetizing fields) at the nanowire edges. In larger nanowires, even more complex domain walls structures can be found . It is common to find both T and V domain walls structures in a given nanowire, for a wide range of nanowire widths and thicknesses, even when the domain walls energies are substantially different 2.5 Speeding Bits Racetrack memory is fundamentally a shift register in which the data bits are moved to and fro along any given racetrack to intersect with individual reading and writing elements integrated with each racetrack. The domain walls in the magnetic racetrack can be read with

magnetic tunnel junction magnetoresistive sensing devices arranged so that they are close to or in contact with the racetrack. Writing domain walls can be carried out with a variety of schemes , including using the self-field of currents passed along neighbouring metallic nanowires; using the spin-momentum transfer torque effect derived from current injected into the racetrack from magnetic nanoelements; or using the fringing fields from the controlled motion of a magnetic domain wall in a proximal nanowire writing element . Uniform magnetic fields cannot be used to shift a series of domain walls along the racetrack: In one implementation of racetrack memory, information is stored on a U-shaped nanowire as a pattern of magnetic regions with different polarities. Applying a spin-polarized current causes the magnetic pattern to speed along the nanowire; the data can be moved in either direction, depending on the direction of the current. A separate nanowire perpendicular to the U-shaped "racetrack" writes data by changing the polarity of the magnetic regions. A second device at the base of the track reads the data. Data can be written and read in less than a nanosecond. Racetrack memory using hundreds of millions of nanowires would have the potential to store vast amounts of data. In production, it is expected that the wires can be scaled down to around 50 nm. There are two ways to arrange Racetrack Memory. The simplest is a series of flat wires arranged in a grid with read and write heads arranged nearby. A more widely studied arrangement uses U-shaped wires arranged vertically over a grid of read/write heads on an underlying substrate. This allows the wires to be much longer without increasing its 2D area, although the need to move individual domains further along the wires before they reach the read/write heads results in slower random access times. This does not present a real performance bottleneck; both arrangements offer about the same throughput. Thus the primary concern in terms of construction is practical; whether or not the 3D vertical arrangement is feasible to mass produce. The maximum domain wall velocity that can be achieved is an important parameter that will ultimately determine the speed of racetrack memory. We have measured the domain wall velocity as a function of magnetic field and current density by using time-resolved resistance measurements. The time-resolved velocity peaks at a relatively low magnetic field (~10 Oe), above which a negative domain wall mobility is observed (that is, the velocity decreases when the field increases).

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This drop in the domain wall velocity is associated with a change in the domain wall propagation mode and is known as the Walker breakdown. Depending on the field, the domain wall moves with or without changing its structure. These different regimes are delineated by the Walker breakdown field. Above this field, as the domain wall moves, its structure transforms in a highly coherent manner, periodically switching between different states. This was observed recently as a periodic variation in the resistance of a moving domain wall. It was found that the oscillation period increased linearly with field but was little influenced by current, even though the domain walls velocity was substantially changed. These results give direct evidence for the processional nature of the domain walls dynamics. When spin-polarized currents are injected into the nanowire, the domain walls velocity can be substantially modified. The right panel of the inset shows that the field-driven domain wall velocity varies linearly with current. Its velocity is increased or decreased here by up to 110 m/s when the electron flow is in the same or in the opposite direction to the pressure applied by the magnetic field. For magnetic fields smaller than ~5 Oe, field alone cannot drive the domain wall along the nanowire because of local random pinning from edge and surface roughness. However, current can move the domain wall even in the absence of any magnetic field. The left panel of the inset shows the dependence of the velocity on the current density near zero field. The velocity exhibits a maximum value of ~110 m/s at a current density of ~1.5 108 A/cm2 . Such velocities are high enough for the racetrack memory to operate at clock rates that are competitive with those of existing technologies.

2.6 Storage Density Racetrack Memory is one of a number of new technologies aiming to replace Flash, and potentially offer a "universal" memory device applicable to a wide variety of roles. Other leading contenders include MRAM, PCRAM and FeRAM. Most of these technologies offer densities similar to Flash, in most cases worse, and their primary advantage is the lack of write endurance limits like those in Flash. Field-MRAM offers excellent performance as high as 3 ns access time, but requires a large 25-40 F cell size. It might see use as a SRAM

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replacement, but not as a mass storage device. The highest densities from any of these devices is offered by PCRAM, which has a cell size of about 5.8 F, similar to Flash, as well as fairly good performance around 50 ns. Nevertheless, none of these can come close to competing with Racetrack Memory in overall terms, especially density. For example, 50 ns allows about five bits to be operated in an Racetrack Memory device, resulting in an effective cell size of 20/5=4 F, easily exceeding the performance-density product of PCM. On the other hand, without sacrificing bit density, the same 20 F area can also fit 2.5 2-bit 8 F alternative memory cells (such as RRAM or spin-torque transfer MRAM), each of which could individually operated much faster (~10 ns). 2.7 MRAM Magnetoresistive Random Access Memory (MRAM) which is a non-volatile computer memory (NVRAM) technology, Unlike conventional RAM chip technologies, in MRAM data is not stored as electric charge or current flows, but by magnetic storage elements. The elements are formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity, the other's field will change to match that of an external field. A memory device is built from a grid of such "cells.A memory device is built from a grid of such "cells".Reading is accomplished by measuring the electrical resistance of the cell. A particular cell is (typically) selected by powering an associated transistor which switches current from a supply line through the cell to ground.By measuring the resulting current, the resistance inside any particular cell can be determined, and from this the polarity of the writable plate. Typically if the two plates have the same polarity this is considered to mean "0", while if the two plates are of opposite polarity the resistance will be higher and this means "1". 2.8 Spintronics Spintronics (a neologism for "spin-based electronics"), also known as

magnetoelectronics, is an emerging technology which exploits the quantum spin states of electrons as well as making use of their charge state. Technology makes use of the spin state of electrons. In order to make a spintronic device, the primary requirement is to have a system that can generate a current of spin polarized electrons, and a system that is sensitive to the spin polarization of the electrons. The simplest method of generating a spin-polarised current is to 12

inject the current through a ferromagnetic material. The most common application of this effect is a giant magneto resistance (GMR) device. Spintronic plates are used in the field of mass-storage devices; in 2002 IBM scientists announced that they could compress massive amounts of data into a small area, at approximately one trillion bits per square inch. The most successful spintronic device to date is the spin valve, due to their widespread application in hard disk read/write heads. 2.9 RACE to Racetrack The potential capacity and speed of racetrack memory dwarfs the specifications of even the most advanced hard disks. If racetrack memory ever becomes a commercial product, the comparison to the first Race-named storage device will be even more staggering. In the 1960s, RCA introduced Random Access Card Equipment (RACE), a storage device that moved 4x18" magnetic cards around a raceway When IBM sold its hard-drive business to Hitachi in April 2002, IBM fellow Stuart Parkin wondered what to do next. He had spent his career studying the fundamental physics of magnetic materials, making a series of discoveries that gave hard-disk drives thousands of times more storage capacity. So Parkin set out to develop an entirely new way to store information: a memory chip with the huge storage capacity of a magnetic hard drive, the durability of electronic flash memory, and speed superior to both. He dubbed the new technology "racetrack memory." Both magnetic disk drives and existing solid-state memory technologies are essentially two-dimensional, Parkin says, relying on a single layer of either magnetic bits or transistors. "Both of these technologies have evolved over the last 50 years, but they've done it by scaling the devices smaller and smaller or developing new means of accessing bits," he says. Parkin sees both technologies reaching their size limits in the coming decades. "Our idea is totally different from any memory that's ever been made," he says, "because it's three-dimensional." The spacing between consecutive domain walls (that is, the bit length) is controlled by pinning sites fabricated along the racetrack. There are several means of creating such pinning sites; for example, by patterning notches along the edges of the racetrack or modulating the racetracks size or material properties. Besides defining the bit length, pinning sites also give the DWs the stability to resist external perturbations, such as thermal fluctuations or stray magnetic fields from nearby racetracks.The key is an array of U-shaped magnetic nanowires, 13

arranged vertically like trees in a forest. The nanowires have regions with different magnetic polarities, and the boundaries between the regions represent 1s or 0s, depending on the polarities of the regions on either side. When a spin-polarized current (one in which the electrons' quantum-mechanical "spin" is oriented in a specific direction) passes through the nanowire, the whole magnetic pattern is effectively pushed along, like cars speeding down a racetrack. At the base of the U, the magnetic boundaries encounter a pair of tiny devices that read and write the data.

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3. RACETRACK MEMORY PROSPECTS

1. Racetrack memory could blur the line between storage and computing, providing a key to a new way to search for data, as well as store and retrieve data. 2. It will not only change the way we look at storage, but it could change the way we look at processing information. Were moving into a world that is more data-centric than computing-centric. 3. Racetrack memory, could outpace both solid-state flash memory chips as well as computer hard disks, making it a technology that could transform not only the storage business but the entire computing industry. 4. It allow every consumer to carry data equivalent to a college library on small portable devices. 5. A tenfold or hundredfold increase in memory would be disruptive enough to existing storage technologies that it would undoubtedly unleash the creativity of engineers who would develop totally new entertainment, communication and information products. 6. A disk of size of a CD can be capable of storing around 4TB of data . Ex : Enables carriage of 5,00,000 songs or 3,500 movies as well. 7. It allow every consumer to carry data equivalent to a college library on small portable devices. Ex : US Congress Library . 8. Encourage the creativity of engineers who would develop totally new entertainment, communication and information products. 9. Online data exchange will be more prosperous. 10. Huge improvement in cost. 11. More durability of data that is stored

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4. CHALLENGES FOR RACETRACK STORAGE

A difficulty for this technology arises from the need for high current density (>108 A/cm); a 30 nm x 100 nm cross-section would require >3 mA. The resulting power draw would be higher than, for example, spin-torque transfer memory or Flash. Conventional Memory architecture may get redefined. And this may take a lot of time to novice computer users to enable themselves with the skills required to perceive computer technology. Challenge of providing polarized current that can spur spin movement in regular intervals. It is still to be designed a device that can supply polarized current pulses in nano intervals. Since the wires on the silicon substance are Ferro magnetic there is every chance that the field effect of one wire may have an impact on the data of the neighboring wires data. And hence data might be corrupted potentially.

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5. SUMMARY
There is much discussion about the possibility of developing 3D silicon microelectronic devices to overcome the limitations of the further scaling of complementary metal oxide semiconductor transistors. These typically involve the thinning and stacking of several silicon chips in packages or the use of silicon through-wafer vias. Racetrack memory is a 3D technology that is relatively simple in concept and potentially inexpensive to fabricate. By using the essentially unused space above the surface of a silicon wafer for storing data (in columns of magnetic material) and by bringing these data to the surface of the wafer for reading and manipulating the data, an intelligent 3D memory chip can be built with unsurpassed data storage capacities. Moreover, racetrack memory, by storing data as the direction of a magnetization vector, has no obvious fatigue or wear out mechanism, which plagues many non-volatile memory technologies today that store information by physically moving atoms (such as phase-change or ferroelectric memory). The racetrack memory described in this review comprises an array of magnetic nanowire arranged horizontally or vertically on a silicon chip. Individual Sprintonic reading and writing Nan devices are used to modify or read a train of 10 to 100 domain walls, which store a series of data bits in each nanowire. This racetrack memory is an example of the move toward innately three-dimensional microelectronic devices. It will not only change the way we look at storage, but it could change the way we look at processing information. Were moving into a world that is more data-centric than computing-centric

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6. REFERENCES
1. S. S. P. Parkin, U.S. Patents 6,834,005, 6,898,132, 6,920,062, 7,031,178, and 7,236,386 (2004 to 2007). 2. A. Hubert, R. Schfer, Magnetic Domains: The Analysis of Magnetic Microstructures (Springer, Berlin, 1998). 3. R. E. Matick, Computer Storage Systems and Technology (Wiley, New York, 1977). 4. S. Middelhoek, P. K. George, P. Dekker, Physics of Computer Memory Devices (Academic Press, London, 1976). 5. N. F. Mott, H. Jones, Theory of the Properties of Metals and Alloys (Oxford Univ. Press, Oxford, 1936). 6. A. Thiaville, Y. Nakatani, J. Miltat, Y. Suzuki, Europhys. Lett. 69, 990 (2005). 7. Tien-Hsin Chao, Hanying Zhou, George Reyes, JPL Compact Holographic Data Storage System, Proceedings of Eighteenth IEEE Symposium on Mass Storage Systems in cooperation with the Ninth NASA Goddard Conference on Mass Storage Systems and Technologies, April. 2001. 8. T. H. Chao, H Zhou, and G. Reyes, Advanced compact holographic data storage system, Proceedings of Non-volatile memory technology symposium 2000, pp. 100-1 05, November, 2000. 9. M. Yamanouchi, D. Chiba, F. Matsukura, H. Ohno, Nature 428, 539 (2004). 10. D. Ravelosona, D. Lacour, J. A. Katine, B. D. Terris, C. Chappert, Phys. Rev. Lett. 95, 117203 (2005). 11. D. Ravelosona, S. Mangin, J. A. Katine, E. E. Fullerton, B. D. Terris, Appl. Phys. Lett. 90, 072508 (2007).

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