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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

February 2008

74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs
Features
5V tolerant inputs 2.3V3.6V VCC specifications provided 5.5ns tPD max. (VCC = 3.3V), 10A ICC max. Power down high impedance inputs and outputs 24mA output drive (VCC = 3.0V) Implements proprietary noise/EMI reduction circuitry Latch-up performance exceeds JEDEC 78 conditions ESD performance:

General Description
The LCX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LVX08 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

Human body model > 2000V Machine model > 150V Leadless DQFN package

Ordering Information
Order Number
74LCX08M 74LCX08SJ 74LCX08BQX
(1)

Package Number
M14A M14D MLP14A MTC14

Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LCX08MTC

Note: 1. DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard.

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

www.fairchildsemi.com

74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Connection Diagrams
Pin Assignments for SOIC, SOP, and TSSOP

Logic Symbol
IEEE/IEC

Pad Assignments for DQFN

(Top View)

Pin Description
Pin Names
An, Bn On

Description
Inputs Outputs

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Absolute Maximum Ratings


Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol
VCC VI VO IIK IOK Supply Voltage DC Input Voltage

Parameter

Rating
0.5V to +7.0V 0.5V to +7.0V State(2) 0.5V to VCC + 0.5V 50mA 50mA +50mA 50mA 100mA 100mA 65C to +150C

DC Output Voltage, Output in HIGH or LOW DC Input Diode Current, VI < GND DC Output Diode Current VO < GND VO > VCC

IO ICC IGND TSTG

DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature

Note: 2. IO Absolute Maximum Rating must be observed.

Recommended Operating Conditions(3)


The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.

Symbol
VCC Supply Voltage Operating Data Retention VI VO IOH / IOL Input Voltage

Parameter

Min.
2.0 1.5 0 0

Max.
3.6 3.6 5.5 VCC 24 12 8

Units
V V V mA

Output Voltage, HIGH or LOW State Output Current VCC = 3.0V3.6V VCC = 2.7V3.0V VCC = 2.3V2.7V

TA t / V

Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V2.0V, VCC = 3.0V

40 0

85 10

C ns / V

Note: 3. Unused inputs must be held HIGH or LOW. They may not float.

The FIT error is 1.35 with an Ambience Temperature of 55 C and a Confidence Level of 60%

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

DC Electrical Characteristics
TA = 40C to +85C Symbol
VIH VIL VOH

Parameter
HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage

VCC (V)
2.32.7 2.73.6 2.32.7 2.73.6 2.33.6 2.3 2.7 3.0

Conditions

Min.
1.7 2.0

Max.

Units
V

0.7 0.8 IOH = 100A IOH = 8mA IOH = 12mA IOH = 18mA IOH = 24mA IOL = 100A IOL = 8mA IOL = 12mA IOL = 16mA IOL = 24mA 0 VI 5.5V VI or VO = 5.5V VI = VCC or GND 3.6V VI 5.5V VIH = VCC 0.6V VCC 0.2 1.8 2.2 2.4 2.2 0.2 0.6 0.4 0.4 0.55 5.0 10 10 10 500

V V

VOL

LOW Level Output Voltage

2.33.6 2.3 2.7 3.0

II IOFF ICC ICC

Input Leakage Current Power-Off Leakage Current Quiescent Supply Current Increase in ICC per Input

2.33.6 0 2.33.6 2.33.6

A A A A

AC Electrical Characteristics
TA = 40C to +85C, RL = 500 VCC = 3.3V 0.3V, CL = 50pF Symbol
tPHL, tPLH

VCC = 2.7V, CL = 50pF Min.


1.5

VCC = 2.5V 0.2V, CL = 30pF Min.


1.5

Parameter
Propagation Delay Skew(4)

Min.
1.5

Max.
5.5 1.0

Max.
6.2

Max.
6.6

Units
ns ns

tOSHL, tOSLH Output to Output

Note: 4. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Dynamic Switching Characteristics


TA = 25C Symbol
VOLP VOLV

Parameter
Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL

VCC (V)
3.3 2.5 3.3 2.5

Conditions
CL = 50pF, VIH = 3.3V, VIL = 0V CL = 30pF, VIH = 2.5V, VIL = 0V CL = 50pF, VIH = 3.3V, VIL = 0V CL = 30pF, VIH = 2.5V, VIL = 0V

Typical
0.8 0.6 0.8 0.6

Unit
V V

Capacitance
Symbol
CIN COUT CPD

Parameter
Input Capacitance Output Capacitance Power Dissipation Capacitance

Conditions
VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC, f = 10MHz

Typical
7 8 25

Units
pF pF pF

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

AC Loading and Waveforms (Generic for LCX Family)


Test
tPLH, tPHL tPZL, tPLZ tPZH, tPHZ Open 6V at VCC = 3.3 0.3V VCC x 2 at VCC = 2.5 0.2V GND

Switch

Figure 1. AC Test Circuit (CL includes probe and jig capacitance)

Waveform for Inverting and Non-Inverting Functions

3-STATE Output High Enable and Disable Times for Logic

Propagation Delay. Pulse Width and trec Waveforms

Setup Time, Hold Time and Recovery Time for Logic

3-STATE Output Low Enable and Disable Times for Logic VCC Symbol
Vmi Vmo Vx Vy

trise and tfall

3.3V 0.3V
1.5V 1.5V VOL + 0.3V VOH 0.3V

2.7V
1.5V 1.5V VOL + 0.3V VOH 0.3V

2.5V 0.2V
VCC / 2 VCC / 2 VOL + 0.15V VOH 0.15V

Figure 2. Waveforms (Input Characteristics; f = 1MHz, tr = tf = 3ns)

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Schematic Diagram (Generic for LCX Family)

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Tape and Reel Specification


Tape Format for DQFN
Package Designator
BQX

Tape Section
Leader (Start End) Carrier Trailer (Hub End)

Number of Cavities
125 (Typ.) 3000 75 (Typ.)

Cavity Status
Empty Filled Empty

Cover Tape Status


Sealed Sealed Sealed

Tape Dimensions inches (millimeters)

Reel Dimensions inches (millimeters)

Tape Size
12mm

A
13.0 (330.0)

B
0.059 (1.50)

C
0.512 (13.00)

D
0.795 (20.20)

N
2.165 (55.00)

W1
0.488 (12.4)

W2
0.724 (18.4)

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Physical Dimensions
8.75 8.50 7.62
14 8 B A

0.65

5.60 6.00 4.00 3.80

PIN ONE INDICATOR

1.70

1.27

1.27 (0.33)

0.51 0.35
0.25
M

LAND PATTERN RECOMMENDATION


C B A

1.75 MAX 1.50 1.25 0.25 0.10


C 0.10 C

SEE DETAIL A

0.25 0.19

NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD GAGE PLANE FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X145-14M 0.36 E) DRAWING CONFORMS TO ASME Y14.5M-1994 F) DRAWING FILE NAME: M14AREV13

0.50 X 45 0.25 R0.10 R0.10


8 0

0.90 0.50 (1.04)


DETAIL A
SCALE: 20:1

SEATING PLANE

Figure 3. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Physical Dimensions (Continued)

Figure 4. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Physical Dimensions (Continued)

Figure 5. 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

www.fairchildsemi.com 11

74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

Physical Dimensions (Continued)

0.43 TYP

0.65

1.65

0.45

6.10

12.00 TOP R0.09 min

& BOTTOM

A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 1982 E. LANDPATTERN STANDARD: SOP65P640X110-14M F. DRAWING FILE NAME: MTC14REV6

1.00

R0.09min

Figure 6. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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74LCX08 Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs

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Rev. I33

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

Preliminary

First Production

No Identification Needed

Full Production

Obsolete

Not In Production

1995 Fairchild Semiconductor Corporation 74LCX08 Rev. 1.5.0

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