On Optimal Use of Energy Storage For Series Connected VSC

Optimal use of energy storage for series
connected voltage source converter

Master of Science Thesis in the Master Degree Programme, Electric Power Engineering
Hassan Abdullah Khalid
Ghullam Mustafa Bhutto
Department of Energy and Environment
Division of Electric Power Engineering
CHALMERS UNIVERSITY OF TECHNOLOGY
G oteborg, Sweden 2010
Master Thesis title
Optimal use of energy storage for series connected voltage source converter
c Hassan Abdullah Khalid, 2010
c Ghullam Mustafa Bhutto, 2010
Examiner and Supervisor: Massimo Bongiorno.
Department of Energy and Environment
Division of Electric Power Engineering
Chalmers University of Technology
SE-41296 Goteborg
Sweden
Tel. +46-(0)31 772 1000
Abstract
The continuous growth in the use of sensitive equipments in modern power system
requires great emphasis on the quality of the power. The quality related issues
like voltage sags, swells, surges, interruptions and harmonic problems lead to a
great economic loss in the power industry and needs urgent actions. To ensure the
reliable and stable operation of the power system, Flexible AC Transmission System
(FACTS) controllers at transmission level and custom power devices at distribution
level are employed. In practice, the Dynamic Voltage Restorer (DVR) is a key
device for mitigation of power quality phenomena at distribution level. DVR is
series connected voltage source converter and is used to inject missing voltage of
controllable magnitude and phase angle between the Point of Common Coupling
(PCC) and the load.
Prime goal of this thesis is to optimize energy storage for series connected compen-
sator. Active power injected by DVR is related to its energy storage so optimization
of DVR active power leads to optimization of energy storage.Two types of voltage
sag mitigating strategies Energy Optimization Compensation (EOC) and pre-sag
considering zero phase angle jumps were studied and results were obtained by using
simulation tool PSCAD/EMTDC. Two cases were considered depending upon sag
depth for analyzing EOC method. When sag is shallow one, active power injected
by DVR is equal to zero which reveals the optimization of energy storage. When
sag is deep one, active power injected by DVR is minimum as compared to pre-sag
but not zero.
Eects of phase angle jump on the power and energy requirements by using EOC
method were also studied. DVR energy injection increases having voltage sag of
positive phase jumps whereas its energy injection reduces when voltage sag is having
negative phase angle jumps.
Index Terms: Power Quality, Cascade controller, Voltage Sag (dip), Phase angle
jump, Voltage Source Converter (VSC), Dynamic Voltage Restorer (DVR), Pre-sag,
Energy Optimization Compensation (EOC).
i
ii
Acknowledgements
We would like to thank our supervisor Massimo Bongiorno who trusted and gave
us opportunity to work with him. We are also thankful to him for his support and
help during thesis work.
Also we would like to thank Stefan Lundberg for his help in the stability analysis.
We are very thankful to our parents who sent us here and supported in every walk
of life especially during our studies.
Hassan Abdullah Khalid
Ghullam Mustafa Bhutto
iii
iv
Contents
Abstract i
Acknowledgements iii
1 Introduction 1
1.1 Background and motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Aims and outline of this thesis . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Voltage sags and mitigation methods 5
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Voltage sag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 Mitigation of Voltage sags . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Passive Mitigation Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.1 Transformer Based . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4.1.1 Ferro- resonant Transformer . . . . . . . . . . . . . . . . . 7
2.4.1.2 Transformer with static tap-changer . . . . . . . . . . . . . 8
2.4.2 Rotating machines (Motor-Generator set) . . . . . . . . . . . . . . . 8
2.5 Power Electronics based voltage sag mitigation devices . . . . . . . . . . . . 9
2.5.1 Static Transfer Switch (STS) . . . . . . . . . . . . . . . . . . . . . . 9
2.5.2 Uninterruptible Power Supply (UPS) . . . . . . . . . . . . . . . . . . 10
2.5.3 Shunt connected Voltage source Converter (D-STATCOM) . . . . . 10
2.5.4 Dynamic Voltage Restorer (DVR) . . . . . . . . . . . . . . . . . . . 11
2.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Control of Series Connected VSC 15
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 Layout of Series Connected VSC . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3 Design of Cascade controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.1 Voltage Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.2 Current Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4 Stability Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4.1 Continuous Controller . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4.2 Discrete Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.5 Simulation Results of Cascade Controller . . . . . . . . . . . . . . . . . . . 30
3.5.1 Continuous Controller . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.5.2 Discrete Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.6 Phase Locked Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
v
4 Voltage Sag Mitigation Strategies in Series Connected VSC 35
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.2 PSCAD Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4.3 Voltage Source Converter (VSC) . . . . . . . . . . . . . . . . . . . . . . . . 36
4.4 In-Phase Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4.5 Pre-sag Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.6 Energy Optimized Compensation or Phase Advance Compensation . . . . . 39
4.6.1 Possible Pitfalls in EOC Method . . . . . . . . . . . . . . . . . . . . 40
4.6.1.1 Case 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.6.1.2 Case 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.7 Simulation Results with ideal VSC . . . . . . . . . . . . . . . . . . . . . . . 42
4.7.1 Pre-sag Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
4.7.2 Energy optimized Technique . . . . . . . . . . . . . . . . . . . . . . 45
4.7.2.1 Case 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.7.2.2 Case 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.8 Simulation Results with actual VSC . . . . . . . . . . . . . . . . . . . . . . 52
4.8.1 Pre-sag Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
4.8.2 EOC Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4.9 Phase Angle Jump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.9.1 EOC Case1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
4.9.2 EOC Case2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.10 Pre-sag and EOC Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.10.1 Steady State Active Power . . . . . . . . . . . . . . . . . . . . . . . 62
4.10.2 Energy with sag duration . . . . . . . . . . . . . . . . . . . . . . . . 65
4.11 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
5 Conclusion and Future Work 69
5.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.2 Future work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
References 71
A Transformations for three-phase systems 73
B Flowchart of EOC algorithm 75
vi
vii
viii
Chapter 1
Introduction
1.1 Background and motivation
Quality of the power delivered by utilities plays a vital role in the modern power system.
The power quality is concerned with the deviation of voltage from its ideal waveform (volt-
age quality) and deviation of the current from its ideal waveform (current quality). The
quality associated problems can be caused due to sudden or short duration deviation (like
transients or voltage sags) or steady-state deviations such as harmonics. The main causes
of transient in a system are lightening and switching actions such as capacitor switching,
transformer energization, dis-connection of transmission lines etc where as majority of
voltage sags in the system occurs due to short circuit faults on any feeder/line. Over-
voltages in a system can cause insulation failure and damage equipments permanently.
Voltage sags despite of their short duration impact on the sensitive equipments like low-
power electronic devices, motor contactors and drive systems [16] [17] [18] [19]. Among
the most sensitive industries are the paper mills [20], semi-conductor industries [21], chem-
ical and the other industries which are fully automated, where voltage disturbance can
stop the whole process and cause the severe economic loss due to sensitivity of electronic
equipments. The causes of current disturbances are load start, non-linearity of loads and
rapidly varying loads such as arc furnace. Harmonics are caused by non-linear loads such
as adjustable speed drives, switched-mode power supplies, diode and thyristor rectier etc.
These power quality related issues can cause malfunctioning of equipments and can lead
to the complete shutdown of the plant if special arrangements have not been made to
overcome these problems. In this regard the need of power electronics controllers, called
custom power devices to improve power quality is increasing day by day [15]. These
devices are used in response to the growing demands of industries causing production losses
due to voltage disturbances, like short interruptions and sags. Some of these mitigation
devices are passive circuit based and other are based on the power electronics using mainly
voltage source converter. The voltage sag is very severe problem for an industrial customer
which needs urgent attention for its compensation. There are various methods for the
mitigation of voltage sags but our main focus in this thesis will be on the Dynamic Voltage
Restorer (DVR). This device using series-connected VSC is used to inject controlled voltage
(controlled amplitude and phase angle) between the Point of Common Coupling (PCC) and
the load. Its successful applications around the world are in ANRPC renery based plant in
Alexandria, Egypt [6], Yarn manufacturer [26], semiconductor plants [10], and large paper
mill in Scotland [20]. A DVR comprising of DC-AC power converter is usually connected
in series with a distribution line through three single-phase injection transformers. The
DC side of the converter is connected to a dc energy-storage device. For lower voltage sags,
1
Chapter 1. Introduction
the magnitude of the load voltage can be compensated by injecting only reactive power
into the system. However, for higher voltage sags, active power, in addition to reactive
power is required to correct the voltage magnitude [25].
Energy storage device is the most expensive component of the DVR, therefore it is essential
requirement to use such mitigation strategy at which DVR can operate with minimum
energy storage requirement. Dierent voltage sag mitigation strategies including pre-sag,
In-phase, and phase advance compensation [29] have described in this thesis. Injection of
active power by DVR is related to energy storage. DVR injecting larg amount of active
power requires bigger size of energy storage leading to more expensive scheme. Therefore,
optimization of energy storage (which is the core topic of this thesis) can be obtained by
optimizing DVR active power injection. In case of zero active power injection by DVR, it
injects reactive power only to compensate for voltage sag.
Control of DVR is performed by using d-q coordinate system. This transformation allows
DC components, which is much simpler than AC components. Cascade controller using
an inner current control loop and an outer voltage control loop is used [27]. Reference
[28] presents the Design and control of full size series compensator for medium voltage
applications.
2
1.2. Aims and outline of this thesis
1.2 Aims and outline of this thesis
The aim of this thesis is to optimize the energy storage for eries connected voltage source
converter during the mitigation of voltage sag. General power quality problems, their
eect on power system components and some devices to secure sensitive industries from
huge economical loss are discussed briey in Chapter1. An overview of voltage sag, its
causes and eects and dierent methods to mitigate it are described in Chapter2. Among
all mitigation devices, DVR in Chapter2 was discussed in details because it is the main
area of this thesis. DVR typically consists of an injection transformer secondary of which
is connected in series with the distribution line, a Voltage Source Converter (VSC) which
is connected to the primary of an injection transformer, and an energy storage device
connected at the dc-link of the VSC. As DVR is used to control the load voltage therefore
its control system which is implemented by using FORTRAN is described in Chapter3.
In this chapter PI cascade controller (voltage controller connected in series with current
controller) has been designed. The stability analysis of this controller is performed which
is veried by simulation results. Dierent voltage sag mitigation strategies including pre-
sag compensation, in-phase compensation and energy optimized compensation EOC or
phase advance compensation is described in Chapter4. Further two cases for EOC (one
for shallow sag and another for deep sag) have been presented. The simulation results for
both pre-sag and EOC techniques for ideal and actual VSC assuming transformer as ideal
are presented in this chapter. Finally the eects of phase angle jump are presented in the
same Chapter4. Conclusions and suggestions for future work have been given in Chapter
5.
3
Chapter 1. Introduction
4
Chapter 2
Voltage sags and mitigation
methods
2.1 Introduction
Power quality is any thing that aects the voltage, current and frequency of power being
supplied to the customers.
Constant voltage is the prime requirement of the customer because if the voltage is lower
than the tolerable limits it will cause over heating of the equipment and less illuminating
power to the lighting load. If it is higher than the limit it cause material insulation break
down, reduces the life of lighting load etc. Lightning (transient over voltages), switching
over voltages (i.e capacitor switching, disconnection of lines), short circuit faults (such as
voltage sags) and short interruptions are the main causes for voltage deviations which lead
to permanent damage of the equipments.
Power system frequency is related to the balance between power generation and the load.
When this balance changes, small change in frequency occurs. The frequency variations
that go beyond acceptable limits for normal steady state operation of power system are
normally caused by fault on the transmission lines, large portion of load being discon-
nected, or a large souce of generation being isolated. Drop in frequency could result high
magnetizing currents in induction motors and transformers, causing problem of overheat-
ing and saturation. O nominal frequency will cause damage to turbine and generator
due to high vibration of turbine blades which causes protection to trip out. Therefore it
is essential requirement to maintain frequency of the system within the tolerable limits.
Nowadays due to more sensitive nature of loads use of custom power devices/custom con-
trollers (electronics based) to maintain power quality has become essential. As custom
power controllers are used for current interruptions and voltage regulations, their utiliza-
tion in the industry saves its equipments from voltage sags and interruptions which lead
to loss of production. This chapter will present an overview of voltage sags. Moreover
dierent solutions for mitigation of voltage sags by using mitigating devices will also be
presented.
2.2 Voltage sag
IEEE denition of voltage sag is sudden and short duration reduction in RMS value of the
voltage at the point of electrical system between 0.1 to 0.9 Pu with duration from 0.5 cycles
to 1 minute [1]. The amplitude of voltage sag is the remaining value of the voltage during
5
Chapter 2. Voltage sags and mitigation methods
sag. Voltage sags are considered the most severe disturbances to industrial equipment
[7]. In case of semiconductor industry, voltage sag of 75% (of the nominal voltage) with
duration shorter than 100ms results in material loss in the range of thousands of U.S
dollars [9].
Duration 1.0
Time (sec)
M
a
g
n
i
t
u
d
e
(
p
.
u
)
Magnitude
Vsag
Vthr
T1 T2
T2-T1
Figure 2.1: Voltage sag
Figure 2.1 shows an rms representation of the voltage sag; sag starts when the voltage
falls below the threshold voltage V
thr
(0.9 Pu) at T1. Sag continues to T2 at which the
voltage reaches to a value above the threshold value. Duration of the sag is (T2-T1) and
its magnitude is V
sag
[22].
PCC
Supply
Fault
Load
CB
g Z
s E
g E
l
E
f Z
Figure 2.2: Faults on parallel feeder causing voltage sag
Voltage divider model as shown in gure 2.2, is used for the calculation of voltage sag
magnitude in case of sag due faults at the point of common coupling (PCC) in the radial
system. In this case voltage E
g
during fault can be expressed as
E
g
Z
f
Z
g
Z
f
E
s
(2.1)
Where:
Z
g
is the impedance of the grid
Z
f
is the impedance between the PCC and the fault including fault and line impedances
E
s
is the supply voltage
Voltage sag is also related to the changes in voltage phase angle. This change in phase
angle is also called as phase angle jump (i.e the phase angle between during sag and pre-sag
voltages) and is obtained by taking argument of the complex of voltage E
g
[24].
6
2.3. Mitigation of Voltage sags
2.3 Mitigation of Voltage sags
The following custom power devices (transformer or converter based) as shown in gure
2.3 for voltage sag mitigation are discussed briey.
Mitigation Devices are categorized as:
1. Passive Mitigation Devices.
2. Power Electronics based.
Mitigation Devices

Passive Mitigation
Devices
Power Electronics
Based

DC Systems
Transformers
Rotating Machines
Static Transfer Switch
(STS)
Uninterrupted Power
Supply (UPS)
Shunt Connected VSC
(DSTATCOM)
Series Connected VSC
(DVR)
Figure 2.3: Block Diagram of voltage sag mitigation devices
2.4 Passive Mitigation Devices
2.4.1 Transformer Based
2.4.1.1 Ferro- resonant Transformer
The purpose of the Ferro-resonant transformer is to provide constant output voltage de-
spite of changing in input voltage and load. Sometimes these transformers are also called
as Ferros or CVTS (constant voltage transformers) [2].
In actual design of this transformer as shown in gure 2.4(a) the capacitor is connected
to the secondary winding of the transformer to set the operating point above the knee of
the saturation curve, gure 2.4(b).
7
Sensitive Load
Grid
(a)
I
V
Operating Point
knee
(b)
Figure 2.4: (a) Single line diagram of Ferro-resonant Transformer and (b) Satura-
tion curve of transformer
These kinds of transformers are only used for low-power; constant loads because variable
loads can cause problems, due to the presence of tuned circuit on the output.
2.4.1.2 Transformer with static tap-changer
The rst static tap-changer in the world was used in the eld operation in Norway in 1986
by ABB components [23]. It is used to avoid voltage sag. In this kind of the transformer
thyristor based tap-changer is mounted on its secondary winding to change its turn ratio
according to variations in the input voltage [3]. The gure 2.5 shows the diagram of
transformer with static tap-changer.
Sensitive Load
Grid
Static switches
Figure 2.5: Single line diagram of Transformer with electronic tap-changer
The secondary winding feeds the load and its voltage regulation is accomplished by con-
necting and disconnecting dierent sections of the same winding by fast static switches
in the steps. This fast switching of winding sections also results in transients because of
change in winding inductance which is the drawback of this technique.
Also note that this technique involves static switches so it can also be put under section
2.5, which is for power electronics based voltage sag mitigation devices.
2.4.2 Rotating machines (Motor-Generator set)
Motor-Generator set consists of motor supplied by grid, a synchronous generator supplying
the load and the ywheel; all are connected at a common axis. Three-phase diagram of
motor-Generator set with ywheel is shown in gure 2.6.
8
2.5. Power Electronics based voltage sag mitigation devices
Sensitive Load
Grid
Motor
Axis
Generator
M
G
Flywheel
Figure 2.6: Three-phase diagram of motor-Generator set with ywheel
When motor rotates the rotational energy will be stored in the ywheel which is used
to maintain voltage regulation during disturbances. This scheme has high eciency and
low initial cost but it can only be used in industrial environment due its size, noise and
maintenance requirements.
2.5 Power Electronics based voltage sag mitiga-
tion devices
2.5.1 Static Transfer Switch (STS)
The static transfer switch (STS) is an electrical device which allows the instantaneous
transfer of the load from preferred source to an alternative healthy source in case of the
voltage disturbance. This means that if one power source fails STS switches to the back-up
power source quickly in such a way that load never realizes any disturbance. Figure 2.7
shows single line diagram of Static Transfer Switch (STS).
To Sensitive load
Primary Source Secondary Source
Switch1 Switch2
Figure 2.7: Single line diagram of Static Transfer Switch (STS)
Normally, static switch on the primary source is red regularly, while the other one is o.
It is generally used to mitigate voltage sags and interruptions in the distribution system
but it can not protect against the sag originating in the transmission system.
9
2.5.2 Uninterruptible Power Supply (UPS)
The main purpose of uninterruptible power is to provide uninterruptible, reliable, and high
quality power to the loads. UPS consists of rectier which is supplied by grid, battery and
the inverter which supplies the load. Figure2.8 shows three-phase diagram of UPS.
Energy
Storage
Sensitive
Load
+
-
Grid
AC/DC DC/AC
Figure 2.8: Three phase diagram of UPS
The rectier is used to convert ac voltage into dc which supplies power to the inverter as
well as battery bank to keep it charged.
In normal operating conditions, battery gets charged and power is supplied to the inverter
by rectier. In case of an outage, battery bank supplies the power to the load [4]. De-
pending upon the storage capacity of the battery, it can supply the load for minutes or
even hours.
UPS is a low power application device and is used in medical equipment, data storage and
computer system, emergency equipments, telecommunications and online management
systems [5].
2.5.3 Shunt connected Voltage source Converter (D-STATCOM)
The Distribution Static Compensator (D-STATCOM) is a shunt connected voltage source
converter based static compensator which is used for voltage regulation at the point of
connection and reactive power control by injecting controlled amount current at the PCC
through injection transformer. It can be used for the mitigation of voltage sags and
interruptions if it is equipped with energy storage. One drawback of using D-STATCOM
for voltage dip mitigation is a high rating of voltage source converter. Figure 2.9 shows
the single line diagram of shunt-connected VSC.
1. DC capacitor
2. Voltage source Converter
3. Injection Transformer and
4. Passive lter.
It is used to compare the existing voltage with the reference voltage and injects correct
amount of leading or lagging active/reactive current to reduce the voltage and phase angle
uctuations. Magnitude of voltage is restored by only injecting reactive current and for
phase angle restoration active current is also injected.
10
Grid
Line impedance
Injection
transformer
VSC
Dc-link
Capacitor
PCC
Load
Energy
storage
) (t e
s
g g
L R ,
) (t i
g ) (t e
g
) (t i
l
) (t i
r
) (t u
) (t u
dc
+
-
Figure 2.9: Single line diagram of shunt-connected VSC
2.5.4 Dynamic Voltage Restorer (DVR)
Dynamic Voltage Restorer (DVR) is series connected voltage source converter based com-
pensator which has been designed to protect sensitive equipments like Programmable Logic
Controllers (PLCs), adjustable speed drives etc from voltage sags. Its main function is to
monitor the load voltage waveform constantly by injecting missing voltage in case of sag.
To obtain above function a reference voltage waveform has to be created which is similar in
magnitude and phase angle to that of supply voltage. During any abnormality of voltage
waveform it can be detected by comparing the reference and the actual waveform of the
voltage. As it is series connected device so it can not mitigate voltage interruptions.
The rst DVR was installed for rug manufacturing industry in North Carolina [25]. An-
other was used in Australia for large dairy food processing plant [25]. Figures 2.10 and
2.11 show the single line and simplied diagram of the Dynamic voltage restorer respec-
tively. It is used to maintain load voltage e
l
(t) to the pre-fault condition by injecting
missing voltage of appropriate amplitude and phase.
Figure 2.12 shows the phasor diagram of series injection principle during voltage sag
mitigation, E
l
is the phasor of pre-fault load voltage, E
inj
is the phasor of injected voltage
by the device, I
l
is the phasor of load current, is the phase displacement between load
current and load voltage, E
g,dip
is the sag in the amplitude of the grid voltage and is
phase angle jump.
Assuming the load voltage and current in pre-fault conditions equal to 1 Pu, the injected
power by the device during voltage sag mitigation is equal to
S
inj
= E
c
I
1
= (E
1
E
g,sag
) I
1
= (1 E
g,sag
e
j
) e
j
(2.2)
The Euler identity can be written as e
j
= cos+jsin, applying to (2.2) we get
S
inj
= cos +jsin E
g,sag
cos (+) jE
g,sag
sin (+)
S
inj
= (cos (E
g,sag
cos (+) ) +j(sinE
g,sag
sin (+) (2.3)
Power absorbed by the load will be given by
S
load
= P
load
+jQ
load
= E
1
I
1
= e
j
= cos +jsin (2.4)
11
Grid
Line
impedance
Injection
Transformer
LC-Filter
VSC
Dc-link
capacitor
Energy
storage
Load
) (t e
g
) (t i
g
g g
L R ,
) (t e
s
) (t e
l
) (t i
l
) (t e
c
) (t i
r
Figure 2.10: Single line diagram of DVR
Load
Series-connected VSC
Line impedance
Grid
PCC
) (t e
inj
g g
L R ,
) (t e
s
) (t e
g
) (t i
g ) (t e
l
) (t i
l
- +
Figure 2.11: Simplied diagram of Dynamic Voltage restorer
Therefore, active and reactive power injected by DVR are given by
P
inj
= [1
E
g,sag
cos (+)
cos
] P
load
(2.5)
Q
inj
= [1
E
g,sag
sin (+)
sin
]Q
load
(2.6)
The purpose of showing equations 2.5 and 2.6 is to show the dependency of active and
reactive power injection by DVR on certain factors. These equations show that these
powers depends on sag depth, phase angle jump, load angle and load active and reactive
powers. The main components of DVR are:
1. Voltage source converter
2. Series Injection Transformer
3. Energy storage and
4. Passive lter
12
l E
l I
dip g E ,
\
M
inj E
Figure 2.12: Phasor diagram of DVR during voltage sag mitigation
Voltage source converter (VSC)
Generally pulse-width modulated voltage source converter is used because of simplicity and
good response. It is used to generate desired voltage to be injected for the compensation.
The basic function of VSC is to convert DC voltage into AC voltage and vice versa so it
can be said that it is a converter through which power ow is reversible. When power
ow is from DC to AC it said to be in inverter mode and when power ow is from AC to
DC it is in rectier mode [4]. The valves in converter are usually IGBTs, but some DVR
manufacturers also use IGCTs [11][12].
More detailed description and design of VSC will be described in chapter3.
Series Injection Transformer
The main purpose of injection transformer is to increase the voltage supplied by LC lter
and to inject the missing voltage of the system at the load bus. For three-phase DVR,
Three single-phase transformers are used for this purpose [6].
The high voltage side of the transformer is connected in series to the line, while DVR
power circuit is connected to the low voltage side. The primary winding can be connected
in either star or in delta with the converter side.
To operate the injection transformer properly into the DVR, MVA rating, turns ratio, the
primary winding voltage and current ratings and short circuit values of transformer are
required [6].
Energy storage
An energy storage device is normally connected to the DC bus of the converter to pro-
vide the required energy for the compensation. Commercially available DVRs use large
capacitors banks for the storage of energy [10]. This is the most expensive part of DVR so
the main task of the thesis is to optimize the energy storage for series connected voltage
source converter. Optimized control strategy for DVR will be described in chapter4.
In normal operating condition it is charged through grid voltage and in case of disturbance
it supplies energy to compensate for load voltage [14].
Passive lter
An LC-lter between the VSC and the injection transformer is used to reduce the injected
harmonics to the grid and eliminate high d
v
/dt on the injection transformer [8].
13
2.6 Conclusion
In this chapter, brief overview of Power quality problems including voltage and frequency
deviations has been given. Voltage sags, its industrial eects and dierent mitigation
devices, based on passive devices and power electronics based have been described. Among
all mitigation devices Dynamic Voltage Restorer (DVR) have been described in detail
because it is the main topic of the thesis. Its main components including VSC, injection
transformer, LC-lter and energy storage are described and particular emphasis has been
given on the optimization of energy storage which core task of this thesis.
14
Chapter 3
Control of Series Connected VSC
3.1 Introduction
The importance of Grid-connected forced-commutated voltage source converters (VSCs)
in modern power system is increasing day by day. Its main applications at distribution
levels are in wind power plants, active front-end for adjustable speed drives and custom
power devices. Its applications at transmission level are in HVDCs and FACTs. VSC
when connected in series can controller the magnitude and phase of the injected voltage
and depending upon the angle it makes with the current owing through the VSC ,which
is actually the line current in a series connected device, the active and reactive power ow
of the VSC are controlled[13]. This active and reactive power control, which is highly
desirable in a series connected VSC, can be obtained by using a good-performance voltage
and current controller controller for the VSC.
In this chapter, the derivation of a cascade controller to control the series connected VSC
to mitigate voltage sags will be presented. A brief analysis of the control system will also
be carried out. Simulation results of the cascade controllers for the balanced voltage dip
will be presented.
3.2 Layout of Series Connected VSC
The three-phase diagram of a grid with series connected VSC is displayed in Fig.3.1.
The three-phase voltages of the grid are denoted by e
s,a
(t) , e
s,b
(t) and e
s,c
(t) , while the
grid voltages at the PCC and the grid currents are denoted by e
g,a
(t) , e
g,b
(t) and e
g,c
(t)
and i
g,a
(t) , i
g,b
(t) and i
g,c
(t) respectively. The three-phase voltages and currents of the
VSC are denoted by u
a
(t) , u
b
(t) and u
c
(t) and i
r,a
(t), i
r,b
(t) and i
r,c
(t) respectively.
The lter capacitor voltages and currents are denoted by e
c,a
(t) , e
c,b
(t) and e
c,c
(t) and
i
c,a
(t), i
c,b
(t) and i
c,c
(t), respectively. The voltages and currents injected by the series
connected VSC are denoted by e
inj,a
(t) , e
inj,b
(t) and e
inj,c
(t) and i
inj,a
(t), i
inj,b
(t) and
i
inj,c
(t), respectively. The DC-link voltage is denoted by u
dc
(t). Finally, the load voltages
are denoted by e
l,a
(t) , e
l,b
(t) and e
l,c
(t).
The reason why the LC-lter is mounted at the output of the series connected VSC is to
remove both current and voltage harmonics, thus reducing the harmonic pollution in the
injected voltage. Moreover, this reduces the ripple present in the voltage applied to the
windings of the injection transformer, which in turn lengthens the transformer lifetime.
The cut-o frequency of the lter determines the amount of harmonics injection in the
grid by the series connected VSC and thereby the harmonic content of the load voltage.
This should be considered if the load is particularly sensitive. A basic rule in the design of
15
Chapter 3. Control of Series Connected VSC
the lter is that its cut-o frequency should be much lower than the switching frequency of
the VSC, thus eliminating the switching ripple in the output voltage. However, the lter
should not aect the fundamental component of the injected voltage. Here, the cut-o
frequency of the LC-lter has been set to 460 Hz for a switching frequency of 2.5kHz.
Load
VSC Energy
Storage
Dc-link
Capacitor
LC-Filter
Grid
Line Impedance
Injection Transformers
) (
,
t e
a s
) (
,
t e
b s
) (
,
t e
c s
) (
,
t e
a g
) (
,
t e
b g
) (
,
t e
c g
) (
,
t e
a c
) (
,
t e
b c
) (
,
t e
c c
) (t u
a
) (t u
b
) (t u
c
) (t u
dc
) (
,
t e
a inj
) (
,
t e
b inj
) (
,
t e
c inj

) (
,
t i
a g
) (
,
t i
b g
) (
,
t i
c g
) (
,
t i
b inj
) (
,
t i
c inj
) (
,
t i
a inj
) (
,
t e
a l
) (
,
t e
b l
) (
,
t e
c l
) (
,
t i
a r
) (
,
t i
b r
) (
,
t i
c r
) (
,
t i
a c
) (
,
t i
b c
) (
,
t i
c c
Figure 3.1: Series connected VSC
The series connected VSC injects the required missing load voltage into the grid through
three single-phase transformers. The rated power of the injection transformers is dictated
by the load current, which continuously ows on the winding that is connected to the
feeder, and by the maximum voltage to be injected. Here, the injection transformers are
designed for full-voltage injection. Table 3.1 shows system parameters for DVR.
Table 3.1: System parameters for DVR
Grid parameters
Grid Voltage E 400V
Grid frequency f 50HZ
Load resistance R
l
10
Load inductance L
l
0.0239H
Dc link voltage U
dc
800V
Filter parameters
Filter resistance R
r
0.0248
Filter inductance L
r
0.02H
Filter capacitor C 60F
16
3.3. Design of Cascade controller
3.3 Design of Cascade controller
Voltage
Controller
Current
Controller
DVR +
-
) (
*
t e
dq
c
) (
*
t u
dq
) (t e
dq
c
) (
*
t i
dq
r
Figure 3.2: Cascade controller general diagram
The control system of the series connected VSC is a cascade controller shown in gure 3.2.
It consists of two closed-loop controllers connected in series: an outer loop that controls
the voltage across the lter capacitor e
c
and an inner controller that controls the current
through the lter reactor i
r
.
3.3.1 Voltage Controller
In this section the outer loop proportional voltage controller will be derived.
Some basic assumptions before deriving is that the injected voltage is equal to the voltage
across the capacitors of the VSC output lter, i.e. the injection transformer is considered
ideal with a 1:1 turn ratio, therefore
e
inj,a
(t) = e
c,a
(t)
i
inj,a
(t) = i
g,a
(t)
and is the same for other two phases.
) ( t u
r
R
r
L
C
) ( t i
r
) ( t i
g
) ( t i
c
) (t e
c
Figure 3.3: Single line View of LC lter and ideal VSC
Now by applying Kirchhos Current Law to the LC lter in gure 3.3, we get the following
dierential equations in 3- phase.
i
r,a
(t) = i
c,a
(t) +i
g,a
(t) = C
d
dt
e
c,a
(t) +i
g,a
(t) (3.1)
i
r,b
(t) = i
c,b
(t) +i
g,b
(t) = C
d
dt
e
c,b
(t) +i
g,b
(t) (3.2)
i
r,c
(t) = i
c,c
(t) +i
g,c
(t) = C
d
dt
e
c,c
(t) +i
g,c
(t) (3.3)
17
By applying Clarkes transformation we can transform these 3-phase equations (3.1), (3.2)
and (3.3) into 2-phase coordinate System (see Appendix A) without any loss of infor-
mation. Only o course under the assumption that there is no zero sequence component.
d
dt
e
c
(t) =
1
C
i
r
(t)
1
C
i
g
(t) (3.4)
With a PLL synchronized with the grid voltage vector we can transform from to dq
coordinate system (see Appendix A), which will give us the dc values in steady state and
thus easier to implement a control system. This is the basic tool of vector control.
d
dt
e
dq
c
(t) +je
dq
c
(t) =
1
C
i
dq
r
(t)
1
C
i
dq
g
(t)
d
dt
e
dq
c
(t) =
1
C
i
dq
r
(t)
1
C
i
dq
g
(t) je
dq
c
(t)
i
dq
r
(t) = C
d
dt
e
dq
c
(t) +i
dq
g
(t) +jCe
dq
c
(t) (3.5)
Now taking Laplace transform of equation (3.5) and removing the cross coupling jCe
dq
c
(t)
and the feed forward

i
dq
g
(t)
terms because they can be added later, we can have an ex-

pression to be used for voltage controller.
i
dq
r
(s) = sCe
dq
c
(s)
G
cv
(s) =
e
dq
c
(s)
i
dq
r
(s)
=
1
sC
(3.6)
We get the equation (3.6) that is the plant for which we want to design a controller. As
the plant is a rst order system, so we will use rst order Low Pass Filter (LPF) response
for the design of the voltage controller. The equation (3.7) below gives the response of
LPF.
G(s)
Low pass
=

v
s +
v
(3.7)
+
-
) (
*
s e
dq
c
) (s F
v
) (s G
cv
) (s e
dq
c
) (
*
s i
dq
r
Figure 3.4: Voltage Controller
In the above gure 3.4 G
cv
is the plant, F
v
(s) is the voltage controller, e
dq
c
(s) is the output
and e
dq
c
(s) is the input reference signal. The close loop transfer function is:
G(s)
closeloop
=
e
dq
c
(s)
e
dq
c
(s)
=
F
v
(s) G
cv
(s)
1 +F
v
(s)G
cv
(s)
(3.8)
The equation (3.7) can be rewritten as
18
G(s)
Low pass
=

v
/s
1 +
v
/s
=

v
s +
v
(3.9)
And now comparing equations (3.8) and (3.9), we get
F
v
(s) G
cv
(s) =
v
/s
F
v
=

v
s
G
cv
1
(s) (3.10)
Putting G
cv
(s) from equation (3.6)
F
v
(s) =
v
C = K
pv
(3.11)
Thus we have a proportional voltage controller with a proportional gain

K
pv
which
depends upon the capacitance and the bandwidth of voltage controller
v
. It is important
to note that there is no integrator part in the voltage controller this is because a lossless
capacitor is considered in the design of voltage controller.
) (
*
t e
dq
c
) (t e
dq
c
Real
Imag d
c
e
q
c
e
q
c
qq
c
Complex
x
C
ref
) (t i
dq
g
) (
*
t i
dq
r
pv
k
Figure 3.5: Voltage Controller Block Diagram
In the gure 3.5, a complete voltage controller implementation with cross coupling and
feed forward terms which were removed earlier during the voltage controller derivation
can be seen. The voltage controller input is reference voltage e
dq
c
(t) , which will be the
input to the voltage controller in order to control the voltage at the lter capacitor.
3.3.2 Current Controller
) ( t u
r
R
r
L
C
) ( t i
r
) ( t i
g
) ( t i
c
) (t e
c
Figure 3.6: Single line View of LC lter and ideal VSC
19
For the derivation of current controller Kirchhos voltage law (KVL) is applied to the
LC-lter in gure 3.6,and the following dierential equations for the three phases are
obtained
u
a
(t) e
c,a
(t) R
r
i
r,a
(t) L
r
d
dt
i
r,a
(t) = 0 (3.12)
u
b
(t) e
c,b
(t) R
r
i
r,b
(t) L
r
d
dt
i
r,b
(t) = 0 (3.13)
u
c
(t) e
c,c
(t) R
r
i
r,c
(t) L
r
d
dt
i
r,c
(t) = 0 (3.14)
By applying Clarkes transformation, equations (3.12), (3.13) and (3.14) can be written
in the coordinate System as
u
(t) e
c
(t) R
r
i
r
(t) L
r
d
dt
i
r
(t) = 0 (3.15)
applying - to dq-transformation to equation (3.15),
u
dq
(t) e
c
dq
(t) R
r
i
r
dq
(t) L
r
d
dt
i
r
dq
(t) jL
r
i
r
dq
(t) = 0 (3.16)
Taking Laplace transform of the equation (3.16) and neglecting the cross coupling and
feed forward terms, we get
u
dq
(s) R
r
i
r
dq
(s) sL
r
i
r
dq
(s) = 0
G
cc
(s) =
i
r
dq
(s)
u
dq
(s)
= 1/(sL
r
+R
r
) (3.17)
where equation (3.17) is the transfer function of the plant for which we are going to
design a current controller. Here again we want the response of the current controller is
to be rst order low pass lter equation (3.7).
+
-
) (
*
s u
dq
) (s F
c
) (s G
cc
) (
*
s i
dq
r
) (s i
dq
r
Figure 3.7: Current controller
In the gure 3.7 G
cc
(s) is the plant, F
c
(s) is the current controller, i
r
dq
(s) is the output
and i
r
dq
(s) is the input reference signal. And the close loop transfer function is:
G(s)
closeloop
=
i
r
dq
(s)
i
r
dq
(s)
=
F
c
(s) G
cc
(s)
1 +F
c
(s) G
cc
(s)
(3.18)
Comparing equations (3.18) and (3.9), we get
F
c
(s) =

c
s
G
1
cc
(s) (3.19)
20
Substituting equation (3.17) in (3.19)
F
c
(s) =
c
L
r
+
c
R
r
s
= K
pc
+
K
ic
s
(3.20)
Thus our current controller which makes the inner loop of cascade controller has a pro-
portional part with a gain K
pc
and an integral part to remove steady state error caused
by non-linearities, noise in the measurements and non ideal components has a gain of K
ic
.
Figure 3.8 shows the complete implementation of current controller with the feed forward
and cross coupling terms added after the PI controller. The output of the voltage controller
is the reference current i
r
dq
(t), which will be the input to the current controller to control

the current through the lter inductor.
) (
*
t i
dq
r
ic
k
pc
k
Real
Imag d
r
i
q
r
i
r
i
Complex
x
r
L
ref
) (t e
dq
c
) (t u
dq
) (t i
dq
r
Figure 3.8: Current controller implementation
The block diagram scheme of the cascade controller is shown in gure (3.9). And the
algorithm of the implementation of control system is summarized as:
1. Measure the grid voltages, grid currents, lter currents and capacitor voltages;
2. Transform all three-phase quantities to the -coordinate system and then to the
rotating dq-coordinate system, using the transformation angle , obtained from the
PLL;
3. Calculate e
dq
c
(t) by subtracting the grid voltage e
dq
g
(t) from the reference load
voltage e
dq
l
(t) ;
4. Calculation of the reference lter current i
dq
r
(t) using the voltage controller block;
5. Calculation of the reference voltage u
dq
(t) using the current controller block;

6. Convert the reference voltages from the dq-coordinate system into three-phase volt-
ages using the transformation angle ;
7. Calculate the duty-cycles in the PWM block and send the switching signals to the
VSC valves.
21
Current
Controller
Voltage
Controller

abc

dq

abc

abc

abc

dq

dq

dq
PLL

dq

abc
PWM To converter
) (
,
t e
a g
) (
,
t e
b g
) (
,
t e
c g
) (
,
t e
b l
) (
,
t e
c l
) (
,
t e
a l
(t) i
g,a
) (
,
t i
b g
) (
,
t i
c g
(t) i
r,a
) (
,
t i
c r
) (
,
t i
b r
) (t e
g
DE
) (t e
l
DE
) (t i
g
DE
) (t i
r
DE
) (t e
dq
g
) (t e
dq
l
) (t i
dq
g
) (t e
dq
c
) (
*
t e
dq
c
) (t i
dq
r
) (
*
t i
dq
r
) (t e
dq
g
) (
*
t u
dq
) (
*
t u
DE
) (
*
t u
a
) (
*
t u
b
) (
*
t u
c
) (
*
t e
dq
l
Figure 3.9: Block Diagram Implementation of Cascade Controller

3.4 Stability Analysis
Stable Region Unstable Region
Well Damped Region
) Im(s
) Re(s
$
45
$
45
(a)
) ( z (
) ( z (
Well damped region
1 -1
-1
1
(b)
Figure 3.10: Stability criteria for continuous time domain plot(a), and for discrete
time domain plot(b).
The stability of a system may directly be determined from its transfer function and for the
stable system the poles should be in the left half of the s-plane in continuous time domain
and within the unit circle in discrete time domain. More over if the poles lie within the
45 left half region of the s-plane then the system will be well damped for continuous
time domain shown in gure 3.10(a) while for z-plane in discrete time within the shaded
area in gure 3.10(b) [32].The selection of well damped region is based on the damping
22
3.4. Stability Analysis
ratio

which is related to overshoot [33]. For the continuous time domain damping ratio
is maximum

= 1
at the negative real axis and minimum

= 0
at imaginary axis
of s-plane. So the well damped region is set between (0.5 1). Similarly for the
discrete time domain the damping ratio is maximum at positive real of z-plane

= 1
and minimum at the unit circle

= 0
. So again the well damped region is set between

(0.5 1). The signicance of the stability analysis is no just to see whether the
system is stable or not but to investigate the degree of stability of the system (i-e) the
amount of overshoot and the settling time of the controller variation for a step input. The
overshoot must be maintained with in prescribed bounds so that the control system may
not hit a limit and transients must die out in a suciently short time.
The stability analysis will be performed both in continuous time domain because it is
used for ideal VSC model of PSCAD and in discrete time domain for actual VSC model
of PSCAD. But only the discrete time system will be analyzed for inaccurate knowledge
of system parameters because control system will be discrete in reality. The system pa-
rameters are displayed in table 3.1. A block diagram of closed loop system is depicted in
gure 3.11, where VSC is considered ideal voltage source. Note that the load dynamics
are included in the analysis. An RL load has been considered with PF 0.8. Thus, the load
current will change when the load voltage changes.
Voltage
Controller
Current
Controller
+
- Filter
Inductance
-
+
-
Filter
Capacitor
+
+
Load +
-
*
) (dq
c
e
*
) ( dq
r
i
) ( dq
u
) ( dq
c
e
) ( dq
r
i
) ( dq
c
e
) ( dq
c
e
) ( dq
g
e
) (dq
l
e
) ( dq
g
i
) ( dq
g
i ) ( dq
g
i
+
Figure 3.11: Closed loop block diagram of DVR
3.4.1 Continuous Controller
In this section the stability analysis for the entire system is presented. And the dynamic
performance of the cascade controller for accurate knowledge of parameters will be inves-
tigated.
Cascade Controller
In case of accurate knowledge of lter parameters, both the equations of the voltage
controller and the current controller contain the exact values of the parameters. In this
case, it is of interest to investigate the interaction between the two controllers. The
bandwidth of the two controllers in a cascade controller must be selected carefully in
order to ensure the stability of the entire system. The gure 3.12 and 3.13; shows that as
the voltage controller bandwidth (av) which is expressed in pu of current controller gain
(ac) that is set at 500Hz, and is increased from [0.1 to 1] the pole pairs P1,P2 and P3,P4
in gure 3.14, move away from the real axis. As a consequence the damping decreases
with the increase in overshoot from 4% for av=0.5 to 16% for av=1 but the overall system
response is faster, can be seen in gure 3.15. All in all the system remains stable for all
values of av and well damped for av=0.5 and less.
From this analysis it is possible to highlight the basic rules of selecting the parameters for
the cascade controller that the inner controller should be faster than the outer controller.
23
Typically, this ratio between the bandwidth of inner and outer controller is selected to be
3 to 5 times.
3 2.5 2 1.5 1 0.5 0 0.5
x 10
4
4
3
2
1
0
1
2
3
4
x 10
4
p1,p2 p3,p4
Figure 3.12: Pole placement for accurate knowledge of system parameters at vari-
ation of voltage controller bandwidth av. Marker

o
denotes av=0.1, marker


denotes av=0.5,marker

denotes av=0.6,marker

denotes av=1.
Time (sec)
A
m
p
l
i
t
u
d
e
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
x 10
3
0
0.2
0.4
0.6
0.8
1
1.2
1.4
From: ec
d
* To: ec
d
av=1
av=0.5
av=0.3
av=0.1
Figure 3.13: Step response of cascade controller from d-component of reference value
of capacitor voltage

ecd
to d-component of actual value of capacitor voltage ecd

at variation of voltage controller bandwidth av.
24
3.4.2 Discrete Controller
In this section the stability analysis of the entire system is presented while keeping the
current controller which is the inner controller bandwidth at 0.1 times the sampling fre-
quency that is set to 5kHz. And the dynamic performance of the cascade controller in
both cases of accurate and inaccurate knowledge of parameters will also be investigated.
Cascade Controller
Accurate Knowledge of Filter Parameters In case of accurate knowledge of
lter parameters, both the equations of the voltage controller and the current controller
contain the exact values of the parameters. In this case, it is of interest to investigate the
interaction between the two controllers that are now discrete. The bandwidth of the two
discrete controllers in a cascade will change due to the sampling in the discrete system.
The gure 3.14 and 3.15; shows that as the voltage controller bandwidth av which is
expressed in pu of current controller gain ac, is increased from 0.1 to 1 the pole in gure
3.14, move away from the shaded region in gure 3.10(b). As a consequence the damping
decreases with the increase in overshoot from 0.23 pu for av=0.7 to 0.45 pu for av=1, can
be seen in gure 3.15(d) and (e) respectively. Overall the system remains stable for all
values of av and well damped for av=0.5 and less.
1 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
PoleZero Map
Real Axis
I
m
a
g
in
a
r
y

A
x
is
Figure 3.14: Pole placement for accurate knowledge of system parameters at vari-
ation of voltage controller bandwidth av. Marker

o


denotes av=0.5,and marker

denotes av=1.
25
0 2 4 6 8
x 10
3
0
0.2
0.4
0.6
0.8
1
From: ec
d
* To: ec
d
Time (sec)
A
m
p
l
i
t
u
d
e
0 1 2 3 4
x 10
3
0
0.5
1
1.5
2
From: ec
d
* To: ec
d
Time (sec)
A
m
p
l
i
t
u
d
e
0 1 2 3 4
x 10
3
0
0.5
1
1.5
2
From: ec
d
* To: ec
d
Time (sec)
A
m
p
l
i
t
u
d
e
0 1 2 3 4
x 10
3
0
0.5
1
1.5
2
From: ec
d
* To: ec
d
Time (sec)
A
m
p
l
i
t
u
d
e
0 1 2 3 4
x 10
3
0
0.5
1
1.5
2
From: ec
d
* To: ec
d
Time (sec)
A
m
p
l
i
t
u
d
e
(b)
(d) (c)
(e)
(a)
Figure 3.15: Step response of cascade controller from d-component of reference value
of capacitor voltage

ecd
to d-component of actual value of capacitor voltage ecd at

variation of voltage controller bandwidth av. Plot(a) at av=0.1, plot(b) at av=0.3,
plot(c) at av=0.5, plot(d) at av=0.7 and plot(e) at av=1.
Frequency Analysis Figure 3.16 shows the bode diagram of the transfer function
from the d-component of the reference capacitor voltage ecd* to the d-component of the
actual capacitor voltage ecd for dierent values of the gain of the voltage controller av.
As shown when the av is set to 0.5, the gain is constant and is equal to 0dB up to 300 Hz.
This means that the controller will be able to track the reference value upto 300Hz. For
higher frequencies the gain decrease and the phase shift increases.
Figure 3.17 shows the frequency response of the transfer function from the reference d-
component of the capacitor voltage ecd* to the q-component of the actual capacitor
voltage ecq. As shown the gain of the cross coupling term is very small and it decreases
with the increase in controller bandwidth av. With peaks at 1500 Hz, 1000 Hz, 300 Hz and
100 Hz for av=1,av=0.5,av=0.3 and av=0.1 respectively. At 50Hz which is grid frequency
there is a spike that appears in the magnitude and phase. This is the cross coupling eect
that is appearing at grid frequency can also be seen in gures 3.18 and 3.19. Also the
gains in gures 3.18 and 3.19 are very small which shows that the cascade controller is
insensitive to grid harmonics.
26
80
60
40
20
0
20
From: ec
d
* To: ec
d
M
a
g
n
i
t
u
d
e

(
d
B
)
10
0
10
1
10
2
10
3
10
4
270
225
180
135
90
45
0
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (Hz)
av=1
av=0.1
av=0.3
av=1
av=0.5
av=0.1
av=0.3
av=0.5
Figure 3.16: Bode diagram from d-component of reference value of capacitor voltage
ecd
to d-component of actual value of capacitor voltage ecd at variation of voltage

controller bandwidth av.
90
80
70
60
50
40
30
20
10
From: ec
d
* To: ec
q
M
a
g
n
i
t
u
d
e

(
d
B
)
10
0
10
1
10
2
10
3
10
4
270
180
90
0
90
180
270
360
P
h
a
s
e

(
d
e
g
)
Bode Diagram
Frequency (Hz)
av=0.1
av=0.1
av=0.3
av=0.3
av=0.5
av=0.5
av=1
av=1
Figure 3.17: Bode diagram from d-component of reference value of capacitor voltage
ecd
to q-component of actual value of capacitor voltage ecq at variation of voltage

controller bandwidth av.
27
250
200
150
100
50
0
From: eg
d
To: ec
d
M
a
g
n
i
t
u
d
e

(
d
B
)
Bode Diagram
Frequency (Hz)
10
6
10
5
10
4
10
3
10
2
10
1
10
0
10
1
10
2
10
3
10
4
270
180
90
0
90
180
270
360
450
540
P
h
a
s
e

(
d
e
g
)
av=0.3
av=0.1
av=0.3
av=1
av=0.5
av=0.1
av=1
av=0.5
Figure 3.18: Bode diagram from d-component of reference value of grid voltage

egd
to d-component of actual value of grid voltage egd at variation of voltage controller

bandwidth av.
140
120
100
80
60
40
20
From: eg
d
To: ec
q
M
a
g
n
i
t
u
d
e

(
d
B
)
Bode Diagram
Frequency (Hz)
10
0
10
1
10
2
10
3
10
4
450
360
270
180
90
0
90
180
270
360
450
P
h
a
s
e

(
d
e
g
)
av=0.1
av=0.1
av=0.3
av=0.3
av=0.5
av=0.5
av=1
av=1
Figure 3.19: Bode diagram from d-component of reference value of grid voltage

egd
to q-component of actual value of grid voltage egq at variation of voltage controller

bandwidth av.
Inaccurate Knowledge of Parameters When the lter parameters are not known
with accuracy, estimated values for the lter reactor (Rr and Lr) and Cr are used in the
cascade controller equations. The voltage controller bandwidth av is set to 0.3 times of
current controller gain ac from previous analysis.
As the reactor resistance is usually negligible compared with its reactance therefore the
response of the system can be considered insensitive to its variations.
28
Figure 3.20 shows the poles of the cascade controller with estimated inductance Lr
which
varies from 0.1 to 2 of the actual lter inductance Lr. From this gure it is possible to
observe that underestimation of the lter inductance Lr results in a well damped system.
The system remains stable for Lr
=1.5 over estimation. So it can be concluded that it is

better to underestimate the lter inductance from stability point of view.
From the gure 3.21, that shows the closed loop poles of the control system when the
estimated lter capacitor C
varies from 0.1 to 2 of actual lter capacitance C, the poles

in gure 3.21, moves slowly away from the shaded region in gure 3.10(b) thus decreasing
the damping of the system. Therefore it is concluded that it is better to underestimate
the lter capacitance.
PoleZero Map
Real Axis
I
m
a
g
i
n
a
r
y

A
x
i
s
2 1.5 1 0.5 0 0.5 1
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Figure 3.20: Pole placement for inaccurate knowledge of system parameters at vari-
ation of lter inductance Lr. Marker

o
denotes Lr
=0.1, marker

denotes Lr
=1,
marker

denotes Lr
=1.3 and marker

denotes Lr
=2.
1 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
PoleZero Map
Real Axis
I
m
a
g
i
n
a
r
y

A
x
i
s
Figure 3.21: Pole placement for inaccurate knowledge of system parameters at vari-
ation of lter capacitance C. Marker

denotes C
=0.2*C and marker

denotes
C
=2*C.
29
3.5 Simulation Results of Cascade Controller
In this section the performance of cascade controller in the light of stability analysis
performed earlier is observed for both the continuous and discrete. Both cascade controller
are tested by setting the inner current controller at a bandwidth of 500Hz to see how the
actual capacitor voltage ( e
dq
c
) follows the reference capacitor voltage ( e
dq
c
) for dierent
bandwidths of voltage controller (av).
3.5.1 Continuous Controller
Now for the same RL load with PF 0.8 the voltage sag of 50 % with no phase angle jump
was simulated. Therefore there will be no q-component and a 0.5 pu d-component of
reference capacitor voltage, can be seen in gure 3.22. In the gure 3.23 it can be seen
that with the increase in voltage controller bandwidth the actual capacitor voltage more
closely follows the reference capacitor voltage but at the cost of an overshoot this is the
similar result as was obtained in stability analysis, gure 3.13.
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0.5
0
0.5
1
Time [sec]
V
o
lt
a
g
e

[
p
u
]

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0.5
0
0.5
1
Time [sec]
V
o
lt
a
g
e

[
p
u
]

ecd
ref
ecd
ecq
ref
ecq
Figure 3.22: d and q component of reference and actual capacitor voltage.
0.2 0.2005 0.201 0.2015 0.202
0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
av=0.3
av=1
av=0.5
av=0.1
ecd
ref
Figure 3.23: Step response of d-component of capacitor voltage with variation of
voltage controller bandwidth av.
30
3.6. Phase Locked Loop (PLL)
3.5.2 Discrete Controller
Now the discrete cascade controller was simulated for the same load and voltage sag as
for the continuous controller. The step response in the gure 3.24 shows that with the
increase in voltage controller bandwidth the actual capacitor voltage more closely follows
the reference capacitor voltage but at the cost of an overshoot this is the similar result as
was obtained in stability analysis, gure 3.15. In practice the voltage controller bandwidth
av cannot be taken equal to the current controller bandwidth ac because the grid voltage
is not a smooth sinusoidal voltage and the system will become unstable.
0.2 0.205 0.21 0.215 0.22 0.225
0
0.1
0.2
0.3
0.4
0.5
0.6
Time [sec]
V
o
l
a
g
e

[
p
u
]
av=0.3
av=0.5
av=1
ecd
ref
av=0.1
Figure 3.24: Step response of d-component of capacitor voltage with variation of
voltage controller bandwidth av.
3.6 Phase Locked Loop (PLL)
PI
DE
g
e
DE
dq
g
e
T
ref
Z
+
+
r
Z
T
dq
Figure 3.25: PLL implementation in PSCAD
31
The PLL implemented for the grid angle estimation is shown in the block diagram in the
gure 3.25.The parameter selection for this PLL as derived in [30] is used for the gain
selection .Also to ensure good damping the poles for this PLL are placed on the negative
real axis of s-plane. Therefore a double pole at s = is selected where is the bandwidth
of the PLL.
PoleZero Map
Real Axis
I
m
a
g
i
n
a
r
y

A
x
i
s
70 60 50 40 30 20 10 0
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
5 Hz 10 Hz
(a)
D
E
Z
) (t V
g
T
d
q
(b)
Figure 3.26: Double poles location in s-plane for 5Hz and 10Hz plot (a) and the grid
voltage vector is in d direction plot (b).
Figure 3.26(a) shows the double pole at =5Hz and =10Hz which are moving further
on the negative real axis thus making the PLL response faster. Also the grid voltage
vector is placed along the d-axis of the dq coordinate system shown in gure 3.26(b). The
estimated angle

for a phase angle jump of 45 starting at time t=0.3 sec is shown 3.27
for PLL bandwidths of 5Hz and 10Hz. This estimated angle is very signicant because of
its use in the transformation from stationary coordinate to rotating dq coordinates so
proper selection of PLL bandwidth is critical for the entire system.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
Time [sec]
G
r
i
d

a
n
g
l
e

[
r
a
d
]
5 Hz
10 Hz
Figure 3.27: Grid angle calculated by PLL
32
3.7. Conclusion
3.7 Conclusion
In this chapter a simple PI cascade controller has been designed .Then the stability anal-
ysis of this controller has been performed which had been later veried by the simulation
results.Some of the important limitations of the cascade controller has also been discovered
such as its insensitivity to the grid harmonics, the controller works ne for the underesti-
mation of lter inductance and lter capacitance. Overall the cascade controller has found
to be stable and the gain selection could be a trade o between the system response time
and the amount of overshoot.
33
34
Chapter 4
Voltage Sag Mitigation Strategies
in Series Connected VSC
4.1 Introduction
DVR is a custom power device that is used for the compensation of voltage disturbance
in the distribution system. It is used to inject an appropriate series voltage component
during voltage disturbance. As shown in the preivous section,this injection requires certain
amount of active and reactive power supply from the DVR. The active and reactive power
supplied by DVR depends upon the type of voltage disturbance. Optimization of the
energy storage, which is the core title of this thesis, depends on the amount of the active
power injection by DVR. In order to achieve optimization of energy storage, three types of
voltage sag mitigation strategies (i.e In-phase, pre-sag and phase advance) are described
here.
Note that it is assumed that the loads are constant impedance and balanced. Thus making
the power factor, load voltage and phase currents to be same in each phase.
4.2 PSCAD Model
A simulation model is made in PSCAD/EMTDC software that is used to study three
phase balanced voltage sags with phase angle jump for constant impedance and a three
phase balanced load with dierent PFs.
To simulate such scenarios the grid is modeled by a three phase voltage source whose
voltage and phase can be controlled externally. This external control is used to generate
voltage sags and phase angle jump at the specic time. Also for this simulation a strong
grid with zero line impedance is considered. Reason for taking strong grid is to have
no voltage drop and it is capable of supplying of enough active power in case of voltage
sag. The DVR is connected in series between the grid and the load by three single-phase
injection transformers. These transformers are considered ideal to eliminate the eect of
transformer saturation and making it possible for the VSC to inject innite power. An
LC lter is used at the output of VSC to minimize voltage and current harmonics. As a
consequence some extra power had to be injected by VSC to counter the power losses in
the lter. The parameters used in the LC lter are shown in table 3.1.
35
Chapter 4. Voltage Sag Mitigation Strategies in Series Connected VSC
4.3 Voltage Source Converter (VSC)
Voltage source converter is the most important part of a DVR through which the power
injection is controlled. A three phase voltage source converter with PWM switching scheme
and switching frequency of 2.5 kHz is used only to study the response of DVR with actual
converter. The converter valves are considered ideal with a DC-link modeled with two
ideal DC sources of 400 V each, VSC model in PSCAD can be seen in gure 4.1.
Figure 4.1: VSC used in PSCAD model
The switching signals TIGare generated by using Gate Firing Controller (GTO/IGBT)
subroutine in PSCAD. This subroutine provides gate control pulses for an IGBT or GTO,
given four input signals ON1, ON2 and OFF1, OFF2. The subroutine as described in
PSCAD is shown in gure 4.2.
Figure 4.2: Switching signal generation subroutine in PSCAD
For the study of energy storage optimization technique an ideal VSC is modeled with
three voltage controlled DC sources. With this model we only look at the fundamental
component which is less than the switching frequency .Thus eliminating the switching
losses in the converter and also the eect of switching harmonics will not appear in the
simulation results.
36
4.4. In-Phase Compensation
Figure 4.3: Ideal VSC used in PSCAD simulation
4.4 In-Phase Compensation
It is the compensation technique in which the injected voltage during the sag is in phase
with supply voltage as shown in gure. 4.4, which means that this method doesnt take
into account the phase angle jumps. This method is best suited for the loads that can
sustain phase angle jumps like induction motor loads [6]. In this way it is cost eective
because the size of energy storage will reduce but it will not work for sensitive loads because
of its inability to mitigate phase jumps which results in transient currents. Therefore from
this section onwards in-phase compensation technique will not be further discussed or
analyzed.
sag
d
presag
d
presag
q
sag
q
g
e
l
e
c inj
e e e
l
i
pu
voltage
Figure 4.4: Vector Diagram of In-Phase Method
Figure 4.4 shows the vector diagram of in phase compensation method. Where is the
load angle between the load voltage vector

e
l
and the load current

i
l
,

e
g
is the grid votage
vector and

e
inj
is the DVR injected voltage vector. There are three coordinates that are
37
shown in the gure; -coordinate is the xed coordinate while the dq
presag
and dq
sag
are
rotating coordinates which are rotating with the grid frequency. The

e
g
is aligned along
the d-axis of dq coordinate system. So when there is no voltage sag the vector

e
g
and

e
l
will be along the d-axis of the dq
presag
coordinate, which is the dq-coordinate before the
sag. But if there is a voltage sag with a phase angle jump of

then the dq coordinate

will move along the

e
g
, which is represented by dq
sag
coordinate.
4.5 Pre-sag Compensation
This is the compensation technique in which DVR injects the missing voltage during the
sag to restore both phase angle and load voltage magnitude. It is an ideal solution to
maintain the load voltage as pre-fault and is best solution for the loads which are sensi-
tive to phase angle jumps like adjustable speed motor drives (ASDs) and angle triggered
thyristor-controlled loads [6].
sag
d
presag
d
presag
q
sag
q
g
e
l
e
c inj
e e
c
e
c
l
i
pu
voltage
Figure 4.5: Vector Diagram of Pre-sag Method
The resulting voltage vector

e
inj
is shown in the Figure 4.5. This compensation has the
lowest eect at the load because the voltage at the load does not change with the sag.
A phase locked loop (PLL) will be tracking the grid voltage vector

e
g
. Once the PLL is
locked the injection voltage vector

e
inj
can be calculated as the dierence between the
grid voltage and reference load voltage

e
l
.
Mathematically we can write in dq
sag
coordinate as,
e
inj
dq
sag
=e
c
dq
sag
=e
l
dq
sag
e
g
dq
sag
(4.1)
38
4.6. Energy Optimized Compensation or Phase Advance Compensation
4.6 Energy Optimized Compensation or Phase Ad-
vance Compensation
Both the pre-sag compensation and in-phase compensation must inject active power to
the loads almost all the time. However the amount of active power is limited by the energy
storage in the DC-link, which is one of the most expensive components of the DVR. Due
to the limited energy storage capacity of the DC link, the energy injected by the DVR
must be controlled, which is done by energy optimized compensation method.
This method is based on the idea that by making the injected voltage

e
inj
and the load
current

i
l
vectors perpendicular to each other, the voltage sag can be mitigated by

injecting only reactive power by the DVR. But by injecting only reactive power there
will be a large phase angle jump which may result in disconnection of the sensitive loads.
Therefore in the energy optimization method the injected voltage vector slowly moves
from pre-sag to energy optimized compensation injected voltage, keeping the load angle
constant. The principle of operations of the described control technique can be seen in
gure 4.6.
sag
d
presag
d
presag
q
sag
q
g
e
c inj
e e
c
e
c
l i
'
pu
voltage
l
e
'
ss
ii
l
e
l
i
Figure 4.6: Vector Diagram of Energy Optimization Method
Therefore, the amount of active power depends on the slope of the shift angle, which is the
angle which moves the injected voltage vector from pre-sag to energy optimized method.
The injected voltage e
inj
can be calculated by using cosine law for triangle e
l
e
inj
e
g
in
gure 4.6,
e
inj
=|e
c
| =
_
|e
l
|
2
+
e
g
2
2 |e
l
|
e
g
cos (
s
) (4.2)
The angle of the injected voltage e
inj
with the d
sag
axis is given by the sine law,
39
=(sin
1
_
|e
l
|
e
inj
_
sin (
s
) ) (4.3)
The corresponding d and q components of injected voltage e
inj
can be calculated as
e
inj
dsag
=e
c
dsag
=
e
inj
cos
e
inj
qsag
=e
c
qsag
=
e
inj
sin
4.6.1 Possible Pitfalls in EOC Method
The idea of zero active power injection is not always true in an energy optimization
method because there is a limit to this phenomenon which depends upon the load and the
sag depth. This relation is discussed below.
Strong Grid
Load
in
P
out
P
DVR
P
VSC
g
e
l
e
Figure 4.7: Power ow diagram of DVR
Figure 4.7 which shows the power ow of DVR where P
in
, P
out
and P
DV R
are the input
power from the grid, the load power and the power injected by the DVR respectively, then
the power equations can be written as follows:
P
in
=
3E
g
I
L
cos
s
P
out
=
3E
l
I
L
cos
P
DV R
=P
out
P
in
=
3E
l
I
L
cos
3E
g
I
L
cos
s
(4.4)
If we want to inject zero active power, then
P
DV R
=P
out
P
in
= 0
E
l
cos =E
g
cos
s
(4.5)
The maximum active power the grid can provide is when
s
= 0
E
g
= E
l
cos (4.6)
In the equation (4.6) [31] has two possible cases depending upon whether the inequality
is satised or not and the factor E
l
cos denes the critical boundary between them.
40
4.6. Energy Optimized Compensation or Phase Advance Compensation
4.6.1.1 Case 1
If the inequality in equation (4.6) is satised that means the DVR can mitigate the voltage
sag with zero active power, by reactive power injection only. For this case the optimal
angle between the grid voltage and the load current can be calculated from equation (4.5).
s
= cos
1
_
E
l
cos
E
g
_
(4.7)
This angle
s
, as it can be seen in gure. 4.6, provides the 90
injection which satises

reactive power injection.
4.6.1.2 Case 2
sag
d
presag
d
presag
q
sag
q
g
e
D
E
M
pu
voltage
l e
'
0
s T
G
T
i
l i
'
c inj
e e
l
i
l
e
*
l
e
Figure 4.8: Vector Diagram of Energy Optimization Method case 2.
If on the other hand the inequality in equation (4.6) is not satised which means the grid
voltage drop is large enough that the voltage sag cannot be mitigated by injecting reactive
power only. Therefore the DVR has to inject some active power depending upon the sag
depth. In such case the energy optimized method will optimize the active power injection
of DVR by making the
s
equal to zero that will give maximum active power from the
grid and the remaining power has to come from the DVR. Figure 4.8 shows this case and
it is important to note that
i
and are equal and smaller than 90
.
41
4.7 Simulation Results with ideal VSC
4.7.1 Pre-sag Method
The pre-sag method discussed in the section 4.5 has been implemented in PSCAD. The
following results are obtained by simulating a 50% voltage sag with no phase angle jump
with an RL load of PF 0.8, gure 4.9 and gure 4.10 shows the d and q component and
three phase grid voltage respectively.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
V
gd
V
gq
Figure 4.9: d and q component of grid voltage
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.10: Three phase grid voltage
42
4.7. Simulation Results with ideal VSC
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.11: Three phase load voltage
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.8
1
1.2
1.4
1.6
1.8
2
Time [sec]
V
o
lt
a
g
e

[
p
u
]
Figure 4.12: Magnitude of load voltage
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1
0.5
0
0.5
1
1.5
Time [sec]
V
o
lt
a
g
e

[
p
u
]
el
d
el
q
Figure 4.13: d and q component of load voltage
43
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.5
1
1.5
Time [sec]
A
c
t
iv
e

P
o
w
e
r

[
p
u
]
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
0.6
0.8
1
Time [sec]
R
e
a
c
t
iv
e

P
o
w
e
r

[
p
u
]
Figure 4.14: Active and reactive load power
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.5
1
1.5
Time [sec]
A
c
t
iv
e

P
o
w
e
r

[
p
u
]
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1
0.5
0
0.5
1
Time [sec]
R
e
a
c
t
iv
e

P
o
w
e
r

[
p
u
]
Figure 4.15: Active and reactive power of grid
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.2
0
0.2
0.4
0.6
Time [sec]
A
c
t
iv
e

P
o
w
e
r

[
p
u
]
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.5
0
0.5
1
Time [sec]
R
e
a
c
t
iv
e

P
o
w
e
r

[
p
u
]
Figure 4.16: Active and reactive injected power
44
As discussed earlier, when using pre-sag the DVR is injecting the missing voltage between
the grid and the load. Figures 4.11, 4.12, 4.13 and 4.14 shows the three phase load
voltage,load magnitude, the dq components of load voltage and active and reactive load
power. As shown,thanks to the controller operation the load will not be aected by the
voltage sag. Also gures 4.15 and 4.16 shows the active and reactive powers of grid and
DVR respectively. It can be observed in gure 4.15 that the reactive power provided by
the grid is not zero, by making the grid reactive power zero it will be possible to take more
active power from the grid. In this way DVR has to inject less active power and more
reactive power for voltage sag mitigation, thus optimizing the DVR power injection.
4.7.2 Energy optimized Technique
The energy optimized technique ,explained in the section 4.6, is implemented in PSCAD.
As discussed earlier, the EOC technique always require active power while shifting the
injected voltage vector from pre-sag to optimal energy point. The same is true at the
end of the sag, where the injected voltage is slowly reduced to zero in order to make sure
that there is no phase angle jump at the load. However the slope of the shifting can vary
depending upon the load sensitivity, and so does the active power requirement.
As mentioned in section 4.6, there is a limit upto which the DVR can mitigate voltage sag
by injecting zero power. For a load of 12.8kVA and PF 0.8 this limit is at 80% sag. The
simulation results of the DVR with energy optimized technique is shown below for the two
cases. Note that for the EOC method the simulations are run for longer time duration as
compared to pre-sag case, because of the time required to shift injected voltage vector.
4.7.2.1 Case 1
voltage sag of 85% with no phase angle jump is simulated to show the zero active power
injected by the DVR in steady state. The d and q components of the grid voltage are
shown in gure 4.17 with voltage sag starting at time 0.2 sec for duration of 6.8 sec.Figure
4.18 shows the three phase grid voltage.
0 1 2 3 4 5 6 7 8 9 10
0.6
0.7
0.8
0.9
1
1.1
Time [sec]
V
o
lt
a
g
e

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0.2
0.1
0
0.1
0.2
0.3
0.4
Time [sec]
V
o
lt
a
g
e

[
p
u
]
V
gd
V
gq
Figure 4.17: d and q components of grid voltage
45
0 1 2 3 4 5 6 7 8 9 10
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.18: Three phase grid voltage
0 1 2 3 4 5 6 7 8 9 10
0.2
0
0.2
0.4
Time [sec]
A
c
t
i
v
e

P
o
w
e
r

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0.5
0
0.5
1
Time [sec]
R
e
a
c
t
i
v
e

P
o
w
e
r

[
p
u
]
Figure 4.19: Active and Reactive power injected by DVR
Consider gure 4.19, which shows the active and reactive power injected by the DVR.
When the sag occurs at time t=0.2 sec the DVR injects both active and reactive power
as in pre-sag case. From that point onwards the active power from the DVR start to
decrease slowly while at the same time the reactive power of the DVR start to increase.
At time t=6.2 sec the DVR active power injection becomes zero and now the DVR is
only injecting reactive power. Note that the load angle is kept constant while the
s
decreases, shown in gure 4.20.

46
0 1 2 3 4 5 6 7 8 9 10
0
0.5
1
Time [sec]
r
a
d
0 1 2 3 4 5 6 7 8 9 10
1
0
1
2
3
Time [sec]
r
a
d
0 1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
i
V
inj
Figure 4.20: Shows the
s
, ,
i
and angles and the magnitude of injected voltage
of DVR.
When the voltage sag ends at time t=7 sec,now the grid can provide all the active power.
But to avoid phase angle jump in the load voltage,the DVR will absorb some of the active
power in order to slowly shift the injection voltage vector back to pre-fault position. This
slow transfer is complete at time 9.8 sec when the
s
is equal to , can be seen in gure
4.20 where the ploted angles have the meaning given in gure 4.8 . During this process the
amplitude of the load voltage is not aected, can be seen in gure 4.21, even though the d
and q component of load voltage in gure 4.22 varies over time due to shifting of injected
voltage vector.Figure 4.23 shows the three phase load voltage. Also active and reactive
load powers in gure 4.24 are constant during the voltage sag as the load is constant
impedence load.
0 1 2 3 4 5 6 7 8 9 10
0.7
0.75
0.8
0.85
0.9
0.95
1
1.05
1.1
1.15
1.2
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
Figure 4.21: Magnitude of Load voltage.
47
0 1 2 3 4 5 6 7 8 9 10
0.8
0.9
1
1.1
Time [sec]
v
o
lt
a
g
e

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
el
d
el
q
Figure 4.22: d and q component of Load voltage.
0 1 2 3 4 5 6 7 8 9 10
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.23: Three phase Load voltage.
0 1 2 3 4 5 6 7 8 9 10
0.6
0.7
0.8
0.9
1
Time [ sec ]
A
c
t
iv
e

P
o
w
e
r

[

p

u

]
0 1 2 3 4 5 6 7 8 9 10
0.4
0.45
0.5
0.55
0.6
0.65
0.7
Time [ sec ]
R
e
a
c
t
iv
e

P
o
w
e
r

[

p

u

]
Figure 4.24: Active and reactive power of the load.
48
4.7.2.2 Case 2
A voltage sag of 50% and no phase angle jump was simulated at the grid to show the case
when active power injection is not zero. Figure 4.25 shows the d and q component of the
grid voltage with voltage sag starting at time t=0.2 sec and last up till time t= 7 sec.
Figure 4.26 shows the three phase grid voltage.
0 1 2 3 4 5 6 7 8 9 10
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[

p
u

]
0 1 2 3 4 5 6 7 8 9 10
0.2
0.1
0
0.1
0.2
0.3
0.4
Time [sec]
V
o
l
t
a
g
e

[

p
u

]
e
gd
e
gq
Figure 4.25: d and q components of grid voltage.
0 1 2 3 4 5 6 7 8 9 10
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.26: Three phase grid voltage.
49
0 1 2 3 4 5 6 7 8 9 10
0.4
0.2
0
0.2
0.4
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0.5
0
0.5
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.27: Active and Reactive power injected by DVR.
0 1 2 3 4 5 6 7 8 9 10
0
0.5
1
Time [sec]
r
a
d
0 1 2 3 4 5 6 7 8 9 10
1
0
1
2
3
Time [sec]
r
a
d
0 1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
i
V
inj
Figure 4.28: Shows the
s
, ,
i
and angles and the magnitude of injected voltage
of DVR.
Figure 4.27, shows the active and reactive power injected by the DVR. When the sag
occurs at time t=0.2 sec the DVR injects both active and reactive power as it does in
pre-sag case. From that point onwards the active power from the DVR start to decrease
slowly, taking more active power from the grid. Note that the load angle is kept
constant while the
s
decreases, shown in gure 4.28. After 1.2 sec both the active and
reactive power of the DVR and grid becomes constant and this is the optimal injection
of the DVR in this particular case, as explained in section 4.6.2. We can also see the
s
angle in gure 4.28 which is zero, thus taking the maximum power from the grid. In the
50
gure 4.29 the reactive power of the grid is also zero. As discussed earlier in section 4.6.2,
gure 4.28 conrms that both the
i
and angle will become equal in case2.
0 1 2 3 4 5 6 7 8 9 10
0
0.5
1
1.5
Time [sec]
A
c
t
i
v
e

P
o
w
e
r

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0.5
0
0.5
1
Time [sec]
R
e
a
c
t
i
v
e

P
o
w
e
r

[
p
u
]
Figure 4.29: Active and Reactive power of Grid.
At time t=7 sec when the sag is over, the DVR will again slowly shift the injection voltage
vector. But now since the sag is over the active power is available at the grid. So the DVR
will again absorb active power and slowly move towards zero injection. This transfer is
completed at time 9.8 sec when the
s
is equal to , as it can be seen in gure 4.28.
As before the d and q component of the load voltage in Figure 4.30 are varying during
this process but the amplitude of the load voltage remains constant,not shown.Three
phase load voltage is shown in gure 4.31. During all this process the load power is also
constant,shown in Figure 4.32, as expected for constant impedence load.
0 1 2 3 4 5 6 7 8 9 10
0.5
1
1.5
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
0.6
0.8
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
el
d
el
q
Figure 4.30: d and q components of load voltage.
51
0 1 2 3 4 5 6 7 8 9 10
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.31: Three phase load voltage.
0 1 2 3 4 5 6 7 8 9 10
0
0.5
1
1.5
Time [sec]
A
c
t
i
v
e

P
o
w
e
r

[
p
u
]
0 1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
0.6
0.8
Time [sec]
R
e
a
c
t
i
v
e

P
o
w
e
r

[
p
u
]
Figure 4.32: Active and reactive power of the load.
4.8 Simulation Results with actual VSC
In this section the simulation results of DVR with actual VSC for both the pre-sag and
EOC are presented.For this simulation the same load as in the ideal case is considered
.The sampling frequency is set equal to 5 kHz.
4.8.1 Pre-sag Method
For the pre-sag case voltage sag of 50% with no phase angle jump has been simulated
to see the response of DVR with actual converter. Figures 4.33 and 4.34 shows the dq
component and three phase grid voltage respectively with a sag starting at t=0.2 sec for
a duration of 0.8 sec.
52
4.8. Simulation Results with actual VSC
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
v
o
lt
a
g
e

[
p
u
]
V
gd
V
gq
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
v
o
lt
a
g
e

[
p
u
]
Figure 4.34: Three phase Grid voltage.
0.46 0.465 0.47 0.475 0.48 0.485 0.49
1.5
1
0.5
0
0.5
1
1.5
Time [sec]
v
o
lt
a
g
e

[
p
u
]
U
t
ref
U
conv
Figure 4.35: Single phase actual and reference Converter voltage.
53
0.455 0.46 0.465 0.47 0.475 0.48 0.485 0.49
0.5
0.4
0.3
0.2
0.1
0
0.1
0.2
0.3
0.4
0.5
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
E
c
ref
E
c
Figure 4.36: Actual and reference Injected Voltage of the DVR at the PCC.
Figure 4.35 shows the single phase output voltage of the VSC both measured and refer-
ence.It can be observed that the reference signal is a sinusoidal shape while the output
voltage of converter is PWM signal uctuating between two voltage levels. When this
PWM signal output of VSC passes through the LC-lter at the PCC it becomes smooth it
can be seen in gure 4.36 which is showing the actual and reference injected DVR voltage.
So the actual voltage is following the reference injected voltage verifying that the DVR is
working properly with the actual VSC.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.2
0
0.2
0.4
0.6
Time [sec]
A
c
t
i
v
e

P
o
w
e
r

[
p
u
]
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.5
0
0.5
1
Time [sec]
R
e
a
c
t
i
v
e

P
o
w
e
r

[
p
u
]
Figure 4.37: Injected power of the DVR.
54
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
0.6
0.8
1
Time [sec]
A
c
t
iv
e

P
o
w
e
r

[
p
u
]
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.2
0.4
0.6
0.8
Time [sec]
R
e
a
c
t
iv
e

P
o
w
e
r

[
p
u
]
Figure 4.38: Active and Reactive Power of load.
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
Time [sec]
v
o
lt
a
g
e

[
p
u
]
Figure 4.39: Magnitude of load voltage.
0.2 0.25 0.3 0.35 0.4 0.45 0.5
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
v
o
lt
a
g
e

[
p
u
]
55
Also the gure 4.37 and 4.38 shows the active and reactive power of DVR and load are as
expected in pre-sag case. As in the ideal case, the load is not aected by the voltage sag
can be seen in gure 4.39 and 4.40 which shows the load magnitude and three phase load
voltages respectively.
4.8.2 EOC Method
Similarly the DVR with actual VSC model using the energy optimized technique was
tested for case 1, discussed in section 4.6. So shallow 80% voltage sag was simulated to
show the zero power injection capability of DVR. Following results were obtained during
the simulation. Figure 4.41 and 4.42 shows the grid voltage in d and q and three phases
respectively with voltage sag at time t=0.2 sec for a duration of 1.8 sec.
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
V
gq
V
gd
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
v
o
l
t
a
g
e

[
p
u
]
Figure 4.42: Three phase grid voltage.
56
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0.2
0.1
0
0.1
0.2
Time [sec]
A
c
t
iv
e

P
o
w
e
r

[
p
u
]
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0.2
0
0.2
0.4
0.6
0.8
Time [sec]
R
e
a
c
t
iv
e

P
o
w
e
r

[
p
u
]
Figure 4.43: Active and Reactive Power injected by the DVR.
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0
0.2
0.4
0.6
0.8
1
Time [sec]
A
c
t
iv
e

P
o
w
e
r

[
p
u
]
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0
0.2
0.4
0.6
0.8
Time [sec]
R
e
a
c
t
iv
e

P
o
w
e
r

[
p
u
]
Figure 4.44: Active and Reactive Power of Load.
0.455 0.46 0.465 0.47 0.475 0.48 0.485 0.49
0.2
0.15
0.1
0.05
0
0.05
0.1
0.15
0.2
Time [sec]
v
o
lt
a
g
e

[
p
u
] E
c
ref
E
c
Figure 4.45: Actual and reference Injected voltage of DVR at PCC.
57
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0.8
0.85
0.9
0.95
1
1.05
1.1
1.15
Time [sec]
v
o
lt
a
g
e

[
p
u
]
Figure 4.46: Magnitude of load voltage.
0.2 0.25 0.3 0.35 0.4 0.45 0.5
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
v
o
lt
a
g
e

[
p
u
]
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
1
0.5
0
0.5
1
Time [sec]
[
r
a
d
]
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
4
2
0
2
4
Time [sec]
[
r
a
d
]
i
Figure 4.48: Shows the ,
s
,
i
and angles used in EOC method.
58
4.9. Phase Angle Jump
As expected in EOC method case1, the active power injected by the DVR is going to zero
at t=1.4 sec in gure 4.43 , also the active and reactive power to the load is constant can
be seen in gure 4.44.The DVR injected voltage is following the reference injected voltage
in gure 4.45. And gure 4.46 and 4.47 shows the load magnitude and three phase load
voltage respectively. Also it can be seen in gure 4.48 that the load angle

is constant
throughout the simulation. So the results of DVR with actual VSC are the same as with
ideal VSC.
4.9 Phase Angle Jump
In this section an investigation is done to see the aect of phase angle jump variation on the
energy requirement of DVR. This analysis is done for both cases of energy optimization
method for ideal VSC with a constant impedance load with PF 0.8. Note that in the
following two cases the energy injected by DVR is given in pu. The energy injected by the
DVR in pre-sag case for a 50% voltage sag and a duration of 500msec is taken as base.
4.9.1 EOC Case1
For the analysis of this case a voltage sag of 85% starting at time 0.2 sec for a duration
of 9.8sec was simulated for varying phase angle jump of [-45 to 45]. The gures 4.49 and
4.50 shows the d and q components of grid voltage and three phase load voltage for 45
phase angle jump respectively. Figure 4.51 shows the power injected by DVR in pu. It
can be observed that power injected by DVR is increasing for positive and decreasing for
the negative phase angle jump. Also this can be seen clearly in gure 4.52, which shows
the energy injected by DVR.
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
V
gd
V
gq
Figure 4.49: d and q component of grid voltage with phase angle jump of 45.
59
0.18 0.185 0.19 0.195 0.2 0.205 0.21 0.215 0.22 0.225 0.23
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.50: Three phase load voltage with phase angle jump of 45.
0 1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Time [sec]
P
o
w
e
r

i
n
j
e
c
t
e
d

b
y

D
V
R

[
p
u
]

Ph 0
Ph 15
Ph 25
Ph 35
Ph 45
Ph 15
Ph 25
Ph35
Ph 45
Figure 4.51: Power injected by the DVR with dierent phase angle jump.
50 40 30 20 10 0 10 20 30 40 50
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
Phase angle [deg]
E
n
e
r
g
y

in
je
c
t
e
d

b
y

D
V
R

[
p
u
]
Figure 4.52: Energy injected by DVR for dierent phase angle jumps.
60
4.9. Phase Angle Jump
4.9.2 EOC Case2
For the analysis of case2, a voltage sag of 70% starting at time 0.2 sec for a duration of
9.8sec was simulated for varying phase angle jump of [-45 to 45]. The gures 4.53 and 4.54
shows the d and q components of grid voltage and three phase load voltage for 45 phase
angle jump respectively. In the gure 4.55 which is showing the power injected by DVR
in pu. It can be observed that power injected by DVR is again increasing for positive and
decreasing for the negative phase angle jump. Also this can be seen clearly in gure 4.56,
which shows the energy injected by DVR.
0 1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.53: d and q component of grid voltage with phase angle jump of 45.
0.18 0.185 0.19 0.195 0.2 0.205 0.21 0.215 0.22 0.225 0.23
1
0.8
0.6
0.4
0.2
0
0.2
0.4
0.6
0.8
1
Time [sec]
V
o
l
t
a
g
e

[
p
u
]
Figure 4.54: Three phase load voltage with phase angle jump of 45.
61
0 1 2 3 4 5 6 7 8 9 10
0.4
0.2
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Time [sec]
P
o
w
e
r

i
n
j
e
c
t
e
d

b
y

D
V
R

[
p
u
]

Ph 0
Ph 15
Ph 25
Ph 35
Ph 45
Ph 15
Ph 25
Ph35
Ph 45
Figure 4.55: Power injected by the DVR with dierent phase angle jump.
50 40 30 20 10 0 10 20 30 40 50
5
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
Phase angle [deg]
E
n
e
r
g
y

i
n
j
e
c
t
e
d

b
y

D
V
R

[
p
u
]
Figure 4.56: Energy injected by DVR for dierent phase angle jumps.
As expected it can be seen from gures 4.52 and 4.56 which are for shallow sag and deep
sag respectively that for case2 deeper voltage sags the energy required by DVR for dierent
phase angle jumps is more than in case1 with shallow voltage sags.
4.10 Pre-sag and EOC Comparison
4.10.1 Steady State Active Power
In this section, the steady-state active power requirement for the DVR will be calcu-
lated.Observe that the amount of power needed for the load shift will not be considered
here. The active power injected by DVR is calculated in MATLAB and then compared
with the ones that are obtained from PSCAD simulation. Finally the results of pre-sag
and EOC are compared. For the following results 12.8kV load with PF varying from 0.1
-0.9 is used to see the voltage sag variation of 0.3-0.9 pu.
62
4.10. Pre-sag and EOC Comparison
0.3 0.4 0.5 0.6 0.7 0.8 0.9
0
0.1
0.2
0.3
0.4
0.5
0.6

Voltage Dip [pu]
A
c
t
i
v
e

P
o
w
e
r

[
p
.
u
]
PF
c
0.9
PF
c
0.7
PF
c
0.5
PF
c
0.3
PF
c
0.1
PF
s
0.9
PF
s
0.7
PF
s
0.5
PF
s
0.3
PF
s
0.1
Figure 4.57: Comparison of Pre-sag results between the MALAB calculated repre-
sented with dashed lines, denoted with

PF
c
in the legend and PSCAD simulated

results represented with markers, denoted with

PF
s
in the legend.
Figure 4.57 shows the calculated results in MATLAB for pre-sag the results obtained by
the simulation model in PSCAD for dierent PF. It can be seen that the simulated results
mach the expected MATLAB calculated results.
0.3 0.4 0.5 0.6 0.7 0.8 0.9
0
0.1
0.2
0.3
0.4
0.5
0.6

Voltage Dip [pu]
A
c
t
i
v
e

P
o
w
e
r

[
p
u
]
PF
c
0.9
PF
c
0.7
PF
c
0.5
PF
c
0.3
PF
c
0.1
PF
s
0.9
PF
s
0.7
PF
s
0.5
PF
s
0.3
PF
s
0.1
Figure 4.58: Comparison of EOC results between the MALAB calculated represented
with dashed lines, denoted with

PF
c
in the legend and PSCAD simulated results

represented with markers, denoted with

PF
s
in the legend.
63
For the energy optimized compensation method we have the calculated results in MATAB
and the simulated results in PSCAD in gure 4.58; both shows that uptill the critical
boundary as explained in case1 section 4.6.1, the active power injection is zero. So voltage
sag mitigation can be done with zero active power, which matches our results of theoratical
analysis.
0.3 0.4 0.5 0.6 0.7 0.8 0.9
0
0.1
0.2
0.3
0.4
0.5
0.6
Voltage Dip [pu]
A
c
t
i
v
e

P
o
w
e
r

[
p
u
]

PF
Presag
0.9
PF
Presag
0.7
PF
Presag
0.5
PF
Presag
0.3
PF
Presag
0.1
PF
EOP
0.9
PF
EOP
0.7
PF
EOP
0.5
PF
EOP
0.3
PF
EOP
0.1
Figure 4.59: Comparison of active power between pre-sag and EOC method.
Figure 4.59 shows the comparison between the presag and EOC method energy consump-
tion for dierent PF load. It can be seen that as the PF of the load goes down the load
becomes more inductive and the EOC starts to be more energy ecient then the pre-sag
method because less active power is required.
Also an interesting factor in the EOC method is that the maximum power dierence point
between the pre-sag and EOC methods shown in gure 4.60, varies with power factor (i-e)
for a power factor of 0.5 there maximum power dierence point will be at 50% voltage
sag.
64
4.10. Pre-sag and EOC Comparison
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0
0.05
0.1
0.15
0.2
0.25
0.3
Voltage Dip [pu]
A
c
t
i
v
e

p
o
w
e
r

d
i
f
f
e
r
e
n
c
e

b
\
w

P
r
e
s
a
g

&

E
O
P

M
e
t
h
o
d

[
p
u
]
Maximum point
PF 0.5
PF 0.6
PF 0.7
PF 0.8
PF 0.9
PF 0.3
PF 0.2
PF 0.1
PF 0.4
Figure 4.60: Power dierence between the pre-sag and EOC methods.
4.10.2 Energy with sag duration
In the previous section the comparison between pre-sag and EOC methods has been done
by considering the steady state energy values. In this section an energy comparison be-
tween the two methods will be done on the bases of sag duration. For this study again
ideal VSC model is used with an RL load of PF 0.8, also EOC method a xed slope has
been selected. The energy comparison is presented by varying sag duration from 10msec
to 6 sec.
Note that pre-sag with 50% voltage sag and 500msec duration is taken as a reference for
pu energy conversion.
Figure 4.61 shows the energy comparison between the pre-sag and EOC with varying time
duration of sags is for 50% voltage sag. At 50% voltage sag EOC case2 will be valid that
will optimize the active power injected by the DVR but will not make it zero. It can be
seen that with the increase of sag duration the eciency of EOC method also increases.
In the gure 4.62 which also shows the energy comparison between the pre-sag and EOC
with varying time duration of sags but for 85% voltage sag. In this case of shallow sag
the EOC method will make the active power injection of DVR zero and thus with sag
duration that will signicantly reduce the energy injection of DVR which can be clearly
seen in gure 4.62.
65
0 1 2 3 4 5 6
0
2
4
6
8
10
12
Time [sec]
E
n
e
r
g
y

i
n
j
e
c
t
e
d

b
y

D
V
R

[
p
u
]
Figure 4.61: Energy comparison plot between pre-sag (solid line) and EOC (Dashed
line) for 50% voltage sag.
0 1 2 3 4 5 6
0
0.5
1
1.5
2
2.5
3
3.5
Time [sec]
E
n
e
r
g
y

i
n
j
e
c
t
e
d

b
y

D
V
R

[
p
u
]
Figure 4.62: Energy comparison plot between pre-sag (solid line) and EOC (Dashed
line) for 85% voltage sag.
66
4.11. Conclusion
4.11 Conclusion
In this chapter three voltage sag mitigation techniques, in-phase, pre-sag and EOC have
been discussed. Further the two cases of EOC have also been explained; rst case in which
the DVR can mitigate voltage sags with zero active power and in the second case the DVR
has to inject some active power due to deep sag at the grid. Then the simulation results of
DVR with ideal VSC both for pre-sag and EOC techniques have been presented that ver-
ies the theoretical explanation given in sections 4.5 and 4.6. Next the simulation results
of two techniques with actual VSC have also been presented to see the eectiveness of
both techniques with the real converter whose results have matched with the one obtained
using the ideal VSC. Then the comparison of pre-sag and EOC techniques have been given
to see how eective the EOC method is and also the aect of phase angle jump has been
studied in the last section. It has been concluded that:
1. Voltage Sag mitigation with zero active power is possible for shallow sags only,
meaning if the critical boundary mentioned in section 4.6.1 is not exceeded.
2. EOC method is also energy ecient for deep sags, meaning case 2 of section 4.6.2,
in which the active power cannot reach zero.
3. Eectiveness of EOC method is strongly dependent on load power factor.
4. EOC method is more ecient for longer sag durations because of the time needed
to shift injection voltage vector in order to inject only reactive power.
5. Small amount of active power is needed by the DVR to bring back the phase when
the sag is over as compared to when the sag occurs.
6. Less energy is needed for negative phase angle jumps as compared to zero phase
angle jump then positive phase angle jumps.
7. Phase angle jump has small impact on the energy requirement and this impact also
increases with voltage sag depth.
67
68
Chapter 5
Conclusion and Future Work
5.1 Conclusion
In this thesis the eectiveness of EOC and pre-sag compensation methods have been tested
using the series connected VSC. For both techniques a PI cascade controller with inner
current controller and outer voltage controller has been implemented in chapter 3.Also a
brief stability analysis of the cascade controller has been performed in order to understand
the behavior of the system. Some of the important limitations of the cascade controller
have been discovered such as its insensitivity to the grid harmonics. In chapter 4 both the
EOC and pre-sag techniques have been described both theoretically and mathematically
and their limitations have been explored. Then simulation results of both methods have
been presented in order to verify the theoretical analysis. Also these two techniques have
been simulated with actual VSC which veried the results given with ideal VSC. Two
cases were considered depending upon sag depth for analyzing EOC method. When the
sag is shallow, active power injected by DVR is equal to zero.When sag is deep one, power
injected by DVR is minimum as compared to pre-sag but not zero. Eect of phase angle
jumps on the power and energy requirements by using EOC method were also studied.
DVR energy injection increases having voltage sag of positive phase jumps (less for shallow
and more for deep sag), whereas its energy injection reduces when voltage sag is having
negative phase angle jumps.
From this thesis it is concluded that EOC method is more energy ecient then pre-sag
method for constant impedence load. But the fact that EOC method eciency for the
longer duration voltage sag is more than the short duration voltage sag, still implies a
question whether the control system of EOC method is worth the eciency it provides
.Answer to this question will depend upon the load type and the customer requirement of
the voltage sag mitigation.
69
Chapter 5. Conclusion and Future Work
5.2 Future work
The current voltage sag mitigation strategies in this thesis for the optimization of en-
ergy storage for static series compensator (SSC) were simulated based on only constant
impedance load. It is clear from this thesis that the optimization can be achieved through
EOC technique by considering constant impedance load. In actual practice, induction mo-
tor which is varying impedance load is considered to be industrial muscles in the modern
power system. The optimization of the energy storage can be obtained by using dier-
ent loads instead of constant impedance like diode rectier load, induction machine load
etc. Also in this thesis constant dc-source is used to provide energy, but in reality energy
storage can be modeled by using battery, super-capacitors or super conduction Magnetic
Energy Storage (SMES) which will add some limitations on the injection capability of
DVR.
70
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A Dynamic Voltage Restorer for Voltage Sag Mitigation in a Renery with Induction
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An advance cascade controller
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voltage sag mitigation with integrated gate commutated thyrister based
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Advantages of Voltage Sourced Converter (VSC) Based Design concepte for FACTS and
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by Gregory Reed, Ronald Pape and Masatoshi Takeda ,Power

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Compensation characteristics of the, combined system
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Eects of voltage sags on AC motor drives
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The impact of power system disturbances on AC/coil contactors
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72
Appendix A
Transformations for three-phase
systems
A.1 Introduction
This appendix presents the transformations to get the voltage vector from three-phase
quantity and vice versa. Expressions of the voltage vector in both xed and rotating
references are given in unsymmetrical three-phase quantities.
A.2 Transformation of three-phase quantities into 2-phase
() quantities
Three-phase system having three quantities U
1
(t), U
2
(t) and U
3
(t) can be transformed
into - frame by applying the transformation dened by
U(t) = U
(t) +jU
(t) = K[U
1
(t) + U
2
(t)e
j
2
3
+U
3
(t)e
j
4
3
] (A-1)
Where K is equal to v
2
3
or
2
3
for power invariant and voltage invariant respectively between
two systems. Equation (A-1) can be shown in matrix form as follows
_
U
(t)
U
(t)
_
= Y 12
U
1
(t)
U
2
(t)
U
3
(t)
(A-2)
Where using power invariant transformation matrix Y12 is equal to
Y
12
=
_

2
3
1
6
1
6
0
1
2
1
2
_
(A-3)
Therefore
_
U(t)
U(t)
_
=
_

2
3
1
6
1
6
0
1
2
1
2
_
U
1
(t)
U
2
(t)
U
3
(t)
(A-4)
The inverse transformation, assuming no zero-sequence, is given by
U
1
(t)
U
2
(t)
U
3
(t)
= Y
21
_
U(t)
U(t)
_
(A-5)
73
Appendix
Where
Y
21
=
2
3
0
1
6
1
2
1
6
1
(A-6)
A.3 Transformation between xed and rotation coordinate
systems
Main reason for this kind of transformation is the easier analysis and control of the system
and it gives straight-forward way to determine transients.
Let the vectors v(t) and u(t) rotate in the -frame with angular frequency of (t) in the
positive (counter clock-wise) direction. If the vector u(t) is taken as the d-axis of dq-frame
that rotates in the same direction with the angular frequency of (t), both vectors will
appear as xed vectors in that frame. The components of v(t) in dq-frame are thus given
by the projections of the vector on the direction of u(t) and on the orthogonal direction,
as shown in gure A.1.
) (t v
d
t
) (t v
) (t v
) (t v
d
) (t v
q
) (t u
q
(t)
Figure A.1:Relation between and dq-frame
The transformation in the vector form can be given as
v
(dq)
(t) = v
()
(t) e
j(t)
(A-7)
With the angle (t) in the gure A.1 is given by
(t) =
0
+

0
() d (A-8)
The inverse transformation, from rotating dq-frame to the xed -frame is dened by
v
()
(t) = v
(dq)
(t) e
j(t)
(A-9)
In matrix form, the transformation from the xed -frame to dq-frame is given ass
_
v
d
(t)
v
q
(t)
_
= R((t))
_
v
(t)
v
(t)
_
(A-10)
While the inverse is given
_
v
d
(t)
v
q
(t)
_
= R((t))
_
v
(t)
v
(t)
_
(A-11)
Where,
R((t)) =
_
COS( (t)) SIN( (t))
SIN( (t)) COS( (t))
_
(A-12)
74
Appendix B
Flowchart of EOC algorithm
Start
Define:
K = Slope of PAC
VL_mag = Load Voltage in kV
Vg_mag= Grid Voltage in kV
i =Angle b/w Ec and Ig
s= Angle b/w Eg and Ig
IF
(Egd < 0.39 AND Time > 0.1)
Flag=1 ; the dip has occured
Phi = Load angle From PLL
IF
(Vg_mag >= VL_mag*cos(Phi))
delta=delta+K*Ts*(pi/2-i)
;an integrator to make the Thetai angle 90
IF
(s >= 0)
Vinj= Calculate Injection Voltage
Ec_ref=from Vinj and delta calculate reference
Capacitor valtage
sr=s ; sr is the dip recovery angle
Yes
IF
(Egd > 0.39 AND flag = 1) No
IF
(s < Phi)
Yes
sr=sr+K*Ts*(Phi-s)
;an integrator to make the Thetas angle back to Phi
Vinj= Calculate Injection Voltage
Ec_ref=from Vinj and delta calculate reference
Capacitor valtage
Flag=0
Ec_ref=(Grid dq - reference load dq )
End
No
No
Yes
Yes No
Yes
No
delta
Flag
sr=Thetasr
Phi
Read the stored variables
delta
Flag
sr=Thetasr
Phi
75

On Optimal Use of Energy Storage For Series Connected VSC

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Optimal use of energy storage for series

connected voltage source converter

and the feed forward

terms because they can be added later, we can have an ex-

(t), which will be the input to the current controller to control

(t) using the current controller block;

Figure 3.9: Block Diagram Implementation of Cascade Controller

at the negative real axis and minimum

and minimum at the unit circle

. So again the well damped region is set between

denotes av=0.1, marker

denotes av=0.3, marker

to d-component of actual value of capacitor voltage ecd

denotes av=0.1, marker

denotes av=0.3, marker

denotes av=0.5,and marker

to d-component of actual value of capacitor voltage ecd at

to d-component of actual value of capacitor voltage ecd at variation of voltage

to q-component of actual value of capacitor voltage ecq at variation of voltage

to d-component of actual value of grid voltage egd at variation of voltage controller

to q-component of actual value of grid voltage egq at variation of voltage controller

=1.5 over estimation. So it can be concluded that it is

varies from 0.1 to 2 of actual lter capacitance C, the poles

=1.3 and marker

=0.2*C and marker

then the dq coordinate

vectors perpendicular to each other, the voltage sag can be mitigated by

injection which satises

decreases, shown in gure 4.20.

in the legend and PSCAD simulated

in the legend and PSCAD simulated results

,Proceedings IEEE International conference on Electric Machines and drives,1997,pp.

by Tarek I. El-Shennawy, Abdel-Monem Moussa, Mahmoud A. El-Gammal

, IEEE Trans. Ind. Applicat., vol.34, pp. 549558, May/June 1998.

,IEEE Industrial Application Society

, proceedings of international conference on energy man-

, proceedings of 8th international conference on harmonics and

by Gregory Reed, Ronald Pape and Masatoshi Takeda ,Power

, IEEE Trans. Ind. Application, vol. 29, pp. 144-

, IEEE Spectrum, vol.32, no.6, pp.42-48, June

, IEEE Annual Technical

, in Proc. Of IEEE Southeastcon95, Visualize the Future, 1995,

,IEEE Proc. Generat. Transm. Distribut., 153: 423-430.

Nitin Aggarwal, K. Rajendra,

by Katsuhiko Ogata third edition.

by Ovid Wallace Eshback, Byron D.Tapley,

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