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LN004 / JohnStone / 2013-02-02 V1

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Exzerpt
This document describes a fast switching FET driver circuit dedicated to asymmetric motors.

List of Contents
Scope: ........................................................................................................................ 4 Basic Knowledge ........................................................................................................ 4 Overview..................................................................................................................... 6 Circuit ......................................................................................................................... 7 Opto ........................................................................................................................ 7 Signal Conditioning & Power on Disable ................................................................. 8 FET driver ............................................................................................................. 10 FET Stage ............................................................................................................. 12 Circuit Board ............................................................................................................. 16 Bread board .............................................................................................................. 17 Assembly .................................................................................................................. 17 Wiring Procedure ...................................................................................................... 18 Precautions at Different Circuit Areas ....................................................................... 19

Page 3 of 24 Author
Name: Profession: Location: John Stone Engineer in electronics and humble apprentice in radiant science Somewhere in a rural area in the global village

The author performs this research in order to bring honor to the creator and help protect his creation.

Disclaimer
The contents described herein are for education only. You are not encouraged to replicate items described herein. The author takes no responsibility for any damage, injury or other disadvantage occurring.

Policies:
Anybody is encouraged to copy and forward this document at will as long as the content is not modified. Quotations are allowed unmodified only with added reference (title and version) and internet link if possible.

Intellectual Properties
As far as the author is aware there are no facts described herein pending to any intellectual property being protected. All contents are open source and MUST NOT be patented or claimed to be private in any way.

Glossary
FET field effect transistor

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Scope of this document:


Due to the fact that many members of energetic forum are not educated in electronic matters this document shall help anybody to build a high quality driver dor own experiments.

Basic Knowledge
The notions below were published in Energetic Forum by the author in Oct. 2012. Everybody shall understand that the matter is far complicated but these notions may suffice in order to get the basic understanding for building drivers like presented herein.
1. FETs are modern electric valves with some very superior properties compared to transistors. This makes them a primary choice in order to switch high currents along low loss. But FETs will perform well only if they are kept within their area of wellness. Unfortunately many of you do not now these conditions and therefore you torture them without any malicious intention. 2. Any valve performs well only if you switch it fast. Any intermediate state will perform excessive losses. You experienced it before if a switch (valve) in your home does not perform well and the contacts get hot - and possibly ignite your home. So the question is: How do we get FETs hurry up in their switching time. 3. FETs are extremely fast electric valves. They can perform (but not easily) within ps (picoseconds = 10 power -12 seconds) - But they show up some drawbacks we need to take in account. 4. For better understanding let's recall the connections of a FET (exactly a N-FET). This is the type we usually use. The leg being connected to electrical minus or GND or ground is called the "source". The leg where you connect your load is called "drain". Where you control the FET is the "gate". 5. The abbreviation FET stands for Field Effect Transistor. This term tells you that you can change the state of ON /Off by controlling an electric field within the structure of the FE-Transistor - see additionally This might give you the notion that a FET will not draw current but the field will be sufficient. This notion is true and false at same time - sorry given at what time you look at your FET. 6. Gate capacitance: There is no FET (or transistor) without it (app. 1nF = 1 nanaofarad). As you possibly know a capacitance is a bin for electrons where you can put them in and extract them later on (in reality it is not - but let's take it as thinking model). We charge a capacitor and discharge it. In this respect it behaves like a rechargeable battery. If you have lots of current you can charge it within short time and if you have a weak power supply you need to wait long time in order to use the charged object. Now please understand that you can have no natural feeling of what is slow or fast for a FET and what currents will flow. All this matter defies your daily experience and therefore we need to talk about it. 7. Charging a capacitance is no linear job but the more charge you have gathered in the

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cap the slower it will increase its voltage. So please understand that it will be no good idea to supply your FET driver with 12V while your FET needs 10V for full ON state. Additionally your driver will eat up some voltage and supply somewhat less than your battery supplies. And beware of long thin wires - they will kill the rest of your switching quality. For discharge you unfortunately have no negative voltage in order to speed up the cycle. Then the low driver stage needs to be strong enough. 8. Oscillations are another enemy of your FETs. As you learned above every transition generates losses and you can imagine that some additional oscillations (wires are inductance, capacitance and act along FET capacitance) will add losses and eat up performance of your PWM circuit. These oscillations may go up to MHz! But there is a drug for this - an additional resistor (10....30 Ohm) - look forward to schematic coming soon. 9. Now let's recall some usual nominal properties of a FET. Threshold voltage for ON state : higher than ca. 10V Threshold voltage for OFF state: lower than ca. 4V This tells you that you need to travel as fast as possible through the lossy zone between 4V and 10V and vice versa and additionally exceed the thresholds by some volts in order to stay in a secure zone. The bad news is that you do not have a certain amount of loss once only but at every transition ON/OFF and OFF/ON. The frequency of 10 KHz tells you i.e. that a FET will experience 20000 times pulses of heat every second because of switching only. Imagine these facts like driving your car without oil in the engine /gear -> friction + heat + damage. I do not want to derange you with math. If you want to know more see this calculator. Any way you can understand that if we have a weak, slow current source as driver and possibly no good conductors it will take longer time to switch a FET ON/OFF. As you own no oscilloscope it is of no value for you to enter into calculations and figures. Let's focus on what we can do in order to enhance your FET driving. 10. There are some other facts to be considered but stay with this knowledge for now.

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Overview
The FET driver described herein incorporates an opto coupler at input in order to separate the PWM generator from the noisy driver circuit. A simple opto will not transfer clean signals with steep edges. Therefore the opto output feeds aome gates for signal conditioning along power on disable. Both measures are necessary in order to prevent stress and damage of the FET stage itself. An essential part of this circuit is the FET driver itself being able to charge and discharge the gate capacitance very fast. This action requires high current flow and builders shall provide conductors with corresponding diameter in this section. The final FET stage contains some protection means from high voltage. An overcurrent protection is not designed in this version of circuit but can be added later on.

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Circuit
Opto

The input connector provides resistor and opto with separated leads on a post each in order to be easily adapted to the PMW generator. An open circuit at input will control the FETs to be switched off. Activating the opto at input will draw pin 3 at output to 5V performing as HIGH signal to the signal conditioning stage.

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Signal Conditioning & Power on Disable

The gates are of schmitt trigger type. They prevent randomly switching at output if noisy signals are fed at input. C18, R4, D3 disable the gate pin 10 up to the time when the capacitor is being charged above the switching level of the gate. In case of power off procedure the diode enables fast discharge of the capacitor in order to be prepared soon for next switch on procedure. Gate IC4d performs as simple inverter. There are two gates left in IC4.They can be used for later inventions. Note: The voltage for this circuit is 5V fed by a separated voltage regulator LM7805. This measure was chosen in order to prevent any crosstalk of the noisy circuitry originating from FET switching.

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Builders are advised to not omit capacitors shown in the diagram. They are essential in order to provide smooth DC voltage. Every type of capacitor performs in a certain proprietary frequency range. Thus a cluster of capacitors covers a wider range of frequencies. They get charged / discharged at spikes and crosstalk and load changes as well.

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FET driver

FET drivers are designed for sudden source / sink of several amps. This special type performs 12A within 50ns. Special precautions were taken by the manufacturer in order to prevent crosstalk form output to input. C17 / C2 guarantee smooth DC voltage for input circuitry. This cluster is being fed through K4 and this is the only connection to the output cluster. The posts of K4 need to be assembled with a jumper (or soldered together at backside). The posts can be used as connector for measurements. Same procedure at GND connections. input separated from output one single lead in-between. The circuit gets 12V from a separated voltage regulator LM7812. It is advised to feed this regulator by a galvanically separated PSU i.e. a simple socket charger.

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FET Stage

R8, R9 shall prevent spurious oscillations at FET side. They grow up along gate capacitance and inductivity of the leads between driver and FET. Therefore it is essential to have them as short as possible. The resistor values need to be determined at the setup itself. The drawback of these resistors is -> they prevent high currents to flow and thus reduce the switching speed. The resistors should be of metal film type or SMD. Normal carbon resistors contain a helical structure and thus add inductance to the gate (danger of oscillations) C9 / D2 perform as overvoltage protection for the gate. In order to separate the capacitance overvoltage is being fed through low capacitance diodes 1N4148 (D1,

Page 13 of 24 D6). Once C9 is charged there is no further interaction with the gate, except in case of overvoltage. Then D2 will conduct and prevent damage to the gate. D4 and D5 perform as overvoltage protection for the DS junction. They conduct in case of overvoltage and feed charge to the gate. Thus the FET will open again for short time and conduct the overvoltage to GND. K2, K3 are contacts for connecting meters. This circuit shows no high current contacts because builders will have very different arrangements for FETs along heat sinks. It is estimated they will not assemble the FETs to PCB but connect them by short massive wires to the respective G, D, S contacts on PCB.

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Circuit Board

As component placing and wiring are in some extent essential for proper function this setup shall serve as template for easy building. The circuit board below was setup primary for replicating the circuit on a breadboard (instruction below).

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Bread board
The board was developed in 1/10 pitch. Thus any commercial breadboard pad per hole board may be used. The dimensions are about 83mm x 56mm

Assembly
Step 1: Print the assembly print in scale 1:1 on paper. Check if dimensions ore OK, else correct your printer setup. Adjust the printout on the breadboard: holes to the fiducial marks. Fix paper with pins through holes first and then with glue.

Page 18 of 24 Puncture the assembling holes. Assemble a cluster of components (not all at once) i.e. 12V voltage regulator along related components. Ceramic 100nF capacitors were used of different pitch. You may use all the same and bend wires conforming the corresponding hole distance. Proceed with wiring (see next paragraph). After wiring finished proceed with next cluster.

Wiring Procedure
The wiring was performed like a single sided circuit board. The position of components was guided by having short and well-arranged wiring. The layout may be used as template along marking one wire after the other separate on a printout if done. (see pic below bottom view)

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Perform short wires first. Blank wires may be used there. For some longer wires insulated ones may be advised.

Precautions at Different Circuit Areas


Some circuit areas need to be wired with massive wire in order to allow high amperage to flow in time. GROUNDs The most essential GND is marked in pink color below.

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The gate resistors shall be accompanied by ground lines in order to prevent oscillations and spurious nose. Hint: Solder thin blank wires and cover them with solder later on in order to get massive metal connections. Pause in-between in order to not kill components by heat. Remember the jumper (grey line above) GATE DRIVE

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Same procedure like above DIGITAL GROUND

This part may be wired without covering with solder like above. FET (SOURCE / DARIN)

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Same procedure like FET GROUND covering with solder.

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~o0o~

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