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Cache Memory

Maria Susan Anggreainy, M.Kom

09/03/2008 Maria Susan Anggreainy, M.Kom 1


Characteristics

„ Location
„ Capacity
„ Unit of transfer
„ Access method
„ Performance
„ Physical type
„ Physical characteristics
„ Organisation
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Location

„ CPU Æ register
„ Internal Æ Main Memory
(memori utama)
„ External Æ Compact disk, tape

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Capacity

„ Word size
z The natural unit of organisation
„ Number of words
z or Bytes
„ Bagi internal memory umumnya
dalam satuan Byte atau Word.
z Panjang Word yang umum adalah 8,16
dan 32 bit.
„ Bagi eksternal mememory umumnya
adalam satuan Byte

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Unit of Transfer
„ Internal
z Usually governed by data bus
width, biasanya sama dengan
panjang Word (panjang Instruksi).
„ External
z Usually a block which is much
larger than a word
„ Addressable unit
z Smallest location which can be
uniquely addressed
z Word internally
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Access Methods (1)
„ Sequential
z Memory diorganisasikan menjadi unitunit data
yang disebut Record.
z Start at the beginning and read through in order
z Access time depends on location of data and
previous location
z e.g. tape
„ Direct
z Individual blocks have unique address
z Access is by jumping to general vicinity (kisaran
umum) plus sequential search
z Access time depends on location and previous
location
z e.g. disk
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Access Methods (2)
„ Random
z Individual addresses identify locations
exactly
z Access time is independent of location
or previous access
z e.g. RAM
„ Associative
z Mirip Random Access
z Data is located by a comparison with
contents of a portion of the store
z Access time is independent of location
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or previous access
Maria Susan Anggreainy, M.Kom 7

z e.g. cache
Performance
„ Access time
z Time between presenting the
address and getting the valid data
„ Memory Cycle time
z Time may be required for the
memory to “recover” before next
access
z Cycle time is access + recovery

„ Transfer Rate
z Rate at which data can be moved
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„ dimana
z TN = waktu rata-rata untuk
membaca atau menulis N bit
z TA = waktu akses rata-rata

z N = jumlah bit

z R =kecepatan transfer, dalam bit


per detik(bps)

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Physical Types
„ Semiconductor (dengan
teknologi LSI atau VLSI)
z RAM
„ Magnetic
z Disk & Tape
„ Optical
z CD & DVD
„ Others
z Bubble
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z Hologram
Physical Characteristics

„ Decay (apakah perlu direfresh


terus menerus ?)
„ Volatility (apakah isinya hilang
ketika power tidak ada?)
„ Erasable
„ Power consumption

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Organisation

„ Physical arrangement of bits


into words

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Memory Hierarchy

„ Registers
z In CPU
„ Internal or Main memory
z May include one or more levels of
cache
z “RAM”

„ External memory
z Backing store

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Memory Hierarchy - Diagram

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Semakin menurun,
semakin…:
„ Murah rasio harga/bit-nya
„ Besar kapasitasnya
„ lambat

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The Bottom Line

„ How much?
z Capacity
„ How fast?
z Time is money
„ How expensive?

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Hierarchy List

„ Registers
„ L1 Cache
„ L2 Cache
„ Main memory
„ Disk cache
„ Disk
„ Optical
„ Tape
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Cache

„ Small amount of fast memory


„ Sits between normal main
memory and CPU
„ May be located on CPU chip or
module

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Cache operation - overview

„ CPU requests contents of memory


location
„ Check cache for this data
„ If present, get from cache (fast)
„ If not present, read required block
from main memory to cache
„ Then deliver from cache to CPU
„ Cache includes tags to identify which
block of main memory is in each
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cache slot
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Cache Design

„ Size
„ Mapping Function
„ Replacement Algorithm
„ Write Policy
„ Block Size
„ Number of Caches

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Size does matter

„ Cost
z More cache is expensive
„ Speed
z More cache is faster (up to a
point)
z Checking cache for data takes
time

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Typical Cache Organization

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Mapping Function

„ Direct Mapping
„ Associative Mapping
„ Set Associative Mapping

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Direct Mapping
„ Each block of main memory maps to
only one cache line
z i.e. if a block is in cache, it must be in
one specific place

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Direct Mapping pros & cons

„ Simple
„ Inexpensive
„ Fixed location for given block
z If a program accesses 2 blocks
that map to the same line
repeatedly, cache misses are very
high

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Associative Mapping

„ A main memory block can load


into any line of cache

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Set Associative Mapping

„ Cache is divided into a number of


sets
„ Each set contains a number of lines
„ A given block maps to any line in a
given set
z e.g. Block B can be in any line of set i
„ e.g. 2 lines per set
z 2 way associative mapping
z A given block can be in one of 2 lines in
only one set
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Replacement Algorithms (1)
Direct mapping
„ No choice
„ Each block only maps to one
line
„ Replace that line

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Replacement Algorithms (2)
Associative & Set Associative

„ Hardware implemented algorithm


(speed)
„ Least Recently used (LRU)
„ e.g. in 2 way set associative
z Which of the 2 block is lru?
„ First in first out (FIFO)
z replace block that has been in cache
longest
„ Least frequently used
z replace block which has had fewest hits
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„ Random Maria Susan Anggreainy, M.Kom 30
Write Policy

„ Must not overwrite a cache


block unless main memory is up
to date
„ Multiple CPUs may have
individual caches
„ I/O may address main memory
directly

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Write through

„ All writes go to main memory as well


as cache
„ Multiple CPUs can monitor main
memory traffic to keep local (to CPU)
cache up to date
„ Lots of traffic
„ Slows down writes

„ Remember bogus write through


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caches!
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Write back

„ Updates initially made in cache only


„ Update bit for cache slot is set when
update occurs
„ If block is to be replaced, write to
main memory only if update bit is set
„ Other caches get out of sync
„ I/O must access main memory
through cache
„ N.B. 15% of memory references are
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writes
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Pentium 4 Cache
„ 80386 – no on chip cache
„ 80486 – 8k using 16 byte lines and four way set
associative organization
„ Pentium (all versions) – two on chip L1 caches
z Data & instructions
„ Pentium 4 – L1 caches
z 8k bytes
z 64 byte lines
z four way set associative
„ L2 cache
z Feeding both L1 caches
z 256k
z 128 byte lines
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z 8 way set associative
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Power PC Cache
Organization
„ 601 – single 32kb 8 way set
associative
„ 603 – 16kb (2 x 8kb) two way set
associative
„ 604 – 32kb
„ 610 – 64kb
„ G3 & G4
z 64kb L1 cache
„ 8 way set associative
z 256k, 512k or 1M L2 cache
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„ two way set associative
Comparison of Cache Sizes

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