Application Note

Title: Differential Pair Handling in CADSTAR/P.R.Editor XR HS/SI Verify Application: CADSTAR 7.0 with P.R.Editor XR HS/SI Verify
Summary: This is a straightforward guide to setting up differential pairs for routing and simulation using recommended methods.

Zuken 1500 Aztec West Almondsbury Bristol BS32 4RF UK

Copyright Zuken 2004

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Application Note

1. Introduction
Differential Signaling
Normal digital signals most commonly represent High or Low as a single voltage (or current) with respect to Ground or another reference voltage. For instance, in some 1.8V devices, 125mV or more above a reference voltage is read as a High, and 125mV or more below the reference voltage as a Low.
Figure 1

High Low

A normal signal is transmitted over just one connection from driver to receiver

Like normal signals, differential signals represent High and Low as a difference in voltage, but instead of this difference being between a single signal and a ground or reference voltage it is between two transmitted signals that are treated as a differential pair.
Figure 2
+

Differential Signal

A differential signal is the difference between the voltages on the two halves of the pair

Looking at the picture above, it is easy to see that differential pairs only work properly if the two halves of the signal arrive together, so it is important that the routes are of equal length. Less obvious are the special properties of differential routing, which help to yield the high noise immunity gained with differential pairs. By routing the pair closely in parallel, so that their electric and magnetic fields couple, electrical noise picked up by the routing is rejected by the subtraction of the two voltages at the receiver. To gain these benefits, and also for deeper technical reasons, it is important that the signals travel together along the routes from the differential driver forward. It is not sufficient to

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equalize the route lengths; the lengths from the driver points to where parallel differential routing begins should also be equalized, and the bends in the routing of the pair should be balanced to keep the signals exactly opposite in phase throughout the routing. Differences in connections to the two halves of the differential pair, including differences in numbers, type and positioning of vias and test points, should be avoided as they can break the symmetry of the signals. Like any high-speed design rules, these considerations apply more strictly for higher frequencies and faster rise times than for slower signals.

Electrical Nets
Like normal signals, differential pairs can include series resistors, capacitors and inductors, so the differential pair may comprise not just two logical nets but two electrical nets.
Figure 3

The series resistors are placed close to the driver with closely-parallel differential routing between the resistors and the differential receiver

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Differential Terminations
You can terminate differential pairs by placing a resistor between the two halves at the receiver end. The value of this resistor is not equal to the single-ended characteristic impedance that is often used to calculate terminator values for normal nets; instead, the value of such a resistor is the differential characteristic impedance for which a special calculation is required.
Figure 4

A resistor placed between the two halves of the differential pair forms a differential termination

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2. Designing a Differential Pair

The best way to design a differential pair is to use the Scenario Editor and Configuration Editor in SI Verify as a scratchpad to simulate your proposed topology. The SI Verify selfteach training explains how to design normal signals and you can use the same techniques for differential pairs. You can draw your proposed topology in the Scenario Editor, assign buffer models for the differential drivers and receivers, define and solve a track configuration to represent the PCB layer stack. Once you have defined the topology you can simulate it to see the expected response.
Figure 5

The differential impedance visible in the Transmission Line Parameters (RLGC Matrix) is different from the single-ended impedance visible in the Configuration Editor that you use for normal signal design

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Figure 6

Simulation shows both halves of the differential pair plus the differential resultant signal

3. Setting up Differential Pairs

Basic Requirements and Limitations
The differential pair must have an equal number of pins on both halves. o Reason: Otherwise, the differential pair will be rejected by SI Verify and P.R.Editor. The types (input, output, IO or passive component) of corresponding pins on each half of the differential pair must be compatible (output pins are incompatible with input pins and passive component pins are incompatible with any other type). o Reason: Otherwise, the differential pair will be rejected by SI Verify and P.R.Editor. Resistors, capacitors and inductors associated with the differential pair must be defined correctly, unless you need to force special handling (please see Special Case: Partial Differential Routing). o Reason: The differential pair will be correctly constructed for simulation and constraints. All nets carrying supply or reference voltages must be set up correctly as power nets and have a ref_voltage attribute with a value equal to the voltage in Volts. For instance, a 1.8V reference voltage net should have a ref_voltage attribute value of 1800mV in CADSTAR. o Reason: Otherwise power nets will be treated as signal nets and large invalid electrical nets will be constructed by SI Verify and P.R.,Editor.

Differential Pin Pairs

Differential pairs are routed from pin pair to pin pair. If the differential pair is straightforward and all the pins are modeled as differential pin pairs in the simulation library, these pairs will be visible in the Pin Pairs branch below the differential pair in the Constraint Manager. If the

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pin pairs have not been found automatically, you can create them by selecting two pins of compatible types and using [RMB]-[New]-[Differential Pin Pair]. You should delete pin pairs that are not valid. You need to check or set up pin pairs for any nets where not all components on the differential signal are modeled as differential in the simulation library. You can set up differential pin pairs in P.R.Editor 5000HS but not in SI Verify. You can view differential pin pairs in both these applications.
Figure 7

Pair

Pair

Pair

The router needs to know which pins are paired Figure 8

The differential pin pairs for routing are immediately below the differential pair in the Tree View of the Constraint Manager. The Pin Pairs below each electrical net are for a different purpose.

Setting Length and Delay Constraints

Length and delay constraints are defined in similar ways. This section describes how to constrain by length. It is best to set length constraints in the Constraint Manager of P.R.Editor.

Maximum and Minimum Length

To constrain maximum or minimum length, select the item you wish to constrain in the Tree View and type the required constraints into the spreadsheet. You can constrain differential pairs, the electrical nets within them, and selected pin pairs. The pin pairs are different from those discussed in Differential Pin Pairs. These pin pairs describe point-to-point routing paths and give the most precise way of constraining length. To create a pin pair, select two pins within the same electrical net in the tree view of the Constraint Manager and use

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[RMB]-[New]-[Pin Pair]. The new pin pair will appear in the Pin Pairs branch of the electrical net.
Figure 9

Pin Pair

You can constrain the length of the routing between two pins and the skew (difference in length) between pin pairs

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Figure 10

The pin pair must be within the same electrical net

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Skew
You can set a skew constraint (the difference in length or delay) directly on a differential pair. Automatic lengthening does not apply between the two halves of a differential pair, as the integrity of the differential signal would be affected, so this kind of constraint is just for checking results. At the time of writing this guide, there is a known problem with checking lengths and delays within a differential pair where the two halves are connected to each other via passive components, for instance in the case where there is a differential termination resistor between the two halves. In these cases, it is better to constrain skew using a skew group. To create a skew group, select each of the pin pairs you want to group and use [RMB][New]-[Skew Group]. Your new skew group will appear under the Skew Groups branch, and you can then set minimum and maximum length and skew constraints on the group. This is often the best way to set length and delay constraints as the constraints and results are easy to understand. You can also create skew groups from pin pairs in different nets. If you do this with differential pairs, lengthening tools will work on the differential routing between differential pairs but not within any one pair. The easiest way is to set skew between a group of pin pairs in equivalent positions on each differential pair.

Figure 11

Pin Pair

Pin Pair Pin Pair

Pin Pair Pin Pair

Pin Pair
Pin pair groups are straightforward to define and constraints placed on them are easy to check

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Mapping Resistors, Capacitors and Inductors to Simulation Models

Firstly, please ensure that any resistors, capacitors and inductors are correctly mapped to models in the simulation library. Set hs_model, create a model in the Simulation Library and set the ID to correspond to the hs_model value.
Figure 12

The hs_model attribute value should contain the same value as Device Id in the simulation library Figure 13

Double-Click

Set the ID so that it corresponds to the value of hs_model

Making Differential Pairs Recognized by P.R.Editor and SI Verify

Most Cases
If your differential pair is driven by a differential simulation model then it is automatically recognized. In some cases, you may not wish to set up special differential models, and in this case you can use net attribute net_diff_pair. Pick two corresponding nets in the differential pair and assign the same identifying string to the net_diff_pair attribute on both nets as illustrated below.

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Figure 14

net_diff_pair=diffx + net_diff_pair=diffx
Provided that you set net_diff_pair on one corresponding net pair the rest of the differential pair will be constructed automatically

Special Case: Partial Differential Routing

In Figure 14 above, differential routing was wanted on both sides of the series resistors, and each half of the complete differential pair had an equal number of pins. Now consider Figure 15: there is an extra receiver on just one side of the pair at the driver end, perhaps an activity detector or test point. In this case the number of nodes on each side of the pair is unmatched so a differential pair will not be created, even if the nets have a net_diff_pair attribute. The solution in this case is to model the resistors as two-pin ICs as shown in Figure 16. This method is valid for routing with length-based constraints only, and results in three electrical nets instead of one. If you need to simulate the physical routing you can do so as follows: 1. Use [Tools]-[Options]-[Simulation] to set the coupling distance so that the coupling between the two electrical nets before the resistors is considered. 2. Select the differential pair and one of the other two electrical nets in the Constraint managers tree view. 3. Create a new scenario from these items, using [RMB]-[New]-[Scenario]-[Selected Items and its Aggressors]. 4. Edit the scenario, adding two resistor symbols and reconnecting to recreate the complete differential pair as shown in Figure 17. You can then get valid simulation results.
Figure 15

net_diff_pair=diffx + net_diff_pair=diffx
The number of pins is unequal in the two halves of the differential pair

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Figure 16

net_diff_pair=diffx + net_diff_pair=diffx
The differential pair has been split into a single differential pair and two normal electrical nets

Figure 17

You can simulate the differential pair after reconstructing it in the Scenario Editor

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Special Case: Different Pin Types on each side of the Pair

This method only works if you have the same number of pins on each side of the differential pair. You can only pair pins for differential routing that have compatible pin types, so inputs are incompatible with outputs. This can be a problem for some serial communications circuits where transmit and receive flags are combined with communication lines. IO pins are compatible with each other and with either inputs or outputs so the solution for this kind of circuit is to change the models for incompatible pins to IO in the simulation library. This will still give correct simulation results provided you select the correct stimulus and drive direction, and will allow you to route the net differentially.
Figure 18

Pair Connector

Pair

Change pin types to IO and pair

Connector

The driver and receiver are incompatible for differential routing so their pin types must be changed

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