A LOW NOISE AMPLIFIER AT 2.

45GHz

MUHAMMAD FADHLI BIN ABDUL RAHMAN

This report is submitted in partial of requirement for the award of Bachelor of Electronic Engineering (Telecommunication Electronics) with honours.

Faculty of Electronic and Computer Engineering Universiti Tehikal Malaysia Melaka

ABSTRAK

Projek ini membentangkan tentang merekabentuk, simulasi serta fabrikasi penguat rendah hingar(LNA) pada frekuensi 2.45GHz. Penguat rendah hingar ini menghasilkan gandaan melebihi 1 ldB dan faktor hingar pada 1 -45dB. Simulasi
untuk penguat rendah hingar ini akan menggunakan perisian Ansofi Designer SV2

dan difabrikasikan di atas papan mikrostrip.

ABSTRAK

This project presents the design, simulation and fabrication of low noise amplifier at 2.45GHz. The Low Noise Amplifier provide gain more than 1ldB with the noise figure at 1.45dB. The simulation of the Low Noise Amplifier used the Ansoft Office software and be develop using the Microstrip board.

CHAPTER I

INTRODUCTION

1.1

Introduction
The function of low noise amplifier (LNA) is to amplify low-level signals

with maintain a very low noise. Additionally, for large signal levels, the low noise amplifier will amplified the received signal without introducing any noise, hence eliminating channel interference. A low noise amplifier function plays an undisputed importance in the receiver[11. The low noise amplifier consists of transistor, direct current (DC) bias circuit and matching circuit. Nowadays, there are numerous type of transistor that has this ability of low noise amplifier like BFP540, BFP640 and BFP620. In this project the LNA are designs using a Siemens wideband transistor BFP540 for a high frequency application with low current and low supply voltage.

1.2

Thesis Outline

i.

Chapter 1 will explain the objective and introduction of the low noise amplifier.

ii.

Chapter 2 will discuss the literature review for the low noise amplifier. The research and background study also include in this chapter.

iii.

Chapter 3 will discuss the design and the process of the low noise amplifier.

iv.

Chapter 4 will discuss on the result of the simulation for the low noise amplifier.

v.

Chapter 5 will discuss on the analysis of project.

1.3

Objective

The objective of this research is to perform circuit level design, simulation and measurement, including circuit analysis and verification of a low noise amplifier circuit at 2.45GHz. This low noise amplifier will produce a gain more than lOdB and noise figure less than 3dB.

1.4

Scope of Project

This project will be divided into four parts, they:I.

Literature Review Simulation Fabricate Analysis

11. 111.

IV.

The first part of this project is to get as much as possible information of low noise amplifier; The parameter like S-Parameter, gain and stability will be covered.

In this part also the background study of the low noise amplifier will be discussed.
The low noise amplifier will be designed at 2.45GHz. The low noise amplifier circuit used collector feedback bias to activate the transistor. Bipolar transistor BFP540 will be used to design this low noise amplifier circuit. The second part of this project is to simulate the low noise amplifier circuit using Ansoft Designer SV2. The data will be collected during the simulation process. The value of noise figure, gain and the return loss will be observed through this procedure. The third part of this project is to fabricate this low noise amplifier circuit. The FR4 board will be used to fabricate the low noise amplifier circuit. The analysis result will be observed from this circuit. At the analysis part, the result from simulation and fabrication will be compared.

1.5

Methodologies

The project methodology present the implementing process for low noise amplifier. In early stage, the literature review and understanding of theory about the overall procedure in this project will be compared. Figure 1.1 shows the flow chart of the project.

LITERATURE REVIEW

v
CALCULATE

w
SIMULATE

w DESIGN

. -4

v
FABFUCATE REDESIGN

v
SUBMIT

Figure 1.1 Flow chart of project

1.4.1 Literature review:The understanding parameter such as S parameter, VSWR, noise parameter and etc need to be covered. These parameters can be found from the data sheet of the transistor. Related topics need to be covered such as bias design, circuit stabilization, noise optimization, linearity optimization, load pull for gain and Third-Order Intercept Point (IP3) off improvement and complete circuit characterization[2]. The component that will be used in design the low noise amplifier circuit such as transistor, material and type of bias will be identified.

All components will be calculated and selected using theoretical analysis. 1.4.3 Design and simulate:The low noise amplifier circuit is adapted into simulation software. The circuit will be simulated and the data will be collected. The important parameter for this low noise amplifier circuit is the gain and the noise figure.
1.4.4 Fabricate and testing:-

The low noise amplifier circuit will be constructed and fabricated on the microstrip board. The value of the hardware will be measured. It will be tested and analysed in this process.

CHAPTER I1

LITERATURE REVIEW

2.1

Wireless LAN receiver

Behzad Razavi [3] reported the RF receiver design targeting spread-spectrum

WLAN applications in the 2.4 GHz band. Based on direct-conversion architecture, the receiver employs partial channel selection filtering, dc offset removal and baseband amplification. The receiver was fblly fabricated in a 0.6-pm CMOS technology in an area of 680pm x 980pm. The receiver achieved noise figure of 8.3 dB, IP3 of -9 dBm and system gain of 34 dB. Charles Wenzel[4], have design a low noise amplifier for the ultra-low noise amplifier. He design the circuit using JFET as the transistor. The transistor is used because it is one of the suitable transistor for his application. He said that the amplifier should have some RF filtering at the input so that the carrier and sum frequencies from the phase detector do not reach the gain stages. Muhammad Wasim[S] in his report have discuss and design a low noise amplifier using the CMOS transistor. He designed the low noise amplifier that suitable for the frequency from 1.8GHz to 2.4GHz. In his project, he has design multi-standard receiver front end. He has study the previous design of the Bluetooth low noise amplifier.

In case of an active mixer topology, the mixer input stage will contribute

along with the LNA to the flicker noise level. Therefore, a resistive mixer should be the best solution in order to minimize the flicker noise level [6].

2.2

Transistor

There is three types of transistor that always being used to design the Low Noise Amplifier. The types of model are bipolar, FET and MMIC. In bipolar transistor, there are three regions collector, base and emitter. The bipolar junction transistor was the first solid-state active device to provide practical gain and noise figure (F) at microwave fiequencies. In the seventies, breakthroughs in the development of Field Effect Transistors (FETs) such as GaAs Metal Semiconductor Field Effect Transistor (MESFET) led to the higher gain and lower noise figure than bipolar transistors for the fiequencies in the range of several gigahertz [7]. Currently, advanced FETs and bipolar transistors still compete for lower noise figure and higher gain at frequencies in excess of 100 GHz. Examples are the High Electron Mobility Transistor (HEMTs), such as Pseudomorphic High Electron Mobility Transistors (pHEMTs) [8], Metamorphic High Electron Mobility Transistor (MHEMTs) [9], as well as Heterojunction Bipolar Transistors (HBTs) [lo], built using a variety of semiconductor materials likes GaAs, InP, Si, SiGe and many more. Thomas L. Floyd[ll] in his book has discuss about the circuit, component and application of electronic device. In the transistor chapter,.his said that in order to operate properly a transistor as amplifier, the two pn junction must be correctly biased with external dc voltage. The emitter-follower is characterized by a high input resistance, which makes it a very useful circuit. This is because the high input resistance, the emitter-follower can be used as a buffer to minimize loading effects when one circuit is driving another.

Mike Wilson C.Eng.MIEE[12]. In his book, he discuss about the designing the receiver and transmitter for the wireless communication. He used the bipolar of low noise amplifier in his design. He said that would depend on cost and power supply considerations, as well as the application. FETPHEMTdevices usually have a lower noise figure and higher IP3, but more expensive and may require a negative supply for the bias circuitry. MMIC's require very little design effort, but are usually the most expensive solution. Some MMIC's offer additional functionality in the same package (e.g. LNA+ mixer or two LNA stages), which may be an attractive option. Gerard Wevers[l3] had made the technical report for designing the low noise amplifier using the bipolar transistor. He discuss about the linearity, stability and including the way to design the bipolar Low Noise Amplifier. The design of his low noise amplifier is suitable for the wireless communication from 5 to 6 GHz. He said the bipolar transistor could give the high performance with the low cost budget.

T.K.K Tsang and M.N. El-Gamal[l4] in their technical report, they had
designed a double stages low noise amplifier. The gain for their low noise amplifier is 11.5dB and noise figure of 4dB. Since the design doesn't use any off-chip components, it can be easily integrated as part of a complete low-voltage transceiver.

In the national semiconductor technical report[2] they have design a very

simple low noise amplifier using the discrete component. One of their last summary, they conclude that in order to improve the linearity of the Low Noise Amplifier, an inductor can be inserting on the transistor's emitter. Ming-Chang Sun. Shing Tenqchen, Ying-Haw Shu. Wu-Shiung Feng[15] in their journal had design a 2.4 GHz CMOS Image-Reject Low Noise Amplifier. They use double stage of CMOS transistor in their project. The foundry provided device models are calibrated to incorporate the non-ideal properties of the CMOS process. Gerard wevers[l6] in Infineon technical report have design a low noise amplifier at 1900MHz using BFP640. In his technical report, he said that there is 4 element that need be considered to design low noise amplifier that is linearity,

stability, noise figure, input output matching and DC bias. His technical report is focus on design a low noise amplifier for CDMA application. Goufu Niu[l7] had discuss the noise in SiGe HBT RF technologies. He discuss about the physical, modelling and circuit implications. For LNA design, the transistor size can be optimized to make the noise matching resistance equal to the 50- source impedance. There are various of transistor that can be use to design a low noise amplifier such as FET, bipolar and CMOS. The CMOS and MIMIC is the transistor that be used to design the low noise amplifier. Unfortunately, the cost to design the low noise amplifier using CMOS or MIMIC is very expensive. To design a low noise amplifier with the low cost, the bipolar transistor can be use. Although the bipolar is cheaper than CMOS or MIMIC transistor, it also has a high performance. The design of an LNA in Radio Frequency (RF) circuits requires the trade-off of many importance characteristics such as gain, noise figure (F), stability, power consumption and complexity. This situation forces designers to make choices in the design of RF circuits. In LNA design, the most important factors are low noise, moderate gain, matching and stability. Besides those factors, power consumption and layout design size also need to be considered in designed works [18].

2 . 3

Conclusion As the conclusion, the bipolar low noise amplifier is one of the important

parts in the wireless local area network receiver. This project will use the bipolar transistor, BFP540 as the main transistor to build the low noise amplifier circuit. This circuit will be used at 2.45GHz. The circuit expected to produce a gain overlodB and the noise figure less than 3dB

CHAPTER I11

METHODOLOGY

3.1

Design

This part will discuss the theory on designing of low noise amplifier.

The transistor BFP540 is produce by Infineon Technologies. This transistor is NPN silicon type of transistor. The standard termination for this transistor between
O.1GHz to 6GHz is 5OQ. This type of transistor has the highest power gain 21dB at 1.8GHz and noise figure of 0.9dB. This bipolar transistor is selected in this project

because it can give a high gain and provide low noise for amplifier. In additional, this project use bipolar transistor because for the frequency that below than 4GHz, silicon BJT's provides a reliable and low-cost solution to many electronic design.

3 . 1 . 2

Identify Circuit

Figure 3.1 shows the simple block diagram for the low noise amplifier circuit. The radio frequency (RF) input block represents the input signal for the circuit. The input and output matching network block represent the matching circuit for the low noise amplifier. This is very important for the low noise amplifier circuit to be matched with other circuit. The optimal matching will give the maximum power transfer for the low noise amplifier circuit. The transistor BFP540 is the transistor that had been used in this low noise amplifier circuit. DC bias block represent the biasing circuit to activated the transistor for the low noise amplifier circuit.

'

'

Input

I
,

Network

Figure 3.1Block Diagram for LNA The 2-port network is used to represent this low noise amplifier circuit. To design the low noise amplifier circuit, the stability and S-parameter of the circuit need to be define. In typical wireless applications, low noise amplifiers are generally, fabricate in bipolar semiconductor or GaAs MOSFET technologies. For low noise amplifiers, the gain linearity applied to a signal is an important operating characteristic, especially when the incoming signal amplitude is large. The gain linearity typically related to the transconductance of a MOSFET in an input stage of the amplifier.

3.1.3 Matching

When a transmission line is not terminated by its characteristic impedance, maximum power is not transferred due to the load and power will be wasted due to reflection from the load. This reduces the efficiency of transmission[l9]. To make sure the power transfer to the load is maximum, the input and output matching for the amplifier are design. A microwave circuit involves many different types of transmission lines and devices, each characterised by its own impedance. Impedance transformation between two reference planes along a microwave transmission line made for the matching of arbitrary load impedance at one plane to the line or the matching of two lines having different characteristic impedances for the purpose of maximum power transfer. There is numerous method for matching a mismatched load or line. The matching is also important so that we can improve the signal-to-noise-ratio (SNR) while reduce the magnitude and phase error. The influence of the output matching circuit on the input return loss together with the positive effect of the added emitter inductance for both return loss and noise matching enabled the elimination of any RF matching elements at the device input[l6]. Input matching is given by 2010g

Iri, I =2010g IS,, I

Output matching is given by

T i, is input reflection coefficient I? is output reflection coefficient

Impedance matching is important for the following reasons 1201: 3.1.3.1 Maximum power is delivered when the load is mismatched to the line (assuming the generator is mismatched), and power loss in the feed line is minimized. 3.1.3.2 Impedance matching sensitive receiver components (antenna, low-noise amplifier, etc.) improves the signal to noise ratio of the system. 3.1.3.3 Impedance matching in a power distribution network (such as an antenna array feed network) will reduce amplitude and phase errors.

3.1.4 Stub matching

A matching technique that uses a single open-circuited or short-circuited

length of transmission line (a "stub"), connected either in parallel or in series with the transmission feed line at a certain distance fiom the load, as shown in Figure 3.2 a and b is called single-stub matching. Such matching circuit is convenient fiom a microwave fabrication aspect, since lumped elements are not required. The shunt matching stubs especially easy to fabricate in microstrip or stripline form. In single-stub matching, the two adjustable parameters are distance d, fiom the load to the stub position and the value of susceptance or reactance provided by the shunt or series stub. For the shunt stub case, the basic idea is to select d so that the admittance Y, seen looking into the line at distance d from the load is of the form Yo + jB. Then the stub susceptance is chosen as -jB, resulting in a match condition. For the series stub case, the distance d is select so that the impedance Z, seen looking into the line at a distance d fiom the load is of the form Zo reactance is chosen as -jX, resulting in a match condition.

+ jX.

Then the stub

Open or ~hortecl
rtub

(b)

Figure 3.2 Single-stub matching circuits. (a) Shunt stub. (b) Series stub.

3.1.5 Quarter wave matching

Consider a transmission line network as illustrated in Figure 3.3. The input impedance for a lossless transmission line is given by equation. In general, the input impedance of a line that has characteristic impedance ZT and length 1 and is terminated with a load impedance ZI is given by equation

Here, ZL is the load seen by the ZT line at its junction with the Z, line. If the line length 1 is V4, the line is known as a quarter-wave transformer. In that case cos(p1) = 0 and if the input to the transformer is to be matched, then

where

As the characteristic impedances Z, and ZT are in practice real quantities, the impedance at the load end of the transformer must also be real if a matched condition is to be realized. The line impedance will look purely real at the voltage maximal and minima planes. Any load may be transformed to the real impedance at such a plane through an appropriate length of transmission line. This fact, then together with the properties of the ?J4 transformer, allows any load impedance that has a finite resistance component to be matched to the characteristic impedance of the input line.
I
j

Transformer

I
I

l!
I I II I
I
Input

+dZo
L

I
Z'L

ZT
L ,

Zo

zi,

ZL

Figure 3.3 Matching with a single section quarter-wave transformer The two unknown quantities that have to be determined for the quarter-wave transformer matching network are the distance from the load to the transformer, d, and the characteristic impedance of the transformer ZT. The matching procedure is as follows:
3.1.5.2

The normalized impedance of the load is plotted and matched z'=Z'L/Z, on a Smith Chart as shown in Figure 3.4.

3.1.5.2

Then, the point is move around the chart on a constant VSWR circle, i.e. with I r l constant, until the circle intersects the resistive axis, which it gave a plane where the impedance is the ZI, for the quarter-wave transformer in Figure 3.4. The rotation around the chart in a clockwise direction, towards the generator, gives the line length d.

3.1.5.3

For the matched condition requiring Zin= l+jO, the characteristic impedance of the transformer section becomes

ZT = z0,E
3.1 S.4

(3.9)

As the constant I r l circle part of (3.1.5.2) intersects the real axis at two points, there are two possible solutions for quarter-wave transformer matching, one with ZT > Zo and the other with ZT < Zo. Naturally, the line length d will be different for the two cases.

Figure 3.4 Quarter wave transformer solution There is another alternative matching technique, which also serve the same purpose. The LC network is one of the famous and simple matching techniques that widely used at lower frequency. This approach is used by Derek K SheafTer and Thomas H Lee in their LNA design at 1.5 GHz operating frequency [21]. A. Parssinen et al. also used this matching technique in their 1.8 GHz LNA design [22]. Commonly, the purpose of input and output matching network is to produces 50 Q impedance at the input and output port of the LNA. The matching network composed of inductance and capacitance matches the components impedance to 50 SZ [23]. His impedance value is proposed by IEEE 802.1 1a -1 999 standard [24].

3.1.6 Reflection Coefficient

The reflection coefficient is used in physical and electrical engineering when wave propagation in a medium containing discontinuities is considered. A reflection coefficient describes either the amplitude or the intensity of a reflected wave relative to an incident wave. The reflection coefficient is closely related to the transmission coefficient. In telecommunications, the reflection coefficient is the ratio of the amplitude of the reflected wave to the amplitude of the incident wave. In particular, at a discontinuity in a transmission line, it is the complex ratio of the electric field strength of the reflected wave (E - ) to that of the incident wave (E + ). This is typically represented with a r (capital gamma) and can be written as:

The reflection coefficient may also be established using other field or circuit quantities. The reflection coefficient can be given by the equations below, where Z ,is the impedance toward the source, Z I is ~ the impedance toward the load:

The absolute magnitude of the reflection coefficient (designated by vertical bars) can be calculated from the standing wave ratio, SWR:

S-parameter are used extensively in the design of microwave transistor amplifier. the S-parameter of a transistor are readily measure using manufacture specification[25]. The stability conditions and maximum gain of a transistor can be found from its S-paramters. The input and output matching circuits are needed to achieve a specified performance and can be designed from S-parameter using a Smith Chart. All circuit responses also are calculate from the overall S-parameter.

An amplifier operating under linear (small signal) conditions is a good

example of a non-reciprocal network and a matched attenuator is an example of a reciprocal network. In figure 3.5, assume that the input and output connections are to ports 1 and 2 respectively which is the most common convention. The nominal system impedance, frequency and any other factors, which may influence the device, such as temperature, must also be specified. S-parameters are used to define inputoutput relation of a network in the form of incident and reflected power.

z"

-+
4 -

E i -1
TNO-port network

, +Za
_j)

E i2

f I

Er l
I
Eil

E r2
1

1I
i

Figure 3.5: Two-port network is incident voltage at input

Ei2is incident voltage at output

is reflection voltage at input

Ei2is reflection voltage at output

Z, is inertial impedance

Here Ei and E, are the incident and reflected wave power respectively. The normalization by square root of Z, makes the square of an and bn terms equal to power of the incident and reflected wave respectively [19]. The two-port network shown in Fig. 3.5 can be described as:-

Where a , , represents the power wave travelling towards the two-port network and b, is the power wave reflected back from the two-port network given by

SI1is the input reflection coefficient,

is the forward gain relating output to

input, S12is the reverse transmission gain and S22is the output reflection coefficient. We may derive mathematical expressions for these terms as:-

Four S-parameters will include in 2-port network areI. 11. 111. Sll.isthe input port voltage reflection coefficient SI2is the reverse voltage gain SZ1 is the forward voltage gain

N. S22is the output port voltage reflection coefficient

The following information must be defined when specifying any S-parameter: I. 11. 111. The characteristic impedance (often 50 R). The allocation of port numbers. Conditions which may affect the network, such as frequency, temperature, control voltage, and bias current, where applicable.

3.1.8

Local power disturbance S-Parameter method Lee suggests an analytical approach to evaluate IIP3 using a three point

small-signal analysis[26]. In the section, a fast small-signal S-parameter simulationbased implementation of Lee's idea is proposed, call the Local Power Disturbance S-parameter(LPDS) method. The main idea behind this method is that a disturbance in the bias condition change the circuit gain. If the gain is exactly same for a small change in circuit bias, the IIP3 point would at infinity. If the gain are different, a finite ILP3 point exists.

3.1.9 Stability

Before embarking on transistor design, it is important to determine the stability of the transistor.There is two type of stability. There are unconditional stability and conditional stability. The types of stability are:3.1.9.1 Unconditional stability: The network is unconditionally stable if I Ti,1 <1 and I Tmt1 <1 for all passive source and load impedances I Ts 1 <1 and 3.1.9.2 Conditional stability: The network is conditionally stable if

I TL1 <1

I Ti, 1 <1 andl TOut(<1 only

for a certain range passive source and load impedance. This case is also referred to as potentially unstable. Table 3.1 is the summary of the criteria to know of stability for transistor. Table 3.1 : Stability and Criteria of transistor Stability Unconditionally stable Potentially unstable Criteria K>l&IAIl K > l & I A l > l or K c l & J A J c l

Rollet's condition Stability Factor K = ~ - I S I I ~ - I S Z I ~ >+ 1IA~~

2I s 1 2 s 2 , I

Delta Factor A = S1,S2, - S12S2,

Table 3.2 is the summary of equation that used for the unconditionally stable transistor for the stability circle and the radius. Table 3.2: Decision by stability circle Input stability circle Output stability circle

(Radius)

you,=
IS22

1-

l2

-ldI2

(Radius) (Center)

C, = (31I - S*U )* (Center) l Sll l2 - 1 A l2

Cot =

(s22-As*ll)*
IS22

l2 -MI2

Cinis centre of output stability circle

Gout is centre of input stability circle

y, is radius of input stability circle

y,, is radius of output stability circle

(a)

ISnl

<

(b)

ISzI

>

Figure 3.6: Output stability circle

3.1.10 DC Biasing In order to design a low noise amplifier, the transistor should be biased in such that the minimum noise figure is as low as possible. The device width should be chosen so that the optimum resistance is close to the driving resistance which typically 50 Q. The minimum noise figure is independent of the device width. In order to keep low or minimum noise figure, the cutoff frequency of the device should be much higher than the operating fiequency [27]. The DC bias circuit is the main circuit to for transistor to operate. This DC bias circuit also have an ability to be a switch for the amplifier circuit. This is because if the current and voltage supplied to the transistor is very low, the transistor will be not operating. For the transistor to be biased in its linear or active operating region the following must be true:-

I.

The base-emitter junction must be forward bias (p-region voltage must positive) with a resulting forward-bias voltage of about 0.6 to 0.7 V.

11.

The base-collector junction must be reserve biased ( n-region more positive), with the reserve-bias voltage being any value within the maximum limits of the device. n 3