2010 2nd IEEE International Symposium on Power Electronics for Distributed Generation Systems

A Fast Algorithm for Three-level SVPWM in NPC Inverters Based on Traditional Three-level SPWM
LI Ning, WANG Yue, JIANG Yingwei and WANG Zhaoan
Xian Jiaotong University, China xjtulining1983@yahoo.com.cn Abstract-- A fast algorithm for three-level space vector pulse wide modulation (SVPWM) in neutral point clamped (NPC) inverters based on traditional three-level sinusoidal pulse wide modulation (SPWM) is proposed. The acting time relation of each state in each phase is got by deeply researching the similarities and differences of three-level SPWM and SVPWM. This algorithm can realize all kinds of state sequences easily, it does not need to do trigonometric function, irrational operation and coordinate transformation, it just needs ordinary arithmetic, therefore the calculation is very simple and the result is much more accurate. The fast algorithm can be easily implemented on microprocessor and the executing speed is faster than the conventional threelevel SVPWM algorithm. Index Terms-- fast algorithm, three-level SVPWM, acting time relation, state sequences.

II. FAST ALGORITHM FOR THREE-LEVEL SVPWM A. Traditional three-level SPWM Fig.1 shows the schematic diagram of three-level SPWM in regular sampling method. There are two carriers in three-level SPWM, in one switch period, if the reference voltage is larger than zero, the reference compares with the upper carrier, otherwise, it compares with the lower carrier. From Fig.1, it is clear that in traditional three-level SPWM, there are two states in each phase and the wave form of each phase is symmetrical per switch cycle, so, totally, in a three-phase system, there are six commutations per switch cycle.

I. INTRODUCTION Since the development of power electronics, many kinds of PWM technologies have been used in power electronic circuits, SPWM and SVPWM are two mostly used schemes of them [1]. SPWM uses triangular carrier to compare with sinusoidal wave to get pulse signals, it realizes easily, yet the voltage utilization is low. SVPWM can obviously reduce the current harmonic component and raise the utilization ratio of the power, however, in traditional SVPWM, nonlinear operation is needed to be carried out, such as the sine and arctan function etc, these operations will influence the control speed of the system. In threelevel NPC inverters, the simplified or fast algorithm of three-level SVPWM is attracting more and more attention, due to the complexity of three-level SVPWM[2][3][4]. Some simplifications to SVPWM algorithms have already been proposed in literatures[4][5][6][7][8][9][10], yet some of these algorithms still have to use look-up tables to pick out the switching state vectors which compose the reference vector, some of them can not change the switching state sequences easily. In this paper, a fast algorithm for three-level SVPWM in NPC inverters is discussed, it is very fast and simple to implement, further more, it can realize different state sequences easily, therefore it can be used in many different situations.

Fig.1 Schematic diagram of three-level SPWM

B. Conventional three-level SVPWM

020

120

220 Vref

220 Vref 4 210

Sec. 1

021

121 010

221 110

221 110 2 222 111 000 1 211 100

210 3 200

022

122 011

222 111 000 112 001 212 101

211 100

200

012

201

Tri.1: 000-100-110-111-211-221-222 Tri.2: 100-110-210-211-221 Tri.3: 100-110-210-211 Tri.4: 110-210-211-221

002
Sec. 1 Sec. 2 Sec. 3

102
Sec. 4

202
Sec. 5 Sec. 6

Fig.2 Schematic diagram of three-level SVPWM

In three-level SVPWM, when using the nearest three vectors (NTV) to compose the reference vector, as in the most commonly used SVPWM schemes, firstly, it transforms three phase reference voltage into the space

978-1-4244-5670-3/10/$26.00 2010 IEEE

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reference vector Vref, secondly, it identifies the sector and triangle in which the reference vector falls, as shown in Fig. 2. After the triangle is identified, a look-up table with as many entries as the number of triangles is used to find the vectors to be used. Then the SVPWM algorithm carries several calculations to obtain the duty ratios of those vectors, at last, it decides the switching state sequences and transforms switching state into gate pulses. Fig.3 shows some commonly used state sequences of three-level SVPWM. In the six sequences, SVPWM1 is an asymmetrical sequence, it uses two zero switching states, there are six communications per switching cycle. SVPWM2 uses symmetrical sequence to get low THD, there are also two zero switching states, therefore the

numbers of commutations per switching cycle is six, too. SVPWM3 and SVPWM4 are used to reduce switching loss, in SVPWM3, it use zero switching state alternatively in adjacent switching cycle, the sequence is asymmetrical in one switching cycle, yet its symmetrical in every two cycle, the switching loss in this sequence is a half of SVPWM1, SVPWM4 uses a zero switching state in one switching cycle, the reduction of switching loss in this sequence is one third of SVPWM1. SVPWM5 is similar to SVPWM4, yet the sequence is symmetrical. In SVPWM6, it chooses a zero switching state to avoid switching the phase with the highest current, another advantage of this sequence is that it can reduce the switching loss up to 50%.

SVPWM1

SVPWM2

SVPWM3

SVPWM4

SVPWM5

SVPWM6

Fig.3 6 kinds of commonly used state sequences

C. Derivation of Fast Algorithm (1) Acting times of each state in SPWM and SVPWM According to the triangular relationship in Fig.1, when regular sampling method is used, the acting time of each state in each phase can be calculated in equ.(1). In the equation, Va*, Vb* and Vc* are the sampling values of three phase references in a switch period, Vdc is the DC voltage, Ts is the switching time, Tga2 (Tgb2, Tgc2), Tga1 (Tgb1, Tgc1) and Tga0 (Tgb0, Tgc0) are the acting times of each state in three phases.

Va* V* Ts ; Tga1 = (1 a ) Ts Tga 2 = V / 2 V dc dc / 2 * V V* Tgb 2 = b Ts ; Tgb1 = (1 b ) Ts Vdc / 2 Vdc / 2 * V V* Tgc1 = (1 + c Ts ; Tgc 0 = c Ts Vdc / 2 Vdc / 2 T = T = T = 0 gb 0 gc 2 ga 0

(1)

where Va*>0, Vb*>0, Vc*<0 . According to the conventional three-level SVPWM, if the location of the reference vector Vref is as Fig.2, all of the four switching states are used in SVPWM, the acting times of each state in each phase is as follows,

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 Va* V* V* V* V* V* Ts + [(2k 1) k a + (k 1) c ] Ts ; Ta1 = (1 a ) Ts [(2k 1) k a + (k 1) c ] Ts Ta 2 = Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vb* Va* Vc* Vb* Va* V* Ts + [(2k 1) k + (k 1) ] Ts ; Tb1 = 1 Ts [(2k 1) k + (k 1) c ] Ts Tb 2 = Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 * * * * * V V V V V* Tc1 = (1 + Vc Ts + [(2k 1) k a + (k 1) c ] Ts ; Tc 0 = c Ts [(2k 1) k a + (k 1) c ] Ts Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Ta 0 = Tb 0 = Tc 2 = 0

(2)

where k is the time ratio of the redundant switching states, k = T221 /(T221 + T110 ) . TxSV3 and TxSV4 are the acting time of switching state In Sec.I, if the reference vector Vref falls into the other triangles, for instant, Vref falls into triangle 2, the total sequences in each triangle if the PWM strategy is redundant switching states is 2, while in triangle 1, this SVPWM, Tgx is the acting time of each state in each number becomes 4, if only one redundant switching state phase, Tz11 (Tz12), Tz21 (Tz22) and Tz3,4 are the time which is not the states of zero vector is used in a switch differences between SPWM and SVPWM in different triangles and different switching state sequences. They cycle, table I can be got. In triangle 1 and 2, there are two switching state sequences, in triangle 3 and 4, there are are all three rows one line vectors and their values are only one switching state sequence. In table I, TxSP11 different in the positive and negative situation. Tx is a (TxSP12), TxSP21 (TxSP22), TxSP3 and TxSP4 are the acting time three rows three lines constant vector, it also has two of switching state sequences in each triangle if the PWM different values in positive and negative situation. strategy is SPWM, while TxSV11 (TxSV12), TxSV21 (TxSV22),
TABLE I ACTING TIME RELATION OF EACH STATE IN SEC.I BETWEEN SPWM AND SVPWM Switching state Seq. Sign of Vx* Acting time( SPWM) 100-110-111-211 Va*>0>Vb*>Vc* T = T T ( x = a, b, c)
xSP11 gx x

Triangle No. 1 1 2 2 3 4

Acting time( SVPWM)

TxSV 11 = [Tgx + Tz11 ] Tx TxSV 12 = [Tgx + Tz12 ] Tx TxSV 21 = [Tgx + Tz 21 ] Tx TxSV 22 = [Tgx + Tz 22 ] Tx TxSV 3 = [Tgx + Tz 3,4 ] Tx TxSV 4 = [Tgx + Tz 3,4 ] Tx

110-111-211-221 100-110-111-211 110-111-211-221 100-200-210-211 110-210-220-221

Va*>Vb*>0>Vc* Va*>0>Vb*>Vc* Va*>Vb*>0>Vc* Va*>0>Vb*>Vc* Va >Vb*>0>Vc*

*

TxSP12 = Tgx Tx ( x = a, b, c) TxSP 21 = Tgx Tx ( x = a, b, c) TxSP 22 = Tgx Tx ( x = a, b, c) TxSP 3 = Tgx Tx ( x = a, b, c) TxSP 4 = Tgx Tx ( x = a, b, c)

where

Tgx 2 0 0 0 1 0 0 , (Vx*>0), T = 0 1 0 (Vx*<0), Tgx = Tgx1 Tx = 0 1 0 x T 0 0 1 0 0 0 gx 0

1 0 * * Vb* Vc* V* V* Tz11 = ( k + ( k 1) )Ts 1 (Vx >0), Tz11 = (k b + (k 1) c )Ts 1 (Vx <0), Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 0 1 0 1 * * * * V* V* (Vx >0), T = ( k Vc + (k 1) Vb )T 1 (Vx <0), Tz12 = ( k c + ( k 1) b )Ts 1 12 z s Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 1 0
1 0 * * Vb* Vc* Vb* Vc* ( V >0), x Tz 21 = [ k + (k 1) + ( k + 1)]Ts 1 Tz 21 = [ k + ( k 1) + ( k + 1)]Ts 1 (Vx <0), Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 0 1 0 1 * Va* Vb* Va* Vb* (Vx*<0), ( V >0), x Tz 22 = [ k + ( k 1) + k ]Ts 1 Tz 22 = [k + (k 1) + k ]Ts 1 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 0 1 1 0 * * V* V* V* V* Tz 3,4 = [ k a + ( k 1) c + (2k 1)]Ts 1 (Vx >0), Tz 3,4 = [ k a + (k 1) c + (2k 1)]Ts 1 (Vx <0). Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 0 1 In other five sectors, some similar results can be got, in order to describe the relation easily, it divides one sector into 6 triangles, as shown in Fig.4. The acting time relation of each phase between the fast algorithm and

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traditional SPWM is shown in table II. The time with SV in the subscript is the acting time of fast algorithm, while

the time with SP in the subscript is the acting time of traditional SPWM.

TABLE II ACTING TIME RELATION OF EACH STATE BETWEEN SPWM AND FAST ALGORITHM

Triangle No. 1 2 3 4

Acting time relation

TxSV 1 = [TxSP1 + Tz1 ] Tx , Tz1 = [ kvmid + (k 1)vmax ]Ts

TxSV 2 = [TxSP 2 + Tz 2 ] Tx , Tz1 = [kvmin + (k 1)vmid ]Ts

[1 [0 [1 [0

1 0] (Vx* > 0) 1 1] (Vx* < 0)

1 0] (Vx* > 0) 1 1] (Vx* < 0)
T
T

TxSV 3 = [TxSP 3 + Tz 3 ] Tx , Tz 3 = [(k 1) kvmid + (k 1)vmin ]Ts

[1 [0

1 0] (Vx* > 0) 1 1] (Vx* < 0)

T

TxSV 4 = [TxSP 4 + Tz 4 ] Tx , Tz 3 = [k kvmax + (k 1)vmin ]Ts

[1 [0

1 0] (Vx* > 0) 1 1] (Vx* < 0)

T
T

5, 6

TxSV 5,6 = [TxSP 5,6 + Tz 5,6 ] Tx , Tz 3 = [(2k 1) kvmax + (k 1)vmin ]Ts

[1 [0

1 0] (Vx* > 0) 1 1] (Vx* < 0)

T

where v

max

= max(

Va V V V V V V V V , b , c ), vmid = mid( a , b , c ), vmin = min( a , b , c ) . Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2 Vdc / 2

020 5 5 021 6 022 6 121 3 010 4 1 2 2 3 1

120 6 4 2

220

TABLE III RELATION OF THE STATE SEQUENCES, PARAMETER K AND THE CARRIER SVPWM No. k Carrier
210

6 221 110 4

SVPWM1 SVPWM2
200

0.5 0.5 0 or 1 0 or 1 0 or 1 0 or 1

Sawtooth wave Triangular wave Sawtooth wave Sawtooth wave Triangular wave Sawtooth wave

122 011

012

2 3 5 211 222 1 111 1 100 000 5 1 4 3 2 1 2 4 3 112 212 201 001 101 3 4 6 5 5 6 102 202

SVPWM3 SVPWM4 SVPWM5 SVPWM6

002

III. SIMULATION AND EXPERIMENTAL RESULTS

Fig.4 Triangles division in fast algorithm of three-level SVPWM

D. Determination of k and realization of different state sequencing Table II gives the relation of the acting time between fast algorithm and SPWM of each state in each phase. In Fig.3, there are 6 kinds state sequences, usually, many other simplified or fast algorithm of three-level SVPWM can only realize some of them, while in this paper, the fast algorithm can realize all of them by changing the parameter k and the carrier. Table III shows the relation of different state sequences, the parameter k and the carrier. In fast algorithm of SVPWM1 and SVPWM2, k equals 0.5, while in the other four sequences, k changes in different cycles or different sectors, using the relation in table II, the acting time of the fast algorithm can be got, the acting time compares with different carriers, the six sequences can be got.

Time domain simulations of a three-phase DC-AC NPC converter were performed to verify the fast algorithm using simulink. The input of the converter was a 60V DC source. The output was connected to a threephase LCL filter and pure resistance load. The modulator used the fast algorithm of three-level SVPWM and the SVPWM2 sequence, the switching frequency was 8000 Hz. The simulation results are shown in Fig.5. In Fig.5, m is the modulation index, it equals the ratio of three phases peak-to-peak voltage to DC voltage Vdc. The algorithm was tested using DSP2812 control board and xed-point arithmetic was used in the algorithm. The algorithm was implemented on a 3-level NPC laboratory prototype inverter, the parameters of the NPC inverter were the same as the simulations. Fig.6 shows the experiment results of phase and line voltages. From the simulations and the experiment results, it is clear that the fast algorithm of three-level SVPWM can get the same control effect comparing with traditional three-level SVPWM.

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Fig.5 Simulation results of phase and line voltages (k=0.5)

Fig.6 Experiment results of phase and line voltages (k=0.5)

IV. CONCLUSIONS This paper presents a fast algorithm of three-level SVPWM, it is very fast and simple to implement. By analyzing the acting time of each state in each phase between SPWM and SVPWM, it gets the relation between them. Another advantage of this fast algorithm is realization of all six sequences mentioned in this paper. Simulation and experiment results verify the effectiveness of this fast algorithm. REFERENCES
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