application INFO available

UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A

Current Mode PWM Controller

FEATURES
Optimized for Off-line and DC to DC Converters Low Start Up Current (<0.5mA) Trimmed Oscillator Discharge Current Automatic Feed Forward Compensation Pulse-by-Pulse Current Limiting Enhanced Load Response Characteristics Under-Voltage Lockout With Hysteresis Double Pulse Suppression
Part # UVLO On 16.0V 8.5V 16.0V 8.5V UVLO Off 10.0V 7.9V 10.0V 7.9V Maximum Duty Cycle <100% <100% <50% <50%

DESCRIPTION
The UC1842A/3A/4A/5A family of control ICs is a pin for pin compatible improved version of the UC3842/3/4/5 family. Providing the necessary features to control current mode switched mode power supplies, this family has the following improved features. Start up current is guaranteed to be less than 0.5mA. Oscillator discharge is trimmed to 8.3mA. During under voltage lockout, the output stage can sink at least 10mA at less than 1.2V for VCC over 5V. The difference between members of this family are shown in the table below.

High Current Totem Pole Output

UC1842A

Internally Trimmed Bandgap Reference 500kHz Operation Low RO Error Amp

UC1843A UC1844A UC1845A

BLOCK DIAGRAM

Note 1: A/B A = DIL-8 Pin Number. B = SO-14 Pin Number. Note 2: Toggle flip flop used only in 1844A and 1845A.

SLUS224A - SEPTEMBER 1994 - REVISED APRIL 2002

CONNECTION DIAGRAMS ABSOLUTE MAXIMUM RATINGS (Note 1)

Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . 30V Supply Voltage (ICC mA) . . . . . . . . . . . . . . . . . . . . Self Limiting Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1A Output Energy (Capacitive Load). . . . . . . . . . . . . . . . . . . . . 5 J Analog Inputs (Pins 2, 3). . . . . . . . . . . . . . . . . . . -0.3V to +6.3V Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . 10mA Power Dissipation at TA 25C (DIL-8) . . . . . . . . . . . . . . . . 1W Storage Temperature Range . . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300C Note 1. All voltages are with respect to Ground, Pin 5. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. Pin numbers refer to DIL package only.

UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A

PLCC-20, LCC-20 (TOP VIEW) Q, L Packages

PACKAGE PIN FUNCTION FUNCTION PIN N/C 1 Comp 2 N/C 3-4 VFB 5 N/C 6 ISENSE 7 N/C 8-9 RT/CT 10 N/C 11 Pwr Gnd 12 Gnd 13 N/C 14 Output 15 N/C 16 VC 17 VCC 18 N/C 19 VREF 20

SOIC-14 (TOP VIEW) D Package

DIL-8, SOIC-8 (TOP VIEW) J or N, D8 Package

SOIC-WIDE16 (TOP VIEW) DW Package

N/C N/C COMP VFB ISENSE RT/CT N/C N/C 1 2 3 4 5 6 7 8 16 N/C 15 VREF 14 VCC 13 VCC 12 OUTPUT 11 GND 10 PWRGND 9 N/C

UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for 55C TA 125C for the UC184xA; 40C TA 125C for the UC284xAQ; 40C TA 85C for the UC284xA; 0 TA 70C for the UC384xA; VCC = 15V (Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8.
PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temp. Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Oscillator Section Initial Accuracy Voltage Stability Temp. Stability Amplitude Discharge Current Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output Output Section Output Low Level Output High Level Rise Time Fall Time UVLO Saturation TEST CONDITIONS UC184xA\UC284xA MIN. TYP. MAX. 4.95 5.00 6 6 0.2 5.05 20 25 0.4 5.1 MIN. 4.90 UC384xA UNITS TYP. MAX. 5.00 6 6 0.2 5.10 20 25 0.4 5.18 V mV mV mV/C V V mV mA kHz % % V mA mA V A dB MHz dB mA mA V V V/V V dB A ns V V V V ns ns V

TJ = 25C, IO = 1mA 12 VIN 25V 1 IO 20mA (Note 2, Note 7) Line, Load, Temp. 10Hz f 10kHz TJ = 25C (Note 2) TA = 125C, 1000Hrs. (Note 2)

4.9 50 5 -100 52 0.2 5 1.7 8.3

4.82 50 5 -100 52 0.2 5 1.7 8.3

-30 TJ = 25C (Note 6) 12 VCC 25V TMIN TA TMAX (Note 2) VPIN 4 peak to peak (Note 2) TJ = 25C, VPIN 4 = 2V (Note 8) VPIN 4 = 2V (Note 8) VPIN 1 = 2.5V 2 VO 4V TJ = 25C (Note 2) 12 VCC 25V VPIN 2 = 2.7V, VPIN 1 = 1.1V VPIN 2 = 2.3V, VPIN 1 = 5V VPIN 2 = 2.3V, RL = 15k to ground VPIN 2 = 2.7V, RL = 15k to Pin 8 (Note 3, Note 4) VPIN 1 = 5V (Note 3) 12 VCC 25V (Note 3) VPIN 3 = 0 to 2V (Note 2) ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA TJ = 25C, CL = 1nF (Note 2) TJ = 25C, CL = 1nF (Note 2) VCC = 5V, ISINK = 10mA 47

25 -180 57 1

-30 47

25 -180 57 1

7.8 7.5 2.45 65 0.7 60 2 -0.5 5

8.8 8.8 2.55 -1

7.8 7.6 2.42 65 0.7 60 2 -0.5 5

8.8 8.8 2.58 -2

2.50 -0.3 90 1 70 6 -0.8 6 0.7 3 1 70 -2 150 0.1 15 13.5 13.5 50 50 0.7

1.1 3.15 1.1 -10 300 0.4 2.2 13 12 150 150 1.2 2.85 0.9

2.50 -0.3 90 1 70 6 -0.8 6 0.7 3 1 70 -2 150 0.1 15 13.5 13.5 50 50 0.7

1.1 3.15 1.1 -10 300 0.4 2.2

2.85 0.9

13 12

150 150 1.2

UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for 55C TA 125C for the UC184xA; 40C TA 125C for the UC284xAQ; 40C TA 85C for the UC284xA; 0 TA 70C for the UC384xA; VCC = 15V (Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8.
PARAMETER Under-Voltage Lockout Section Start Threshold Min. Operation Voltage After Turn On PWM Section Maximum Duty Cycle Minimum Duty Cycle Total Standby Current Start-Up Current Operating Supply Current VCC Zener Voltage TEST CONDITIONS UC184xA\UC284xA MIN. TYP. MAX. 15 7.8 9 7.0 94 47 16 8.4 10 7.6 96 48 17 9.0 11 8.2 100 50 0 0.5 17 30 UC384xA UNITS MIN. TYP. MAX. 14.5 7.8 8.5 7.0 94 47 16 8.4 10 7.6 96 48 17.5 9.0 11.5 8.2 100 50 0 0.5 17 V V V V % % % mA mA V

x842A/4A x843A/5A x842A/4A x843A/5A x842A/3A x844A/5A

VPIN 2 = VPIN 3 = 0V ICC = 25mA

30

0.3 11 34

0.3 11 34

Note 2: Ensured by design, but not 100% production tested. Note 3: Parameter measured at trip point of latch with VPIN2 = 0. VPIN 1 ; 0 VPIN 3 0.8V. Note 4: Gain defined as: A = VPIN 3 Note 5: Adjust VCC above the start threshold before setting at 15V. Note 6: Output frequency equals oscillator frequency for the UC1842A and UC1843A. Output frequency is one half oscillator frequency for the UC1844A and UC1845A. Note 7: Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation: VREF (max ) VREF (min ) .VREF (max) and VREF (min) are the maximum & minimum reference voltTemp Stability = TJ (max ) TJ (min ) age measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature. Note 8: This parameter is measured with RT = 10k to VREF.This contributes approximately 300 A of current to the measurement. The total current flowing into the RT/C pin will be approximately 300 A higher than the measured value.

Error Amp Configuration

Error Amp can Source and Sink up to 0.5mA, and Sink up to 2mA.

UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A

Under-Voltage Lockout

During UVLO, the Output is low.

Current Sense Circuit

Peak Current (IS) is Determined By The Formula 1.0V ISMAX RS A small RC filter may be required to suppress switch transients.

Output Saturation Characteristics

Error Amplifier Open-Loop Frequency Response

APPLICATIONS DATA (cont.)

Oscillator Section
Oscillator Frequency vs Timing Resistance

UC1842A/3A/4A/5A UC2842A/3A/4A/5A

Maximum Duty Cycle vs Timing Resistor

Open-Loop Laboratory Test Fixture

High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point

ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3.

Slope Compensation

A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converters requiring duty cycles over 50%. Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes.

APPLICATIONS DATA (cont.)

Off-line Flyback Regulator

UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A

Power Supply Specifications

1. Input Voltage 2. Line Isolation 3. Switching Frequency 4. Efficiency Full Load

95VAC to 130VA (50 Hz/60Hz) 3750V 40kHz 70%

5. Output Voltage: A. +5V, 5%; 1A to 4A load Ripple voltage: 50mV P-P Max B. +12V, 3%; 0.1A to 0.3A load Ripple voltage: 100mV P-P Max C. -12V , 3%; 0.1A to 0.3A load Ripple voltage: 100mV P-P Max

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PACKAGING INFORMATION
Orderable Device 5962-8670405PA 5962-8670405VPA 5962-8670405VXA 5962-8670405XA 5962-8670406PA 5962-8670406VPA 5962-8670406VXA 5962-8670406XA 5962-8670407PA 5962-8670407VPA 5962-8670407VXA 5962-8670407XA 5962-8670408PA 5962-8670408VPA 5962-8670408VXA 5962-8670408XA UC1842AJ UC1842AJ883B UC1842AJQMLV UC1842AL883B UC1842ALQMLV UC1843AJ UC1843AJ883B UC1843AJQMLV UC1843AL883B UC1843ALQMLV UC1844AJ UC1844AJ883B UC1844AJQMLV UC1844AL883B UC1844ALQMLV UC1845AJ UC1845AJ883B UC1845AJQMLV UC1845AL883B UC1845ALQMLV UC2842AD UC2842AD8 UC2842AD8TR UC2842AD8TRG4 UC2842ADTR UC2842ADW Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type CDIP CDIP LCCC LCCC CDIP CDIP LCCC LCCC CDIP CDIP LCCC LCCC CDIP CDIP LCCC LCCC CDIP CDIP CDIP LCCC LCCC CDIP CDIP CDIP LCCC LCCC CDIP CDIP CDIP LCCC LCCC CDIP CDIP CDIP LCCC LCCC SOIC SOIC SOIC SOIC SOIC SOIC Package Drawing JG JG FK FK JG JG FK FK JG JG FK FK JG JG FK FK JG JG JG FK FK JG JG JG FK FK JG JG JG FK FK JG JG JG FK FK D D D D D DW Pins Package Eco Plan (2) Qty 8 8 20 20 8 8 20 20 8 8 20 20 8 8 20 20 8 8 8 20 20 8 8 8 20 20 8 8 8 20 20 8 8 8 20 20 14 8 8 8 14 16 50 75 2500 2500 2500 40 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None Lead/Ball Finish A42 SNPB Call TI Call TI A42 SNPB Call TI Call TI A42 SNPB Call TI Call TI A42 SNPB Call TI Call TI A42 SNPB A42 SNPB Call TI Call TI A42 SNPB A42 SNPB Call TI Call TI A42 SNPB A42 SNPB Call TI Call TI A42 SNPB A42 SNPB Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU MSL Peak Temp (3) Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Level-NC-NC-NC Call TI Call TI Level-NC-NC-NC Level-NC-NC-NC Call TI Call TI Level-NC-NC-NC Level-NC-NC-NC Call TI Call TI Level-NC-NC-NC Level-NC-NC-NC Call TI Call TI Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Call TI Level-1-220C-UNLIM Level-2-220C-1 YEAR

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

POST-PLATE Level-NC-NC-NC

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Orderable Device UC2842ADWTR UC2842AJ UC2842AN UC2843AD UC2843AD8 UC2843AD8TR UC2843ADTR UC2843ADW UC2843ADWTR UC2843AJ UC2843AN UC2843AQ UC2844AD UC2844AD8 UC2844AD8TR UC2844AD8TRG4 UC2844ADTR UC2844ADW UC2844ADWTR UC2844AJ UC2844AN UC2844AQD UC2844AQD8 UC2844AQD8R UC2844AQDR UC2845AD UC2845AD8 UC2845AD8TR UC2845AD8TRG4 UC2845ADTR UC2845ADW UC2845AN UC3842AD UC3842AD8 UC3842AD8TR UC3842ADTR UC3842ADW UC3842ADWTR UC3842AJ UC3842AN

Status (1) ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE PREVIEW ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE PREVIEW ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Package Type SOIC CDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PLCC SOIC SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC PDIP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP

Package Drawing DW JG P D D D D DW DW JG P FN D D D D D DW DW JG P D D D D D D D D D DW P D D D D DW DW JG P

Pins Package Eco Plan (2) Qty 16 8 8 14 8 8 14 16 16 8 8 20 14 8 8 8 14 16 16 8 8 14 8 8 14 14 8 8 8 14 16 8 14 8 8 14 16 16 8 8 50 46 50 75 2500 2500 2500 40 2000 1 50 50 75 2500 2500 50 75 2500 2500 2500 40 50 50 75 2500 2500 40 2000 1 50 50 50 75 2500 2500 40 2000 2000 None None Pb-Free (RoHS) None None None None None None None Pb-Free (RoHS) None None None None None None None None None Pb-Free (RoHS) None None None None None None None None None None Pb-Free (RoHS) None None None None None None None Pb-Free (RoHS)

Lead/Ball Finish CU NIPDAU Call TI CU SNPB CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU SNPB CU SNPB CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU A42 SNPB CU SNPB Call TI Call TI Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU SNPB CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU A42 SNPB CU SNPB

MSL Peak Temp (3) Level-2-220C-1 YEAR Call TI Level-NC-NC-NC Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-2-220C-1 YEAR Level-2-220C-1 YEAR Call TI Level-NC-NC-NC Level-2-220C-1 YEAR Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Call TI Level-1-220C-UNLIM Level-2-220C-1 YEAR Level-2-220C-1 YEAR Level-NC-NC-NC Level-NC-NC-NC Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Call TI Level-1-220C-UNLIM Level-2-220C-1 YEAR Level-NC-NC-NC Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-2-220C-1 YEAR Level-2-220C-1 YEAR Level-NC-NC-NC Level-NC-NC-NC

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Orderable Device UC3842ANG4 UC3843AD UC3843AD8 UC3843AD8G4 UC3843AD8TR UC3843AD8TRG4 UC3843ADG4 UC3843ADTR UC3843AJ UC3843AN UC3843ANG4 UC3844AD UC3844AD8 UC3844AD8TR UC3844AD8TRG4 UC3844ADTR UC3844ADW UC3844ADWTR UC3844AN UC3845AD UC3845AD8 UC3845AD8TR UC3845ADTR UC3845ADW UC3845ADWTR UC3845AJ UC3845AN UC3845ANG4
(1)

Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Package Type PDIP SOIC SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC SOIC PDIP SOIC SOIC SOIC SOIC SOIC SOIC CDIP PDIP PDIP

Package Drawing P D D D D D D D JG P P D D D D D DW DW P D D D D DW DW JG P P

Pins Package Eco Plan (2) Qty 8 14 8 8 8 8 14 14 8 8 8 14 8 8 8 14 16 16 8 14 8 8 14 16 16 8 8 8 50 50 75 75 2500 Green (RoHS & no Sb/Br) None None None None

Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU A42 SNPB CU SNPB CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU SNPB CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU A42 SNPB CU SNPB CU NIPDAU

MSL Peak Temp (3) Level-NA-NA-NA Level-1-220C-UNLIM Level-1-220C-UNLIM Call TI Level-1-220C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-220C-UNLIM Level-NC-NC-NC Level-NC-NC-NC Level-NA-NA-NA Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-260C-UNLIM Level-1-220C-UNLIM Level-2-220C-1 YEAR Level-2-220C-1 YEAR Level-NC-NC-NC Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-1-220C-UNLIM Level-2-220C-1 YEAR Level-2-220C-1 YEAR Level-NC-NC-NC Level-NC-NC-NC Level-NA-NA-NA

2500 Green (RoHS & no Sb/Br) 50 2500 1 50 50 50 75 2500 Green (RoHS & no Sb/Br) None None Pb-Free (RoHS) Green (RoHS & no Sb/Br) None None None

2500 Green (RoHS & no Sb/Br) 2500 40 2000 50 50 75 2500 2500 40 2000 1 50 50 None None None Pb-Free (RoHS) None None None None None None None Pb-Free (RoHS) Green (RoHS & no Sb/Br)

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

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for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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