RCEAT for Radio Frequency Identification (RFID) UHF Tag By K.KARTHIK A.SWAPNA A.

DEEPTHI

Stands for Radio Frequency Identification Uses radio waves for identification Ne w frontier in the field of information technology One form of Automatic Identifi cation Provides unique identification or serial number of an object 2

Local Server Tag ID Reader Tag ID Tags 3

Automatic identification procedures (Auto-ID) have become very popular in many se rvice industries, purchasing and distribution logistics, industry, manufacturing companies and material flow systems. Automatic identification procedures exist t o provide information about people, animals, goods and products in transit. Fig: Overview of most important Automatic ID procedures

Introduction (contd..) Table: Comparison of different auto-ID systems System parameters Barcode OCR Voice recognition High Simple Very high Biometry S mart card 1664 k Very high Impossible Low RFID systems 1664 k Very high Impossible Medium Typical data quantity (bytes) Data density Readability by people Purchase cost/r eading electronics Unauthorized copying/modification Reading speed (including ha ndling of data carrier) 1100 Low Limited Very low 1100 Low Simple Medium High Difficult Very high Slight Slight Possible (audio tape) Very low >5 s Impossible Impossible Impossible Low ~4 s Low ~3 s Very low >510 s Low ~4 s Very fast ~0.5 s Maximum distance between data carrier and reader 050 cm <1 cm Scanner 050 cm Direct contact Direct contact 05-m, Microwave (contact-less)

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TAG RF circuit & analog circuit Baseband processor READER EEPROM Fig: RFID System components

Reader consists of A radio frequency module (transmitter and receiver) A control unit which controls the flow of data A coupling element like an antenna to the transponder Tag consists of Microchip for storage and computation coupling eleme nt, such as an antenna coil for communication RFID systems operate according to one of two basic procedures: Full duplex (FDX) or half duplex (HDX) systems Sequ ential (SEQ) systems

 Passive Operational power scavenged from reader radiated power Semi-passive Operational power provided by battery Active Operational power provided by battery - transmitter built into tag

Inductive Coupling Backscatter Reader TAG Reader N TAG S Near field (LF, HF): inductive coupling of tag to magnetic field circulating aro und antenna (like a transformer) Varying magnetic flux induces current in tag. M odulate tag load to communicate with reader field energy decreases proportionall y to 1/R3 (to first order) Far field (UHF, microwave): backscatter. Modulate bac k scatter by changing antenna impedance Field energy decreases proportionally to 1/R Boundary between near and far field: R = wavelength/2 pi so, once have reac hed far field, lower frequencies will have lost significantly more energy than h igh frequencies Absorption by non-conductive materials significant problem for m icrowave frequencies

Also known an interrogator Reader powers the tag by sending it RF energy Can be handheld or stationary Consists of: Transmitter Receiver Antenna Microprocessor Memory Controller or Firmware Com ication channels Power 10

Need for RFID Transportation payments People tagging Auto-immobilizer Supply Chain Traffic Toll Frequency LF HF UHF wave 125khz 13.56Mhz 900Mhz 2.4Ghz Distance Few cm 1m ~7m 10m Example Application AutoImmobilizer Building Access Supply Chain Traffic Toll Focus is on UHF

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Number of bits Collision Avoidance Reader Power Frequency Type of tag Tag classi fication Read range Coupling 96 or 128/256 bits Slotted ALOHA Below 1W 902~920MHz(ISM band (unlicensed)) Pass ive Class 1-Read, write once / write many (Generation 2) 2-7 meters Electromagne tic Operating procedure Standard Implementation Half Duplex mode Meets EPC Global Gen2 (v.1.0.9) and ISO/IEC 18000-6c Designed for high performan ce and low power consumption based RFID for 130nm silicon process

TAG

Functional block diagram RF circuit & analog circuit Baseband processor EEPROM Specifications Demodulated signal from the reader Serial Data Line Parallel Data Line Control L ine w.r.t data Receive Buffer Comparator Operating Procedure No of bits Half Duplex 96-bit Electronic product code (64 bit ID; 16bit CRC; 8 bit Pass; 8 bit Control Slotted Aloha [RNG & Slot Counter] OOK (On Off Shift Keying) [ASK] Receiver:100khz; Transmitter:12.5Mhz; C omparator, RNG, Slot Counter, CRC, Memory,: 200khz Reset Counter Controller Memory Controller Collision Avoidance Modulated signal to the reader Transmit buffer Modulation type Slot counter RNG Operating frequency Advantages Low power consumption and reduced complexity Due to good security feature, no complicated coding or cryptography is needed.

Power Up Receive Buffer Receives the data/command from the reader. [ID-64bits, CRC-16bits , Pass8bits] If received bit count is not correct If received bit count is correct Controller Sends the control signals to the subblocks. It starts the module when ever needed and stops when the task is completed Compare Compares the received ID and the ID stored in the memory. No Yes Stores the verified data in the latch and generates the 16 bit CRC for transmiss ion of this data. Random number generator Slot Counter Transmit Buffer Transmits the modulated data/command to the reader. [ID64bits, C RC-16bits, Pass-8bits] Anti-collision Reset/Halt

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The reference architecture was modified by modifying the controller block In ref erence architecture, the controller was controlling only the data flow to each o f the sub modules, whereas the modified architectures controller controls both cl ock and the data flow for each of the sub module Demodulated signal from the reader Receive Buffer Comparator Serial Data Line Parallel Data Line Reset Counter Controller Memory Controller Control Line w.r.t clock and data Modulated signal to the reader Transmit buffer Slot counter RNG

Test Setup Test Select Test Data Unit Test Case 1 Test Case 2 Simulation window Clock Reset Baseband Processor Serial Input data Modulate d Serial bits Clock :100 MHz Reset :Active high Input bits: 88 bits serial Output : 88 bits se rial which is amplitude modulated Given test case: 11001111000000010000000100000 001000000010000000100000001000000010000000 1111111111111111 Expected Output:0110 01111000000010000000100000001000000010000000100000001000000010000000 10111110001 0110

Conclusion A proposed reliable and cost effective anti-collision technique (RCEAT) is design ed to achieve a reliable and cost effective identification technique of the tag. The RCEAT architecture consists of two main sub systems: pre RCEAT checks errors in the incoming packets using the crc scheme. post RCEAT identifies the error f ree packets using binary tree based technique. Architecture has been synthesized using Xilinx synthesis Technology (XST), simulated using MODELSIM.

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