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of Electrical and Computer Engineering The University of Texas at Austin EE 382M.7 VLSI I Fall 2011
September 7, 2011
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Electrical Properties
Necessary to understand basic electrical properties of the MOS mm to design transistor 40 useful circuits 60 80 100 Deal with non-ideal devices Ensure that the circuits are robust Create working layouts Predict delays and power consumption As circuit dimensions scale down, electrical eects become more 60 important, even for digital circuits
1.65 GHz square wave from an 80 HDMI Interface (Source: Dunnihoo, EE Times Asia, 8/25/2005)
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If Vds > Vgs Vt , then Vgd < Vt , and the channel is pinched down (the inversion layer no longer reaches the drain) 60
In this case, conduction is brought about by the drift mechanism of electrons under the inuence of positive drain voltage; as the negative electrons leave the channel, they are accelerated towards the drain 80 Voltage across the pinchdown channel tends to remain xed at (Vgs Vt ), and the channel current remains constant with increasing Vds
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Moderately doped n- type substrate (or well) in which two heavily doped p+ regions, the Source and Drain, are diused
Application of a negative gate voltage (w.r.t. source) draws holes 60 into the region below the gate; channel changes from n to p-type (source-drain conduction path) Conduction due to holes; negative Vd sweeps holes from source (through channel) to drain
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= Cox W L (Cox =
ox /tox )
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Carrier Velocity
mm 40 60 80 100 120
Charge is carried by electrons Carrier velocity proportional to lateral E- eld between 40 source and drain = E
is called mobility
E = Vds /L
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I-V Characteristics
nMOS Linear I-V Current from 60 charge in channel and the mm can be obtained 40 80 100time t each carrier takes to cross Qchannel Ids = t W 40 = Cox (Vgs Vt Vds /2) Vds L = (Vgs Vt Vds /2) Vds nMOS Saturation I-V 60 If Vgd < Vt , channel pinches o near drain
when Vds > Vdsat = Vgs Vt 120
Ids
0 Vgs < Vt Cutof f (Vgs Vt Vds /2) Vds Vds < Vdsat Linear = 2 ( V V ) V > V Saturation gs t ds dsat 2
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pMOS I-V
mm 40 60 80 100 120
All dopings and voltages are inverted for pMOS (compared with nMOS)
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=2
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Capacitance
Capacitance in CMOS circuits Two conductors separated by an insulator have capacitance mm 40 60 80 100 Gate to channel capacitor is very important
Creates channel charge necessary for operation 120
Device Capacitances
The mm dynamic response (switching speed) of a CMOS circuit is 40 60 80 100 120 very dependent on parasitic capacitances associated with the circuit Use a simple approximation for quick estimates 40 of capacitances; use tools for extraction of more accurate values from actual layouts
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Vgs Vt ; when the MOS device is o, only Cgb (due to the series combination of gate oxide and depletion layer capacitance) is non-zero. Cgb = Cox = A/tox , where A is the gate area, and 40 = 0 SiO2
is the permittivity of free space (8.854 104 F/m), and SiO2 is the dielectric constant of SiO2 (about 3.9)
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60 Linear Region Depletion region exists, forming dielectric of depletion capacitance, Cdep in series with Cox
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Source: Mlynik and Leblebici EPFL web-based course
Approximation of Gate Capacitance 80 For simplicity, we can assume the gate capacitance to be constant, Cg = A/tox
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Assume diusion capacitance is approximately Cg for contacted diusion 80 It is 1/2Cg for uncontacted diusion
Lecture 4. CMOS Transistor Theory
Contacted
Uncontacted
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Pass Transistors
Have assumed that source is grounded
mm 40 What happens if source > 0? 60 Example, pass transistor passing VDD Vg = VDD 40 If Vs > VDD Vt , Vgs < Vt Hence, transistor would turn itself o 80 100 120
nMOS 60pass transistors pull no higher than VDD Vt Called a degraded 1 Degraded value reached slowly in a transition (low Ids )
80pass transistors pull no lower than Vtp pMOS
Degraded 0
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Example 1
Assumption: initial voltage on each node is 2.5 volts
mm transistor 40parameters60 80 Relevant are, Vdd = 5 V , Vtn = 1100 V and |Vtp | = 0.7V 120
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Example 1, Contd
Vdd = 5V , Vtn = 40 1V and |Vtp |60 = 0.7V mm
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Example 2
Assume: initial voltage of 0.5V on all the internal nodes Vdd = 1.0V , Vtn = Vtp | = 0.2V 80 mm 400.2V and |60
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Example 2, Contd
Assume: initial voltage of 0.5V on all the internal nodes Vdd = 1.0V , Vtn = Vtp | = 0.2V 80 mm 400.2V and |60
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Eective Resistance
Resistance of a bar of uniform material R= A = t W mm 40 60 80 where = resistivity of the material A = cross-section of the resistor t, W = thickness, width of the material
L L
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Resistance values depend on the technology 60 Obtain the information from the technology les Sheet resistance (/ )
Lowest for metal, increases for poly, active, highest for Well
Contact (via) resistance becomes more important as 80 processes scale down Channel (turned-on transistor) on the order of 1000 /
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Too inaccurate to predict current at any given time, but good enough to predict RC delay
80 More accurate values of delay obtained from detailed design using the tools
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RC Delay Model
Use mm equivalent circuits for MOS 40 60 transistors 80 Ideal switch + capacitance and ON resistance
Unit nMOS has resistance R, capacitance C Unit pMOS has resistance 2R, capacitance C 40 Capacitance proportional to width 100 120
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d = 6RC
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