14/05/13

Reception

Synopsis : Book Dated TTL

Synopsis Data processing Physics Technologies Formulas maths Our services Others

Family TTL Stitching C.MOS Return to the synopsis

Stitching TTL To contact the author

Family C.MOS Low of page Created it, 06/09/09 Update it, 06/09/10 N Visitors

Reception
Test your knowledge Static page of welcome Dynamic page of welcome

SYNOPSIS : BOOK DATED TTL

In this synopsis book Dated what means in French catalogs, we will present to you the logical circuits most employed. 1. - CIRCUITS FREQUENTLY MET IN THE INDUSTRIAL ASSEMBLIES Bipolar technologies and MOS until now are used in the industrial circuits. That it is for maintenance or the realization, it is important to know not only technology, but also the inventory of the circuits with their function. Each manufacturer uses codes which it prints on the cases in order to be able to identify them. Still these codes should be known. It is the role of figures 1 and 2 which give the significance of the codes of name of logical circuits TTL and C-MOS.

Synopses
Fundamental electronics Digital electronics Practical digital Digital technology Numerical Electronic lexicon Deliver Data Microprocessors and Computers Breakdown service PC Breakdown service TVC Breakdown service HI-FI Mathematics

Data processing
Breakdown service Glossary

HTML and programs

How to make a site ?

Physics
The light Field of action Electromagnetic

Technologies
Classification of resistances Identification of resistances Classification of condensers Identification of condensers

Forms maths
Geometry Physics 1. - Electronics 1. 2. - Electronics 1. 3. - Electrical engineering 1. 4. - Electromagnetism

Our services
Meters Deliver of gold Forums Dynamic synopsis

Others
Form of the perso pages Us to contact CountUs

Our statistics Editor JavaScript Our partners Mycircle Surveys The two paragraphs which follow respectively provide the functions and the stitching of logical circuits TTL (bipolar) whereas the two last pursue the same goals but in technology C.MOS.

1. 1. - INVENTORY OF THE CIRCUITS OF LOGIC : FAMILY TTL Vote for us www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

1/10

14/05/13 Vote for us

Synopsis : Book Dated TTL

Cat Electronic forum and Infos Electronic forum and Poem Sign our Guestbook 2nd Sign our Guestbook Deposit your advertisements Directory sites

To know certain stitchings or their connections of the integrated circuits, it is enough to pass your pointer on the bonds hereafter: 7400 N 7401 N 7402 N 7403 N 7404 N 7405 N 7406 N 7407 N 7408 N 7409 N 7410 N 7411 N 7412 N 7413 N 7414 N 7416 N 7417 N 7420 N 7422 N 7423 N 7425 N 7426 N 7427 N 7428 N 7430 N 7432 N 7437 N 7438 N 7440 N 7442 N 7443 N 7444 N 7445 N 7446 AN 7447 AN 7448 N 7450 N 7451 N 7453 N 7454 N 7460 N 7470 N 7472 N 7473 N 7474 N 7475 N 7476 N 7480 N 7481 N 7482 N 7483 AN Quadruple door NOT - AND at 2 entries Quadruple door NOT - AND at 2 entries with open collector Quadruple door NOT - OR at 2 entries Quadruple door NOT - AND at 2 entries with open collector 6 reversers 6 reversers with open collector 6 stages of attack reverser to open collector for 40 my 6 stages of attack to open collector for 40 my Quadruple door AND at 2 entries Quadruple door AND at 2 entries with open collector Triple carries NOT - AND at 3 entries Triple carries AND to 3 entry Triple carries NOT - AND at 3 entries with open collector Double door NOT - AND at 4 entries 6 reversers trigger 6 reversers of powers to open collector 6 stages of attack to open collector for 40 my Double door NOT - AND at 4 entries Double door NOT - AND at 4 entries with open collector Double door NOT - OR at 4 entries expansible and strobe Double door NOT - OR at 4 entries and strobe Quadruple door NOT - AND with 2 entries - High voltage Triple carries NOT - OR at 3 entries Quadruple NOR door at 2 entries Carry NOT - AND at 8 entries Quadruple door OR at 2 entries Quadruple door NOT - AND of power at 2 entries Quadruple door NOT - AND of power at 2 entries and open collector Double door NOT - AND of power at 4 entries Decimal decoder BCD Decoder excesses of 3 - decimal Decoder excesses of 3 Gray - decimal Decimal decoder BCD with open collector for 80 my and 30 V or 15 V Decoder BCD 7 segments with open collector with 30 V/20 my Decoder BCD 7 segments with open collector with 30 V/20 my Decoder BCD 7 segments Double door AND/OR - NOT to 2 X 2 entries Double door reverser AND/OR - NOT to 2 X 2 entries Carry reverser AND/OR - NOT to 4 X 2 entries expansible Carry reverser AND/OR - NOT to 4 X 2 entries Double door of multiplication at 4 entries Flip-flop JK to 2 X 3 entries Main flip-flop slave with 2 X 3 entries Main flip-flop slave with entry reset Double Flip-flop D synchronous Quadruple Flip-flop D asynchronous Double main Flip-flop JK slave with entries set and reset Full adder with 1 bit Memory with 16 bits writing/reading Full adder with 2 bits Full adder with 4 bits
2/10

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

14/05/13

Synopsis : Book Dated TTL

7484 AN 7485 N 7486 N 7489 N 7490 AN 7491 AN 7492 N 7493 N 7494 N 7495 AN 7496 N 7497 N 74100 N 74107 N 74110 N 74111 N 74118 N 74120 N 74121 N 74122 N 74123 N 74125 N 74132 N 74141 AN 74142 N 74145 N 74148 N 74150 N 74151 N 74153 N 74154 N 74155 N 74156 N 74157 N 74160 N 74161 N 74162 N 74163 N 74164 N 74165 N 74166 N 74167 N 74170 N 74174 N 74175 N 74180 N 74181 N 74184 N 74185 AN 74190 N 74191 N 74192 N 74193 N 74194 N
www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

Memory with 16 bits writing/reading at 2 entries of writing and reading Binary comparator with 4 bits Quadruple door OR Exclusive Memory with 64 bits writing/reading with open collector Decimal scaler Register with shift with 8 bits series Divider by 12 Binary counter Register with shift 4 bits at parallel entry Register with shift 4 bits entered and 4 parallel ports Register with parallel shift 5 bits Divider of synchronous binary frequency programmable 6 bits Octo-Flip-failure D Double main Flip-flop JK slave with entry reset Main flip-flop JK slave with blocking of entry Double main Flip-flop JK slave with blocking of entry Sixfold Flip-flop RS at common entry of reset Double synchronization of impulses Monostable Monostable redclenchable at entry reset Double monostable redclenchable at entry reset 4 doors YES at exits 3 states Quadruple Trigger de Schmitt NOT - AND at 2 entries Decimal decoder BCD for tubes of posting Decimal scaler and ordering of NIXIE Decimal decoder BCD with open collector for 80 my and 30 V or 15 V 8 To 3 Line Priority Encoder Selector of data 16 bits/multiplexer Selector of data 8 bits/multiplexer Double selector of data 4 bits/multiplexer Binary decoder 4 bits/demultiplexer Double binary decoder 2 bits/demultiplexer Double binary decoder 2 bits/demultiplexer Quadruple selector of information 2 bits/multiplexer Synchronous decimal scaler at entry of set and reset Synchronous decimal scaler at entry of set and reset Synchronous binary counter 4 bits at entry of set and reset Synchronous binary counter 4 bits at entry of set and reset Register with shift 8 bits at parallel port Register shift 8 bits at parallel entry Register with synchronous shift 8 bits at parallel entry Divider of frequencies, decimal Memory with 16 bits writing/reading with words to 4 bits Sixfold Flip-flop D at entry of reset Quadruple Flip-flop D synchronous Parity check 8 bits Arithmetic logical unit 4 bits Binary converter BCD 6 bits Binary converter BCD 6 bits Reversible decimal scaler for synchronous counting chain Reversible binary counter for synchronous counting chain Meter decimal discounting machine with set and reset Binary meter discounting machine with set and reset Register with synchronous 4 bits right-hand side/left parallel shift
3/10

14/05/13

Synopsis : Book Dated TTL

74195 N 74196 N 74197 N 74198 N 74199 N 74LS241 74LS242 74LS243 81LS95 81LS97

Register with synchronous shift parallel 4 bits with entry JK Decimal scaler 50 MHz with entry of set and reset Binary counter 50 MHz with entry of set and reset Register with synchronous shift 8 bits at entry and port parallel Register with synchronous shift 8 bits parallel at entry JK Driver of bus not reverser Quad drunk transceiver inverting 4 transcoders not reverser 3 states 74795 : Octal Buffer with Three-State Outputs (74LS795 is equivalent to 81LS95) 74797 : Octal Buffer with Three-State Outputs (74LS797 is equivalent to 81LS97)

1. 2. - STITCHING OF THE CIRCUITS OF LOGIC : FAMILY TTL

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

4/10

14/05/13

Synopsis : Book Dated TTL

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

5/10

14/05/13

Synopsis : Book Dated TTL

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

6/10

14/05/13

Synopsis : Book Dated TTL

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

7/10

14/05/13

Synopsis : Book Dated TTL

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

8/10

14/05/13

Synopsis : Book Dated TTL

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

9/10

14/05/13

Synopsis : Book Dated TTL

Family TTL Stitching C.MOS Return to the synopsis

Stitching TTL To contact the author

Family C.MOS High of page

Click here for the following lesson or in the synopsis envisaged to this end. Preceding page

High of page Following page

Aujourd'hui, vous tes 0779 personnes avoir visit notre site premium, merci !
5 visiteurs actuellement sur le site

Daniel

www.premiumorange.com/daniel.robert9/anglais/Digit/Data_book.html

10/10