VDD

5 1

IC3
4

220n

C9

V+

2 3

SUB-1 SUB-2

TDA2030V R1 10

10F/25v

C12

1 2

R5 10k

R3 10k C10 100n

IC4A NE5532N R6 33k

5 6 4

IC4B
7
+

C14 100n

VSS

10F/25v

C8

4.7k

2011 te1.com.br
R2
3

R7

NE5532N

22k

C7

GND

470

GND

GND

2011 te1.com.br
GND R8 GND VDD

V-

470

P1 10k

100n GND

R4
+

C11 47F/25v

GND

GND R15 10k

R10

10F/25v

100n

C20

C21

1-3

10F/25v

P2/1 10k

C19

C22

2n2

1-1

P2/2 10k

10k

2 3

L-OUT-2 R20 L-OUT-1

R-IN-2

2-2

10k C16 2n2 R11

5 1 2 3

C15

2-3

1-2

100n

L-IN-2

R19

IC6 TDA2030V 10

R-IN-1

10k

L-IN-1

VDD IC5
4

GND

4.7k

R18

VSS

2011 te1.com.br
R17 GND C23 100n GND C18 10F/25v GND GND R16 470 33k
+

GND

2-1

GND

R-OUT-1 R14 R-OUT-2

TDA2030V 10

GND

VSS

2011 te1.com.br
R12 33k GND R9 470 100n GND C13 10F/25v GND
+

4.7k

R13

GND C17

2011 te1.com.br
VDD
IN OUT GND

V+ C2 C5 10F/25v IC2 7812

+ +

AC1

AC-1 AC-2 AC-3

-

C4

B1
+

4700F/35v 100nF

2011 te1.com.br
AC2

GND

C3

C1

GND

IC1 7912

C6 10F/25v

4700F/35v 100nF
IN

GND OUT

VSS

V-

TDA2030 2.1 Verso 1.0

IC6 TDA2030V IC5 TDA2030V IC3 TDA2030V

C4
2

+ -

L-OUT

+
2

L OUT

R17 33k R20 10 C17 4.7k R16 470

J6 J7 R12 100n R14 10 R13 R9 470 33k 4.7k C13 C11 47F/25v R6 33k NE5532N J5

J4

SUB
R2 22k 10 R1

C23

100n

R18

R4 470

4700F/35v
C7 100n IC2 C5 10F/25v

10F/25v C18 100n C21 R15 10k C19

R-OUT

R-OUT

10F/25v 100n R8 470 10k R10 R11 100n C14 10k

C15 C16 2n2

10k

2n2 R19 10k

C22

J3 C6 10F/25v

R5

C9

100n 4.7k C10 R7

10F/25v 10k

IC1 7912 O I +

10k

C20

10F/25v

L-IN
2

R-IN 2
+ -

10k R3

C1

10F/25v P2

J2 P1

LIN

RIN

2011 te1.com.br

TRAFO

10F/25v C12

4700F/35v

100nF

IC4

220n

C8

C3
7812

AC

J1

C2 B2

100nF

2011 te1.com.br

SUB

2011 te1.com.br

+ TU O -R

TU O L

2011 te1.com.br
SUB
+ TDA2030 2.1 Verso 1.0

2011 te1.com.br

OFART

LIN

RIN

2011 te1.com.br

+ TU O -R

TU O L

2011 te1.com.br
SUB
+ TDA2030 2.1 Verso 1.0

2011 te1.com.br

OFART

LIN

RIN

2011 te1.com.br

TDA2030
14W Hi-Fi AUDIO AMPLIFIER

DESCRIPTION The TDA2030 is a monolithic integrated circuit in Pentawatt package, intended for use as a low frequency class AB amplifier. Typically it provides 14W output power (d = 0.5%) at 14V/4; at 14V or 28V, the guaranteed output power is 12W on a 4 load and 8W on a 8 (DIN45500). The TDA2030 provideshigh output current and has very low harmonic and cross-over distortion. Further the device incorporates an original (and patented) short circuit protection system comprising an arrangement for automatically limiting the dissipated power so as to keep the working point of the output transistors within their safe operating area. A conventional thermal shut-down system is also included. ABSOLUTE MAXIMUM RATINGS
Symbol Vs Vi Vi Io Ptot Tstg, Tj Supply voltage Input voltage Differential input voltage Output peak current (internally limited) Power dissipation at Tcase = 90C Stoprage and junction temperature Parameter

Pentawatt

ORDERING NUMBERS : TDA2030H TDA2030V

Value 18 (36) Vs 15 3.5 20 -40 to 150

Unit V V A W C

TYPICAL APPLICATION

June 1998

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TDA2030
PIN CONNECTION (top view)

+V S OUTPUT -VS INVERTING INPUT NON INVERTING INPUT

TEST CIRCUIT

2/12

TDA2030
THERMAL DATA
Symbol Rth j-case Parameter Thermal resistance junction-case max Value 3 Unit C/W

ELECTRICAL CHARACTERISTICS (Refer to the test circuit, Vs = 14V , Tamb = 25C unless otherwise specified) for single Supply refer to fig. 15 Vs = 28V
Symbol Vs Id Ib Vos Ios Po Parameter Supply voltage Quiescent drain current Input bias current Input offset voltage Input offset current Output power d = 0.5% Gv = 30 dB f = 40 to 15,000 Hz R L = 4 R L = 8 d = 10% f = 1 KHz R L = 4 R L = 8 d Distortion Gv = 30 dB 18 11 W W Vs = 18V (Vs = 36V) Test conditions Min. 6 12 40 0.2 2 20 Typ. Max. 18 36 60 2 20 200 Unit V mA A mV nA

12 8

14 9

W W

Po = 0.1 to 12W R L = 4 Gv = 30 dB f = 40 to 15,000 Hz Po = 0.1 to 8W R L = 8 Gv = 30 dB f = 40 to 15,000 Hz

0.2

0.5

0.1 10 to 140,000 0.5 5 90

0.5

% Hz M dB

B Ri Gv Gv eN iN SVR

Power Bandwidth (-3 dB) Input resistance (pin 1) Voltage gain (open loop) Voltage gain (closed loop) Input noise voltage Input noise current Supply voltage rejection

Gv = 30 dB Po = 12W

R L = 4

f = 1 kHz B = 22 Hz to 22 KHz

29.5

30 3 80

30.5 10 200

dB V pA dB

R L = 4 Gv = 30 dB R g = 22 k Vripple = 0.5 Veff fripple = 100 Hz Po = 14W Po = W R L = 4 R L = 8

40

50

Id

Drain current

900 500

mA mA

3/12

TDA2030
Figure 1. Output power vs. supply voltage Figure 2. Output power vs. supply voltage Fi gu re 3. Disto rtion vs. output power

F i gu re 4. Di stortion vs. output power

Fi g ure 5. Disto r tion vs. output power

Fi gu re 6. Disto rtion vs. frequency

F i gure 7 . Disto r tion vs . frequency

Fig ure 8 . Fr eq uency response with different values of the rolloff capacitor C8 (see fig. 13)

Figure 9. Quiescent current vs. supply voltage

4/12

TDA2030
Figure 10. Supply voltage rejection vs. voltage gain Figure 11. Power dissipation and efficiency vs. output power Figure 12. Maximum power dissipation vs. supply voltage (sine wave operation)

APPLICATION INFORMATION Figure 13. Typical amplifier with split power supply Figure 14. P.C. board and component layout for the circuit of fig. 13 (1 : 1 scale)

5/12

TDA2030
APPLICATION INFORMATION (continued)

Figure 15. Typical amplifier with single power supply

Figure 16. P.C. board and component layout for the circuit of fig. 15 (1 : 1 scale)

Figure 17. Bridge amplifier configuration with split power supply (Po = 28W, Vs = 14V)

6/12

TDA2030
PRACTICAL CONSIDERATIONS Printed circuit board The layout shown in Fig. 16 should be adopted by the designers. If different layouts are used, the ground points of input 1 and input 2 must be well decoupled from the ground return of the output in which a high current flows. Assembly suggestion No electrical isolation is needed between the packageand the heatsinkwith single supplyvoltage configuration. Application suggestions The recommended values of the components are those shown on application circuit of fig. 13. Different values can be used. The following table can help the designer.

Component R1 R2 R3 R4

Recomm. value 22 k 680 22 k 1

Purpose Closed loop gain setting Closed loop gain setting Non inverting input biasing Frequency stability

Larger than recommended value Increase of gain Decrease of gain (*) Increase of input impedance Danger of osccilat. at high frequencies with induct. loads Poor high frequencies attenuation

Smaller than recommended value Decrease of gain (*) Increase of gain Decrease of input impedance

R5 C1 C2 C3, C4 C5, C6 C7 C8

3 R2 1 F 22 F 0.1 F 100 F 0.22 F 1 2 B R1 1N4001

Upper frequency cutoff Input DC decoupling Inverting DC decoupling Supply voltage bypass Supply voltage bypass Frequency stability Upper frequency cutoff

Danger of oscillation Increase of low frequencies cutoff Increase of low frequencies cutoff Danger of oscillation Danger of oscillation Danger of oscillation

Smaller bandwidth

Larger bandwidth

D1, D2

To protect the device against output voltage spikes

(*) Closed loop gain must be higher than 24dB

7/12

TDA2030
SINGLE SUPPLY APPLICATION
Component R1 R2 R3 R4 Recomm. value 150 k 4.7 k 100 k 1 Purpose Closed loop gain setting Closed loop gain setting Non inverting input biasing Frequency stability Larger than recommended value Increase of gain Decrease of gain (*) Increase of input impedance Danger of osccilat. at high frequencies with induct. loads Power Consumption Increase of low frequencies cutoff Increase of low frequencies cutoff Danger of oscillation Danger of oscillation Danger of oscillation Smaller bandwidth Larger bandwidth Smaller than recommended value Decrease of gain (*) Increase of gain Decrease of input impedance

R A/RB C1 C2 C3 C5 C7 C8

100 k 1 F 22 F 0.1 F 100 F 0.22 F 1 2 B R1 1N4001

Non inverting input Biasing Input DC decoupling Inverting DC decoupling Supply voltage bypass Supply voltage bypass Frequency stability Upper frequency cutoff

D1, D2

To protect the device against output voltage spikes

(*) Closed loop gain must be higher than 24dB

8/12

TDA2030
SHORT CIRCUIT PROTECTION The TDA2030 has an original circuit which limits the current of the output transistors. Fig. 18 shows that the maximum output current is a function of the collector emitter voltage; hence the output transistors work within their safe operating area (Fig. 2). This function can therefore be considered as being peak power limiting rather than simple current limiting. It reduces the possibility that the device gets damaged during an accidental short circuit from AC output to ground.

Fi g ur e 1 8. Max imum ou tpu t c u rr en t vs . voltage [VCEsat] across each output transistor

Figure 19. Safe operating area and collector characteristics of the protected power transistor

THERMAL SHUT-DOWN The presence of a thermal limiting circuit offers the following advantages: 1. An overload on the output (even if it is permanent), or an abovelimit ambient temperaturecan be easily supported since the Tj cannot be higher than 150C. 2. The heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no possibility of device damage due to high junction temperature.If for any reason, the junction temperature increases up to 150C, the thermal shut-down simply reduces the power dissipation at the current consumption. The maximum allowable power dissipation depends upon the size of the external heatsink (i.e. its thermal resistance); fig. 22 shows this dissipable power as a function of ambient temperature for different thermal resistance.

9/12

TDA2030
Figure 20. Output power and d r ai n c u rr e nt vs . c ase temperature (RL = 4) Figure 21. Output power and d r ai n c u rr e n t v s. ca s e temperature (RL = 8) Fi g ur e 22. Max imum allowable power dissipation vs. ambient temperature

Figure 23. Example of heat-sink

Dimension : suggestion. The following table shows the length that the heatsink in fig.23 must have for several values of Ptot and Rth.
Ptot (W) Length of heatsink (mm) Rth of heatsink 12 60 8 40 6 30

( C/W)

4.2

6.2

8.3

10/12

TDA2030
PENTAWATT PACKAGE MECHANICAL DATA
DIM. MIN. A C D D1 E E1 F F1 G G1 H2 H3 L L1 L2 L3 L4 L5 L6 L7 L9 M M1 V4 Dia mm TYP. MAX. 4.8 1.37 2.8 1.35 0.55 1.19 1.05 1.4 3.6 7 10.4 10.4 18.15 15.95 21.6 22.7 1.29 3 15.8 6.6 4.75 4.25 40 (typ.) 3.65 3.85 0.144 0.152 MIN. inch TYP. MAX. 0.189 0.054 0.110 0.053 0.022 0.047 0.041 0.055 0.142 0.276 0.409 0.409 0.715 0.628 0.850 0.894 0.051 0.118 0.622 0.260 0.187 0.167

2.4 1.2 0.35 0.76 0.8 1 3.2 6.6 10.05 17.55 15.55 21.2 22.3 2.6 15.1 6 4.23 3.75

3.4 6.8

0.094 0.047 0.014 0.030 0.031 0.039 0.126 0.260 0.396 0.691 0.612 0.831 0.878 0.102 0.594 0.236 0.167 0.148

0.134 0.268

17.85 15.75 21.4 22.5

0.703 0.620 0.843 0.886

0.2 4.5 4

0.008 0.177 0.157

L L1 L8 V V1 V R R A B C D1 L5 L2 L3 D R V4 H2
F E
V4

V3 E M1

E1

H3 H1 Dia. L7 L6 RESIN BETWEEN LEADS F1 H2 F

G G1

V4

L9

11/12

TDA2030

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifi cation mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previous ly supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1998 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

12/12

This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.