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2010/S1

BEng (Hons) Telecommunications & BEng
(Hons) Electronic Engineering
Cohorts: BEngTel/10A/FT & BEngEE/10A/FT
Examinations for 2010 / Semester 2

MODULE: ANALOGUE ELECTRONICS

MODULE CODE: ELEC 1102

Duration: 2 Hours 30 min

Instructions to Candidates:

1. This question paper contains four (4) questions.
2. All questions carry equal marks.
3. Answer all four (4) questions.
4. Total marks 100.

This question paper contains 4 questions and 7 pages.

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2010/S1

QUESTION 1: (25 MARKS)

(a) Describe the characteristics of the ideal diode. What is the one important
difference between the forward biased characteristic of an ideal diode and
that of a real diode?
[4 marks]

(b) The general characteristics of a diode can be modelled by the following
device equation:

(

|
|
.
|

\
|
= 1 exp
T
D
S D
nV
V
I I

where I
S
= 10
-8
A, V
T
= 25 mV, and n = 2.
Using this device equation, determine a value for the dc resistance and the
small signal resistance, for a voltage across the diode V
D
= 0.7 V.
[7 marks]

(c) Draw the circuit diagram and describe the operation of a full wave bridge
rectifier, including a smoothing capacitor to give a smooth dc output across
a resistor R.
[6 marks]

(d) For the circuit shown in Figure Q1d, determine the amplitude of the output
voltage V
o
on the positive and negative half cycles of the sinusoidal voltage
source, where R
1
= R
3
= 2 k, R
2
= 4 k, and V
S
= 100 sin(t) V.
[8 marks]
Figure Q1d
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2010/S1

QUESTION 2: (25 MARKS)

(a) Sketch the waveforms v
i
and v
o
for the circuits shown in Figures Q2a1 and
Q2a2 when v
s
= 10sin(t) V. Consider the diodes as having a constant
voltage drop of V
o
= 0.7 V in forward bias conditions.
[8 marks]

(b) The circuit shown in Figure Q2b is a diode limiter which limits the output
voltage. V
1
= 3 V and V
2
= 2 V. Sketch:
(i) the voltage transfer characteristic v
o
/v
s
[4 marks]
(ii) v
o
(t) when v
s
(t) = 5sin(t) V. [3 marks]
Consider the diodes as being ideal.

(c) A battery charger circuit is used to recharge a 6 V battery. The supply
voltage is equivalent to a sinusoidal source with a peak open circuit output
voltage of 12 V and an internal resistance of 2 O. Modelling the diode as a
two segment piecewise linear model in forward bias condition with V
o
= 0.7
V and r
D
= 5 O, and assuming that the internal resistance of the battery is
negligible and that the battery voltage dose not vary with its state of charge,
calculate:

(i) the value of the series resistor R which is needed to limit the peak
current to 200 mA [3 marks]
(ii) the peak inverse voltage across the diode [2 marks]
(iii) the fraction of a cycle for which the diode conducts. [5 marks]
1kO
+

v
i

+

v
0

+
v
S

1kO
Figure Q2a1
1kO
+

v
i

+

v
0

+
v
S

1kO
Figure Q2a2
+

v
0

+
v
S

r
s

Figure Q2b
+
V
1

V
2

+

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2010/S1

QUESTION 3: (25 MARKS)

A simple BJT voltage amplifier is shown in Figure 3.1. The input and output
characteristics of the BJT are given in Figures 3.2 and 3.3. The Quiescent
Operating Point is given by I
B
= 40 A and V
CE
= 6 V.

(a) Draw an appropriate dc model for the BJT. Calculate the element values in
the model (V
o
; |
DC
) from the input and output characteristics.
[5 marks]

(b) Calculate the values of the resistors R
B
and R
C
.
[6 marks]

(c) Draw an appropriate small-signal model for the BJT. Calculate the
equivalent resistance r
i
between the base and the emitter. You may assume
that the capacitors C
1
and C
2
are short circuits at the signal frequency.
[8 marks]

(d) Hence show that the mid-band voltage gain of the amplifier in figure Q3.1 is
given by
i
L
v
r
R
A
/
|
= where
C L
C L
L
R R
R R
R
+
=
.
/
.
[6 marks]

Figure 3.1 Simple BJT Amplifier

R
B

R
C

C
2

R
L
+
V
s
-
+

V
o

-
C
1

V
CC
= 12V
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2010/S1

Figure 3.2 Output Characteristics I
C
v/s V
CE
of Typical Low Power NPN Bipolar
Junction Transistor

Figure 3.3 Input Characteristics I
B
vs V
BE
of Typical Low Power NPN Bipolar Junction
Transistor
I
C
(mA)
0.5
1.0
50
100
150
0
V
BE
(V)
I
B
(A)
V
CE
= 2 to 10V
5
10 15
2
4
6
8
0
10A
20A
30A
40A
50A
60A
70A
80A
I
B
= 0A
V
CE
(V)
Page 6 of 7
2010/S1

QUESTION 4: (25 MARKS)

(a) Figure Q4a shows the basic inverting
operational amplifier. Assuming that the
op-amp is ideal,

(i) what is the value of the input
resistance Z
IN
?

(ii) what is the value of the gain A?

(iii) Give typical values for Z
IN
and A for
real operational amplifiers. [4 marks]

(b) (i) What type of operational amplifier is
shown in Figure Q4b?

(ii) Assuming the op-amp to be ideal
show that v
o
(t).
dt
) (
s
dv
S
C
F
R ) (
o
v
t
t =

(iii) Sketch the form of the output
voltage if the input voltage v
S
(t) is a
square wave with a mark space ratio
of unity.

[8 marks]

(c) (i) What type of operational amplifier is
shown in Figure Q4c?

(ii) Assuming the op-amp to be ideal
derive an expression for v
o
(t).

[5 marks]

+
A
+
v
o

+

v
s

Fig Q4a
Z
IN

R
F

+
C
S

A
+

v
o
(t)

Fig Q4b
+

v
S
(t) = v
pk
sinet

+
+

v
s3

A
+

v
o

R
F

R
R
+

v
s2

+

v
s1

R
Fig Q4c
Page 7 of 7
2010/S1

(d) A zener diode is used in a regulator circuit shown in Figure Q4d. The zener
diode has the following characteristic values: V
ZT
= 15 V at I
ZT
= 17 mA, I
ZK
=
0.25 mA, Z
ZT
= 14 O and P
D(max)
= 1 W.

(i) Calculate V
out
at I
ZK
and at I
ZM
. [4 marks]

(ii) Calculate the minimum value of load resistor R
L
that can be used.
[4 marks]

DC
24 V
R = 200
O
RL

Figure Q4d Zener diode voltage regulator circuit

***END OF EXAM PAPER***