Syllabus for BIT 4th Smester Computer Organization

BIT221CS
Year: II Teaching schedule Hours/Week Theory 3 Tutorial 1 Practical Semester: II Examination Scheme Internal Assessment Theory 20 ** Duration: 3 hours Course Objective: The main objectives of this course is to provide the knowledge of computer hardware, Computer design as well as the various components is assumed to be in place and task is to investigate the organizational structure to verify that the computer parts operate as intended. 1. Review of Digital Logic Circuits and Digital Components 1.1. Logic gates 1.2. Combination circuits 1.3. Flip-flop 1.4. Sequential Circuits Data representation 2.1. Data types 2.2. Components 2.3. Fixed- point Representation 2.4. Floating point Representation 2.5. Binary codes 2.6. Error detection codes Computer organization and design 3.1. Instruction code 3.2. Computer register 3.3. Computer instruction 3.4. Timing and control 3.5. Instruction cycle 3.6. Memory reference instructions 3.7. Input and output interrupt Micro programmed control 4.1. Control memory 4.2. Address sequencing 4.3. Design of control unit Operating system support 5.1. Operating System Overview 5.2. Scheduling 5.3. Memory Management Central Processing Unit 6.1. Instruction formats 6.2. Addressing modes 6.3. Data transfer and manipulation 6.4. Program Control (2 Hrs) Practical* Final Theory ** 80 Practical Total 100

2.

(2 Hrs)

3.

(6 Hrs)

4.

(3 Hrs)

5.

(3 Hrs)

6.

(6 Hrs)

Kantipur City College

Syllabus for BIT 4th Smester

6.5. RISC and CISC

7.

Pipeline and Vector Processing 7.1. Parallel processing 7.2. Pipelining 7.3. Arithmetic and Instruction Pipeline 7.4. RISC pipeline 7.5. Vector processing 7.6. Array processing Computer Arithmetic 8.1. Addition and Subtraction 8.2. Multiplication and Division Algorithms Input and Output Organization 9.1. Peripheral Devices 9.2. I/O interface 9.3. Modes of transfer 9.4. Interrupt 9.5. Direct Memory Access 9.6. I/O processor 9.7. Data communication processor

(5 Hrs)

8.

(5 Hrs)

9.

(5 Hrs)

10. Memory Organization 10.1. Memory Hierarchy 10.2. Main Memory 10.3. Auxiliary Memory 10.4. Cache Memory 10.5. Virtual Memory 10.6. Memory Management Hardware 11. Multiprocessor 11.1. Characteristics of Multiprocessors 11.2. Interconnection Structures 11.3. Inter Processor Arbitration 11.4. Inter processor communication and synchronization 11.5. Cache Coherence

(5 Hrs)

(3 Hrs)

References: 1. M. Morris Mano Computer System Architecture 2. William Stalling Computer Organization and Architecture 3. M. Morris Mano Digital Logic and Computer Design 4. David A. Paterson and John L. Hennessy Computer Organization and Design
5. Vicent P. Heuring and Harry F. Jordan Computer Systems Design and Architerture

6. 7.

Acdrew S. Tanenbaum Structured Computer Organization John P. Hayes Computer Architecture and Organization

Kantipur City College