IEEE JOURNAL OF PHOTOVOLTAICS, VOL. 3, NO.

2, APRIL 2013

791

A High-Power-Density DCDC Converter for Distributed PV Architectures

Mohammed S. Agamy, Senior Member, IEEE, Song Chi, Member, IEEE, Ahmed Elasser, Senior Member, IEEE, Maja Harfman-Todorovic, Member, IEEE, Yan Jiang, Member, IEEE, Frank Mueller, and Fengfeng Tao

AbstractIn order to maximize the solar energy harvesting capabilities, power converters for photovoltaic (PV) systems have to be designed for high efciency, accurate maximum power point tracking (MPPT), and voltage/current performance. When many converters are used in distributed PV systems, power density also becomes an important factor since it allows for simpler system integration. In this paper, a high-power-density string-level MPPT dcdc converter suitable for distributed medium- to large-scale PV installations is presented. A simple partial power processing topology that is implemented exclusively with silicon carbide devices provides high efciency and high power density. A 3.5-kW, 100-kHz converter is designed and tested to verify the proposed methods. Index TermsDCDC converters, distributed photovoltaic (PV) architectures, partial power processing, silicon carbide devices.
Fig. 1. Distributed PV architecture with string/multistring dcdc converters.

I. INTRODUCTION

ISTRIBUTED photovoltaic (PV) architectures provide several benets compared with the central inverter systems, including higher energy yield, higher system availability, design exibility, and improved monitoring and diagnostic capabilities. For medium- to large-scale commercial and utility PV systems, a string/multistring dcdc converter topology with distributed maximum power point tracking (MPPT), as shown in Fig. 1, provides the best cost/performance operating point [1][3]. For a distributed system with string dcdc con-

Manuscript received June 1, 2012; revised August 30, 2012; accepted October 21, 2012. Date of publication December 20, 2012; date of current version March 18, 2013. This work was supported in part by the U.S. Department of Energy under Grant DE-EE0000572. This paper was presented at the IEEE Photovoltaic Specialists Conference, Austin, TX, June 38, 2012. This report was prepared as an account of work sponsored by an agency of the United States Government. Neither the United States Government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. References herein to any specic commercial product, process, or service by trade name, trademark, manufacturer or otherwise does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States Government or any agency thereof. The views and opinions of the authors expressed herein do not necessarily state or reect those of the United States government or any agency thereof. M. S. Agamy was with the GE Global Research Center, Niskayuna, NY 12309 USA. He is now with the School of Engineering, The University of British Columbia, Kelowna, BC V1Y 9W9, Canada (e-mail: mohammed. agamy@ubc.ca). S. Chi, A. Elasser, M. Harfman-Todorovic, Y. Jiang, F. Mueller, and F. Tao are with the General Electric Global Research Center, Niskayuna, NY 12309 USA (e-mail: Chis@ge.com; ahmed.elasser@ge.com; harfmanm@ge.com; yjiang@ge.com; mueller@ge.com; tao@ge.com). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/JPHOTOV.2012.2230217

verters that are rated at (1.56 kW), the estimated gain in energy yield is in the range of 39% over a standard central inverter systems [3]. However, the implementation of such distributed system requires high-performance, high-efciency dcdc converters [4][6]. Because of the high-efciency requirements, partial power processing converters are often used as a simple way to improve the overall conversion efciency by directly feeding forward a fraction of the input PV power to the output DC-bus [7][16]. In this paper, a high-efciency, high-power-density, partial power processing string-level dcdc converter topology is presented. The proposed transformerless partial power converter feeds a constant voltage dc-bus output, while the controller regulates the input PV string voltage to achieve MPPT. The development process was started by designing, building, and testing a baseline 3.5-kW converter switching at 30 kHz, which was built using 1200-V Si IGBT devices and silicon carbide (SiC) Schottky diodes. This was followed by the design of a second generation of 3.5-kW converters that operate at three times the switching frequency (100 kHz) to improve the power density while maintaining the high efciency. To keep the same high efciency as the 30-kHz version, the 100-kHz dcdc converter topology is built using state-of-the-art 1200 V SiC MOSFETs and SiC Schottky diodes. The impact of increasing the switching frequency on the efciency as well as on the size of passive components is investigated by comparing the 100-kHz converter performance to the baseline 30-kHz converter. The converter efciency is measured, and the weighted efciency value that is based on the California Energy Commission (CEC) is used as an evaluation metric. Different SiC MOSFETs have been tested, and their impact on the converter efciency was compared. Furthermore, the effect of SiC MOSFET cost and the viability of its application for solar converters are discussed.

2156-3381/$31.00 2012 IEEE

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IEEE JOURNAL OF PHOTOVOLTAICS, VOL. 3, NO. 2, APRIL 2013

Fig. 2.

(a) Full power versus (b) partial power processing structures.

Fig. 4. Buck-boost partial power dcdc converter with a SiC MOSFET and a SiC Schottky diode. One channel is rated at 1.75 kW. Input voltage: 200 V to 600 Vd c . Output voltage: 600 Vd c regulated. (a) One channel and (b) two channels.

Fig. 3. Fraction of total power processed versus voltage gain (V s /V in ) for a partial power converter.

II. CONVERTER TOPOLOGY In order to increase the energy yield by distributing the dcdc converters with individual MPPT controllers, the dcdc converter efciency has to be very high (> 98%). A simple approach to achieve this high efciency is to use partial power processing converters. These converters process only a part of the input PV power to generate the voltage differential between the PV string and the output dc-link, while the rest of the power is directly fed forward to the output. Fig. 2 shows the concept of a partial power processing converter, and Fig. 3 shows what percentage of power is being processed by the dcdc converter for a given input/output voltage gain. As an example, for a nominal maximum power point string voltage of 400 V and a dc bus of 600 V, only one third of the power is processed by the converter, while two-third is directly fed forward at almost 100% efciency. Therefore, this reduces the pressure on the converter block design without compromising the overall conversion efciency, which helps to reduce the system cost [17][21]. The proposed power converter is a nonisolated partial power buck-boost topology, as shown in Fig. 4. The output voltage Vout is the sum of the input PV voltage Vin and the voltage across capacitor Cs (Vs ). The converter can be operated as a single-channel or as a multichannel interleaved topology. Voltage gain of the regulated voltage Vs at medium to heavy loading conditions [where the inductor current is in the continuous conduction mode (CCM)] is given in (1), which is the conversion ratio of a noninverting buck-boost converter Vs = d Vin . 1d (1)

Fig. 5.

Stages of operation of the partial power processing dcdc converter.

In the discontinuous conduction mode (DCM), the capacitor voltage is given by Vs =

1 2

1+

2d2 Rload 1 Vin Lin fsw

(2)

where d is the duty ratio, fsw is the switching frequency, Lin is the input inductance, and Rload is the equivalent load resistance. The operation of the converter is similar to that of a simple boost circuit. The stages of operation over a switching period Ts are shown in Fig. 5 and can be summarized as follows. Stage 1 (0 < t < dTs ): In this stage, the MOSFET S is turned ON, and the inductor current builds up. Capacitor Cs delivers energy to the output. Stage 2 (dTs < t < T2 ): The MOSFET is turned OFF, and the inductor current is diverted to the diode D. The inductor energy is consequently discharged into the capacitor Cs . For continuous conduction mode, T2 = Ts , and the cycle ends at this stage. Stage 3 (T2 < t < Ts ): This stage occurs in the case of the DCM. In this mode, the power is transferred from the input

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Fig. 6. Timing diagram and idealized converter waveforms for the stages of operation shown in Fig. 5.

Fig. 7. Distributed PV architecture with multiple dcdc converters connected in parallel feeding a grid tied dcac inverter.

and output capacitors to the output. It is also worth noting that during this mode of operation, resonances can occur between the input inductor and the device capacitance. The DCM operation leads to zero current turn-on of the MOSFET, thus reducing the turn-on losses at light loads. Fig. 6 shows the timing diagram and key idealized converter waveforms for a single-channel converter. The grid tied inverter is used to regulate the dc-link voltage which is based on its modulation index. Double-line frequency oscillations (100 Hz/120 Hz) are considered too slow, and thus, the dclink voltage is treated as constant over the 100-kHz switching cycle. Since the output voltage is held constant by the inverter stage, the input voltage and the voltage across capacitor Cs continuously add up to equal the dc-link voltage. Using multiple interleaved channels reduces the high-frequency voltage ripple on capacitor Cs , and, consequently, helps to x the input voltage Vin at the maximum power operating point. A baseline 30-kHz design that uses Si IGBTs and SiC Schottky diodes has a weighted efciency of 98.22%. The weighted efciency is based on the CEC efciency formula [22] CEC weighted = 0.04 10% + 0.05 20% + 0.12 30% + 0.21 50% + 0.53 75% + 0.05 100% (3) where x % represents the efciency at x% of the converter-rated power. In order to reduce the current ripple at the input, interleaved converter legs can be used as shown in Fig. 4(b), where the two channels are switched 180 apart. Furthermore, the interleaved converter can be used to improve the light-load efciency by switching only a sufcient number of channels (when topologies with more than two input channels are used) that correspond to the power level processed by the converter. In a PV farm, multiple converters can be connected in parallel to feed a grid tied dcac inverter as shown in Fig. 7. In this case, the distributed dcdc converters are responsible for MPPT of their respective PV string(s), and the inverter maintains

a stiff dc bus and handles other grid requirements such as total harmonic distortion compliance, ride through, etc. High-powerdensity converters can, therefore, be attractive for their simplicity of integration with the PV strings without the need for large enclosures. III. BENEFITS OF AN ALL-SILICONE CARBIDE CONVERTER Many power converters are now designed with commercially available 600-, 1200-, and 1700-V SiC Schottky diodes to eliminate losses due to reverse recovery currents and thus improve the converter efciency. Recent progress in SiC materials development, processes, and fabrication has led to the availability of 1200-V SiC MOSFETs with current rating on the order of 1050 A from different sources such as Cree, GE, and Rohm. Improvements in substrate and material quality coupled with the process improvements (especially in the oxide interface) have improved the device reliability and robustness. The low forward drop of these MOSFETs due to their low on-state resistance Rd son (120 m Rd son at room temperature for 1200 V, 15 A parts typical) and their very low switching losses (switching times on the order of tens of nanoseconds) lead to signicant reductions in converter losses and hence to signicant increases in efciency. While these parts are currently enclosed in TO247 packages, they can operate at much higher junction temperatures, hence reducing the need for active cooling. The low switching and conduction losses, higher energy bandgap, and higher carrier mobility of the SiC material allow for a threefold increase of the switching frequency when compared with SiIGBT-based converters of comparable voltage and power ratings (in the 30100 kHz range) while maintaining the same efciency, if not slightly higher [23][27]. The use of SiC MOSFETs provides several benets compared with ultrafast Si IGBTs. Therefore, replacing the Si IGBT switch in the converter in Fig. 4 with a SiC MOSFET enables a signicant increase in converter power density by increasing the switching frequency. Fig. 8 shows the calculated reduction in passive component values compared with the baseline

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IEEE JOURNAL OF PHOTOVOLTAICS, VOL. 3, NO. 2, APRIL 2013

Fig. 8.

Normalized passive component size versus switching frequency. Fig. 10. Losses of a 3.5-kW partial power dcdc all SiC converter at different switching frequencies. TABLE I CONVERTER COMPONENTS

Fig. 9. Loss breakdown at 30 kHz for baseline 3.5-kW partial power dcdc Si IGBT-based converter versus an all SiC converter with SiC MOSFETs.

converter when the switching frequency is increased. Furthermore, the loss breakdown for the proposed converter shows that more than half of the losses are due to device the switching losses. Therefore, replacing the Si IGBT with the SiC MOSFET signicantly reduces total losses across all operating voltages, and thus, the overall weighted efciency can be improved by more than 1% at the same switching frequency. Fig. 9 shows a comparison of the loss breakdown values for the 3.5-kW partial power dcdc converter switching at 30 kHz and built using Si IGBTs versus the equally rated converter designed using SiC MOSFETs. The values that are shown in Fig. 9 were simulated using detailed device models and at different input voltage levels. The losses are reduced to less than half of their original value when SiC MOSFETs are used, due to the dominance of switching losses in the IGBT-based converter. Fig. 10 presents losses for the 3.5-kW SiC-based partial power dcdc converter as the switching frequency is increased. It can be concluded that a switching frequency greater than 100 kHz can be reached, while matching the same losses as in the baseline 30-kHz Si-IGBT converter. Based on Fig. 8, a 100-kHz design results in a 66% reduction in inductor size and a 60% reduction in the output capacitor size when compared with the 30-kHz design. Thus, the power density can be more than double while achieving the same

efciency and an improved control bandwidth due to the faster switching. Furthermore, the reduction in the size of passive components leads to a 4050% reduction in the passive component cost. While the SiC MOSFETs are still more expensive than Si IGBTs, their cost is gradually coming down with the increased market penetration. The 1200-V SiC MOSFET parts are now commercially available, and they cost $1/A to $1.5/A. Compared with Si IGBTs, the SiC MOSFETs cost is almost four to ve times higher. While this will impact the overall cost of the converter, it is expected that the SiC parts cost will come down substantially as the technology matures and gets adopted. A cost analysis of the 3.5-kW Si IGBT/SiC Schottky diode converter was performed and, based on the expected energy yield increase [3], the system net present value analysis is positive. While this may not be the case with the all-SiC version, it will reach it once the cost of SiC MOSFETs is on the order of two times the cost of Si IGBTs. As the SiC wafer technology matures and as the device yield increases, it is expected that the cost of SiC MOSFETs will continue to decrease, reaching the two times Si IGBT cost mark by 2015 [28]. IV. EXPERIMENTAL RESULTS A 3.5 kW, all SiC string-level MPPT dcdc converter with components that are listed in Table I was built and tested. Different values for passive components were used, and performance at switching frequencies of 30, 60, and 100 kHz was studied.

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Fig. 11. Converter prototypes for a 30-kHz hybrid Si/SiC topology (right) and a 100 kHz all SiC topology (left).

Fig. 13. Converter operational waveforms at 175 W. Ch1 (yellow): inductor current (1 A/div); Ch2 (blue): input PV current (1 A/div); Ch3 (magenta): SiC MOSFET voltage (100 V/div) and Ch4 (green): SiC Schottky diode voltage (100 V/div), time (2 s/div).

Fig. 12. Converter operational waveforms at 1.75 kW. Ch1 (yellow): inductor current (5 A/div); Ch2 (blue): input PV current (5 A/div); Ch3 (magenta): SiC MOSFET voltage (100 V/div) and Ch4 (green): SiC Schottky diode voltage (100 V/div), time (2 s/div).

Converter efciency with 1200-V SiC MOSFETs from three different sources was evaluated. The reduction in board size due to the increase of the switching frequency from 30 to 100 kHz is shown in Fig. 11. The 100-kHz converter has twice the power density (37 W/in3 ) compared with the 30-kHz board (18 W/in3 ). This is very benecial in simplifying the installation, since such a small size converter can be directly connected to the PV string or on a dc rail, instead of being placed in a string combiner box. Figs. 12 and 13 show the switch, diode, and inductor currents at 50% and 10% of full load, respectively. In Fig. 12, the inductor is operating in CCM, while in Fig. 13, at light load it is operating in DCM, which explains the resonance between the inductor and device capacitance as can be observed by the oscillations in current and voltage waveforms. Interleaved inductor currents are shown in Fig. 14 along with input and output voltages for a converter operating at rated input PV power. Fig. 15 shows the measured efciency of the converter at different switching frequencies with both channels switching at predened input power levels [according to (3)]. An average weighted CEC efciency of 99.1% was obtained at 30 kHz (a 1% average gain over the baseline topology), and an average weighted efciency of 98.34% was obtained at a switching frequency of 100 kHz. In Fig. 16, the switching of the interleaved converter channels is controlled based on the power level input to

Fig. 14. All SiC Converter operational waveforms at 3.5 kW. Ch1 (yellow): inductor current channel 1(iL in 1 ) (5 A/div); Ch2 (blue): inductor current chanel 2 (iL in 2 ) (5 A/div); Ch3 (magenta): input voltage (V in ) (500 V/div) and Ch4 (green): output voltage (V o u t ) (500 V/div), time (4 s/div).

Fig. 15. Weighted efciency at different PV input voltages for an all SiC converter switching at 30 kHz (blue square), 60 kHz (red triangle), and 100 kHz (orange circle).

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smaller converter is easier to connect directly to the string or to the mounting rail, and the capability of the SiC converter to operate at higher temperatures improves the reliability and makes the converter more suitable for outdoor operation in harsh environments. As the SiC technology matures, the cost of SiC devices will progressively drop, and the devices will become more readily available from many sources, which makes this technology very attractive for PV applications.

REFERENCES
[1] N. Kaushika and N. Gautam, Energy yield simulations of interconnected PV arrays, IEEE Trans. Energy Convers., vol. 18, no. 1, pp. 127134, May 2003. [2] N. Femia, G. Lisi, G. Petrone, G. Spagnuolo, and M. Vitteli, Distributed maximum power point tracking of photovoltaic arrays: Novel approach and system analysis, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2610 2621, Jul. 2008. [3] A. Elasser, M. Agamy, J. Sabate, R. Steigerwald, R. Fisher, and M. Harfman-Todorovic, A comparative study of central and distributed MPPT architectures for megawatt utility and large scale commercial photovoltaic plants, in Proc. Ind. Electron. Conf., 2010, pp. 27532758. [4] G. Lijun, R. Dougal, L. Shengyi, and A. Lotova, Parallel-connected solar PV system to address partial and rapidly uctuating shadow conditions, IEEE Trans. Ind. Electron., vol. 56, no. 5, pp. 15481556, May 2009. [5] H. Patel and V. Agarwal, MATLAB-based modeling to study the effects of partial shading on PV array characteristics, IEEE Trans. Energy Convers., vol. 23, no. 1, pp. 302310, Mar. 2008. [6] A. Chouder and S. Silvestre, Analysis model of mismatch power losses in PV systems, J. Solar Eng., vol. 131, pp. 24504-124504-5, May 2009. [7] N. Femia, G. Lisi, G. Petrone, G. Spagnuolo, and M. Vitteli, Distributed maximum power point tracking of photovoltaic arrays: Novel approach and system analysis, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2610 2621, Jul. 2008. [8] Y. Xue, L. Chang, S. Kjaer, J. Bordonau, and T. Shimizu, Topologies of single-phase inverters for small distributed power generators: An overview, IEEE Trans. Power Electron., vol. 19, no. 5, pp. 13051314, Sep. 2004. [9] J. Young-Hyok, K. Jun-Gu, P. Sang-Hoon, K. Jae-Hyung, and W. ChungYuen, C-language based PV array simulation technique considering effects of partial shading, in Proc. Int. Conf., Ind. Technol., 2009, pp. 16. [10] R. Bruendlinger, B. Bletterie, M. Milde, and H. Oldenkamp, Maximum power point tracking performance under partially shaded PV array conditions, in Proc. 21st Eur. PVSEC, Dresden, 2006, pp. 21572160. [11] R. Ramabadran and B. Mathur, Effect of shading on series and parallel connected solar PV modules, Modern Appl. Sci., vol. 3, no. 10, pp. 3241, Oct. 2009. [12] M. Garcia, J. Maruri, L. Marroyo, E. Lorenzo, and M. Perez, Partial shadowing, MPPT performance and inverter congurations: Observations at tracking PV plants, Prog. Photovoltaics: Res. Appl., pp. 529536, Apr. 2008. [13] U. Schwabe and P. Jansson, Performance measurement of amorphous and monocrystalline silicon PV modules in eastern U.S. ENERGY production versus ambient and module temperature, in Proc. Int. Instrum. Meas. Technol. Conf., Singapore, May 57, 2009, pp. 16361641. [14] S. Krauter, A. Preiss, N. Ferretti, and P. Grunow, PV yield prediction for thin lm technologies and the effect of input parameters inaccuracies, in Proc. 23rd Eur. Photovoltaic Sol. Energy Conf., Valencia, Spain, Sep. 15, 2008, pp. 740743. [15] (2010). [Online]. Available: http://www.steveransome.com/pubs.html [16] (2012). [Online]. Available: http://enphaseenergy.com/support/learning center.cfm [17] R. Adler, A new DC-DC switching regulator topology enhances efciency and power density, Proc. Power Con, pp. F1-1F1-4, 1984. [18] Min J. Lee, J. Kim, T. Kim, D. Yoo, and E. Song, A new topology with high efciency throughout all load range for photovoltaic PCS, IEEE Trans. Ind. Electron., vol. 56, no. 11, pp. 44274435, Nov. 2009. [19] H. Li, H. Chen, and L. Chang, Analysis and design of a single-stage parallel AC-to-DC converter, IEEE Trans. Power Electron., vol. 24, no. 12, pp. 29893002, Dec. 2009.

Fig. 16. All-SiC converter efciency versus converter input power at different input voltage levels with an output voltage of 600 V.

Fig. 17. Weighted efciency comparison using MOSFETs from three different sources.

the converter. For power levels less than 50% of the rated power, only one channel is activated; otherwise, both channels are allowed to switch. This improves the light-load efciency shown by the dashed lines at different voltage levels. The weighted efciency according to (3) is 98.34% if both channels are switching all the time and this efciency increases by 0.19 98.53% with the controlled switching that is based on input power level. Finally, a comparison of the weighted efciency of the converter using SiC MOSFETs from three different sources is presented in Fig. 17. The efciency measurements vary within 0.13%, which is a good indication of the maturation and uniformity of the device technology, and thus, the expected availability of high-performance SiC MOSFETs at low price points in the near future, making them a viable option for PV converter/inverter designs. V. CONCLUSION A high-frequency, high-power-density all-SiC dcdc partial power converter is proposed for distributed PV architectures. The use of an all-SiC converter signicantly reduces switching losses, which enables the higher frequency operation. The

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[20] M. de Rooij, J. Glaser, and R. Steigerwald, High efciency photovoltaic inverter, U.S. patent application # US2009/0323379A1. [21] B. Min, J. Lee, J. Kim, T. Kim, D. Yoo, and E. Song, A new topology with high efciency throughout all load range for photovoltaic PCS, IEEE Trans. Ind. Electron., vol. 56, no. 11, pp. 44274435, Nov. 2009. [22] M. Agamy, M. Harfman-Todorovic, A. Elasser, J. Sabate, R. Steigerwald, Y. Jiang, and S. Essakiappan, DC-DC converter topology assessment for large scale distributed photovoltaic plant architectures, in Proc. Energy Convers. Congress Expo., 2011, pp. 764769. [23] L. Stevanovic, K. Matocha, P. Losee, J. Glaser, J. Nasadoski, and S. Arthur, Recent advances in silicon carbide MOSFET power devices, in Proc. COMPEL, 2010, pp. 401407. [24] L. Stevanovic, K. Matocha, Z. Stum, P. Losee, A. Gowda, J. Glaser, and R. Beaupre, Realizing the full potential of silicon carbide power devices, in Proc. Appl. Power Electron. Conf., 2010, pp. 16. [25] J. Glaser, J. Nasadowski, P. Losee, A. Kashyap, K. Matocha, J. Garrett, and L. Stevanovic, Direct comparison of silicon and silicon carbide power transistors in high frequency hard-switched applications, in Proc. Appl. Power Electron. Conf., 2011, pp. 10491056. [26] H. Zhang, L. Tolbert, and B. Ozpineci, Impact of SiC devices on hybrid electric and plug-in hybrid electric vehicles, IEEE Trans. Ind. Appl., vol. 47, no. 2, pp. 912921, Mar./Apr. 2011. [27] PowerSiC: Silicon carbide devices for power electronics market: Status & forecasts, Yole Development Rep., 2006. Available: http://www.yole.fr [28] SiC 2010: How silicon carbide will impact electronics: A 10 year projection, Yole Development Rep., 2010. Available: http://www.yole.fr

Mohammed S. Agamy (S01M08SM11) received the B.Sc. (Hons.) and M.Sc. degrees in electrical engineering from Alexandria University, Alexandria, Egypt, in 2000 and 2003, respectively, and the Ph.D. degree in electrical engineering from Queens University, Kingston, ON, Canada, in 2008. He is currently an Assistant Professor with the School of Engineering, the University of British Columbia, Vancouver, BC, Canada. From 2008 to July 2012, he was a Lead Power Electronics Engineer with the General Electric Global Research Center, Niskayuna, NY, where his research interest included power supply technologies for renewable energy sources and medical equipment. From May 2003 to October 2008, he was with the Energy and Power Electronics Applied Research Laboratory, Queens University, as a Research Assistant and then a Postdoctoral Fellow. From September 2000 to April 2003, he was an Assistant Lecturer with Alexandria University. His current research interests include resonant converters, power factor correction, soft switching techniques and modeling, and control of power converters and electric machines. He holds one U.S. patent with six others pending and has over 30 published technical papers in refereed journals and conferences. Dr. Agamy serves as a Reviewer for the IEEE TRANSACTIONS ON POWER ELECTRONICS, THE IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, THE IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, the International Journal of Electronics, and several IEEE conferences.

Ahmed Elasser (S92M96SM12) was born in Demnate, Morocco, in 1963. He received the Ingenieur DEtat- diploma in electric power engineering from the Mohammadia School of Engineering, Rabat, Morocco, in 1985 and the M.S. and Ph.D. degrees in electric power engineering and power electronics from Rensselaer Polytechnic Institute, Troy, NY, in 1996. He was an Electrical Maintenance Engineer and then a Laboratory Engineer from 1986 to 1992 in Morocco. Since 1996, he has been with General Electric (GE) Global Research Center (GRC), Niskayuna, NY, where he is currently a Senior Professional. His previous research interests include the study, modeling, and application of power semiconductor devices, systems modeling and simulation, silicon carbide devices, six-sigma quality, and e-engineering. From 2002 to 2007, he led new ideas and innovation within the GRC Micro and Nano Structures Technology (MNST) organization, and he was the Head of the MNST Disruptive Technology Council. He worked across GRC with various technology councils to create a culture of innovation and growth. His current research interests include silicon carbide power device fabrication, design, modeling, testing, characterization, and applications. He has also been focusing on photovoltaic systems, focusing on plant architectures, distributed maximum power point tracking, and balance of systems work. He has authored or coauthored more than 20 papers, holds 12 patents, and has several patents pending. Dr. Elasser received a GE Dushman team award in 1996; he also received numerous awards from the GE Research Center for his technical and organizational contributions. GE Industrial Systems also recognized him for his numerous contributions to circuit breaker modeling and design. He has presented many IEEE conferences on power electronics, power semiconductor devices, and photovoltaic systems. He is a Regular Reviewer for various IEEE publications and conferences and has recently served as a Topic Chair for the energy conversion conference and expo (ECCE) 2011 sustainable energy track as well as a Session Chair.

Maja Harfman Todorovic (S02M08) received the Dipl. Ing. degree from the Faculty of Electrical Engineering, University of Belgrade, Belgrade, Serbia, in 2001 and the M.S. and Ph.D. degrees from Texas A&M University, College Station, in 2004 and 2008, respectively. Since March 2008, she has been a Lead Engineer in the Utility Power Electronics Laboratory, General Electric Research Center, Niskayuna, NY. Her research interests include converters for photovoltaic applications, subsea oil and gas applications, switching-mode power supply design, uninterruptible power systems, energy storage devices, and digital control of power converters. She holds one U.S. patent with eight others pending and has over 30 published technical papers in refereed journals and conferences. Dr. Harfman-Todorovic serves as a Reviewer for the IEEE TRANSACTIONS ON POWER ELECTRONICS, the IEEE TRANSACTIONS ON EDUCATION, the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, and several IEEE conferences.

Song Chi (S04M07) received the B.S. degree from Northeastern University, Shenyang, China, in 1993, the M.S. degree from Tsinghua University, Beijing, China, in 2000, and the Ph.D. degree from The Ohio State University, Columbus, in 2007, all in electrical engineering. He is currently with the General Electric (GE) Global Research Center, Niskayuna, NY. Prior to joining GE, he was a Senior Engineer with the Research and Engineering Center of Whirlpool. He has authored or coauthored 15 technical papers in IEEE conferences and journals. He has two patents pending. His research interests include sensorless control of ac drives, ux-weakening control of surface mounted permanent magnet/interior permanent magnet (SPM/IPM) machines, and the control of power conversion systems such as distributed solar systems and highdelity gradient ampliers of magnetic resonance (MR) scanners.

Yan Jiang (M11) received the B.S. and M.S. degrees in electrical engineering from Zhejiang University, Hangzhou, China, in 1999 and 2002, respectively, and the Ph.D degree in electrical engineering from the Center for Power Electronics Systems, Virginia Polytechnic Institute and State University, Blacksburg, in 2009. She has was an Application Engineer with Linear Technology Corporation, Milpitas, CA, from 2008 to 2010. She is currently an Electrical Engineer with General Electric Global Research Center, Niskayuna, NY. She has authored or co-authored 14 technical papers in IEEE journals and conferences. Her research interests include photovoltaic inverters, power electronics for healthcare applications, SiC devices, electronic ballasts, power factor correction techniques, power integration and packaging, electromagnetic interference lter design, power converter modeling and control, and high-frequency dc/dc converters.

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Frank Mueller attended Rensselaer Polytechnic Institute (RPI), Troy, NY, in 1977, pursuing a major in physics. In 1979, he enlisted in the U.S. Air Force where he completed a Navy ET-A school at Great Lakes Naval Base and then specialized in Meteorological Equipment training at Chanute Air Force Base (AFB), IL (he graduated at the top of his class). Afterwards, he went to Blytheville AFB, AR, where he maintained the weather radar and other meteorological equipment for the base. In 1983, he joined the microprocessor laboratory at RPI assisting in lab preparations and later also supported a Power Electronics Lab which included laying out gate drive circuits. In 1996 he joined General Electric and has been active in Power Electronics testing and layout. He has experience in optics, ultra-high vacuum systems, and high-voltage work up to 160 kV and has been leading his organizations safety program since 1999. He holds two U.S. patents and has two pending.

Fengfeng Tao received the B.S. and M.S. degrees from Tsinghua University, Beijing, China, in 1990 and 1996, respectively, and the Ph.D. degree from Virginia Polytechnic Institute and State University, Blacksburg, in 2001. He joined the General Electric Global Research Center, Niskayuna, NY, in 2002 and has since been a member of the power electronics team and, more recently, a member of the high-frequency power conversion technology laboratory. His research interests include high-frequency power conversion, novel topologies, solar inverters, microinverters, and converters, as well as power electronics converters controls. He has authored or coauthored 16 technical papers in IEEE conferences and journals. He holds seven patents and has several pending.