[CS 2842]

UNIVERSITY OF MORATUWA
FACULTY OF ENGINEERING DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING BSc Engineering Honours Degree Semester 2 Examination: 2010/2011

CS2842: COMPUTER SYSTEMS

Time allowed: 2 Hours November 2011

ADDITIONAL MATERIAL: None

INSTRUCTIONS TO CANDIDATES: 1. This paper consists of 4 questions in 4 pages. 2. Answer all 4 questions. 3. Start answering each of the 4 main questions on a new page. 4. The maximum attainable mark for each question is given in brackets. 5. This examination accounts for 60% of the module assessment. 6. This is a closed book examination. NB: It is an offence to be in possession of unauthorised material during the examination. 7. Only calculators approved and labelled by the Faculty of Engineering are permitted. 8. Assume reasonable values for any data not given in or with the examination paper. Clearly state such assumptions made on the script. 9. In case of any doubt as to the interpretation of the wording of a question, make suitable assumptions and clearly state them on the script. 10. This paper should be answered only in English.

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[CS 2842] Q1. [25 marks]

a) Explain three representations used in computer systems for representing signed integers. List the range for each representation (when using 8 bits) and comment on the uniqueness of the code for 0 in each representation. [9 marks] b) Convert following binary numbers into octal and hexadecimal. Clearly show the steps you followed. [4 marks] i. 1100 1100 1001 ii. 1100 1001 1011 1110 c) What is the Von Neumann Architecture? [3 marks] d) Volatility and latency are two main characteristics used to describe memory technologies. i. Explain the two characteristics and their importance. [2 marks] ii. Compare the three memory technologies registers, RAM and Hard disk drives using the above two characteristics. [3 marks] e) What is a memory controller? What is the purpose of a memory controller? [4 marks]

Q2.

[25 marks]

a) Explain the structure of the CPU of a general purpose computer. List major logical entities, explain their responsibilities, and explain how these entities interact. You may use a diagram to illustrate the interactions. [10 marks] b) Memory address register (MAR) and memory buffer register (MBR) are the two main registers involved in memory read and write operations. Explain the major steps involved in memory read and write operations making reference to these registers and any other important control signals. [5 marks] c) In describing the instruction set of a computer system, the operand addressing modes used by the instruction set is an important element. Explain five major operand addressing modes used in computer systems. [5 marks] d) Explain five major differences between low-level programming languages and high-level programming languages. [5 marks]

Q3.

[25 marks]

a) Briefly explain the role of the operating system as a resource manager. [3 marks] b) Explain the major difference in the scheduling policy between the multi-programmed batch systems and time sharing systems. [2 marks] c) What is a process with reference to the operating systems? Explain the major elements of a process? [5 marks]

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[CS 2842] d) Consider the following list of processes with specified arrival times and service times (shown in the following table). Process A B C D E F Arrival Time (s) 0 3 4 6 7 14 Service Time (s) 5 3 2 2 6 3

Show the execution timeline for each of the processes if they are executed in a uniprocessor system with the following scheduling algorithms. Wherever applicable, assume the time quantum for scheduler is 1 second. [8 marks] i. First Come First Served ii. Round Robin iii. Shortest Remaining Time iv. Shortest Process Next e) Draw the process state transition diagram for an operating system which uses nonpreemptive scheduling and has seven states (with two suspended states). [7 marks]

Q4. [25 marks] a) Write the assembly language code structure for the following code segment and explain how that assembly code performs the expected operation. [5 marks]
if (condition ) { then_part } else { else_part } next statement

b) Briefly explain the following concepts with reference to the I/O sub-systems in computer systems. [4 marks] i. Interrupt Driven I/O ii. Direct Memory Access (DMA) c) Briefly explain the five steps associated in the interrupt handling of a general computer system. [5 marks] d) Briefly explain the address translation process in a virtual memory management system where (single level) paging is employed. Consider using a diagram to illustrate your answer. [3 marks]

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[CS 2842] e) Consider a computer system that employs virtual memory system and has the following parameters. - The memory is byte addressable. - Virtual addresses are 16 bits wide. - The 16 bits of the virtual address are divided into two parts with 10 bits to specify the page table entry and 6 bits for the offset. - Physical addresses are 12 bits wide. - The memory system does not employ a Translation Lookaside Buffer (TLB) or a caching mechanism. Answer the following questions based on the above system. i. What is the maximum possible page size? [1 mark] ii. If the maximum possible page size is used for pages, what is the number of frames available in the memory system? [1 mark] iii. What are the two most commonly present control bits in a page table entry? Assuming there are no other control bits present in a page table entry, what is the minimum size of a page table entry? [2 marks] iv. The contents of the following memory locations are provided. Page Table Base Register (or Root Page Table Pointer) for the current process is set to Ox800. Assume page table entries use the most significant bits for the control bits. Calculate the physical address of the virtual address Ox0388. If the physical address cannot be calculated, explain why it cannot be calculated. Clearly show the steps you followed. [4 marks] Physical Address Ox808 Ox809 Ox80A Ox80B Ox80C Ox80D Ox80E Ox80F : Ox908 Ox909 Ox90A Ox90B Ox90C Ox90D Ox90E Ox90F Content Ox88 Ox98 OxA8 OxB8 OxC8 OxD8 OxE8 OxF8 : Ox98 Ox99 Ox9A Ox9B Ox9C Ox9D Ox9E Ox9F --- End of the Paper --: OxA08 OxA09 OxA0A OxA0B OxA0C OxA0D OxA0E OxA0F : OxB08 OxB09 OxB0A OxB0B OxB0C OxB0D OxB0E OxB0F : Ox08 Ox09 Ox0A Ox0B Ox0C Ox0D Ox0E Ox0F : Ox8B Ox9B OxAB OxBB OxCB OxDB OxEB OxFB

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